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FAQ
How to implement a Software Reset or a CPU Reset to have a shorter reset time than hardware reset methods? Issue Date:2021-09-01
In Nuvoton 8bit 8051 MCUs, there is a Software Reset function with a shorter reset time than hardware reset methods.
Users can set SWRST bit (CHPCON.7) to implement the Software Reset.
Example code:
TA = 0xAA; TA = 0x55; //enable Time Access Protection (TA)
CHPCON = 0x80; //write 1 to SWRST to trigger a Software Reset
/* Trap the CPU */
while(1);
User can check the SWRF (AUXR0.7) to identify whether the Software Reset is the last reset source.
While Nuvoton M0/M23/M4 MCUs have a CPU Reset function.
Users can set CPURST bit (SYS_IPRST0[1]) to implement the CPU Reset.
Example code:
SYS_REGLCTL = 0x59; SYS_REGLCTL = 0x16; SYS_REGLCTL = 0x88; //enable Register Lock Control
SYS_IPRST0 = 0x02; //write 1 to CPURST to trigger a CPU Reset
/* Trap the CPU */
while(1);
Users can check the System Reset Status Register (SYS_RSTSTS) to identify the reset source from the last operation. For example, CPU Reset Flag, CPURF (SYS_RSTSTS[7]), will be set if the reset source is CPU Reset.
Take MS51 as Master for example, reset by hardware will take 50ms for RC charging, while the duration from SWRST setting to Main entrance next time is about 800us, which is the reset time of Software Reset.
Products: | 마이크로컨트롤러(MCU) ,8비트 8051 MCU ,Arm Cortex-M0 MCUs ,Arm Cortex-M23 MCUs ,Arm Cortex-M4 MCUs |
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Applications: | |
Function: | Peripherals,System Operation,Reset,Software and Tools,Development-Environment,IAR,Keil |