MA35D05KJ67C

The NuMicro® MA35D0 series is a high-performance microprocessor designed for industrial edge device applications. It features dual 64/32-bit Arm® Cortex®-A35 cores, running at speeds of up to 650 MHz. Each core includes a 32/32 KB I/D L1 cache, and there is a 512 KB shared L2 cache.

The MA35D0 series comes with a built-in 128 KB IBR (Internal Boot ROM) and supports secure booting from four modes: USB, SD/eMMC, NAND, and SPI Flash Memory (SPI NOR/SPI NAND). To facilitate system design and manufacturing, the MA35D0 series offers an LQFP package stacked with DDR SDRAM, with capacities of up to  512 MB. This integration significantly reduces PCB layers, size, and electromagnetic interference (EMI).

For industrial applications requiring high security, the MA35D0 series provides practical security mechanisms such as Arm® TrustZone® technology and secure boot. It also includes built-in cryptographic accelerators for AES, SHA, ECC, RSA, SM2/3/4, and a TRNG, as well as Key Store and OTP memory to protect sensitive and high-value data.

In addition to security features, the MA35D0 series offers high-speed connectivity and advanced control interfaces suitable for edge device applications. These include Megabit/Gigabit[*1] Ethernet, high-speed USB host and device, SD3.0/eMMC, and CAN FD. The series also features an LCD Display controller supporting resolutions up to 1280 x 800 at 60 fps, a 2D graphic engine, and JPEG image decoding capabilities[*2].

 

Key Features:

•  Core Sub-system
  Dual 64/32-bit Arm® Cortex®-A35 cores running up to 650 MHz
  - 32-bit Arm® Cortex®-M4 core running up to 180 MHz[*2]
  - Real-Time Clock (RTC)
       
Memory Sub-system
  - On-chip SRAM 384 KB (256 KB for System + 128 KB for RTP)
  - Multi-Chip Package (MCP) DDR SDRAM
       
Security Sub-system
  - Trusted Secure Island (TSI) [*2]
  - Supports Arm® TrustZone®
  - Supports Secure Boot
  - Cryptographic
    - Advanced Encryption Standard (AES)
    - Secure Hash Algorithm (SHA)
    - Elliptic Curve Cryptography (ECC)
    - Rivest,Shamir and Adleman Cryptography (RSA)
    - SM 2/3/4
    - True Random Number Generator (TRNG)
  - Key Store
    One-Time- Programming (OTP) Memory
       
Display and Video Sub-system[*2]
  - TFT-LCD display Interface in RGB 24-bit/18-bit
  - Display Resolution up to 1280x800 @60 FPS
  - 2D Graphic Engine (GFX)
  - JPEG Image Decoder
       
Connectivity and I/O Sub-system
  - Peripheral DMA (PDMA)
  - High-Speed Connectivity
    - Megabit/Gigabit Ethernet MAC [*1]
    - USB 2.0 High Speed Host and Device
    - Secure Digital Host Controller (SDHC)
  - Serial Connectivity
    - CAN FD
    - Quad SPI
    - I²S
    - UART
    - I²C
  - External Memory Interface
    - External Bus Interface (EBI)
  - Control Interface
    - Enhanced PWM (EPWM)
    - 32-bit Timer PWM
    - Enhanced Capture (ECAP) and Quadrature Encoder Interface (QEI)
  - Analog Peripherals
    - Analog-to-Digital Converter (ADC)

Note[1] Depends on part number; please refer to the Selection Guide for more details
Note [2] Available on specific part number only; please refer to the Selection Guide for more details.