The NuMicro^® M55M1 series is a new generation AI microcontroller, which delivers up to 110 GOPS of AI computing power, specifically designed for Endpoint AI such as data recognition and intelligent audio. The M55M1 is a 32位 microcontroller based on a 220 MHz Arm^® Cortex^®-M55 core, featuring an Arm^® Ethos™-U55 Neural Processing Unit (NPU) as a coprocessor to accelerate neural network operations. In addition to its outstanding AI performance, the M55M1 also includes DSP extensions, vector extensions (Helium), double-precision FPU, 2 sets of 16-channel PDMA controllers and 1 set of 2-channel GDMA controller, making it an ideal choice for embedded applications, especially those requiring intensive computation such as audio processing, communications, digital signal processing, machine learning and sensor fusion.

Flexible Memory & Expansion Options

The M55M1 series is equipped with up to 1.5 MB of on-chip RAM and 2 MB of Flash memory, and features OctoSPI and HyperBus interfaces to support the expansion of RAM and Flash memory capacity. The M55M1 supports a low supply voltage range from 1.7Vto 3.6V and operates within a temperature range of -40°C to +105°C.

Energy-Saving Design & Robust Security

For power consumption and security, the M55M1 offers five low-power modes and supports a variety of peripherals, including CCAP, DMIC, I²C, SPI, Timer, UART, ADC, and GPIO that can continue to operate in low-power mode. In addition, the M55M1 features multi-level security mechanisms, including secure boot, TrustZone^®, TRNG, key storage, crypto accelerators, tamper detection, and PSA Level 2 compliance, providing reliable protection for IoT and embedded applications.

Rich High-Speed Communication Interfaces

The M55M1 series also offers a rich set of communication and peripheral interfaces, including 10/100 Ethernet MAC with RMII, 1 set of USB High-Speed OTG with PD (Power Delivery) function and supporting USB Type-C connector, 1 set of USB Full-Speed OTG, 2 sets of CAN FD, 1 set of I3C, 4 sets of I²C, 2 sets of QSPI, 4 sets of SPI/I²S, 2 sets of I²S, 10 sets of UART, 1 set of USCI, 2 sets of SDIO, 3 sets of ISO-7816-3 smart card interfaces, 1 set of PSIO, 8位 camera capture interface (CCAP), and digital microphone input (DMIC).

Comprehensive Analog and Precision Control

In terms of analog and control features, the M55M1 series implements 2 sets of 12位 5 Msps SAR ADCs, 2 sets of 12位 1 Msps buffered DACs, 4 sets of analog comparators, up to 24-channel 200 MHz PWM outputs, 4 sets of QEI, and 4 sets of input capture units.

Flexible IDE Compatibility and Debugging Tools

For development tool support, Nuvoton provides the NuMaker-X-M55M1D evaluation board and the Nu-Link debugger tool. In addition, it supports commonly used development environments such as Keil MDK, IAR EWARM, and Eclipse IDE with GNU GCC.

Table 1‑1 NuMicro M55M1 Series Key Features Support Table

The M55M1 series benefits the design of a wide range of applications such as:

• Human presence detection
• Robotics
• Smart Toys
• Sensor Hub
• Smart Appliances
• PC Accessories
• AIoT

Key features:  

Operating Characteristics

• Voltage range: 7V to 3.6V
• Temperature range: -40°C to +105°C
• ESD HBM ±3 kV
• EFT ±4 kV
• Latch Up: ±200 mA

 Core

• Arm Cortex-M55 core, running up to 220 MHz
• Arm M-profile vector extension enabled (Helium)
• IEEE 754 compliant floating-point unit (FPU) supporting vector and scalar half-, single-, and double-precision floating-point calculations
• Arm TrustZone technology including an 8-region secure memory protection unit and an 8-region non-secure memory protection unit
• Arm custom instructions (ACI) implemented for accelerating specific math operations
• L1 cache: 16 KB instruction cache (I-cache) and 16 KB data cache (D-cache)

Micro-NPU

• Arm Ethos-U55 Micro-Neural Processing Unit
  • Running up to 220 MHz
  • 256 MACs
  • 110 GOPS (220 MHz x 256 MACs x2)

Memories

• Secure Boot ROM (MaskROM): 24 KB
• APROM Flash: 2 MB (dual banks of 1MB each)
• LDROM Flash: 8 KB
• OTP Flash: 3 KB
• XOM (Execution-only memory): 4 regions
• SRAM0: 512 KB
• SRAM1: 512 KB
• SRAM2: 320 KB
• SRAM3: 8 KB
• LPSRAM: 8 KB
• I-TCM: 64 KB
• D-TCM: 128 KB

External Memory Interface

• SPIM (with HyperBus interface) supporting SPI Flash, QSPI, OSPI, and HyperFlash memories up to 32 MB, featuring AES on-the-fly decryption
• External bus interface (EBI) supporting 8- or 16-bit data width, i80 mode LCD interface, and up to three sets of 1 MB memory banks

Clocks

• 4~32 MHz high-speed external crystal oscillator
• 768 kHz low-speed external crystal oscillator
• 48 MHz high-speed internal RC oscillator
• 12 MHz high-speed internal RC oscillator with 2% deviation
• 1~8 MHz high-speed internal RC oscillator
• 32 kHz low-speed internal RC oscillator
• 2 sets of programmable APLL, up to 480 MHz

Direct Memory Access (DMA)

• 2 sets of 16-channel PDMA controllers
• 1 set of 2-channel GDMA controller (DMA-350)
• 1 set of 4-channel LPPDMA controller

Security Functions

• Secure Boot
• Key derivation function (KDF)
• Cryptography accelerator including algorithms up to AES-256, ECC-571, SHA-512, HMAC-512, RSA-4096, and a pseudo random number generator (PRNG)
• True random number generator (TRNG)
• Key store module for key management, including a dedicated Key store SRAM buffer
• Four eXecute-Only-Memory (XOM) regions for code protection
• Write protection in Flash memory

Power Management

• Active power: 94.5 μA/MHz at 220MHz
• Normal power-down (NPD4) with 64 KB SRAM retention: 23.26 μA at 3.0V
• Standby power-down (SPD1) with 64 KB SRAM retention: 1 μA at 3.0V (SRAM retention up to 64/128/192/256/320/384/448/512 KB)
• Deep power-down (RTC on): 0.74 μA at 3.0V
• RTC (V_BAT): 0.51 μA
• Power-on reset
• Brown-out reset
• Low voltage reset
• Built-in LDO voltage regulators

Timer and Control Peripheral

• 4 sets of 32-bit timers, supporting PWM function
• 2 sets of 32-bit low power timers, supporting PWM function
• 2 sets of tick timers
• 1 set of 24-bit count-down SysTick timer
• 2 sets of watchdog timers
• 2 sets of window watchdog timers
• Up to 12 enhanced PWM (EPWM) outputs generated by twelve 16-bit counters
• Up to 12 basic PWM (BPWM) outputs generated by two 16-bit counters
• Up to 4 sets of enhanced quadrature encoder interfaces (EQEI)
• Up to 4 sets of enhanced input capture unit (ECAP)

Connectivity Interfaces

• Up to 10 sets of UART interfaces
• Up to 1 set of LPUART interface
• Up to 4 sets of I²C interfaces, up to 1 Mbps
• Up to 1 set of LPI2C interface, up to 1 Mbps
• Up to 1 set of I3C interface, up to 25 Mbps
• Up to 4 sets of SPI/I²S interfaces
• Up to 1 set of LPSPI interface
• Up to 2 sets of Quad-SPI interfaces
• Up to 1 set of USCI, supporting UART/I²C/SPI
• Up to 2 sets of SDIO interfaces
• Up to 3 sets of ISO-7816-3 smart card interfaces, supporting UART
• Up to 2 sets of I²S interfaces
• Up to 1 set of 8-ch programmable serial I/O (PSIO) interface
• DMIC (Digital microphone inputs), supporting 4-channel PDM interface and voice activity detection (VAD)
• 6x8 Keypad Interface (KPI)

Advanced Connectivity

• Up to 2 sets of CAN FD interfaces
• USB 2.0 high speed device/host/OTG controller with dedicated DMA and on-chip PHY, supporting power delivery (PD) function
• USB 2.0 full speed device/host/OTG controller with on-chip PHY, supporting crystal-less at device mode
• 10/100 Ethernet MAC with RMII interface, supporting IEEE 1588 v2 precision time protocol

Low Power Peripherals

• LPSRAM: 8 KB
• Up to 1 set of LPUART interface
• Up to 1 set of LPI2C interface, up to 1 Mbps
• Up to 1 set of LPSPI interface
• 1 set of 4-channel LPPDMA controller
• 2 sets of 32-bit low power timers, supporting PWM function
• 1 set of 12-bit, up to 24-ch, 2 Msps SAR LPADC

Camera Capture Interface Controller (CCAP)

• Resolution up to 640x480 pixels
• Supports motion detection engine with 320x240 image data in Power-down mode

Analog Peripherals

• 1 set of 12-bit, up to 24-channel, 5 Msps SAR ADC
• 1 set of 12-bit, up to 24-channel, 2 Msps SAR LPADC
• Up to 2 sets of 12-bit, 1 Msps buffered DAC
• Up to 4 sets of analog comparators (ACMP)
• Built-in internal reference voltage
• Built-in temperature sensor

Cyclic Redundancy Calculation (CRC)

Real Time Clock (RTC), Tamper and V_BAT Power Domain

• Supports independent V_BAT power pin for RTC and tamper detection
• Supports calendar RTC
• Backup registers: 80 bytes
• Tamper detection: 6 pins

I/O Features

• Up to 142 GPIO with interrupt capability
• GPIO with internal pull-up / pull-down resistor

96-bit Unique ID (UID)

128-bit Unique Customer ID (UCID)

Package

• Package is Halogen-free, RoHS-compliant and TSCA-compliant.

Package

 -Package is Halogen-free, RoHS-compliant and TSCA-compliant.  

Development Environment:

Evaluation Board: