Suche
Häufig gestellte Fragen / How to view code size and SRAM usage in the Keil development environment?
https://www.nuvoton.com.cn/support/technical-support/faq/d574ea4c-04f1-11ea-b113-05daf7eedf03/
How to view code size and SRAM usage in the Keil development environment? 1436421900000 After programming, Keil will display the following message: Program Size: Code=86496 RO-data=9064 RW-data=1452 ZI-data=16116 The parameters have the following meanings: Code The space occupied by the code. RO-data The read-only constant, e.g. const. RW-data (Read Write) The initialized read-write variables. ZI-data (Zero Initialize) The uninitialized read-write variables. ZI-data is not regarded as code because it is not initialized. Note: The unit is Byte. When programming, the occupied space in Flash is: Code+(RO-data)+(RW-data) When a program is running, the space used for the internal SRAM inside the chip is: (RW-data)+(ZI-data)
Häufig gestellte Fragen / Can the WDT controller wake up the CPU from Power-down mode?
https://www.nuvoton.com.cn/support/technical-support/faq/d57a1a6f-04f1-11ea-b113-05daf7eedf03/
Can the WDT controller wake up the CPU from Power-down mode? 1436422200000 Yes, the WDT controller supports the WDT wake-up function. The user has to set the WDT wake-up enable bit (WTWKE = 1). After the WDT wake-up enable bit is set (WTWKE=1) and WDT counter overflow trigger WDT-timeout event flag is set (WTIF=1), the WDT controller will wake up the CPU form Power-down mode.
Häufig gestellte Fragen / What is the SPI 2-bit transfer mode and how to use it?
https://www.nuvoton.com.cn/support/technical-support/faq/d57efc72-04f1-11ea-b113-05daf7eedf03/
SPI 2-bit mode What is the SPI 2-bit transfer mode and how to use it? 1436422440000 The 2-bit transfer mode means that the SPI controller transmits 2-bit data output at the same edge of serial clock, and meanwhile it also receives 2-bit data input at the opposite edge of serial clock during a serial clock cycle. Accordingly, one SPI Master controller can access data with two external Slave devices simultaneously.
Häufig gestellte Fragen / Do the Nu-Link, Nu-Link-Pro and Nu-Link-Me support devices from other companies?
https://www.nuvoton.com.cn/support/technical-support/faq/d58dc98b-04f1-11ea-b113-05daf7eedf03/
Do the Nu-Link, Nu-Link-Pro and Nu-Link-Me support devices from other companies? 1437114660000 No, the Nu-Link, Nu-Link-Pro and Nu-Link-Me only support the NuMicro® Family series.
Häufig gestellte Fragen / What version of the Keil RVMDK and IAR EWARM is supported for Nu-Link?
https://www.nuvoton.com.cn/support/technical-support/faq/d592d29e-04f1-11ea-b113-05daf7eedf03/
What version of the Keil RVMDK and IAR EWARM is supported for Nu-Link? 1437114900000 Keil RVMDK: V4.1 or a later version. IAR EWARM: V5.5 or later version. Users need to install a Nu-Link driver corresponding to the Keil RVMDK or IAR EWARM.
Häufig gestellte Fragen / What is the function of LDO (Low Dropout Regulator) in the NuMicro® Family? Can LDO output be used to drive other external chips?
https://www.nuvoton.com.cn/support/technical-support/faq/d5a1c6c7-04f1-11ea-b113-05daf7eedf03/
What is the function of LDO (Low Dropout Regulator) in the NuMicro® Family? Can LDO output be used to drive other external chips? 1441790775312 The LDO mainly provides a stable operating voltage of 1.8V for use in internal circuit of a chip, including RC oscillator, SRAM, and Flash. In consideration of chip operational stability, it is not recommended that LDO output be used to drive other external chips.
Häufig gestellte Fragen / How does a user check the state before entering hard fault when a hard fault occurs on a M0/M4 microcontroller (MCU)?
https://www.nuvoton.com.cn/support/technical-support/faq/d5c135b3-04f1-11ea-b113-05daf7eedf03/
How does a user check the state before entering hard fault when a hard fault occurs on a M0/M4 microcontroller (MCU)? 1444982100000 Since the hard fault is an exception interrupt, user can search code address from the memory address recorded by a stack pointer before entering a hardfault handler, and find the hard fault according to the address. The steps are as follows: Get a starting address of the stack pointer in Debug mode; Enter the starting address to query stack of information in the memory; The stacked 7th address is the code address before entering an interrupt; View the content of the code address in the program window, which is the state before entering the hard fault. • Keil RVMDK: • IAR EWARM:
Häufig gestellte Fragen / How to allow a chip not to be reset when entering Debug mode?
https://www.nuvoton.com.cn/support/technical-support/faq/d5c99a26-04f1-11ea-b113-05daf7eedf03/
How to allow a chip not to be reset when entering Debug mode? 1444895787314 • Keil RVMDK: User can complete the setting in the Target Option window of Keil compiler environment: Select ”Not reset” in the pull-down menu of the Reset Options in the Debug tab; Uncheck the “Update Target before Debugging” in the Utilites tab. After the setup, as shown below, the chip will not be reset when entering Debug mode. User can see the current state of the chip in Debug mode under the Keil compiler environment. • IAR EWARM: The function ”Not reset and enter Debug mode” is not supported in the current IAR compiler environment.
Häufig gestellte Fragen / Before entering Power-down mode, how does a user configure I/O pins to avoid the leakage problem?
https://www.nuvoton.com.cn/support/technical-support/faq/d5cea339-04f1-11ea-b113-05daf7eedf03/
Before entering Power-down mode, how does a user configure I/O pins to avoid the leakage problem? 1443167760000 Before entering Power-down mode, the user needs to configure I/O pins based on the setting of peripheral applications. If the I/O pin function is set as PWM output, the output is high or low level depending on the state of the peripheral Power-down mode (at this time, it cannot be configured by GPIO output; to use the GPIO output again, it needs to be re-configured as GPIO output). If the I/O pin is not used, it can be set as Quasi-bidirectional mode to avoid pin floating.
Häufig gestellte Fragen / Why does the "Invalid Chip ID" error message appear and Part No. show Unknown when using the NuMicro® ISP Programming Tool connection?
https://www.nuvoton.com.cn/support/technical-support/faq/d5d3ac4c-04f1-11ea-b113-05daf7eedf03/
Why does the "Invalid Chip ID" error message appear and Part No. show Unknown when using the NuMicro® ISP Programming Tool connection? 1444978740000 In the installation folder for the ISP Programming Tool, “config.ini” records PDID (Part Device Identification Number) of all the NuMicro® series. After connection, the ISP Programming Tool will compare the PDID of target chip with the “config.ini”. If the “config.ini” gets lost or the PDID of target chip is not listed in “config.ini”, the "Invalid Chip ID" error message appears on the ISP Programming Tool, or Part No. shows Unknown. User can download the latest version of NuMicro® ISP Programming Tool from Nuvoton website.
粤公网安备 44030502010001号