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Product Results:NUC100-LE2C, Matches
Keyword Results:NUC100-LE2C, 218 Matches

よくあるご質問 / What interfaces does In System Programming (ISP) tool support for system upgrades?



What interfaces does In System Programming (ISP) tool support for system upgrades? 1427853480000 The ISP tool supports many interfaces for system upgrades, including UART, USB, I2C, SPI, CAN, RS485, I/O and Ethernet, and provides open source code for users to modify to conform to their own system environment.


よくあるご質問 / What needs to be considered when switching clock sources?



What needs to be considered when switching clock sources? 1427879700000 Before clock switching, both the pre-selected and newly selected clock sources must be stable. The pre-selected clock source can be turned off after the switching is complete. The register CLKSTATUS maintains the state of each clock source. User may read the CLKSTATUS value to determine if the clock source is stable.


よくあるご質問 / Why are the paired PWM output frequency impacted each other when setting two independent PWM outputs with the BSP driver library provided by Nuvoton?



PWM Pre-scale Why are the paired PWM output frequency impacted each other when setting two independent PWM outputs with the BSP driver library provided by Nuvoton? 1429780680000 This is because the paired PWM output PWM01(PWM23, PWM45) uses the same 8-bit pre-scale. Setting one of the paired PWM output using the driver library will impact the other PWM output frequency . The other paired PWM will be needed if the user wants to use the driver library to generate PWM output with a different frequency.


よくあるご質問 / What are the Dead Zone generator of PWM and its features?



PWM complementary pair; Dead Zone What are the Dead Zone generator of PWM and its features? 1429776060000 The Dead Zone generator of PWM is used for MOSFET protection, especially for the motor driver system to avoid both of the top and bottom MOSFET to be turned on simultaneously.


よくあるご質問 / Does the PWM generator support the entire output signal to be high level or low level?



PWM duty Does the PWM generator support the entire output signal to be high level or low level? 1432713960000 Depending on the NuMicro™ series, the PWM generator in some chips must have at least one count for high level or low level pulse width within the cycle of the entire PWM output waveform. The NUC131, M0518 and M451 series support the entire output signal to be high level or low level.


よくあるご質問 / When the CNR register can be auto-reloaded into a down counter for Capture?



When the CNR register can be auto-reloaded into a down counter for Capture? 1429776360000 When the flag CAPIFx (Capture interrupt event flag) is set by hardware, the value of CNR register will be loaded into the down counter.


よくあるご質問 / Does the SPI controller support the general SPI mode 0 - 3?



Does the SPI controller support the general SPI mode 0 - 3? 1429776660000 Yes, it is easy to configure the SPI registers for setting the idle polarity of serial clock, the clock edges to transmit and receive data to match the general SPI mode 0 - 3.


よくあるご質問 / What needs to be considered in the VREF pin when using an ADC?



What needs to be considered in the VREF pin when using an ADC? 1429777080000 For all NuMicro™ series, the VREF pin must be connected with an external capacitor, and its capacitance value needs to limit power supply ripple to be less than one LSB of ADC to avoid power noise to interfere with ADC accuracy. For example, if the 12-bit ADC and VREF voltage is 3.3V, the size of the ripple should be less than 3.3/(2^12) = 0.8mV.


よくあるご質問 / How many bits are required to present the accuracy and linearity of conversions when an analog-to-digital converter (ADC) in the NuMicro® series operates at the highest speed?



How many bits are required to present the accuracy and linearity of conversions when an analog-to-digital converter (ADC) in the NuMicro® series operates at the highest speed? 1432716600000 The absolute accuracy formula is: N - log2 (EA), wherein EA refers to the absolute error; N refers to converter bits. The linearity formula is: N - log2 (INL), wherein INL refers to the Integral nonlinearity error; N refers to converter bits. Refer to the ADC electrical characteristics chapter in the relevant Datasheet. The M051DN/DE series is used as example in the following table for illustration. In the specification, the maximum absolute error is 4 LSB, and the maximum Integral nonlinearity error is 4 LSB. Thus, the absolute accuracy is 12 bit - log2 (4) = 10 bit. The linearity is 12 bit - log2 (4) = 10 bit. For other series, please refer to the relevant Datasheet.


よくあるご質問 / What is the resolution of a PWM prescaler, a frequency divider, and a timer?



What is the resolution of a PWM prescaler, a frequency divider, and a timer? 1430989560000 Each PWM in most of the NuMicro™ series consists of an 8-bit prescaler, a 1/2/4/8/16 frequency divider and two 16-bit timers. However, each PWM in the M451 series consists of an 12-bit prescaler and two 16-bit timers.