CMSIS-Core (Cortex-M): Data Fields

| CMSIS-Core (Cortex-M) Version 5.0.2 CMSIS-Core support for Cortex-M processor-based devices

- Main Page
- Usage and Description
- Reference

- Data Structures
- Data Fields

- All
- Variables

- _
- a
- b
- c
- d
- e
- f
- h
- i
- l
- m
- n
- p
- q
- r
- s
- t
- u
- v
- w
- z

All Data Structures Files Functions Variables Enumerations Enumerator Groups Pages
Here is a list of all struct and union fields with links to the structures/unions they belong to:

### - _ -

- _reserved0 : APSR_Type , CONTROL_Type , IPSR_Type , xPSR_Type

### - a -

- ACPR : TPI_Type
- ACTLR : SCnSCB_Type
- ADR : SCB_Type
- AFSR : SCB_Type
- AIRCR : SCB_Type

### - b -

- b : APSR_Type , CONTROL_Type , IPSR_Type , xPSR_Type
- BFAR : SCB_Type

### - c -

- C : APSR_Type , xPSR_Type
- CALIB : SysTick_Type
- CCR : SCB_Type
- CFSR : SCB_Type
- CLAIMCLR : TPI_Type
- CLAIMSET : TPI_Type
- COMP0 : DWT_Type
- COMP1 : DWT_Type
- COMP2 : DWT_Type
- COMP3 : DWT_Type
- CPACR : SCB_Type
- CPICNT : DWT_Type
- CPUID : SCB_Type
- CSPSR : TPI_Type
- CTRL : DWT_Type , MPU_Type , SysTick_Type
- CYCCNT : DWT_Type

### - d -

- DCRDR : CoreDebug_Type
- DCRSR : CoreDebug_Type
- DEMCR : CoreDebug_Type
- DEVID : TPI_Type
- DEVTYPE : TPI_Type
- DFR : SCB_Type
- DFSR : SCB_Type
- DHCSR : CoreDebug_Type

### - e -

- EXCCNT : DWT_Type

### - f -

- FFCR : TPI_Type
- FFSR : TPI_Type
- FIFO0 : TPI_Type
- FIFO1 : TPI_Type
- FOLDCNT : DWT_Type
- FPCA : CONTROL_Type
- FPCAR : FPU_Type
- FPCCR : FPU_Type
- FPDSCR : FPU_Type
- FSCR : TPI_Type
- FUNCTION0 : DWT_Type
- FUNCTION1 : DWT_Type
- FUNCTION2 : DWT_Type
- FUNCTION3 : DWT_Type

### - h -

- HFSR : SCB_Type

### - i -

- IABR : NVIC_Type
- ICER : NVIC_Type
- ICPR : NVIC_Type
- ICSR : SCB_Type
- ICTR : SCnSCB_Type
- IP : NVIC_Type
- ISAR : SCB_Type
- ISER : NVIC_Type
- ISPR : NVIC_Type
- ISR : IPSR_Type , xPSR_Type
- IT : xPSR_Type
- ITATBCTR0 : TPI_Type
- ITATBCTR2 : TPI_Type
- ITCTRL : TPI_Type

### - l -

- LOAD : SysTick_Type
- LSUCNT : DWT_Type

### - m -

- MASK0 : DWT_Type
- MASK1 : DWT_Type
- MASK2 : DWT_Type
- MASK3 : DWT_Type
- MMFAR : SCB_Type
- MMFR : SCB_Type
- MVFR0 : FPU_Type
- MVFR1 : FPU_Type

### - n -

- N : APSR_Type , xPSR_Type
- nPRIV : CONTROL_Type

### - p -

- PCSR : DWT_Type
- PFR : SCB_Type
- PORT : ITM_Type

### - q -

- Q : APSR_Type , xPSR_Type

### - r -

- RASR : ARM_MPU_Region_t , MPU_Type
- RASR_A1 : MPU_Type
- RASR_A2 : MPU_Type
- RASR_A3 : MPU_Type
- RBAR : ARM_MPU_Region_t , MPU_Type
- RBAR_A1 : MPU_Type
- RBAR_A2 : MPU_Type
- RBAR_A3 : MPU_Type
- RESERVED0 : DWT_Type , FPU_Type , ITM_Type , NVIC_Type , SCB_Type , SCnSCB_Type , TPI_Type
- RESERVED1 : DWT_Type , ITM_Type , TPI_Type
- RESERVED2 : DWT_Type , ITM_Type , NVIC_Type , TPI_Type
- RESERVED3 : NVIC_Type , TPI_Type
- RESERVED4 : NVIC_Type , TPI_Type
- RESERVED5 : NVIC_Type , TPI_Type
- RESERVED7 : TPI_Type
- RNR : MPU_Type
- RSERVED1 : NVIC_Type

### - s -

- SCR : SCB_Type
- SHCSR : SCB_Type
- SHP : SCB_Type
- SLEEPCNT : DWT_Type
- SPPR : TPI_Type
- SPSEL : CONTROL_Type
- SSPSR : TPI_Type
- STIR : NVIC_Type

### - t -

- T : xPSR_Type
- TCR : ITM_Type
- TER : ITM_Type
- TPR : ITM_Type
- TRIGGER : TPI_Type
- TYPE : MPU_Type

### - u -

- u16 : ITM_Type
- u32 : ITM_Type
- u8 : ITM_Type

### - v -

- V : APSR_Type , xPSR_Type
- VAL : SysTick_Type
- VTOR : SCB_Type

### - w -

- w : APSR_Type , CONTROL_Type , IPSR_Type , xPSR_Type

### - z -

- Z : APSR_Type , xPSR_Type