| CMSIS-Core (Cortex-A) CMSIS-Core support for Cortex-A processor-based devices |

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Enumerations
ref_irq_ctrl.txt File Reference

## Enumerations
enum | IRQn_Type { SGI0_IRQn = 0 , SGI1_IRQn = 1 , SGI2_IRQn = 2 , SGI3_IRQn = 3 , SGI4_IRQn = 4 , SGI5_IRQn = 5 , SGI6_IRQn = 6 , SGI7_IRQn = 7 , SGI8_IRQn = 8 , SGI9_IRQn = 9 , SGI10_IRQn = 10 , SGI11_IRQn = 11 , SGI12_IRQn = 12 , SGI13_IRQn = 13 , SGI14_IRQn = 14 , SGI15_IRQn = 15 , VirtualMaintenanceInterrupt_IRQn = 25 , HypervisorTimer_IRQn = 26 , VirtualTimer_IRQn = 27 , Legacy_nFIQ_IRQn = 28 , SecurePhyTimer_IRQn = 29 , NonSecurePhyTimer_IRQn = 30 , Legacy_nIRQ_IRQn = 31 }
| Definition of IRQn numbers. More...