| CMSIS-Core (Cortex-A) CMSIS-Core support for Cortex-A processor-based devices |

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Macros
CPACR Bits
Core Register Access » Coprocessor Access Control Register (CPACR)

Bit position and mask macros. More...

## Macros
#define | CPACR_ASEDIS_Pos 31U
| CPACR: ASEDIS Position.
#define | CPACR_ASEDIS_Msk (1UL << CPACR_ASEDIS_Pos)
| CPACR: ASEDIS Mask.
#define | CPACR_D32DIS_Pos 30U
| CPACR: D32DIS Position.
#define | CPACR_D32DIS_Msk (1UL << CPACR_D32DIS_Pos)
| CPACR: D32DIS Mask.
#define | CPACR_TRCDIS_Pos 28U
| CPACR: D32DIS Position.
#define | CPACR_TRCDIS_Msk (1UL << CPACR_D32DIS_Pos)
| CPACR: D32DIS Mask.
#define | CPACR_CP_Pos_(n) (n*2U)
| CPACR: CPn Position.
#define | CPACR_CP_Msk_(n) (3UL << CPACR_CP_Pos_(n))
| CPACR: CPn Mask.

## Description

Bit position and mask macros.

## Macro Definition Documentation

## ◆ CPACR_ASEDIS_Msk

#define CPACR_ASEDIS_Msk (1UL << CPACR_ASEDIS_Pos)

CPACR: ASEDIS Mask.

## ◆ CPACR_ASEDIS_Pos

#define CPACR_ASEDIS_Pos 31U

CPACR: ASEDIS Position.

## ◆ CPACR_CP_Msk_

#define CPACR_CP_Msk_ | ( |  | n | ) | (3UL << CPACR_CP_Pos_(n))

CPACR: CPn Mask.

## ◆ CPACR_CP_Pos_

#define CPACR_CP_Pos_ | ( |  | n | ) | (n*2U)

CPACR: CPn Position.

## ◆ CPACR_D32DIS_Msk

#define CPACR_D32DIS_Msk (1UL << CPACR_D32DIS_Pos)

CPACR: D32DIS Mask.

## ◆ CPACR_D32DIS_Pos

#define CPACR_D32DIS_Pos 30U

CPACR: D32DIS Position.

## ◆ CPACR_TRCDIS_Msk

#define CPACR_TRCDIS_Msk (1UL << CPACR_D32DIS_Pos)

CPACR: D32DIS Mask.

## ◆ CPACR_TRCDIS_Pos

#define CPACR_TRCDIS_Pos 28U

CPACR: D32DIS Position.