| CMSIS-Core (Cortex-A) CMSIS-Core support for Cortex-A processor-based devices |

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Using CMSIS in Embedded Applications

To use the CMSIS-Core-A the following files are added to the embedded application:

- Startup File startup_<Device>.c with reset handler and exception vectors.
- System Configuration Files system_<Device>.c and system_<Device>.h with general device configuration (i.e. for clock and bus setup).
- Device Header File <Device.h> gives access to processor core and all peripherals.
- Memory Configuration Files mem_<device>.h contains basic memory configurations.
- Memory Management Unit Files mmu_<device>.c contains the memory management unit setup.

> ‍Note

> - The files Startup File startup_<Device>.c, System Configuration Files system_<Device>.c and system_<Device>.h, Memory Configuration Files mem_<device>.h, and Memory Management Unit Files mmu_<device>.c may require application specific adaptations and therefore should be copied into the application project folder prior configuration. The Device Header File <Device.h> is included in all source files that need device access and can be stored on a central include folder that is generic for all projects.

The `Reset_Handler` defined in Startup File startup_<Device>.c is executed after reset. The default initialization sequence is

- set the vector base address register (__set_VBAR),
- set stacks for each exception mode (__set_mode, __set_SP),
- call SystemInit.

After the system initialization control is transferred to the C/C++ run-time library which performs initialization and calls the main function in the user code. In addition the Startup File startup_<Device>.c contains a weak default handler implementation for every exception. It may also contain stack and heap configurations for the user application.

The System Configuration Files system_<Device>.c and system_<Device>.h performs the setup for the processor clock and the initialization of memory caches, memory management unit, generic interrupt interface and floating point unit. The variable SystemCoreClock indicates the CPU clock speed. System and Clock Configuration describes the minimum feature set. In addition the file may contain functions for the memory bus setup and clock re-configuration.

The Device Header File <Device.h> is the central include file that the application programmer is using in the C/C++ source code. It provides the following features:

- Peripheral Access provides a standardized register layout for all peripherals. Optionally functions for device-specific peripherals may be available.
- Generic Interrupt Controller Functions can be accessed with standardized symbols and functions for the General Interrupt Controller (GIC) are provided.
- Intrinsic Functions allow to access special instructions, for example for activating sleep mode or the NOP instruction.
- Generic and Private Timer functions to configure and start a periodic timer interrupt.
- Level 1 and Level 2 Cache controller functions to enable, disable, clean and invalidate caches.

The use of Device Header File <Device.h> can be abstracted with the `#define CMSIS_header_file` provided in RTE_Components.h. This allows to have uniform include code in the application independent of the target device.

#include "RTE_Components.h" // include information about project configuration
#include CMSIS_device_header // include <Device>.h file
CMSIS-Core-A User Files

The CMSIS-Core-A user files are device specific. In addition, the Startup File startup_<Device>.c is also compiler vendor specific. The various compiler vendor tool chains may provide folders that contain the CMSIS files for each supported device.

> ‍Note

> - The silicon vendors create these device-specific CMSIS-Core-A files based on CMSIS-Core Device Templates provide by Arm.

Thereafter, the functions described under API Reference can be used in the application.

Examples:

- CMSIS Basic Example is a simple example that shows the usage of the CMSIS layer.
- Using CMSIS with generic Arm Processors explains how to use CMSIS-Core-M for Arm processors.

# CMSIS Basic Example

A typical example for using the CMSIS layer is provided below. The example is based on an unspecific Cortex-A9 Device.

#include <ARMCA9.h> // File name depends on device used
static const uint32_t TICK_RATE_HZ = 1000U;
uint32_t volatile msTicks; // Counter for millisecond Interval
static void SysTick_Handler( void )
{
msTicks++; // Increment Counter
}
// We use the Private Tiemer (PTIM) of the Cortex-A9 FVP Model here.
// In general the available Timers are highly vendor specific for Cortex-A processors.
void private_timer_init(void) {
PTIM_SetLoadValue ((SystemCoreClock/TICK_RATE_HZ) - 1U);
PTIM_SetControl (PTIM_GetControl() | 7U);
/* Install SysTick_Handler as the interrupt function for PTIM */
IRQ_SetHandler((IRQn_ID_t)PrivTimer_IRQn, SysTick_Handler);
/* Determine number of implemented priority bits */
IRQ_SetPriority ((IRQn_ID_t)PrivTimer_IRQn, IRQ_PRIORITY_Msk);
/* Set lowest priority -1 */
IRQ_SetPriority ((IRQn_ID_t)PrivTimer_IRQn, GIC_GetPriority((IRQn_ID_t)PrivTimer_IRQn)-1);
/* Enable IRQ */
IRQ_Enable ((IRQn_ID_t)PrivTimer_IRQn);
}
/* Delay execution for given amount of ticks */
void Delay(uint32_t ticks) {
uint32_t tgtTicks = msTicks + ticks; // target tick count to delay execution to
while (msTicks == tgtTicks) {
__WFE (); // Power-Down until next Event/Interrupt
}
}
/* main function */
int main(void)
{
/* Initialize device HAL here */
private_timer_init();
static uint8_t ledState = 0;
/* Infinite loop */
while (1)
{
/* Add application code here */
ledState = !ledState;
Delay(500);
}
}
GIC_GetPriority
__STATIC_INLINE uint32_t GIC_GetPriority(IRQn_Type IRQn)
Read the current interrupt priority from GIC's IPRIORITYR register.
Definition: core_ca.h:1664
PTIM_SetLoadValue
__STATIC_INLINE void PTIM_SetLoadValue(uint32_t value)
Set the load value to timers LOAD register.
Definition: core_ca.h:2009
PTIM_GetControl
__STATIC_INLINE uint32_t PTIM_GetControl(void)
Definition: core_ca.h:2048
PTIM_SetControl
__STATIC_INLINE void PTIM_SetControl(uint32_t value)
Configure the timer using its CONTROL register.
Definition: core_ca.h:2040
IRQ_Enable
int32_t IRQ_Enable(IRQn_ID_t irqn)
Enable interrupt.
IRQ_SetPriority
int32_t IRQ_SetPriority(IRQn_ID_t irqn, uint32_t priority)
Set interrupt priority value.
IRQ_SetHandler
int32_t IRQ_SetHandler(IRQn_ID_t irqn, IRQHandler_t handler)
Register interrupt handler.
IRQ_PRIORITY_Msk
#define IRQ_PRIORITY_Msk
Interrupt priority value bit-mask.
SystemCoreClock
uint32_t SystemCoreClock
Variable to hold the system core clock value.
Definition: ref_system_init.txt:67
IRQn_ID_t
int32_t IRQn_ID_t
Interrupt ID number data type.
Definition: irq_ctrl.h:43

# Using CMSIS with generic Arm Processors

The Cortex_DFP pack provides generic device definitions for standard Arm Cortex-A cores and contains corresponding. These generic Arm devices can be used as a target for embedded programs, with execution, for example, on processor simulation models.