| CMSIS-Core (Cortex-A) CMSIS-Core support for Cortex-A processor-based devices |

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Floating-Point Exception Control register (FPEXC)
Core Register Access

Provides a global enable for the Advanced SIMD and Floating-point (VFP) Extensions, and indicates how the state of these extensions is recorded.

Provides a global enable for the Advanced SIMD and Floating-point (VFP) Extensions, and indicates how the state of these extensions is recorded.

Bits | Name | Function
--- | --- | ---
[31] | EX | Exception bit.
[30] | EN | Enable bit.
[29:0] | - | SUBARCHITECTURE DEFINED.

Consider __get_FPEXC and __set_FPEXC to access this register.