| CMSIS-Core (Cortex-A) CMSIS-Core support for Cortex-A processor-based devices |

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Content | Data Structures
Floating-point Status and Control Register (FPSCR)
Core Register Access

Provides floating-point system status information and control. More...

## Content
| FPSCR Bits
| Bit position and mask macros.

## Data Structures
struct | FPSCR_Type
| Bit field declaration for FPSCR layout. More...

## Description

Provides floating-point system status information and control.

Bits | Name | Function
--- | --- | ---
[31] | N | Negative condition flag.
[30] | Z | Zero condition flag.
[29] | C | Carry condition flag.
[28] | V | Overflow condition flag.
[27] | QC | External abort pending bit.
[26] | AHP | External abort pending bit.
[25] | DN | External abort pending bit.
[24] | FZ | External abort pending bit.
[23:22] | RMode | External abort pending bit.
[21:20] | Stride | External abort pending bit.
[19] | - | Reserved.
[18:16] | Len | External abort pending bit.
[15] | IDE | IRQ pending bit.
[14:13] | - | Reserved.
[12] | IXE | IRQ pending bit.
[11] | UFE | IRQ pending bit.
[10] | OFE | IRQ pending bit.
[9] | DZE | IRQ pending bit.
[8] | IOE | IRQ pending bit.
[7] | IDC | IRQ pending bit.
[6:5] | - | Reserved.
[4] | IXC | FIQ pending bit.
[3] | UFC | FIQ pending bit.
[2] | OFC | FIQ pending bit.
[1] | DZC | FIQ pending bit.
[0] | IOC | FIQ pending bit.

Consider __get_FPSCR and __set_FPSCR to access this register.