CMSIS-Driver: Driver_CAN.h File Reference

| CMSIS-Driver Version 2.04 Peripheral Interface for Middleware and Application Code

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Driver_CAN.h File Reference

## Data Structures
struct | ARM_CAN_OBJ_CAPABILITIES
| CAN Object Capabilities. More...
struct | ARM_CAN_MSG_INFO
| CAN Message Information. More...
struct | ARM_CAN_STATUS
| CAN Status. More...
struct | ARM_CAN_CAPABILITIES
| CAN Device Driver Capabilities. More...
struct | ARM_DRIVER_CAN
| Access structure of the CAN Driver. More...

## Macros
#define | ARM_CAN_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0)/* API version */
#define | ARM_CAN_BIT_PROP_SEG_Pos 0UL
| bits 7..0
#define | ARM_CAN_BIT_PROP_SEG_Msk (0xFFUL << ARM_CAN_BIT_PROP_SEG_Pos)
#define | ARM_CAN_BIT_PROP_SEG(x) (((x) << ARM_CAN_BIT_PROP_SEG_Pos) & ARM_CAN_BIT_PROP_SEG_Msk)
#define | ARM_CAN_BIT_PHASE_SEG1_Pos 8UL
| bits 15..8
#define | ARM_CAN_BIT_PHASE_SEG1_Msk (0xFFUL << ARM_CAN_BIT_PHASE_SEG1_Pos)
#define | ARM_CAN_BIT_PHASE_SEG1(x) (((x) << ARM_CAN_BIT_PHASE_SEG1_Pos) & ARM_CAN_BIT_PHASE_SEG1_Msk)
#define | ARM_CAN_BIT_PHASE_SEG2_Pos 16UL
| bits 23..16
#define | ARM_CAN_BIT_PHASE_SEG2_Msk (0xFFUL << ARM_CAN_BIT_PHASE_SEG2_Pos)
#define | ARM_CAN_BIT_PHASE_SEG2(x) (((x) << ARM_CAN_BIT_PHASE_SEG2_Pos) & ARM_CAN_BIT_PHASE_SEG2_Msk)
#define | ARM_CAN_BIT_SJW_Pos 24UL
| bits 28..24
#define | ARM_CAN_BIT_SJW_Msk (0x1FUL << ARM_CAN_BIT_SJW_Pos)
#define | ARM_CAN_BIT_SJW(x) (((x) << ARM_CAN_BIT_SJW_Pos) & ARM_CAN_BIT_SJW_Msk)
#define | ARM_CAN_CONTROL_Pos 0UL
#define | ARM_CAN_CONTROL_Msk (0xFFUL << ARM_CAN_CONTROL_Pos)
#define | ARM_CAN_SET_FD_MODE (1UL << ARM_CAN_CONTROL_Pos)
| Set FD operation mode; arg: 0 = disable, 1 = enable.
#define | ARM_CAN_ABORT_MESSAGE_SEND (2UL << ARM_CAN_CONTROL_Pos)
| Abort sending of CAN message; arg = object.
#define | ARM_CAN_CONTROL_RETRANSMISSION (3UL << ARM_CAN_CONTROL_Pos)
| Enable/disable automatic retransmission; arg: 0 = disable, 1 = enable (default state)
#define | ARM_CAN_SET_TRANSCEIVER_DELAY (4UL << ARM_CAN_CONTROL_Pos)
| Set transceiver delay; arg = delay in time quanta.
#define | ARM_CAN_ID_IDE_Pos 31UL
#define | ARM_CAN_ID_IDE_Msk (1UL << ARM_CAN_ID_IDE_Pos)
#define | ARM_CAN_STANDARD_ID(id) (id & 0x000007FFUL)
| CAN identifier in standard format (11-bits)
#define | ARM_CAN_EXTENDED_ID(id) ((id & 0x1FFFFFFFUL) | ARM_CAN_ID_IDE_Msk)
| CAN identifier in extended format (29-bits)
#define | ARM_CAN_INVALID_BITRATE_SELECT (ARM_DRIVER_ERROR_SPECIFIC - 1)
| Bitrate selection not supported.
#define | ARM_CAN_INVALID_BITRATE (ARM_DRIVER_ERROR_SPECIFIC - 2)
| Requested bitrate not supported.
#define | ARM_CAN_INVALID_BIT_PROP_SEG (ARM_DRIVER_ERROR_SPECIFIC - 3)
| Propagation segment value not supported.
#define | ARM_CAN_INVALID_BIT_PHASE_SEG1 (ARM_DRIVER_ERROR_SPECIFIC - 4)
| Phase segment 1 value not supported.
#define | ARM_CAN_INVALID_BIT_PHASE_SEG2 (ARM_DRIVER_ERROR_SPECIFIC - 5)
| Phase segment 2 value not supported.
#define | ARM_CAN_INVALID_BIT_SJW (ARM_DRIVER_ERROR_SPECIFIC - 6)
| SJW value not supported.
#define | ARM_CAN_NO_MESSAGE_AVAILABLE (ARM_DRIVER_ERROR_SPECIFIC - 7)
| Message is not available.
#define | ARM_CAN_UNIT_STATE_INACTIVE (0U)
| Unit state: Not active on bus (initialize or error bus off)
#define | ARM_CAN_UNIT_STATE_ACTIVE (1U)
| Unit state: Active on bus (can generate active error frame)
#define | ARM_CAN_UNIT_STATE_PASSIVE (2U)
| Unit state: Error passive (can not generate active error frame)
#define | ARM_CAN_LEC_NO_ERROR (0U)
| Last error code: No error.
#define | ARM_CAN_LEC_BIT_ERROR (1U)
| Last error code: Bit error.
#define | ARM_CAN_LEC_STUFF_ERROR (2U)
| Last error code: Bit stuffing error.
#define | ARM_CAN_LEC_CRC_ERROR (3U)
| Last error code: CRC error.
#define | ARM_CAN_LEC_FORM_ERROR (4U)
| Last error code: Illegal fixed-form bit.
#define | ARM_CAN_LEC_ACK_ERROR (5U)
| Last error code: Acknowledgement error.
#define | ARM_CAN_EVENT_UNIT_ACTIVE (1U)
| Unit entered Error Active state.
#define | ARM_CAN_EVENT_UNIT_WARNING (2U)
| Unit entered Error Warning state (one or both error counters >= 96)
#define | ARM_CAN_EVENT_UNIT_PASSIVE (3U)
| Unit entered Error Passive state.
#define | ARM_CAN_EVENT_UNIT_BUS_OFF (4U)
| Unit entered bus off state.
#define | ARM_CAN_EVENT_SEND_COMPLETE (1UL << 0)
| Send complete.
#define | ARM_CAN_EVENT_RECEIVE (1UL << 1)
| Message received.
#define | ARM_CAN_EVENT_RECEIVE_OVERRUN (1UL << 2)
| Received message overrun.

## Typedefs
typedef void(* | ARM_CAN_SignalUnitEvent_t )(uint32_t event)
| Pointer to ARM_CAN_SignalUnitEvent : Signal CAN Unit Event.
typedef void(* | ARM_CAN_SignalObjectEvent_t )(uint32_t obj_idx, uint32_t event)
| Pointer to ARM_CAN_SignalObjectEvent : Signal CAN Object Event.

## Enumerations
enum | ARM_CAN_BITRATE_SELECT { ARM_CAN_BITRATE_NOMINAL, ARM_CAN_BITRATE_FD_DATA }
| Set the bit rate. More...
enum | ARM_CAN_MODE { ARM_CAN_MODE_INITIALIZATION, ARM_CAN_MODE_NORMAL, ARM_CAN_MODE_RESTRICTED, ARM_CAN_MODE_MONITOR, ARM_CAN_MODE_LOOPBACK_INTERNAL, ARM_CAN_MODE_LOOPBACK_EXTERNAL }
enum | ARM_CAN_FILTER_OPERATION { ARM_CAN_FILTER_ID_EXACT_ADD, ARM_CAN_FILTER_ID_EXACT_REMOVE, ARM_CAN_FILTER_ID_RANGE_ADD, ARM_CAN_FILTER_ID_RANGE_REMOVE, ARM_CAN_FILTER_ID_MASKABLE_ADD, ARM_CAN_FILTER_ID_MASKABLE_REMOVE }
enum | ARM_CAN_OBJ_CONFIG { ARM_CAN_OBJ_INACTIVE, ARM_CAN_OBJ_TX, ARM_CAN_OBJ_RX, ARM_CAN_OBJ_RX_RTR_TX_DATA, ARM_CAN_OBJ_TX_RTR_RX_DATA }

## Macro Definition Documentation

#define ARM_CAN_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0)/* API version */

#define ARM_CAN_BIT_PROP_SEG_Pos 0UL

bits 7..0

#define ARM_CAN_BIT_PROP_SEG_Msk (0xFFUL << ARM_CAN_BIT_PROP_SEG_Pos)

#define ARM_CAN_BIT_PHASE_SEG1_Pos 8UL

bits 15..8

#define ARM_CAN_BIT_PHASE_SEG1_Msk (0xFFUL << ARM_CAN_BIT_PHASE_SEG1_Pos)

#define ARM_CAN_BIT_PHASE_SEG2_Pos 16UL

bits 23..16

#define ARM_CAN_BIT_PHASE_SEG2_Msk (0xFFUL << ARM_CAN_BIT_PHASE_SEG2_Pos)

#define ARM_CAN_BIT_SJW_Pos 24UL

bits 28..24

#define ARM_CAN_BIT_SJW_Msk (0x1FUL << ARM_CAN_BIT_SJW_Pos)

#define ARM_CAN_CONTROL_Pos 0UL

#define ARM_CAN_CONTROL_Msk (0xFFUL << ARM_CAN_CONTROL_Pos)

#define ARM_CAN_ID_IDE_Pos 31UL

#define ARM_CAN_ID_IDE_Msk (1UL << ARM_CAN_ID_IDE_Pos)

#define ARM_CAN_INVALID_BITRATE_SELECT (ARM_DRIVER_ERROR_SPECIFIC - 1)

Bitrate selection not supported.

#define ARM_CAN_INVALID_BITRATE (ARM_DRIVER_ERROR_SPECIFIC - 2)

Requested bitrate not supported.

#define ARM_CAN_INVALID_BIT_PROP_SEG (ARM_DRIVER_ERROR_SPECIFIC - 3)

Propagation segment value not supported.

#define ARM_CAN_INVALID_BIT_PHASE_SEG1 (ARM_DRIVER_ERROR_SPECIFIC - 4)

Phase segment 1 value not supported.

#define ARM_CAN_INVALID_BIT_PHASE_SEG2 (ARM_DRIVER_ERROR_SPECIFIC - 5)

Phase segment 2 value not supported.

#define ARM_CAN_INVALID_BIT_SJW (ARM_DRIVER_ERROR_SPECIFIC - 6)

SJW value not supported.

#define ARM_CAN_NO_MESSAGE_AVAILABLE (ARM_DRIVER_ERROR_SPECIFIC - 7)

Message is not available.