| NUC472_NUC442_BSP V3.04.000 The Board Support Package for NUC472/NUC442

i2s.h
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1/******************************************************************************
2 * @file i2s.h
3 * @version V0.10
4 * $Revision: 12 $
5 * $Date: 15/09/22 6:48p $
6 * @brief NUC472/NUC442 I2S driver header file
7 *
8 * @note
9 * SPDX-License-Identifier: Apache-2.0
10 * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
11*****************************************************************************/
12#ifndef __I2S_H__
13#define __I2S_H__
14
15#include "NUC472_442.h"
16
17#ifdef __cplusplus
18extern "C"
19{
20#endif
21
33#define I2S_DATABIT_8 (0 << I2S_CTL_WDWIDTH_Pos)
34#define I2S_DATABIT_16 (1 << I2S_CTL_WDWIDTH_Pos)
35#define I2S_DATABIT_24 (2 << I2S_CTL_WDWIDTH_Pos)
36#define I2S_DATABIT_32 (3 << I2S_CTL_WDWIDTH_Pos)
38/* Audio Format */
39#define I2S_MONO I2S_CTL_MONO_Msk
40#define I2S_STEREO 0
42/* I2S Data Format */
43#define I2S_FORMAT_MSB I2S_CTL_FORMAT_Msk
44#define I2S_FORMAT_I2S 0
45#define I2S_FORMAT_PCMB I2S_CTL_FORMAT_Msk
46#define I2S_FORMAT_PCMA 0
48/* I2S Interface */
49#define I2S_PCM I2S_CTL_PCMEN_Msk
50#define I2S_I2S 0
52/* I2S Operation mode */
53#define I2S_MODE_SLAVE I2S_CTL_SLAVE_Msk
54#define I2S_MODE_MASTER 0
56/* I2S FIFO Threshold */
57#define I2S_FIFO_TX_LEVEL_WORD_0 0
58#define I2S_FIFO_TX_LEVEL_WORD_1 (1 << I2S_CTL_TXTH_Pos)
59#define I2S_FIFO_TX_LEVEL_WORD_2 (2 << I2S_CTL_TXTH_Pos)
60#define I2S_FIFO_TX_LEVEL_WORD_3 (3 << I2S_CTL_TXTH_Pos)
61#define I2S_FIFO_TX_LEVEL_WORD_4 (4 << I2S_CTL_TXTH_Pos)
62#define I2S_FIFO_TX_LEVEL_WORD_5 (5 << I2S_CTL_TXTH_Pos)
63#define I2S_FIFO_TX_LEVEL_WORD_6 (6 << I2S_CTL_TXTH_Pos)
64#define I2S_FIFO_TX_LEVEL_WORD_7 (7 << I2S_CTL_TXTH_Pos)
66#define I2S_FIFO_RX_LEVEL_WORD_1 0
67#define I2S_FIFO_RX_LEVEL_WORD_2 (1 << I2S_CTL_RXTH_Pos)
68#define I2S_FIFO_RX_LEVEL_WORD_3 (2 << I2S_CTL_RXTH_Pos)
69#define I2S_FIFO_RX_LEVEL_WORD_4 (3 << I2S_CTL_RXTH_Pos)
70#define I2S_FIFO_RX_LEVEL_WORD_5 (4 << I2S_CTL_RXTH_Pos)
71#define I2S_FIFO_RX_LEVEL_WORD_6 (5 << I2S_CTL_RXTH_Pos)
72#define I2S_FIFO_RX_LEVEL_WORD_7 (6 << I2S_CTL_RXTH_Pos)
73#define I2S_FIFO_RX_LEVEL_WORD_8 (7 << I2S_CTL_RXTH_Pos)
75/* I2S Record Channel */
76#define I2S_MONO_RIGHT 0
77#define I2S_MONO_LEFT I2S_CTL_RXLCH_Msk
79/* I2S Channel */
80#define I2S_RIGHT 0
81#define I2S_LEFT 1 /* end of group NUC472_442_I2S_EXPORTED_CONSTANTS */
84
88/*---------------------------------------------------------------------------------------------------------*/
89/* inline functions */
90/*---------------------------------------------------------------------------------------------------------*/
100 static __INLINE void I2S_ENABLE_TX_ZCD(I2S_T *i2s, uint32_t u32ChMask)
101{
102 if(u32ChMask == I2S_RIGHT)
103 i2s->CTL |= I2S_CTL_RZCEN_Msk;
104 else
105 i2s->CTL |= I2S_CTL_LZCEN_Msk;
106}
107
117 static __INLINE void I2S_DISABLE_TX_ZCD(I2S_T *i2s, uint32_t u32ChMask)
118{
119 if(u32ChMask == I2S_RIGHT)
120 i2s->CTL &= ~I2S_CTL_RZCEN_Msk;
121 else
122 i2s->CTL &= ~I2S_CTL_LZCEN_Msk;
123}
124
131#define I2S_ENABLE_TXDMA(i2s) ( (i2s)->CTL |= I2S_CTL_TXPDMAEN_Msk )
132
139#define I2S_DISABLE_TXDMA(i2s) ( (i2s)->CTL &= ~I2S_CTL_TXPDMAEN_Msk )
140
147#define I2S_ENABLE_RXDMA(i2s) ( (i2s)->CTL |= I2S_CTL_RXPDMAEN_Msk )
148
155#define I2S_DISABLE_RXDMA(i2s) ( (i2s)->CTL &= ~I2S_CTL_RXPDMAEN_Msk )
156
163#define I2S_ENABLE_TX(i2s) ( (i2s)->CTL |= I2S_CTL_TXEN_Msk )
164
171#define I2S_DISABLE_TX(i2s) ( (i2s)->CTL &= ~I2S_CTL_TXEN_Msk )
172
179#define I2S_ENABLE_RX(i2s) ( (i2s)->CTL |= I2S_CTL_RXEN_Msk )
180
187#define I2S_DISABLE_RX(i2s) ( (i2s)->CTL &= ~I2S_CTL_RXEN_Msk )
188
195#define I2S_ENABLE_TX_MUTE(i2s) ( (i2s)->CTL |= I2S_CTL_MUTE_Msk )
196
203#define I2S_DISABLE_TX_MUTE(i2s) ( (i2s)->CTL &= ~I2S_CTL_MUTE_Msk )
204
211#define I2S_CLR_TX_FIFO(i2s) ( (i2s)->CTL |= I2S_CTL_TXCLR_Msk )
212
219#define I2S_CLR_RX_FIFO(i2s) ( (i2s)->CTL |= I2S_CTL_RXCLR_Msk )
220
230 static __INLINE void I2S_SET_MONO_RX_CHANNEL(I2S_T *i2s, uint32_t u32Ch)
231{
232 u32Ch == I2S_MONO_LEFT ?
233 (i2s->CTL |= I2S_CTL_RXLCH_Msk) :
234 (i2s->CTL &= ~I2S_CTL_RXLCH_Msk);
235}
236
244#define I2S_WRITE_TX_FIFO(i2s, u32Data) ( (i2s)->TX = u32Data )
245
252#define I2S_READ_RX_FIFO(i2s) ( (i2s)->RX )
253
261#define I2S_GET_INT_FLAG(i2s, u32Mask) ( (i2s)->STATUS & (u32Mask) )
262
270#define I2S_CLR_INT_FLAG(i2s, u32Mask) ( (i2s)->STATUS |= (u32Mask) )
271
278#define I2S_GET_TX_FIFO_LEVEL(i2s) ( (((i2s)->STATUS & I2S_STATUS_TXCNT_Msk) >> I2S_STATUS_TXCNT_Pos) & 0xF )
279
286#define I2S_GET_RX_FIFO_LEVEL(i2s) ( (((i2s)->STATUS & I2S_STATUS_RXCNT_Msk) >> I2S_STATUS_RXCNT_Pos) & 0xF )
287
288uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat, uint32_t u32AudioInterface);
289void I2S_Close(I2S_T *i2s);
290void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask);
291void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask);
292uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock);
293void I2S_DisableMCLK(I2S_T *i2s);
294void I2S_SetFIFO(I2S_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold);
295 /* end of group NUC472_442_I2S_EXPORTED_FUNCTIONS */
297
298 /* end of group NUC472_442_I2S_Driver */
300 /* end of group NUC472_442_Device_Driver */
302
303#ifdef __cplusplus
304}
305#endif
306
307
308#endif
309
310/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
311
NUC472_442.h
NUC472/NUC442 peripheral access layer header file. This file contains all the peripheral register's d...
I2S_CTL_LZCEN_Msk
#define I2S_CTL_LZCEN_Msk
Definition: NUC472_442.h:17517
I2S_CTL_RZCEN_Msk
#define I2S_CTL_RZCEN_Msk
Definition: NUC472_442.h:17514
I2S_CTL_RXLCH_Msk
#define I2S_CTL_RXLCH_Msk
Definition: NUC472_442.h:17532
I2S_RIGHT
#define I2S_RIGHT
Definition: i2s.h:80
I2S_MONO_LEFT
#define I2S_MONO_LEFT
Definition: i2s.h:77
I2S_SetFIFO
void I2S_SetFIFO(I2S_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
Configure FIFO threshold setting.
Definition: i2s.c:213
I2S_SET_MONO_RX_CHANNEL
static __INLINE void I2S_SET_MONO_RX_CHANNEL(I2S_T *i2s, uint32_t u32Ch)
This function sets the recording source channel when mono mode is used.
Definition: i2s.h:230
I2S_ENABLE_TX_ZCD
static __INLINE void I2S_ENABLE_TX_ZCD(I2S_T *i2s, uint32_t u32ChMask)
Enable zero cross detect function.
Definition: i2s.h:100
I2S_Open
uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat, uint32_t u32AudioInterface)
This function configures some parameters of I2S interface for general purpose use....
Definition: i2s.c:99
I2S_DisableInt
void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask)
This function disables the interrupt according to the mask parameter.
Definition: i2s.c:161
I2S_DISABLE_TX_ZCD
static __INLINE void I2S_DISABLE_TX_ZCD(I2S_T *i2s, uint32_t u32ChMask)
Disable zero cross detect function.
Definition: i2s.h:117
I2S_DisableMCLK
void I2S_DisableMCLK(I2S_T *i2s)
Disable MCLK .
Definition: i2s.c:200
I2S_EnableMCLK
uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock)
Enable MCLK .
Definition: i2s.c:172
I2S_EnableInt
void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask)
This function enables the interrupt according to the mask parameter.
Definition: i2s.c:149
I2S_Close
void I2S_Close(I2S_T *i2s)
Disable I2S function and I2S clock.
Definition: i2s.c:137
I2S_T::CTL
__IO uint32_t CTL
Definition: NUC472_442.h:17280
I2S_T
Definition: NUC472_442.h:17175