| NUC472_NUC442_BSP V3.04.000 The Board Support Package for NUC472/NUC442

pdma.c
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1/**************************************************************************/
12#include "NUC472_442.h"
13
14
15 static uint8_t u32ChSelect[PDMA_CH_MAX];
16
39 void PDMA_Open(uint32_t u32Mask)
40{
41 int volatile i;
42
43 for (i=0; i<PDMA_CH_MAX; i++)
44 {
45 PDMA->DSCT[i].CTL = 0;
46 u32ChSelect[i] = 0x1f;
47 }
48
49 PDMA->CHCTL |= u32Mask;
50}
51
61 void PDMA_Close(void)
62{
63 PDMA->CHCTL = 0;
64}
65
77 void PDMA_SetTransferCnt(uint32_t u32Ch, uint32_t u32Width, uint32_t u32TransCount)
78{
79 PDMA->DSCT[u32Ch].CTL &= ~(PDMA_DSCT_CTL_TXCNT_Msk | PDMA_DSCT_CTL_TXWIDTH_Msk);
80 PDMA->DSCT[u32Ch].CTL |= (u32Width | ((u32TransCount-1) << PDMA_DSCT_CTL_TXCNT_Pos));
81}
82
96 void PDMA_SetTransferAddr(uint32_t u32Ch, uint32_t u32SrcAddr, uint32_t u32SrcCtrl, uint32_t u32DstAddr, uint32_t u32DstCtrl)
97{
98 PDMA->DSCT[u32Ch].ENDSA = u32SrcAddr;
99 PDMA->DSCT[u32Ch].ENDDA = u32DstAddr;
100 PDMA->DSCT[u32Ch].CTL &= ~(PDMA_DSCT_CTL_SAINC_Msk | PDMA_DSCT_CTL_DAINC_Msk);
101 PDMA->DSCT[u32Ch].CTL |= (u32SrcCtrl | u32DstCtrl);
102}
103
116 void PDMA_SetTransferMode(uint32_t u32Ch, uint32_t u32Peripheral, uint32_t u32ScatterEn, uint32_t u32DescAddr)
117{
118 u32ChSelect[u32Ch] = u32Peripheral;
119 switch (u32Ch)
120 {
121 case 0:
122 PDMA->REQSEL0_3 = (PDMA->REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC0_Msk) | u32Peripheral;
123 break;
124 case 1:
125 PDMA->REQSEL0_3 = (PDMA->REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC1_Msk) | (u32Peripheral << PDMA_REQSEL0_3_REQSRC1_Pos);
126 break;
127 case 2:
128 PDMA->REQSEL0_3 = (PDMA->REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC2_Msk) | (u32Peripheral << PDMA_REQSEL0_3_REQSRC2_Pos);
129 break;
130 case 3:
131 PDMA->REQSEL0_3 = (PDMA->REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC3_Msk) | (u32Peripheral << PDMA_REQSEL0_3_REQSRC3_Pos);
132 break;
133 case 4:
134 PDMA->REQSEL4_7 = (PDMA->REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC4_Msk) | u32Peripheral;
135 break;
136 case 5:
137 PDMA->REQSEL4_7 = (PDMA->REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC5_Msk) | (u32Peripheral << PDMA_REQSEL4_7_REQSRC5_Pos);
138 break;
139 case 6:
140 PDMA->REQSEL4_7 = (PDMA->REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC6_Msk) | (u32Peripheral << PDMA_REQSEL4_7_REQSRC6_Pos);
141 break;
142 case 7:
143 PDMA->REQSEL4_7 = (PDMA->REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC7_Msk) | (u32Peripheral << PDMA_REQSEL4_7_REQSRC7_Pos);
144 break;
145 case 8:
146 PDMA->REQSEL8_11 = (PDMA->REQSEL8_11 & ~PDMA_REQSEL8_11_REQSRC8_Msk) | u32Peripheral;
147 break;
148 case 9:
149 PDMA->REQSEL8_11 = (PDMA->REQSEL8_11 & ~PDMA_REQSEL8_11_REQSRC9_Msk) | (u32Peripheral << PDMA_REQSEL8_11_REQSRC9_Pos);
150 break;
151 case 10:
152 PDMA->REQSEL8_11 = (PDMA->REQSEL8_11 & ~PDMA_REQSEL8_11_REQSRC10_Msk) | (u32Peripheral << PDMA_REQSEL8_11_REQSRC10_Pos);
153 break;
154 case 11:
155 PDMA->REQSEL8_11 = (PDMA->REQSEL8_11 & ~PDMA_REQSEL8_11_REQSRC11_Msk) | (u32Peripheral << PDMA_REQSEL8_11_REQSRC11_Pos);
156 break;
157 case 12:
158 PDMA->REQSEL12_15 = (PDMA->REQSEL12_15 & ~PDMA_REQSEL12_15_REQSRC12_Msk) | u32Peripheral;
159 break;
160 case 13:
161 PDMA->REQSEL12_15 = (PDMA->REQSEL12_15 & ~PDMA_REQSEL12_15_REQSRC13_Msk) | (u32Peripheral << PDMA_REQSEL12_15_REQSRC13_Pos);
162 break;
163 case 14:
164 PDMA->REQSEL12_15 = (PDMA->REQSEL12_15 & ~PDMA_REQSEL12_15_REQSRC14_Msk) | (u32Peripheral << PDMA_REQSEL12_15_REQSRC14_Pos);
165 break;
166 case 15:
167 PDMA->REQSEL12_15 = (PDMA->REQSEL12_15 & ~PDMA_REQSEL12_15_REQSRC15_Msk) | (u32Peripheral << PDMA_REQSEL12_15_REQSRC15_Pos);
168 break;
169 default:
170 ;
171 }
172
173 if (u32ScatterEn)
174 {
175 PDMA->DSCT[u32Ch].CTL = (PDMA->DSCT[u32Ch].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk) | PDMA_OP_SCATTER;
176 PDMA->DSCT[u32Ch].NEXT = u32DescAddr - (PDMA->SCATBA);
177 }
178 else
179 PDMA->DSCT[u32Ch].CTL = (PDMA->DSCT[u32Ch].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk) | PDMA_OP_BASIC;
180}
181
193 void PDMA_SetBurstType(uint32_t u32Ch, uint32_t u32BurstType, uint32_t u32BurstSize)
194{
195 PDMA->DSCT[u32Ch].CTL &= ~(PDMA_DSCT_CTL_TXTYPE_Msk | PDMA_DSCT_CTL_BURSIZE_Msk);
196 PDMA->DSCT[u32Ch].CTL |= (u32BurstType | u32BurstSize);
197}
198
199
209 void PDMA_Trigger(uint32_t u32Ch)
210{
211 if (u32ChSelect[u32Ch] == PDMA_MEM)
212 PDMA->SWREQ = (1 << u32Ch);
213}
214
225 void PDMA_EnableInt(uint32_t u32Ch, uint32_t u32Mask)
226{
227 PDMA->INTEN |= (1 << u32Ch);
228}
229
240 void PDMA_DisableInt(uint32_t u32Ch, uint32_t u32Mask)
241{
242 PDMA->INTEN &= ~(1 << u32Ch);
243}
244 /* end of group NUC472_442_PDMA_EXPORTED_FUNCTIONS */
246 /* end of group NUC472_442_PDMA_Driver */
248 /* end of group NUC472_442_Device_Driver */
250
251/*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/
NUC472_442.h
NUC472/NUC442 peripheral access layer header file. This file contains all the peripheral register's d...
PDMA_REQSEL4_7_REQSRC5_Pos
#define PDMA_REQSEL4_7_REQSRC5_Pos
Definition: NUC472_442.h:18703
PDMA_REQSEL4_7_REQSRC7_Pos
#define PDMA_REQSEL4_7_REQSRC7_Pos
Definition: NUC472_442.h:18709
PDMA_REQSEL12_15_REQSRC14_Pos
#define PDMA_REQSEL12_15_REQSRC14_Pos
Definition: NUC472_442.h:18730
PDMA_REQSEL8_11_REQSRC11_Pos
#define PDMA_REQSEL8_11_REQSRC11_Pos
Definition: NUC472_442.h:18721
PDMA_REQSEL4_7_REQSRC6_Pos
#define PDMA_REQSEL4_7_REQSRC6_Pos
Definition: NUC472_442.h:18706
PDMA_REQSEL0_3_REQSRC2_Pos
#define PDMA_REQSEL0_3_REQSRC2_Pos
Definition: NUC472_442.h:18694
PDMA_DSCT_CTL_TXCNT_Pos
#define PDMA_DSCT_CTL_TXCNT_Pos
Definition: NUC472_442.h:18631
PDMA_REQSEL0_3_REQSRC1_Pos
#define PDMA_REQSEL0_3_REQSRC1_Pos
Definition: NUC472_442.h:18691
PDMA_REQSEL8_11_REQSRC9_Pos
#define PDMA_REQSEL8_11_REQSRC9_Pos
Definition: NUC472_442.h:18715
PDMA_DSCT_CTL_TXTYPE_Msk
#define PDMA_DSCT_CTL_TXTYPE_Msk
Definition: NUC472_442.h:18614
PDMA_REQSEL8_11_REQSRC10_Pos
#define PDMA_REQSEL8_11_REQSRC10_Pos
Definition: NUC472_442.h:18718
PDMA_REQSEL12_15_REQSRC13_Pos
#define PDMA_REQSEL12_15_REQSRC13_Pos
Definition: NUC472_442.h:18727
PDMA_DSCT_CTL_TXCNT_Msk
#define PDMA_DSCT_CTL_TXCNT_Msk
Definition: NUC472_442.h:18632
PDMA_DSCT_CTL_DAINC_Msk
#define PDMA_DSCT_CTL_DAINC_Msk
Definition: NUC472_442.h:18626
PDMA_DSCT_CTL_BURSIZE_Msk
#define PDMA_DSCT_CTL_BURSIZE_Msk
Definition: NUC472_442.h:18617
PDMA_REQSEL0_3_REQSRC3_Pos
#define PDMA_REQSEL0_3_REQSRC3_Pos
Definition: NUC472_442.h:18697
PDMA_DSCT_CTL_TXWIDTH_Msk
#define PDMA_DSCT_CTL_TXWIDTH_Msk
Definition: NUC472_442.h:18629
PDMA_REQSEL12_15_REQSRC15_Pos
#define PDMA_REQSEL12_15_REQSRC15_Pos
Definition: NUC472_442.h:18733
PDMA_DSCT_CTL_SAINC_Msk
#define PDMA_DSCT_CTL_SAINC_Msk
Definition: NUC472_442.h:18623
PDMA_OP_BASIC
#define PDMA_OP_BASIC
Definition: pdma.h:38
PDMA_MEM
#define PDMA_MEM
Definition: pdma.h:99
PDMA_OP_SCATTER
#define PDMA_OP_SCATTER
Definition: pdma.h:39
PDMA_CH_MAX
#define PDMA_CH_MAX
Definition: pdma.h:32
PDMA_SetTransferAddr
void PDMA_SetTransferAddr(uint32_t u32Ch, uint32_t u32SrcAddr, uint32_t u32SrcCtrl, uint32_t u32DstAddr, uint32_t u32DstCtrl)
Set PDMA Transfer Address.
Definition: pdma.c:96
PDMA_Trigger
void PDMA_Trigger(uint32_t u32Ch)
Trigger PDMA.
Definition: pdma.c:209
PDMA_EnableInt
void PDMA_EnableInt(uint32_t u32Ch, uint32_t u32Mask)
Enable Interrupt.
Definition: pdma.c:225
PDMA_Open
void PDMA_Open(uint32_t u32Mask)
PDMA Open.
Definition: pdma.c:39
PDMA_Close
void PDMA_Close(void)
PDMA Close.
Definition: pdma.c:61
PDMA_DisableInt
void PDMA_DisableInt(uint32_t u32Ch, uint32_t u32Mask)
Disable Interrupt.
Definition: pdma.c:240
PDMA_SetTransferMode
void PDMA_SetTransferMode(uint32_t u32Ch, uint32_t u32Periphral, uint32_t u32ScatterEn, uint32_t u32DescAddr)
Set PDMA Transfer Mode.
Definition: pdma.c:116
PDMA_SetBurstType
void PDMA_SetBurstType(uint32_t u32Ch, uint32_t u32BurstType, uint32_t u32BurstSize)
Set PDMA Burst Type.
Definition: pdma.c:193
PDMA_SetTransferCnt
void PDMA_SetTransferCnt(uint32_t u32Ch, uint32_t u32Width, uint32_t u32TransCount)
Set PDMA Transfer Count.
Definition: pdma.c:77
PDMA
#define PDMA
Definition: NUC472_442.h:28817
u32ChSelect
static uint8_t u32ChSelect[PDMA_CH_MAX]
Definition: pdma.c:15