| NUC472_NUC442_BSP V3.04.000 The Board Support Package for NUC472/NUC442

eadc.c
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1/**************************************************************************/
12#include "NUC472_442.h"
13
36 void EADC_Open(EADC_T *eadc, uint32_t u32InputMode)
37{
38 eadc->CTL |= EADC_CTL_ADCEN_Msk;
39}
40
47 void EADC_Close(EADC_T *eadc)
48{
49 eadc->CTL &= ~EADC_CTL_ADCEN_Msk;
50}
51
114 void EADC_ConfigSampleModule(EADC_T *eadc, \
115 uint32_t u32ModuleNum, \
116 uint32_t u32TriggerSrc, \
117 uint32_t u32Channel)
118{
119 *(__IO uint32_t *)(&eadc->AD0SPCTL0 + u32ModuleNum) &= ~(EADC_AD0SPCTL0_TRGSEL_Msk | EADC_AD0SPCTL0_CHSEL_Msk);
120 *(__IO uint32_t *)(&eadc->AD0SPCTL0 + u32ModuleNum) |= (u32TriggerSrc | u32Channel);
121 if (u32TriggerSrc == EADC_STADC_TRIGGER)
122 *(__IO uint32_t *)(&eadc->AD0SPCTL0 + u32ModuleNum) |= (EADC_AD0SPCTL0_EXTREN_Msk | EADC_AD0SPCTL0_EXTFEN_Msk);
123
124}
125
126
157 void EADC_SetTriggerDelayTime(EADC_T *eadc, \
158 uint32_t u32ModuleNum, \
159 uint32_t u32TriggerDelayTime, \
160 uint32_t u32DelayClockDivider)
161{
162 *(__IO uint32_t *)(&eadc->AD0SPCTL0 + u32ModuleNum) &= ~(EADC_AD0SPCTL0_TRGDLYDIV_Msk | EADC_AD0SPCTL0_TRGDLYCNT_Msk);
163 *(__IO uint32_t *)(&eadc->AD0SPCTL0 + u32ModuleNum) |= ((u32TriggerDelayTime << EADC_AD0SPCTL0_TRGDLYCNT_Pos) | u32DelayClockDivider);
164}
165
166
192 void EADC_SetExtendSampleTime(EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32ExtendSampleTime)
193{
194 if (u32ModuleNum < EADC1_SAMPLE_MODULE0)
195 {
196 eadc->EXTSMPT &= ~EADC_EXTSMPT_EXTSMPT0_Msk;
197 eadc->EXTSMPT |= u32ExtendSampleTime;
198 }
199 else
200 {
201 eadc->EXTSMPT &= ~EADC_EXTSMPT_EXTSMPT1_Msk;
202 eadc->EXTSMPT |= (u32ExtendSampleTime << EADC_EXTSMPT_EXTSMPT1_Pos);
203 }
204}
205 /* end of group NUC472_442_EADC_EXPORTED_FUNCTIONS */
207 /* end of group NUC472_442_EADC_Driver */
209 /* end of group NUC472_442_Device_Driver */
211
212/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
NUC472_442.h
NUC472/NUC442 peripheral access layer header file. This file contains all the peripheral register's d...
EADC_AD0SPCTL0_EXTREN_Msk
#define EADC_AD0SPCTL0_EXTREN_Msk
Definition: NUC472_442.h:10180
EADC_EXTSMPT_EXTSMPT1_Pos
#define EADC_EXTSMPT_EXTSMPT1_Pos
Definition: NUC472_442.h:10524
EADC_AD0SPCTL0_TRGSEL_Msk
#define EADC_AD0SPCTL0_TRGSEL_Msk
Definition: NUC472_442.h:10171
EADC_AD0SPCTL0_TRGDLYCNT_Pos
#define EADC_AD0SPCTL0_TRGDLYCNT_Pos
Definition: NUC472_442.h:10173
EADC_AD0SPCTL0_CHSEL_Msk
#define EADC_AD0SPCTL0_CHSEL_Msk
Definition: NUC472_442.h:10168
EADC_CTL_ADCEN_Msk
#define EADC_CTL_ADCEN_Msk
Definition: NUC472_442.h:10120
EADC_AD0SPCTL0_TRGDLYDIV_Msk
#define EADC_AD0SPCTL0_TRGDLYDIV_Msk
Definition: NUC472_442.h:10177
EADC_AD0SPCTL0_EXTFEN_Msk
#define EADC_AD0SPCTL0_EXTFEN_Msk
Definition: NUC472_442.h:10183
EADC_AD0SPCTL0_TRGDLYCNT_Msk
#define EADC_AD0SPCTL0_TRGDLYCNT_Msk
Definition: NUC472_442.h:10174
EADC1_SAMPLE_MODULE0
#define EADC1_SAMPLE_MODULE0
Definition: eadc.h:44
EADC_STADC_TRIGGER
#define EADC_STADC_TRIGGER
Definition: eadc.h:73
EADC_Close
void EADC_Close(EADC_T *eadc)
Disable EADC_module.
Definition: eadc.c:47
EADC_SetExtendSampleTime
void EADC_SetExtendSampleTime(EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32ExtendSampleTime)
Set EADC extend sample time.
Definition: eadc.c:192
EADC_SetTriggerDelayTime
void EADC_SetTriggerDelayTime(EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32TriggerDelayTime, uint32_t u32DelayClockDivider)
Set trigger delay time.
Definition: eadc.c:157
EADC_ConfigSampleModule
void EADC_ConfigSampleModule(EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32TriggerSource, uint32_t u32Channel)
Configure the sample control logic module.
Definition: eadc.c:114
EADC_Open
void EADC_Open(EADC_T *eadc, uint32_t u32InputMode)
This function make EADC_module be ready to convert.
Definition: eadc.c:36
EADC_T::CTL
__IO uint32_t CTL
Definition: NUC472_442.h:7793
EADC_T::EXTSMPT
__IO uint32_t EXTSMPT
Definition: NUC472_442.h:8890
EADC_T::AD0SPCTL0
__IO uint32_t AD0SPCTL0
Definition: NUC472_442.h:7940
EADC_T
Definition: NUC472_442.h:7417