| NUC472_NUC442_BSP V3.04.000 The Board Support Package for NUC472/NUC442

i2s.c
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1/******************************************************************************
2 * @file i2s.c
3 * @version V0.10
4 * $Revision: 15 $
5 * $Date: 15/06/23 5:56p $
6 * @brief NUC472/NUC442 I2S driver source file
7 *
8 * @note
9 * SPDX-License-Identifier: Apache-2.0
10 * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
11*****************************************************************************/
12
13#include <stdio.h>
14#include "NUC472_442.h"
15
33 static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s)
34{
35 uint32_t u32Freq, u32ClkSrcSel;
36
37 // get I2S selection clock source
38 if((uint32_t)i2s == I2S0_BASE)
39 u32ClkSrcSel = CLK->CLKSEL3 & CLK_CLKSEL3_I2S0SEL_Msk;
40 else
41 u32ClkSrcSel = CLK->CLKSEL3 & CLK_CLKSEL3_I2S1SEL_Msk;
42
43 switch (u32ClkSrcSel)
44 {
45 case CLK_CLKSEL3_I2S0SEL_HXT:
46 u32Freq = __HXT;
47 break;
48
49 case CLK_CLKSEL3_I2S0SEL_PLL:
50 case CLK_CLKSEL3_I2S1SEL_PLL:
51 u32Freq = CLK_GetPLLClockFreq();
52 break;
53
54 case CLK_CLKSEL3_I2S0SEL_HIRC:
55 case CLK_CLKSEL3_I2S1SEL_HIRC:
56 u32Freq = __HIRC;
57 break;
58
59 case CLK_CLKSEL3_I2S0SEL_PCLK:
60 case CLK_CLKSEL3_I2S1SEL_PCLK:
61 u32Freq = SystemCoreClock;
62 break;
63
64 default:
65 u32Freq = __HIRC;
66 break;
67 }
68
69 return u32Freq;
70}
71
99uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat, uint32_t u32AudioInterface)
100{
101 uint16_t u16Divider;
102 uint32_t u32BitRate, u32SrcClk;
103
104 if((uint32_t)i2s == I2S0_BASE)
105 {
106 SYS->IPRST1 |= SYS_IPRST1_I2S0RST_Msk;
107 SYS->IPRST1 &= ~SYS_IPRST1_I2S0RST_Msk;
108 }
109 else
110 {
111 SYS->IPRST1 |= SYS_IPRST1_I2S1RST_Msk;
112 SYS->IPRST1 &= ~SYS_IPRST1_I2S1RST_Msk;
113 }
114
115 i2s->CTL = u32MasterSlave | u32WordWidth | u32Channels | u32DataFormat | u32AudioInterface | I2S_FIFO_TX_LEVEL_WORD_4 | I2S_FIFO_RX_LEVEL_WORD_4;
116
117 u32SrcClk = I2S_GetSourceClockFreq(i2s);
118
119 u32BitRate = u32SampleRate * (((u32WordWidth>>4) & 0x3) + 1) * 16;
120 u16Divider = ((u32SrcClk/u32BitRate) >> 1) - 1;
121 i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_BCLKDIV_Msk) | (u16Divider << 8);
122
123 //calculate real sample rate
124 u32BitRate = u32SrcClk / (2*(u16Divider+1));
125 u32SampleRate = u32BitRate / ((((u32WordWidth>>4) & 0x3) + 1) * 16);
126
127 i2s->CTL |= I2S_CTL_I2SEN_Msk;
128
129 return u32SampleRate;
130}
131
137 void I2S_Close(I2S_T *i2s)
138{
139 i2s->CTL &= ~I2S_CTL_I2SEN_Msk;
140}
141
149 void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask)
150{
151 i2s->IEN |= u32Mask;
152}
153
161 void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask)
162{
163 i2s->IEN &= ~u32Mask;
164}
165
172uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock)
173{
174 uint8_t u8Divider;
175 uint32_t u32SrcClk, u32Reg;
176
177 u32SrcClk = I2S_GetSourceClockFreq(i2s);
178 if (u32BusClock == u32SrcClk)
179 u8Divider = 0;
180 else
181 u8Divider = (u32SrcClk/u32BusClock) >> 1;
182
183 i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_MCLKDIV_Msk) | u8Divider;
184
185 i2s->CTL |= I2S_CTL_MCLKEN_Msk;
186
187 u32Reg = i2s->CLKDIV & I2S_CLKDIV_MCLKDIV_Msk;
188
189 if (u32Reg == 0)
190 return u32SrcClk;
191 else
192 return ((u32SrcClk >> 1) / u32Reg);
193}
194
200 void I2S_DisableMCLK(I2S_T *i2s)
201{
202 i2s->CTL &= ~I2S_CTL_MCLKEN_Msk;
203}
204
213 void I2S_SetFIFO(I2S_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
214{
215 i2s->CTL = ((i2s->CTL & ~(I2S_CTL_TXTH_Msk | I2S_CTL_RXTH_Msk)) |
216 (u32TxThreshold << I2S_CTL_TXTH_Pos) |
217 (u32RxThreshold << I2S_CTL_RXTH_Pos));
218} /* end of group NUC472_442_I2S_EXPORTED_FUNCTIONS */
220 /* end of group NUC472_442_I2S_Driver */
222 /* end of group NUC472_442_Device_Driver */
224
225/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
NUC472_442.h
NUC472/NUC442 peripheral access layer header file. This file contains all the peripheral register's d...
I2S_CTL_TXTH_Pos
#define I2S_CTL_TXTH_Pos
Definition: NUC472_442.h:17504
I2S_CTL_I2SEN_Msk
#define I2S_CTL_I2SEN_Msk
Definition: NUC472_442.h:17481
I2S_CTL_TXTH_Msk
#define I2S_CTL_TXTH_Msk
Definition: NUC472_442.h:17505
SYS_IPRST1_I2S1RST_Msk
#define SYS_IPRST1_I2S1RST_Msk
Definition: NUC472_442.h:24316
CLK_CLKSEL3_I2S0SEL_Msk
#define CLK_CLKSEL3_I2S0SEL_Msk
Definition: NUC472_442.h:3854
SYS_IPRST1_I2S0RST_Msk
#define SYS_IPRST1_I2S0RST_Msk
Definition: NUC472_442.h:24313
I2S_CLKDIV_MCLKDIV_Msk
#define I2S_CLKDIV_MCLKDIV_Msk
Definition: NUC472_442.h:17538
CLK_CLKSEL3_I2S1SEL_Msk
#define CLK_CLKSEL3_I2S1SEL_Msk
Definition: NUC472_442.h:3857
I2S_CTL_RXTH_Pos
#define I2S_CTL_RXTH_Pos
Definition: NUC472_442.h:17507
I2S_CTL_RXTH_Msk
#define I2S_CTL_RXTH_Msk
Definition: NUC472_442.h:17508
I2S_CTL_MCLKEN_Msk
#define I2S_CTL_MCLKEN_Msk
Definition: NUC472_442.h:17511
CLK_CLKSEL3_I2S1SEL_HIRC
#define CLK_CLKSEL3_I2S1SEL_HIRC
Definition: clk.h:271
CLK_CLKSEL3_I2S0SEL_HXT
#define CLK_CLKSEL3_I2S0SEL_HXT
Definition: clk.h:263
CLK_CLKSEL3_I2S0SEL_PCLK
#define CLK_CLKSEL3_I2S0SEL_PCLK
Definition: clk.h:265
CLK_CLKSEL3_I2S0SEL_HIRC
#define CLK_CLKSEL3_I2S0SEL_HIRC
Definition: clk.h:266
CLK_CLKSEL3_I2S1SEL_PCLK
#define CLK_CLKSEL3_I2S1SEL_PCLK
Definition: clk.h:270
CLK_CLKSEL3_I2S1SEL_PLL
#define CLK_CLKSEL3_I2S1SEL_PLL
Definition: clk.h:269
CLK_CLKSEL3_I2S0SEL_PLL
#define CLK_CLKSEL3_I2S0SEL_PLL
Definition: clk.h:264
CLK_GetPLLClockFreq
uint32_t CLK_GetPLLClockFreq(void)
This function get PLL frequency. The frequency unit is Hz.
Definition: clk.c:166
I2S_FIFO_TX_LEVEL_WORD_4
#define I2S_FIFO_TX_LEVEL_WORD_4
Definition: i2s.h:61
I2S_FIFO_RX_LEVEL_WORD_4
#define I2S_FIFO_RX_LEVEL_WORD_4
Definition: i2s.h:69
I2S_SetFIFO
void I2S_SetFIFO(I2S_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
Configure FIFO threshold setting.
Definition: i2s.c:213
I2S_Open
uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat, uint32_t u32AudioInterface)
This function configures some parameters of I2S interface for general purpose use....
Definition: i2s.c:99
I2S_GetSourceClockFreq
static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s)
This function is used to get I2S source clock frequency.
Definition: i2s.c:33
I2S_DisableInt
void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask)
This function disables the interrupt according to the mask parameter.
Definition: i2s.c:161
I2S_DisableMCLK
void I2S_DisableMCLK(I2S_T *i2s)
Disable MCLK .
Definition: i2s.c:200
I2S_EnableMCLK
uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock)
Enable MCLK .
Definition: i2s.c:172
I2S_EnableInt
void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask)
This function enables the interrupt according to the mask parameter.
Definition: i2s.c:149
I2S_Close
void I2S_Close(I2S_T *i2s)
Disable I2S function and I2S clock.
Definition: i2s.c:137
CLK
#define CLK
Definition: NUC472_442.h:28798
SYS
#define SYS
Definition: NUC472_442.h:28797
I2S0_BASE
#define I2S0_BASE
Definition: NUC472_442.h:28742
I2S_T::IEN
__IO uint32_t IEN
Definition: NUC472_442.h:17345
I2S_T::CTL
__IO uint32_t CTL
Definition: NUC472_442.h:17280
I2S_T::CLKDIV
__IO uint32_t CLKDIV
Definition: NUC472_442.h:17302
I2S_T
Definition: NUC472_442.h:17175
__HIRC
#define __HIRC
Definition: system_NUC472_442.h:27
__HXT
#define __HXT
Definition: system_NUC472_442.h:25
SystemCoreClock
uint32_t SystemCoreClock
Definition: system_NUC472_442.c:17