| NANO102/112 BSP V3.04.000 The Board Support Package for Nano102/112 Series

acmp.h
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1/**************************************************************************/
12#ifndef __ACMP_H__
13#define __ACMP_H__
14
15#ifdef __cplusplus
16 extern "C"
17{
18#endif
19
20
33#define ACMP_CR_CN_PIN (0<<24)
34#define ACMP_CR_CN_CRV (1<<24)
35#define ACMP_CR_CN_VREFI (2<<24)
36#define ACMP_CR_CN_AGND (3<<24)
37
38#define ACMP_CR_ACMP_HYSTERSIS_ENABLE ACMP_CR_ACMP_HYSEN_Msk
39#define ACMP_CR_ACMP_HYSTERSIS_DISABLE 0
40
41#define ACMP_CR_CPP0SEL_PA1 (3UL<<ACMP_CR_CPP0SEL_Pos)
42#define ACMP_CR_CPP0SEL_PA2 (2UL<<ACMP_CR_CPP0SEL_Pos)
43#define ACMP_CR_CPP0SEL_PA3 (1UL<<ACMP_CR_CPP0SEL_Pos)
44#define ACMP_CR_CPP0SEL_PA4 (0UL<<ACMP_CR_CPP0SEL_Pos)
45
46
47#define ACMP_MODCR0_TMR_TRI_LV_RISING (0UL<<ACMP_MODCR0_TMR_TRI_LV_Pos)
48#define ACMP_MODCR0_TMR_TRI_LV_FALLING (1UL<<ACMP_MODCR0_TMR_TRI_LV_Pos)
49
50#define ACMP_MODCR0_CH_DIS_PINSEL_PA1 (0UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos)
51#define ACMP_MODCR0_CH_DIS_PINSEL_PA2 (1UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos)
52#define ACMP_MODCR0_CH_DIS_PINSEL_PA3 (2UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos)
53#define ACMP_MODCR0_CH_DIS_PINSEL_PA4 (3UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos)
54#define ACMP_MODCR0_CH_DIS_PINSEL_PA5 (4UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos)
55#define ACMP_MODCR0_CH_DIS_PINSEL_PA6 (5UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos)
56#define ACMP_MODCR0_CH_DIS_PINSEL_PA14 (6UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos)
57#define ACMP_MODCR0_CH_DIS_PINSEL_PF5 (7UL<<ACMP_MODCR0_CH_DIS_PIN_SEL_Pos)
58
59#define ACMP_MODCR0_MOD_SEL_NORMAL (0UL<<ACMP_MODCR0_MOD_SEL_Pos)
60#define ACMP_MODCR0_MOD_SEL_SIGAMA_DELTA (1UL<<ACMP_MODCR0_MOD_SEL_Pos)
61#define ACMP_MODCR0_MOD_SEL_SLOPE (2UL<<ACMP_MODCR0_MOD_SEL_Pos)
62
63#define ACMP_TIMER01 (0UL<<ACMP_MODCR0_TMR_SEL_Pos)
64#define ACMP_TIMER23 (1UL<<ACMP_MODCR0_TMR_SEL_Pos)
65 /* end of group NANO1X2_ACMP_EXPORTED_CONSTANTS */
67
68
85#define ACMP_SET_NEG_SRC(acmp,u32ChNum,u32Src) (acmp->CR[u32ChNum] = (acmp->CR[u32ChNum] & ~ACMP_CR_CN_Msk) | u32Src)
86
94#define ACMP_ENABLE_HYSTERESIS(acmp,u32ChNum) (acmp->CR[u32ChNum] |= ACMP_CR_ACMP_HYSEN_Msk)
95
103#define ACMP_DISABLE_HYSTERESIS(acmp,u32ChNum) (acmp->CR[u32ChNum] &= ~ACMP_CR_ACMP_HYSEN_Msk)
104
112#define ACMP_ENABLE_INT(acmp,u32ChNum) (acmp->CR[u32ChNum] |= ACMP_CR_ACMPIE_Msk)
113
121#define ACMP_DISABLE_INT(acmp,u32ChNum) (acmp->CR[u32ChNum] &= ~ACMP_CR_ACMPIE_Msk)
122
123
131#define ACMP_ENABLE(acmp,u32ChNum) (acmp->CR[u32ChNum] |= ACMP_CR_ACMPEN_Msk)
132
140#define ACMP_DISABLE(acmp,u32ChNum) (acmp->CR[u32ChNum] &= ~ACMP_CR_ACMPEN_Msk)
141
149#define ACMP_GET_OUTPUT(acmp,u32ChNum) ((acmp->SR & ACMP_SR_CO0_Msk<<u32ChNum)?1:0)
150
158#define ACMP_GET_INT_FLAG(acmp,u32ChNum) ((acmp->SR & ACMP_SR_ACMPF0_Msk<<u32ChNum)?1:0)
159
167#define ACMP_CLR_INT_FLAG(acmp,u32ChNum) (acmp->SR |= (ACMP_SR_ACMPF0_Msk<<u32ChNum))
168
176#define ACMP_ENABLE_WAKEUP(acmp,u32ChNum) (acmp->CR[u32ChNum] |= ACMP_CR_ACMP_WKEUP_EN_Msk)
177
185#define ACMP_DISABLE_WAKEUP(acmp,u32ChNum) (acmp->CR[u32ChNum] &= ~ACMP_CR_ACMP_WKEUP_EN_Msk)
186
196#define ACMP_CRV_SEL(u32Level) (ACMP->RVCR = (ACMP->RVCR & ~ACMP_RVCR_CRVS_Msk)| u32Level)
197
204#define ACMP_ENABLE_CRV(acmp) (ACMP->RVCR |= ACMP_RVCR_CRV_EN_Msk)
205
212#define ACMP_DISABLE_CRV(acmp) (ACMP->RVCR &= ~ACMP_RVCR_CRV_EN_Msk)
213
226#define ACMP_SELECT_P(acmp, u32ChNum, u32Src) ((acmp)->CR[(u32ChNum)%2] = ((acmp)->CR[(u32ChNum)%2] & ~ACMP_CR_CPP0SEL_Msk) | (u32Src))
227
234#define ACMP_START_CONV(acmp) \
235 do{ \
236 ACMP->MODCR0 &= ~ACMP_MODCR0_START_Msk; \
237 ACMP->MODCR0 |= ACMP_MODCR0_START_Msk; \
238}while(0);
239
240 void ACMP_Open(ACMP_T *, uint32_t u32ChNum, uint32_t u32NegSrc, uint32_t u32HysteresisEn);
241 void ACMP_Close(ACMP_T *, uint32_t u32ChNum);
242 void ACMP_SetSigmaDeltaConv(uint32_t u32TimerNum, uint32_t u32TriggerPolarity, uint32_t u32PosPin, uint32_t u32ChargePin);
243 void ACMP_SetSlopeConv(uint32_t u32TimerNum, uint32_t u32TriggerPolarity, uint32_t u32PosPin, uint32_t u32ChargePin);
244 /* end of group NANO1X2_ACMP_EXPORTED_FUNCTIONS */
246 /* end of group NANO1X2_ACMP_Driver */
248 /* end of group NANO1X2_Device_Driver */
250
251#ifdef __cplusplus
252}
253#endif
254
255#endif //__ACMP_H__
256
257/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
ACMP_SetSigmaDeltaConv
void ACMP_SetSigmaDeltaConv(uint32_t u32TimerNum, uint32_t u32TriggerPolarity, uint32_t u32PosPin, uint32_t u32ChargePin)
This function configure ACMP to sigma-delta mode.
Definition: acmp.c:102
ACMP_Close
void ACMP_Close(ACMP_T *, uint32_t u32ChNum)
This function close comparator.
Definition: acmp.c:71
ACMP_Open
void ACMP_Open(ACMP_T *, uint32_t u32ChNum, uint32_t u32NegSrc, uint32_t u32HysteresisEn)
This function open and configure comparator parameters.
Definition: acmp.c:55
ACMP_SetSlopeConv
void ACMP_SetSlopeConv(uint32_t u32TimerNum, uint32_t u32TriggerPolarity, uint32_t u32PosPin, uint32_t u32ChargePin)
This function configure ACMP to slope mode.
Definition: acmp.c:142
ACMP_T
Definition: Nano1X2Series.h:157