| NANO102/112 BSP V3.04.000 The Board Support Package for Nano102/112 Series

system_Nano1X2Series.c
Go to the documentation of this file.
1/******************************************************************************
2 * @file system_Nano1X2Series.c
3 * @version V1.00
4 * $Revision: 6 $
5 * $Date: 13/12/16 4:27p $
6 * @brief Nano1X2 series system clock init code and assert handler
7 *
8 * @note
9 * SPDX-License-Identifier: Apache-2.0
10 * Copyright (C) 2013 Nuvoton Technology Corp. All rights reserved.
11*****************************************************************************/
12
13#include <stdint.h>
14#include "Nano1X2Series.h"
15
16
17/*----------------------------------------------------------------------------
18 Clock Variable definitions
19 *----------------------------------------------------------------------------*/
20uint32_t SystemCoreClock = __HSI;
21uint32_t CyclesPerUs = (__HSI / 1000000);
28uint32_t SysGet_PLLClockFreq(void)
29{
30 uint32_t u32Freq =0, u32PLLSrc;
31 uint32_t u32SRC_N,u32PLL_M,u32PllReg;
32
33 u32PllReg = CLK->PLLCTL;
34
35 if (u32PllReg & CLK_PLLCTL_PD)
36 return 0; /* PLL is in power down mode */
37
38 if (u32PllReg & CLK_PLLCTL_PLL_SRC_HIRC)
39 {
40 if(CLK->PLLCTL & CLK_PWRCTL_HIRC_FSEL_Msk)
41 u32PLLSrc =__HIRC16M;
42 else
43 u32PLLSrc =__HIRC12M;
44 }
45 else
46 u32PLLSrc = __HXT;
47
48 u32SRC_N = (u32PllReg & CLK_PLLCTL_PLL_SRC_N_Msk) >> CLK_PLLCTL_PLL_SRC_N_Pos;
49 u32PLL_M = (u32PllReg & CLK_PLLCTL_PLL_MLP_Msk) >> CLK_PLLCTL_PLL_MLP_Pos;
50
51 u32Freq = u32PLLSrc * u32PLL_M / (u32SRC_N+1);
52
53 return u32Freq;
54}
55
56
62uint32_t SysGet_HCLKFreq(void)
63{
64
65 uint32_t u32Freqout, u32AHBDivider, u32ClkSel;
66
67 u32ClkSel = CLK->CLKSEL0 & CLK_CLKSEL0_HCLK_S_Msk;
68
69 if (u32ClkSel == CLK_CLKSEL0_HCLK_S_HXT) /* external HXT crystal clock */
70 {
71 u32Freqout = __HXT;
72 }
73 else if(u32ClkSel == CLK_CLKSEL0_HCLK_S_LXT) /* external LXT crystal clock */
74 {
75 u32Freqout = __LXT;
76 }
77 else if(u32ClkSel == CLK_CLKSEL0_HCLK_S_PLL) /* PLL clock */
78 {
79 u32Freqout = SysGet_PLLClockFreq();
80 }
81 else if(u32ClkSel == CLK_CLKSEL0_HCLK_S_LIRC) /* internal LIRC oscillator clock */
82 {
83 u32Freqout = __LIRC;
84 }
85 else /* internal HIRC oscillator clock */
86 {
87 if((CLK->PWRCTL & CLK_PWRCTL_HIRC_FSEL_Msk) == CLK_PWRCTL_HIRC_FSEL_Msk)
88 u32Freqout = __HIRC16M;
89 else
90 u32Freqout = __HIRC12M;
91
92 }
93 u32AHBDivider = (CLK->CLKDIV0 & CLK_CLKDIV0_HCLK_N_Msk) + 1 ;
94
95 return (u32Freqout/u32AHBDivider);
96}
97
98
106 void SystemCoreClockUpdate (void)
107{
108
109 SystemCoreClock = SysGet_HCLKFreq();
110 CyclesPerUs = (SystemCoreClock + 500000) / 1000000;
111}
112
113#if USE_ASSERT
114
126 void AssertError(uint8_t * file, uint32_t line)
127{
128
129 printf("[%s] line %d : wrong parameters.\r\n", file, line);
130
131 /* Infinite loop */
132 while(1) ;
133}
134#endif
135
136/*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/
Nano1X2Series.h
Nano102/112 peripheral access layer header file. This file contains all the peripheral register's def...
CLK_CLKSEL0_HCLK_S_LXT
#define CLK_CLKSEL0_HCLK_S_LXT
Definition: clk.h:123
CLK_PLLCTL_PLL_SRC_HIRC
#define CLK_PLLCTL_PLL_SRC_HIRC
Definition: clk.h:99
CLK_CLKSEL0_HCLK_S_HXT
#define CLK_CLKSEL0_HCLK_S_HXT
Definition: clk.h:122
CLK_PLLCTL_PD
#define CLK_PLLCTL_PD
Definition: clk.h:97
CLK_CLKSEL0_HCLK_S_PLL
#define CLK_CLKSEL0_HCLK_S_PLL
Definition: clk.h:124
CLK_CLKSEL0_HCLK_S_LIRC
#define CLK_CLKSEL0_HCLK_S_LIRC
Definition: clk.h:125
CLK_PLLCTL_PLL_MLP_Msk
#define CLK_PLLCTL_PLL_MLP_Msk
Definition: Nano1X2Series.h:1643
CLK_PLLCTL_PLL_SRC_N_Msk
#define CLK_PLLCTL_PLL_SRC_N_Msk
Definition: Nano1X2Series.h:1646
CLK_PLLCTL_PLL_SRC_N_Pos
#define CLK_PLLCTL_PLL_SRC_N_Pos
Definition: Nano1X2Series.h:1645
CLK_CLKSEL0_HCLK_S_Msk
#define CLK_CLKSEL0_HCLK_S_Msk
Definition: Nano1X2Series.h:1571
CLK_CLKDIV0_HCLK_N_Msk
#define CLK_CLKDIV0_HCLK_N_Msk
Definition: Nano1X2Series.h:1616
CLK_PLLCTL_PLL_MLP_Pos
#define CLK_PLLCTL_PLL_MLP_Pos
Definition: Nano1X2Series.h:1642
CLK_PWRCTL_HIRC_FSEL_Msk
#define CLK_PWRCTL_HIRC_FSEL_Msk
Definition: Nano1X2Series.h:1469
CLK
#define CLK
Pointer to CLK register structure.
Definition: Nano1X2Series.h:10651
SysGet_PLLClockFreq
uint32_t SysGet_PLLClockFreq(void)
Calculate current PLL clock frequency.
Definition: system_Nano1X2Series.c:28
CyclesPerUs
uint32_t CyclesPerUs
Definition: system_Nano1X2Series.c:21
SystemCoreClock
uint32_t SystemCoreClock
Definition: system_Nano1X2Series.c:20
SysGet_HCLKFreq
uint32_t SysGet_HCLKFreq(void)
Get current HCLK clock frequency.
Definition: system_Nano1X2Series.c:62
SystemCoreClockUpdate
void SystemCoreClockUpdate(void)
This function is used to update the variable SystemCoreClock and must be called whenever the core clo...
Definition: system_Nano1X2Series.c:106
__HXT
#define __HXT
Definition: system_Nano1X2Series.h:26
__LIRC
#define __LIRC
Definition: system_Nano1X2Series.h:30
__HIRC16M
#define __HIRC16M
Definition: system_Nano1X2Series.h:29
__LXT
#define __LXT
Definition: system_Nano1X2Series.h:27
__HSI
#define __HSI
Definition: system_Nano1X2Series.h:32
__HIRC12M
#define __HIRC12M
Definition: system_Nano1X2Series.h:28