| NANO102/112 BSP V3.04.000 The Board Support Package for Nano102/112 Series

Data Structures | Macros | Typedefs | Enumerations
Nano1X2Series.h File Reference

Nano102/112 peripheral access layer header file. This file contains all the peripheral register's definitions, bits definitions and memory mapping for NuMicro Nano102/112 MCU. More...

`#include "core_cm0.h"`
`#include "system_Nano1X2Series.h"`
`#include <stdint.h>`
`#include "sys.h"`
`#include "clk.h"`
`#include "acmp.h"`
`#include "adc.h"`
`#include "fmc.h"`
`#include "gpio.h"`
`#include "i2c.h"`
`#include "crc.h"`
`#include "pdma.h"`
`#include "pwm.h"`
`#include "rtc.h"`
`#include "sc.h"`
`#include "scuart.h"`
`#include "spi.h"`
`#include "timer.h"`
`#include "uart.h"`
`#include "wdt.h"`
`#include "wwdt.h"`
Include dependency graph for Nano1X2Series.h:
This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

## Data Structures
struct | ACMP_T
struct | ADC_T
struct | CLK_T
struct | DMA_CRC_T
struct | DMA_GCR_T
struct | PDMA_T
struct | FMC_T
struct | SYS_T
struct | GPIO_T
struct | GP_DB_T
struct | I2C_T
struct | LCD_T
struct | PWM_T
struct | RTC_T
struct | SC_T
struct | SPI_T
struct | TIMER_T
struct | UART_T
struct | WDT_T
struct | WWDT_T

## Macros
#define | __CM0_REV 0x0201
#define | __NVIC_PRIO_BITS 2
#define | __Vendor_SysTickConfig 0
#define | __MPU_PRESENT 0
#define | __FPU_PRESENT 0
#define | FLASH_BASE ((uint32_t)0x00000000)
| Flash base address. More...
#define | SRAM_BASE ((uint32_t)0x20000000)
| SRAM base address. More...
#define | APB1PERIPH_BASE ((uint32_t)0x40000000)
| APB1 base address. More...
#define | APB2PERIPH_BASE ((uint32_t)0x40100000)
| APB2 base address. More...
#define | AHBPERIPH_BASE ((uint32_t)0x50000000)
| AHB base address. More...
#define | WDT_BASE (APB1PERIPH_BASE + 0x04000)
| WDT register base address. More...
#define | WWDT_BASE (APB1PERIPH_BASE + 0x04100)
| WWDT register base address. More...
#define | RTC_BASE (APB1PERIPH_BASE + 0x08000)
| RTC register base address. More...
#define | TIMER0_BASE (APB1PERIPH_BASE + 0x10000)
| TIMER0 register base address. More...
#define | TIMER1_BASE (APB1PERIPH_BASE + 0x10100)
| TIMER1 register base address. More...
#define | I2C0_BASE (APB1PERIPH_BASE + 0x20000)
| I2C0 register base address. More...
#define | SPI0_BASE (APB1PERIPH_BASE + 0x30000)
| SPI0 register base address. More...
#define | PWM0_BASE (APB1PERIPH_BASE + 0x40000)
| PWM0 register base address. More...
#define | UART0_BASE (APB1PERIPH_BASE + 0x50000)
| UART0 register base address. More...
#define | LCD_BASE (APB1PERIPH_BASE + 0xB0000)
| LCD register base address. More...
#define | ADC_BASE (APB1PERIPH_BASE + 0xE0000)
| ADC register base address. More...
#define | TIMER2_BASE (APB2PERIPH_BASE + 0x10000)
| TIMER2 register base address. More...
#define | TIMER3_BASE (APB2PERIPH_BASE + 0x10100)
| TIMER3 register base address. More...
#define | I2C1_BASE (APB2PERIPH_BASE + 0x20000)
| I2C1 register base address. More...
#define | SPI1_BASE (APB2PERIPH_BASE + 0x30000)
| SPI1 register base address. More...
#define | UART1_BASE (APB2PERIPH_BASE + 0x50000)
| UART1 register base address. More...
#define | SC0_BASE (APB2PERIPH_BASE + 0x90000)
| SC0 register base address. More...
#define | SC1_BASE (APB2PERIPH_BASE + 0xB0000)
| SC1 register base address. More...
#define | ACMP_BASE (APB2PERIPH_BASE + 0xD0000)
| ACMP register base address. More...
#define | SYS_BASE (AHBPERIPH_BASE + 0x00000)
| SYS register base address. More...
#define | CLK_BASE (AHBPERIPH_BASE + 0x00200)
| CLK register base address. More...
#define | INTID_BASE (AHBPERIPH_BASE + 0x00300)
| INT register base address. More...
#define | GPIOA_BASE (AHBPERIPH_BASE + 0x04000)
| GPIO port A register base address. More...
#define | GPIOB_BASE (AHBPERIPH_BASE + 0x04040)
| GPIO port B register base address. More...
#define | GPIOC_BASE (AHBPERIPH_BASE + 0x04080)
| GPIO port C register base address. More...
#define | GPIOD_BASE (AHBPERIPH_BASE + 0x040C0)
| GPIO port D register base address. More...
#define | GPIOE_BASE (AHBPERIPH_BASE + 0x04100)
| GPIO port E register base address. More...
#define | GPIOF_BASE (AHBPERIPH_BASE + 0x04140)
| GPIO port F register base address. More...
#define | GPIODBNCE_BASE (AHBPERIPH_BASE + 0x04180)
| GPIO debounce register base address. More...
#define | GPIO_PIN_DATA_BASE (AHBPERIPH_BASE + 0x04200)
| GPIO bit access register base address. More...
#define | PDMA0_BASE (AHBPERIPH_BASE + 0x08000)
| PDMA0 register base address. More...
#define | PDMA1_BASE (AHBPERIPH_BASE + 0x08100)
| PDMA1 register base address. More...
#define | PDMA2_BASE (AHBPERIPH_BASE + 0x08200)
| PDMA2 register base address. More...
#define | PDMA3_BASE (AHBPERIPH_BASE + 0x08300)
| PDMA3 register base address. More...
#define | PDMA4_BASE (AHBPERIPH_BASE + 0x08400)
| PDMA4 register base address. More...
#define | PDMACRC_BASE (AHBPERIPH_BASE + 0x08E00)
| PDMA global control register base address. More...
#define | PDMAGCR_BASE (AHBPERIPH_BASE + 0x08F00)
| PDMA CRC register base address. More...
#define | FMC_BASE (AHBPERIPH_BASE + 0x0C000)
| FMC register base address. More...
#define | WDT ((WDT_T *) WDT_BASE)
| Pointer to WDT register structure. More...
#define | WWDT ((WWDT_T *) WWDT_BASE)
| Pointer to WWDT register structure. More...
#define | RTC ((RTC_T *) RTC_BASE)
| Pointer to RTC register structure. More...
#define | TIMER0 ((TIMER_T *) TIMER0_BASE)
| Pointer to TIMER0 register structure. More...
#define | TIMER1 ((TIMER_T *) TIMER1_BASE)
| Pointer to TIMER1 register structure. More...
#define | TIMER2 ((TIMER_T *) TIMER2_BASE)
| Pointer to TIMER2 register structure. More...
#define | TIMER3 ((TIMER_T *) TIMER3_BASE)
| Pointer to TIMER3 register structure. More...
#define | I2C0 ((I2C_T *) I2C0_BASE)
| Pointer to I2C0 register structure. More...
#define | I2C1 ((I2C_T *) I2C1_BASE)
| Pointer to I2C1 register structure. More...
#define | SPI0 ((SPI_T *) SPI0_BASE)
| Pointer to SPI0 register structure. More...
#define | SPI1 ((SPI_T *) SPI1_BASE)
| Pointer to SPI1 register structure. More...
#define | PWM0 ((PWM_T *) PWM0_BASE)
| Pointer to PWM0 register structure. More...
#define | UART0 ((UART_T *) UART0_BASE)
| Pointer to UART0 register structure. More...
#define | UART1 ((UART_T *) UART1_BASE)
| Pointer to UART1 register structure. More...
#define | LCD ((LCD_T *) LCD_BASE)
| Pointer to LCD register structure. More...
#define | ADC ((ADC_T *) ADC_BASE)
| Pointer to ADC register structure. More...
#define | SC0 ((SC_T *) SC0_BASE)
| Pointer to SC0 register structure. More...
#define | SC1 ((SC_T *) SC1_BASE)
| Pointer to SC1 register structure. More...
#define | ACMP ((ACMP_T *) ACMP_BASE)
| Pointer to ACMP register structure. More...
#define | SYS ((SYS_T *) SYS_BASE)
| Pointer to SYS register structure. More...
#define | CLK ((CLK_T *) CLK_BASE)
| Pointer to CLK register structure. More...
#define | PA ((GPIO_T *) GPIOA_BASE)
| Pointer to GPIO port A register structure. More...
#define | PB ((GPIO_T *) GPIOB_BASE)
| Pointer to GPIO port B register structure. More...
#define | PC ((GPIO_T *) GPIOC_BASE)
| Pointer to GPIO port C register structure. More...
#define | PD ((GPIO_T *) GPIOD_BASE)
| Pointer to GPIO port D register structure. More...
#define | PE ((GPIO_T *) GPIOE_BASE)
| Pointer to GPIO port E register structure. More...
#define | PF ((GPIO_T *) GPIOF_BASE)
| Pointer to GPIO port F register structure. More...
#define | GPIO ((GP_DB_T *) GPIODBNCE_BASE)
| Pointer to GPIO debounce register structure. More...
#define | PDMA1 ((PDMA_T *) PDMA1_BASE)
| Pointer to PDMA1 register structure. More...
#define | PDMA2 ((PDMA_T *) PDMA2_BASE)
| Pointer to PDMA2 register structure. More...
#define | PDMA3 ((PDMA_T *) PDMA3_BASE)
| Pointer to PDMA3 register structure. More...
#define | PDMA4 ((PDMA_T *) PDMA4_BASE)
| Pointer to PDMA4 register structure. More...
#define | PDMACRC ((DMA_CRC_T *) PDMACRC_BASE)
| Pointer to PDMA CRC register structure. More...
#define | PDMAGCR ((DMA_GCR_T *) PDMAGCR_BASE)
| Pointer to PDMA global control register structure. More...
#define | FMC ((FMC_T *) FMC_BASE)
| Pointer to FMC register structure. More...
#define | M8(addr) (*((vu8 *) (addr)))
| Get a 8-bit unsigned value from specified address. More...
#define | M16(addr) (*((vu16 *) (addr)))
| Get a 16-bit unsigned value from specified address. More...
#define | M32(addr) (*((vu32 *) (addr)))
| Get a 32-bit unsigned value from specified address. More...
#define | outpw(port, value) *((volatile unsigned int *)(port)) = value
| Set a 32-bit unsigned value to specified I/O port. More...
#define | inpw(port) (*((volatile unsigned int *)(port)))
| Get a 32-bit unsigned value from specified I/O port. More...
#define | outps(port, value) *((volatile unsigned short *)(port)) = value
| Set a 16-bit unsigned value to specified I/O port. More...
#define | inps(port) (*((volatile unsigned short *)(port)))
| Get a 16-bit unsigned value from specified I/O port. More...
#define | outpb(port, value) *((volatile unsigned char *)(port)) = value
| Set a 8-bit unsigned value to specified I/O port. More...
#define | inpb(port) (*((volatile unsigned char *)(port)))
| Get a 8-bit unsigned value from specified I/O port. More...
#define | outp32(port, value) *((volatile unsigned int *)(port)) = value
| Set a 32-bit unsigned value to specified I/O port. More...
#define | inp32(port) (*((volatile unsigned int *)(port)))
| Get a 32-bit unsigned value from specified I/O port. More...
#define | outp16(port, value) *((volatile unsigned short *)(port)) = value
| Set a 16-bit unsigned value to specified I/O port. More...
#define | inp16(port) (*((volatile unsigned short *)(port)))
| Get a 16-bit unsigned value from specified I/O port. More...
#define | outp8(port, value) *((volatile unsigned char *)(port)) = value
| Set a 8-bit unsigned value to specified I/O port. More...
#define | inp8(port) (*((volatile unsigned char *)(port)))
| Get a 8-bit unsigned value from specified I/O port. More...
#define | NULL (0)
| NULL pointer. More...
#define | TRUE (1)
| Boolean true, define to use in API parameters or return value. More...
#define | FALSE (0)
| Boolean false, define to use in API parameters or return value. More...
#define | ENABLE (1)
| Enable, define to use in API parameters. More...
#define | DISABLE (0)
| Disable, define to use in API parameters. More...
#define | BIT0 (0x00000001)
| Bit 0 mask of an 32 bit integer. More...
#define | BIT1 (0x00000002)
| Bit 1 mask of an 32 bit integer. More...
#define | BIT2 (0x00000004)
| Bit 2 mask of an 32 bit integer. More...
#define | BIT3 (0x00000008)
| Bit 3 mask of an 32 bit integer. More...
#define | BIT4 (0x00000010)
| Bit 4 mask of an 32 bit integer. More...
#define | BIT5 (0x00000020)
| Bit 5 mask of an 32 bit integer. More...
#define | BIT6 (0x00000040)
| Bit 6 mask of an 32 bit integer. More...
#define | BIT7 (0x00000080)
| Bit 7 mask of an 32 bit integer. More...
#define | BIT8 (0x00000100)
| Bit 8 mask of an 32 bit integer. More...
#define | BIT9 (0x00000200)
| Bit 9 mask of an 32 bit integer. More...
#define | BIT10 (0x00000400)
| Bit 10 mask of an 32 bit integer. More...
#define | BIT11 (0x00000800)
| Bit 11 mask of an 32 bit integer. More...
#define | BIT12 (0x00001000)
| Bit 12 mask of an 32 bit integer. More...
#define | BIT13 (0x00002000)
| Bit 13 mask of an 32 bit integer. More...
#define | BIT14 (0x00004000)
| Bit 14 mask of an 32 bit integer. More...
#define | BIT15 (0x00008000)
| Bit 15 mask of an 32 bit integer. More...
#define | BIT16 (0x00010000)
| Bit 16 mask of an 32 bit integer. More...
#define | BIT17 (0x00020000)
| Bit 17 mask of an 32 bit integer. More...
#define | BIT18 (0x00040000)
| Bit 18 mask of an 32 bit integer. More...
#define | BIT19 (0x00080000)
| Bit 19 mask of an 32 bit integer. More...
#define | BIT20 (0x00100000)
| Bit 20 mask of an 32 bit integer. More...
#define | BIT21 (0x00200000)
| Bit 21 mask of an 32 bit integer. More...
#define | BIT22 (0x00400000)
| Bit 22 mask of an 32 bit integer. More...
#define | BIT23 (0x00800000)
| Bit 23 mask of an 32 bit integer. More...
#define | BIT24 (0x01000000)
| Bit 24 mask of an 32 bit integer. More...
#define | BIT25 (0x02000000)
| Bit 25 mask of an 32 bit integer. More...
#define | BIT26 (0x04000000)
| Bit 26 mask of an 32 bit integer. More...
#define | BIT27 (0x08000000)
| Bit 27 mask of an 32 bit integer. More...
#define | BIT28 (0x10000000)
| Bit 28 mask of an 32 bit integer. More...
#define | BIT29 (0x20000000)
| Bit 29 mask of an 32 bit integer. More...
#define | BIT30 (0x40000000)
| Bit 30 mask of an 32 bit integer. More...
#define | BIT31 (0x80000000)
| Bit 31 mask of an 32 bit integer. More...
#define | BYTE0_Msk (0x000000FF)
| Mask to get bit0~bit7 from a 32 bit integer. More...
#define | BYTE1_Msk (0x0000FF00)
| Mask to get bit8~bit15 from a 32 bit integer. More...
#define | BYTE2_Msk (0x00FF0000)
| Mask to get bit16~bit23 from a 32 bit integer. More...
#define | BYTE3_Msk (0xFF000000)
| Mask to get bit24~bit31 from a 32 bit integer. More...
#define | GET_BYTE0(u32Param) ((u32Param & BYTE0_Msk) )
#define | GET_BYTE1(u32Param) ((u32Param & BYTE1_Msk) >> 8)
#define | GET_BYTE2(u32Param) ((u32Param & BYTE2_Msk) >> 16)
#define | GET_BYTE3(u32Param) ((u32Param & BYTE3_Msk) >> 24)
#define | ACMP_CR_ACMPEN_Pos (0)
#define | ACMP_CR_ACMPEN_Msk (0x1ul << ACMP_CR_ACMPEN_Pos)
#define | ACMP_CR_ACMPIE_Pos (1)
#define | ACMP_CR_ACMPIE_Msk (0x1ul << ACMP_CR_ACMPIE_Pos)
#define | ACMP_CR_ACMP_HYSEN_Pos (2)
#define | ACMP_CR_ACMP_HYSEN_Msk (0x1ul << ACMP_CR_ACMP_HYSEN_Pos)
#define | ACMP_CR_CN_Pos (4)
#define | ACMP_CR_CN_Msk (0x3ul << ACMP_CR_CN_Pos)
#define | ACMP_CR_ACMP0_EX_Pos (16)
#define | ACMP_CR_ACMP0_EX_Msk (0x1ul << ACMP_CR_ACMP0_EX_Pos)
#define | ACMP_CR_ACMP0_INV_Pos (17)
#define | ACMP_CR_ACMP0_INV_Msk (0x1UL<<ACMP_CR_ACMP0_INV_Pos)
#define | ACMP_CR_ACOMP0_PN_AutoEx_Pos (19)
#define | ACMP_CR_ACOMP0_PN_AutoEx_Msk (0x1ul << ACMP_CR_ACOMP0_PN_AutoEx_Pos)
#define | ACMP_CR_ACMP0_FILTER_Pos (20)
#define | ACMP_CR_ACMP0_FILTER_Msk (0x1ul << ACMP_CR_ACMP0_FILTER_Pos)
#define | ACMP_CR_CPO0_SEL_Pos (21)
#define | ACMP_CR_CPO0_SEL_Msk (0x1ul << ACMP_CR_CPO0_SEL_Pos)
#define | ACMP_CR_CPP0SEL_Pos (29)
#define | ACMP_CR_CPP0SEL_Msk (0x3ul << ACMP_CR_CPP0SEL_Pos)
#define | ACMP_CR_ACMP_WKEUP_EN_Pos (31)
#define | ACMP_CR_ACMP_WKEUP_EN_Msk (0x1ul << ACMP_CR_ACMP0_WKEUP_EN_Pos)
#define | ACMP_SR_ACMPF0_Pos (0)
#define | ACMP_SR_ACMPF0_Msk (0x1ul << ACMP_SR_ACMPF0_Pos)
#define | ACMP_SR_ACMPF1_Pos (1)
#define | ACMP_SR_ACMPF1_Msk (0x1ul << ACMP_SR_ACMPF1_Pos)
#define | ACMP_SR_CO0_Pos (2)
#define | ACMP_SR_CO0_Msk (0x1ul << ACMP_SR_CO0_Pos)
#define | ACMP_SR_CO1_Pos (3)
#define | ACMP_SR_CO1_Msk (0x1ul << ACMP_SR_CO1_Pos)
#define | ACMP_RVCR_CRVS_Pos (0)
#define | ACMP_RVCR_CRVS_Msk (0xful << ACMP_RVCR_CRVS_Pos)
#define | ACMP_RVCR_CRV_EN_Pos (4)
#define | ACMP_RVCR_CRV_EN_Msk (0x1ul << ACMP_RVCR_CRV_EN_Pos)
#define | ACMP_RVCR_CRVSRC_SEL_Pos (5)
#define | ACMP_RVCR_CRVSRC_SEL_Msk (0x1ul << ACMP_RVCR_CRVSRC_SEL_Pos)
#define | ACMP_MODCR0_MOD_SEL_Pos (0)
#define | ACMP_MODCR0_MOD_SEL_Msk (0x3ul << ACMP_MODCR0_MOD_SEL_Pos)
#define | ACMP_MODCR0_TMR_SEL_Pos (2)
#define | ACMP_MODCR0_TMR_SEL_Msk (0x1ul << ACMP_MODCR0_TMR_SEL_Pos)
#define | ACMP_MODCR0_TMR_TRI_LV_Pos (3)
#define | ACMP_MODCR0_TMR_TRI_LV_Msk (0x1ul << ACMP_MODCR0_TMR_TRI_LV_Pos)
#define | ACMP_MODCR0_CH_DIS_PIN_SEL_Pos (4)
#define | ACMP_MODCR0_CH_DIS_PIN_SEL_Msk (0x7ul << ACMP_MODCR0_CH_DIS_PIN_SEL_Pos)
#define | ACMP_MODCR0_CH_DIS_FUN_SEL_Pos (7)
#define | ACMP_MODCR0_CH_DIS_FUN_SEL_Msk (0x1ul << ACMP_MODCR0_CH_DIS_FUN_SEL_Pos)
#define | ACMP_MODCR0_START_Pos (8)
#define | ACMP_MODCR0_START_Msk (0x1ul << ACMP_MODCR0_START_Pos)
#define | ADC_RESULT_RSLT_Pos (0)
#define | ADC_RESULT_RSLT_Msk (0xffful << ADC_RESULT_RSLT_Pos)
#define | ADC_RESULT_VALID_Pos (16)
#define | ADC_RESULT_VALID_Msk (0x1ul << ADC_RESULT_VALID_Pos)
#define | ADC_RESULT_OVERRUN_Pos (17)
#define | ADC_RESULT_OVERRUN_Msk (0x1ul << ADC_RESULT_OVERRUN_Pos)
#define | ADC_CR_ADEN_Pos (0)
#define | ADC_CR_ADEN_Msk (0x1ul << ADC_CR_ADEN_Pos)
#define | ADC_CR_ADIE_Pos (1)
#define | ADC_CR_ADIE_Msk (0x1ul << ADC_CR_ADIE_Pos)
#define | ADC_CR_ADMD_Pos (2)
#define | ADC_CR_ADMD_Msk (0x3ul << ADC_CR_ADMD_Pos)
#define | ADC_CR_TRGS_Pos (4)
#define | ADC_CR_TRGS_Msk (0x3ul << ADC_CR_TRGS_Pos)
#define | ADC_CR_TRGCOND_Pos (6)
#define | ADC_CR_TRGCOND_Msk (0x3ul << ADC_CR_TRGCOND_Pos)
#define | ADC_CR_TRGE_Pos (8)
#define | ADC_CR_TRGE_Msk (0x1ul << ADC_CR_TRGE_Pos)
#define | ADC_CR_PTEN_Pos (9)
#define | ADC_CR_PTEN_Msk (0x1ul << ADC_CR_PTEN_Pos)
#define | ADC_CR_DIFF_Pos (10)
#define | ADC_CR_DIFF_Msk (0x1ul << ADC_CR_DIFF_Pos)
#define | ADC_CR_ADST_Pos (11)
#define | ADC_CR_ADST_Msk (0x1ul << ADC_CR_ADST_Pos)
#define | ADC_CR_TMSEL_Pos (12)
#define | ADC_CR_TMSEL_Msk (0x3ul << ADC_CR_TMSEL_Pos)
#define | ADC_CR_TMTRGMOD_Pos (15)
#define | ADC_CR_TMTRGMOD_Msk (0x1ul << ADC_CR_TMTRGMOD_Pos)
#define | ADC_CR_REFSEL_Pos (16)
#define | ADC_CR_REFSEL_Msk (0x3ul << ADC_CR_REFSEL_Pos)
#define | ADC_CR_RESSEL_Pos (18)
#define | ADC_CR_RESSEL_Msk (0x3ul << ADC_CR_RESSEL_Pos)
#define | ADC_CR_TMPDMACNT_Pos (24)
#define | ADC_CR_TMPDMACNT_Msk (0xfful << ADC_CR_TMPDMACNT_Pos)
#define | ADC_CHEN_CHEN0_Pos (0)
#define | ADC_CHEN_CHEN0_Msk (0x1ul << ADC_CHEN_CHEN0_Pos)
#define | ADC_CMPR_CMPEN_Pos (0)
#define | ADC_CMPR_CMPEN_Msk (0x1ul << ADC_CMPR_CMPEN_Pos)
#define | ADC_CMPR_CMPIE_Pos (1)
#define | ADC_CMPR_CMPIE_Msk (0x1ul << ADC_CMPR_CMPIE_Pos)
#define | ADC_CMPR_CMPCOND_Pos (2)
#define | ADC_CMPR_CMPCOND_Msk (0x1ul << ADC_CMPR_CMPCOND_Pos)
#define | ADC_CMPR_CMPCH_Pos (3)
#define | ADC_CMPR_CMPCH_Msk (0x1ful << ADC_CMPR_CMPCH_Pos)
#define | ADC_CMPR_CMPMATCNT_Pos (8)
#define | ADC_CMPR_CMPMATCNT_Msk (0xful << ADC_CMPR_CMPMATCNT_Pos)
#define | ADC_CMPR_CMPD_Pos (16)
#define | ADC_CMPR_CMPD_Msk (0xffful << ADC_CMPR_CMPD_Pos)
#define | ADC_SR_ADF_Pos (0)
#define | ADC_SR_ADF_Msk (0x1ul << ADC_SR_ADF_Pos)
#define | ADC_SR_CMPF0_Pos (1)
#define | ADC_SR_CMPF0_Msk (0x1ul << ADC_SR_CMPF0_Pos)
#define | ADC_SR_CMPF1_Pos (2)
#define | ADC_SR_CMPF1_Msk (0x1ul << ADC_SR_CMPF1_Pos)
#define | ADC_SR_BUSY_Pos (3)
#define | ADC_SR_BUSY_Msk (0x1ul << ADC_SR_BUSY_Pos)
#define | ADC_SR_CHANNEL_Pos (4)
#define | ADC_SR_CHANNEL_Msk (0x1ful << ADC_SR_CHANNEL_Pos)
#define | ADC_SR_INITRDY_Pos (16)
#define | ADC_SR_INITRDY_Msk (0x1ul << ADC_SR_INITRDY_Pos)
#define | ADC_PDMA_AD_PDMA_Pos (0)
#define | ADC_PDMA_AD_PDMA_Msk (0xffful << ADC_PDMA_AD_PDMA_Pos)
#define | ADC_PWRCTL_PWUPRDY_Pos (0)
#define | ADC_PWRCTL_PWUPRDY_Msk (0x1ul << ADC_PWRCTL_PWUPRDY_Pos)
#define | ADC_PWRCTL_PWDCALEN_Pos (1)
#define | ADC_PWRCTL_PWDCALEN_Msk (0x1ul << ADC_PWRCTL_PWDCALEN_Pos)
#define | ADC_PWRCTL_PWDMOD_Pos (2)
#define | ADC_PWRCTL_PWDMOD_Msk (0x3ul << ADC_PWRCTL_PWDMOD_Pos)
#define | ADC_CALCTL_CALEN_Pos (0)
#define | ADC_CALCTL_CALEN_Msk (0x1ul << ADC_CALCTL_CALEN_Pos)
#define | ADC_CALCTL_CALSTART_Pos (1)
#define | ADC_CALCTL_CALSTART_Msk (0x1ul << ADC_CALCTL_CALSTART_Pos)
#define | ADC_CALCTL_CALDONE_Pos (2)
#define | ADC_CALCTL_CALDONE_Msk (0x1ul << ADC_CALCTL_CALDONE_Pos)
#define | ADC_CALCTL_CALSEL_Pos (3)
#define | ADC_CALCTL_CALSEL_Msk (0x1ul << ADC_CALCTL_CALSEL_Pos)
#define | ADC_CALWORD_CALWORD_Pos (0)
#define | ADC_CALWORD_CALWORD_Msk (0x7ful << ADC_CALWORD_CALWORD_Pos)
#define | ADC_SMPLCNT0_CH0SAMPCNT_Pos (0)
#define | ADC_SMPLCNT0_CH0SAMPCNT_Msk (0xful << ADC_SMPLCNT0_CH0SAMPCNT_Pos)
#define | ADC_SMPLCNT1_CH8SAMPCNT_Pos (0)
#define | ADC_SMPLCNT1_CH8SAMPCNT_Msk (0xful << ADC_SMPLCNT1_CH8SAMPCNT_Pos)
#define | ADC_SMPLCNT1_INTCHSAMPCNT_Pos (16)
#define | ADC_SMPLCNT1_INTCHSAMPCNT_Msk (0xful << ADC_SMPLCNT1_INTCHSAMPCNT_Pos)
#define | CLK_PWRCTL_HXT_EN_Pos (0)
#define | CLK_PWRCTL_HXT_EN_Msk (0x1ul << CLK_PWRCTL_HXT_EN_Pos)
#define | CLK_PWRCTL_LXT_EN_Pos (1)
#define | CLK_PWRCTL_LXT_EN_Msk (0x1ul << CLK_PWRCTL_LXT_EN_Pos)
#define | CLK_PWRCTL_HIRC_EN_Pos (2)
#define | CLK_PWRCTL_HIRC_EN_Msk (0x1ul << CLK_PWRCTL_HIRC_EN_Pos)
#define | CLK_PWRCTL_LIRC_EN_Pos (3)
#define | CLK_PWRCTL_LIRC_EN_Msk (0x1ul << CLK_PWRCTL_LIRC_EN_Pos)
#define | CLK_PWRCTL_WK_DLY_Pos (4)
#define | CLK_PWRCTL_WK_DLY_Msk (0x1ul << CLK_PWRCTL_WK_DLY_Pos)
#define | CLK_PWRCTL_PD_WK_IE_Pos (5)
#define | CLK_PWRCTL_PD_WK_IE_Msk (0x1ul << CLK_PWRCTL_PD_WK_IE_Pos)
#define | CLK_PWRCTL_PD_EN_Pos (6)
#define | CLK_PWRCTL_PD_EN_Msk (0x1ul << CLK_PWRCTL_PD_EN_Pos)
#define | CLK_PWRCTL_HXT_SELXT_Pos (8)
#define | CLK_PWRCTL_HXT_SELXT_Msk (0x1ul << CLK_PWRCTL_HXT_SELXT_Pos)
#define | CLK_PWRCTL_HXT_CUR_SEL_Pos (9)
#define | CLK_PWRCTL_HXT_CUR_SEL_Msk (0x1ul << CLK_PWRCTL_HXT_CUR_SEL_Pos)
#define | CLK_PWRCTL_HXT_GAIN_Pos (10)
#define | CLK_PWRCTL_HXT_GAIN_Msk (0x3ul << CLK_PWRCTL_HXT_GAIN_Pos)
#define | CLK_PWRCTL_HIRC_FSEL_Pos (12)
#define | CLK_PWRCTL_HIRC_FSEL_Msk (0x1ul << CLK_PWRCTL_HIRC_FSEL_Pos)
#define | CLK_PWRCTL_HIRC_F_STOP_Pos (13)
#define | CLK_PWRCTL_HIRC_F_STOP_Msk (0x1ul << CLK_PWRCTL_HIRC_F_STOP_Pos)
#define | CLK_AHBCLK_GPIO_EN_Pos (0)
#define | CLK_AHBCLK_GPIO_EN_Msk (0x1ul << CLK_AHBCLK_GPIO_EN_Pos)
#define | CLK_AHBCLK_DMA_EN_Pos (1)
#define | CLK_AHBCLK_DMA_EN_Msk (0x1ul << CLK_AHBCLK_DMA_EN_Pos)
#define | CLK_AHBCLK_ISP_EN_Pos (2)
#define | CLK_AHBCLK_ISP_EN_Msk (0x1ul << CLK_AHBCLK_ISP_EN_Pos)
#define | CLK_AHBCLK_SRAM_EN_Pos (4)
#define | CLK_AHBCLK_SRAM_EN_Msk (0x1ul << CLK_AHBCLK_SRAM_EN_Pos)
#define | CLK_AHBCLK_TICK_EN_Pos (5)
#define | CLK_AHBCLK_TICK_EN_Msk (0x1ul << CLK_AHBCLK_TICK_EN_Pos)
#define | CLK_APBCLK_WDT_EN_Pos (0)
#define | CLK_APBCLK_WDT_EN_Msk (0x1ul << CLK_APBCLK_WDT_EN_Pos)
#define | CLK_APBCLK_RTC_EN_Pos (1)
#define | CLK_APBCLK_RTC_EN_Msk (0x1ul << CLK_APBCLK_RTC_EN_Pos)
#define | CLK_APBCLK_TMR0_EN_Pos (2)
#define | CLK_APBCLK_TMR0_EN_Msk (0x1ul << CLK_APBCLK_TMR0_EN_Pos)
#define | CLK_APBCLK_TMR1_EN_Pos (3)
#define | CLK_APBCLK_TMR1_EN_Msk (0x1ul << CLK_APBCLK_TMR1_EN_Pos)
#define | CLK_APBCLK_TMR2_EN_Pos (4)
#define | CLK_APBCLK_TMR2_EN_Msk (0x1ul << CLK_APBCLK_TMR2_EN_Pos)
#define | CLK_APBCLK_TMR3_EN_Pos (5)
#define | CLK_APBCLK_TMR3_EN_Msk (0x1ul << CLK_APBCLK_TMR3_EN_Pos)
#define | CLK_APBCLK_FDIV0_EN_Pos (6)
#define | CLK_APBCLK_FDIV0_EN_Msk (0x1ul << CLK_APBCLK_FDIV0_EN_Pos)
#define | CLK_APBCLK_FDIV1_EN_Pos (7)
#define | CLK_APBCLK_FDIV1_EN_Msk (0x1ul << CLK_APBCLK_FDIV1_EN_Pos)
#define | CLK_APBCLK_I2C0_EN_Pos (8)
#define | CLK_APBCLK_I2C0_EN_Msk (0x1ul << CLK_APBCLK_I2C0_EN_Pos)
#define | CLK_APBCLK_I2C1_EN_Pos (9)
#define | CLK_APBCLK_I2C1_EN_Msk (0x1ul << CLK_APBCLK_I2C1_EN_Pos)
#define | CLK_APBCLK_ACMP_EN_Pos (11)
#define | CLK_APBCLK_ACMP_EN_Msk (0x1ul << CLK_APBCLK_ACMP_EN_Pos)
#define | CLK_APBCLK_SPI0_EN_Pos (12)
#define | CLK_APBCLK_SPI0_EN_Msk (0x1ul << CLK_APBCLK_SPI0_EN_Pos)
#define | CLK_APBCLK_SPI1_EN_Pos (13)
#define | CLK_APBCLK_SPI1_EN_Msk (0x1ul << CLK_APBCLK_SPI1_EN_Pos)
#define | CLK_APBCLK_UART0_EN_Pos (16)
#define | CLK_APBCLK_UART0_EN_Msk (0x1ul << CLK_APBCLK_UART0_EN_Pos)
#define | CLK_APBCLK_UART1_EN_Pos (17)
#define | CLK_APBCLK_UART1_EN_Msk (0x1ul << CLK_APBCLK_UART1_EN_Pos)
#define | CLK_APBCLK_PWM0_CH01_EN_Pos (20)
#define | CLK_APBCLK_PWM0_CH01_EN_Msk (0x1ul << CLK_APBCLK_PWM0_CH01_EN_Pos)
#define | CLK_APBCLK_PWM0_CH23_EN_Pos (21)
#define | CLK_APBCLK_PWM0_CH23_EN_Msk (0x1ul << CLK_APBCLK_PWM0_CH23_EN_Pos)
#define | CLK_APBCLK_LCD_EN_Pos (26)
#define | CLK_APBCLK_LCD_EN_Msk (0x1ul << CLK_APBCLK_LCD_EN_Pos)
#define | CLK_APBCLK_ADC_EN_Pos (28)
#define | CLK_APBCLK_ADC_EN_Msk (0x1ul << CLK_APBCLK_ADC_EN_Pos)
#define | CLK_APBCLK_SC0_EN_Pos (30)
#define | CLK_APBCLK_SC0_EN_Msk (0x1ul << CLK_APBCLK_SC0_EN_Pos)
#define | CLK_APBCLK_SC1_EN_Pos (31)
#define | CLK_APBCLK_SC1_EN_Msk (0x1ul << CLK_APBCLK_SC1_EN_Pos)
#define | CLK_CLKSTATUS_HXT_STB_Pos (0)
#define | CLK_CLKSTATUS_HXT_STB_Msk (0x1ul << CLK_CLKSTATUS_HXT_STB_Pos)
#define | CLK_CLKSTATUS_LXT_STB_Pos (1)
#define | CLK_CLKSTATUS_LXT_STB_Msk (0x1ul << CLK_CLKSTATUS_LXT_STB_Pos)
#define | CLK_CLKSTATUS_PLL_STB_Pos (2)
#define | CLK_CLKSTATUS_PLL_STB_Msk (0x1ul << CLK_CLKSTATUS_PLL_STB_Pos)
#define | CLK_CLKSTATUS_LIRC_STB_Pos (3)
#define | CLK_CLKSTATUS_LIRC_STB_Msk (0x1ul << CLK_CLKSTATUS_LIRC_STB_Pos)
#define | CLK_CLKSTATUS_HIRC_STB_Pos (4)
#define | CLK_CLKSTATUS_HIRC_STB_Msk (0x1ul << CLK_CLKSTATUS_HIRC_STB_Pos)
#define | CLK_CLKSTATUS_CLK_SW_FAIL_Pos (7)
#define | CLK_CLKSTATUS_CLK_SW_FAIL_Msk (0x1ul << CLK_CLKSTATUS_CLK_SW_FAIL_Pos)
#define | CLK_CLKSEL0_HCLK_S_Pos (0)
#define | CLK_CLKSEL0_HCLK_S_Msk (0x7ul << CLK_CLKSEL0_HCLK_S_Pos)
#define | CLK_CLKSEL1_UART_S_Pos (0)
#define | CLK_CLKSEL1_UART_S_Msk (0x3ul << CLK_CLKSEL1_UART_S_Pos)
#define | CLK_CLKSEL1_PWM0_CH01_S_Pos (4)
#define | CLK_CLKSEL1_PWM0_CH01_S_Msk (0x3ul << CLK_CLKSEL1_PWM0_CH01_S_Pos)
#define | CLK_CLKSEL1_PWM0_CH23_S_Pos (6)
#define | CLK_CLKSEL1_PWM0_CH23_S_Msk (0x3ul << CLK_CLKSEL1_PWM0_CH23_S_Pos)
#define | CLK_CLKSEL1_TMR0_S_Pos (8)
#define | CLK_CLKSEL1_TMR0_S_Msk (0x7ul << CLK_CLKSEL1_TMR0_S_Pos)
#define | CLK_CLKSEL1_TMR1_S_Pos (12)
#define | CLK_CLKSEL1_TMR1_S_Msk (0x7ul << CLK_CLKSEL1_TMR1_S_Pos)
#define | CLK_CLKSEL1_LCD_S_Pos (18)
#define | CLK_CLKSEL1_LCD_S_Msk (0x1ul << CLK_CLKSEL1_LCD_S_Pos)
#define | CLK_CLKSEL1_ADC_S_Pos (19)
#define | CLK_CLKSEL1_ADC_S_Msk (0x7ul << CLK_CLKSEL1_ADC_S_Pos)
#define | CLK_CLKSEL2_FRQDIV1_S_Pos (0)
#define | CLK_CLKSEL2_FRQDIV1_S_Msk (0x3ul << CLK_CLKSEL2_FRQDIV1_S_Pos)
#define | CLK_CLKSEL2_FRQDIV0_S_Pos (2)
#define | CLK_CLKSEL2_FRQDIV0_S_Msk (0x3ul << CLK_CLKSEL2_FRQDIV0_S_Pos)
#define | CLK_CLKSEL2_TMR2_S_Pos (8)
#define | CLK_CLKSEL2_TMR2_S_Msk (0x7ul << CLK_CLKSEL2_TMR2_S_Pos)
#define | CLK_CLKSEL2_TMR3_S_Pos (12)
#define | CLK_CLKSEL2_TMR3_S_Msk (0x7ul << CLK_CLKSEL2_TMR3_S_Pos)
#define | CLK_CLKSEL2_SC_S_Pos (18)
#define | CLK_CLKSEL2_SC_S_Msk (0x3ul << CLK_CLKSEL2_SC_S_Pos)
#define | CLK_CLKSEL2_SPI0_S_Pos (20)
#define | CLK_CLKSEL2_SPI0_S_Msk (0x1ul << CLK_CLKSEL2_SPI0_S_Pos)
#define | CLK_CLKSEL2_SPI1_S_Pos (21)
#define | CLK_CLKSEL2_SPI1_S_Msk (0x1ul << CLK_CLKSEL2_SPI1_S_Pos)
#define | CLK_CLKDIV0_HCLK_N_Pos (0)
#define | CLK_CLKDIV0_HCLK_N_Msk (0xful << CLK_CLKDIV0_HCLK_N_Pos)
#define | CLK_CLKDIV0_UART_N_Pos (8)
#define | CLK_CLKDIV0_UART_N_Msk (0xful << CLK_CLKDIV0_UART_N_Pos)
#define | CLK_CLKDIV0_ADC_N_Pos (16)
#define | CLK_CLKDIV0_ADC_N_Msk (0xfful << CLK_CLKDIV0_ADC_N_Pos)
#define | CLK_CLKDIV0_SC0_N_Pos (28)
#define | CLK_CLKDIV0_SC0_N_Msk (0xful << CLK_CLKDIV0_SC0_N_Pos)
#define | CLK_CLKDIV1_SC1_N_Pos (0)
#define | CLK_CLKDIV1_SC1_N_Msk (0xful << CLK_CLKDIV1_SC1_N_Pos)
#define | CLK_CLKDIV1_TMR0_N_Pos (8)
#define | CLK_CLKDIV1_TMR0_N_Msk (0xful << CLK_CLKDIV1_TMR0_N_Pos)
#define | CLK_CLKDIV1_TMR1_N_Pos (12)
#define | CLK_CLKDIV1_TMR1_N_Msk (0xful << CLK_CLKDIV1_TMR1_N_Pos)
#define | CLK_CLKDIV1_TMR2_N_Pos (16)
#define | CLK_CLKDIV1_TMR2_N_Msk (0xful << CLK_CLKDIV1_TMR2_N_Pos)
#define | CLK_CLKDIV1_TMR3_N_Pos (20)
#define | CLK_CLKDIV1_TMR3_N_Msk (0xful << CLK_CLKDIV1_TMR3_N_Pos)
#define | CLK_PLLCTL_PLL_MLP_Pos (0)
#define | CLK_PLLCTL_PLL_MLP_Msk (0x3ful << CLK_PLLCTL_PLL_MLP_Pos)
#define | CLK_PLLCTL_PLL_SRC_N_Pos (8)
#define | CLK_PLLCTL_PLL_SRC_N_Msk (0xful << CLK_PLLCTL_PLL_SRC_N_Pos)
#define | CLK_PLLCTL_PD_Pos (16)
#define | CLK_PLLCTL_PD_Msk (0x1ul << CLK_PLLCTL_PD_Pos)
#define | CLK_PLLCTL_PLL_SRC_Pos (17)
#define | CLK_PLLCTL_PLL_SRC_Msk (0x1ul << CLK_PLLCTL_PLL_SRC_Pos)
#define | CLK_FRQDIV0_FSEL_Pos (0)
#define | CLK_FRQDIV0_FSEL_Msk (0xful << CLK_FRQDIV0_FSEL_Pos)
#define | CLK_FRQDIV0_FDIV_EN_Pos (4)
#define | CLK_FRQDIV0_FDIV_EN_Msk (0x1ul << CLK_FRQDIV0_FDIV_EN_Pos)
#define | CLK_FRQDIV0_DIV1_Pos (5)
#define | CLK_FRQDIV0_DIV1_Msk (0x1ul << CLK_FRQDIV0_DIV1_Pos)
#define | CLK_WK_INTSTS_PD_WK_IS_Pos (0)
#define | CLK_WK_INTSTS_PD_WK_IS_Msk (0x1ul << CLK_WK_INTSTS_PD_WK_IS_Pos)
#define | CLK_APB_DIV_APBDIV_Pos (0)
#define | CLK_APB_DIV_APBDIV_Msk (0x7ul << CLK_APB_DIV_APBDIV_Pos)
#define | CLK_FRQDIV1_FSEL_Pos (0)
#define | CLK_FRQDIV1_FSEL_Msk (0xful << CLK_FRQDIV1_FSEL_Pos)
#define | CLK_FRQDIV1_FDIV_EN_Pos (4)
#define | CLK_FRQDIV1_FDIV_EN_Msk (0x1ul << CLK_FRQDIV1_FDIV_EN_Pos)
#define | CLK_FRQDIV1_DIV1_Pos (5)
#define | CLK_FRQDIV1_DIV1_Msk (0x1ul << CLK_FRQDIV1_DIV1_Pos)
#define | CLK_SP_DET_HCLK_DET_Pos (0)
#define | CLK_SP_DET_HCLK_DET_Msk (0x1ul << CLK_SP_DET_HCLK_DET_Pos)
#define | CLK_SP_DET_HCLK_STOP_IE_Pos (1)
#define | CLK_SP_DET_HCLK_STOP_IE_Msk (0x1ul << CLK_SP_DET_HCLK_STOP_IE_Pos)
#define | CLK_SP_DET_HXT_DET_Pos (2)
#define | CLK_SP_DET_HXT_DET_Msk (0x1ul << CLK_SP_DET_HXT_DET_Pos)
#define | CLK_SP_DET_HXT_STOP_IE_Pos (3)
#define | CLK_SP_DET_HXT_STOP_IE_Msk (0x1ul << CLK_SP_DET_HXT_STOP_IE_Pos)
#define | CLK_SP_DET_HIRC_DET_Pos (4)
#define | CLK_SP_DET_HIRC_DET_Msk (0x1ul << CLK_SP_DET_HIRC_DET_Pos)
#define | CLK_SP_DET_HIRC_STOP_IE_Pos (5)
#define | CLK_SP_DET_HIRC_STOP_IE_Msk (0x1ul << CLK_SP_DET_HIRC_STOP_IE_Pos)
#define | CLK_SP_STS_HCLK_SP_IS_Pos (0)
#define | CLK_SP_STS_HCLK_SP_IS_Msk (0x1ul << CLK_SP_STS_HCLK_SP_IS_Pos)
#define | CLK_SP_STS_HXT_SP_IS_Pos (2)
#define | CLK_SP_STS_HXT_SP_IS_Msk (0x1ul << CLK_SP_STS_HXT_SP_IS_Pos)
#define | CLK_SP_STS_HIRC_SP_IS_Pos (4)
#define | CLK_SP_STS_HIRC_SP_IS_Msk (0x1ul << CLK_SP_STS_HIRC_SP_IS_Pos)
#define | CLK_SP_STS_HCLK_SEL_Pos (8)
#define | CLK_SP_STS_HCLK_SEL_Msk (0x7ul << CLK_SP_STS_HCLK_SEL_Pos)
#define | DMA_CRC_CTL_CRCCEN_Pos (0)
#define | DMA_CRC_CTL_CRCCEN_Msk (0x1ul << DMA_CRC_CTL_CRCCEN_Pos)
#define | DMA_CRC_CTL_CRC_RST_Pos (1)
#define | DMA_CRC_CTL_CRC_RST_Msk (0x1ul << DMA_CRC_CTL_CRC_RST_Pos)
#define | DMA_CRC_CTL_TRIG_EN_Pos (23)
#define | DMA_CRC_CTL_TRIG_EN_Msk (0x1ul << DMA_CRC_CTL_TRIG_EN_Pos)
#define | DMA_CRC_CTL_WDATA_RVS_Pos (24)
#define | DMA_CRC_CTL_WDATA_RVS_Msk (0x1ul << DMA_CRC_CTL_WDATA_RVS_Pos)
#define | DMA_CRC_CTL_CHECKSUM_RVS_Pos (25)
#define | DMA_CRC_CTL_CHECKSUM_RVS_Msk (0x1ul << DMA_CRC_CTL_CHECKSUM_RVS_Pos)
#define | DMA_CRC_CTL_WDATA_COM_Pos (26)
#define | DMA_CRC_CTL_WDATA_COM_Msk (0x1ul << DMA_CRC_CTL_WDATA_COM_Pos)
#define | DMA_CRC_CTL_CHECKSUM_COM_Pos (27)
#define | DMA_CRC_CTL_CHECKSUM_COM_Msk (0x1ul << DMA_CRC_CTL_CHECKSUM_COM_Pos)
#define | DMA_CRC_CTL_CPU_WDLEN_Pos (28)
#define | DMA_CRC_CTL_CPU_WDLEN_Msk (0x3ul << DMA_CRC_CTL_CPU_WDLEN_Pos)
#define | DMA_CRC_CTL_CRC_MODE_Pos (30)
#define | DMA_CRC_CTL_CRC_MODE_Msk (0x3ul << DMA_CRC_CTL_CRC_MODE_Pos)
#define | DMA_CRC_DMASAR_CRC_DMASAR_Pos (0)
#define | DMA_CRC_DMASAR_CRC_DMASAR_Msk (0xfffffffful << DMA_CRC_DMASAR_CRC_DMASAR_Pos)
#define | DMA_CRC_DMABCR_CRC_DMABCR_Pos (0)
#define | DMA_CRC_DMABCR_CRC_DMABCR_Msk (0xfffful << DMA_CRC_DMABCR_CRC_DMABCR_Pos)
#define | DMA_CRC_DMACSAR_CRC_DMACSAR_Pos (0)
#define | DMA_CRC_DMACSAR_CRC_DMACSAR_Msk (0xfffffffful << DMA_CRC_DMACSAR_CRC_DMACSAR_Pos)
#define | DMA_CRC_DMACBCR_CRC_DMACBCR_Pos (0)
#define | DMA_CRC_DMACBCR_CRC_DMACBCR_Msk (0xfffful << DMA_CRC_DMACBCR_CRC_DMACBCR_Pos)
#define | DMA_CRC_DMAIER_TABORT_IE_Pos (0)
#define | DMA_CRC_DMAIER_TABORT_IE_Msk (0x1ul << DMA_CRC_DMAIER_TABORT_IE_Pos)
#define | DMA_CRC_DMAIER_BLKD_IE_Pos (1)
#define | DMA_CRC_DMAIER_BLKD_IE_Msk (0x1ul << DMA_CRC_DMAIER_BLKD_IE_Pos)
#define | DMA_CRC_DMAISR_TABORT_IF_Pos (0)
#define | DMA_CRC_DMAISR_TABORT_IF_Msk (0x1ul << DMA_CRC_DMAISR_TABORT_IF_Pos)
#define | DMA_CRC_DMAISR_BLKD_IF_Pos (1)
#define | DMA_CRC_DMAISR_BLKD_IF_Msk (0x1ul << DMA_CRC_DMAISR_BLKD_IF_Pos)
#define | DMA_CRC_WDATA_CRC_WDATA_Pos (0)
#define | DMA_CRC_WDATA_CRC_WDATA_Msk (0xfffffffful << DMA_CRC_WDATA_CRC_WDATA_Pos)
#define | DMA_CRC_SEED_CRC_SEED_Pos (0)
#define | DMA_CRC_SEED_CRC_SEED_Msk (0xfffffffful << DMA_CRC_SEED_CRC_SEED_Pos)
#define | DMA_CRC_CHECKSUM_CRC_CHECKSUM_Pos (0)
#define | DMA_CRC_CHECKSUM_CRC_CHECKSUM_Msk (0xfffffffful << DMA_CRC_CHECKSUM_CRC_CHECKSUM_Pos)
#define | DMA_GCR_GCRCSR_CLK1_EN_Pos (9)
#define | DMA_GCR_GCRCSR_CLK1_EN_Msk (0x1ul << DMA_GCR_GCRCSR_CLK1_EN_Pos)
#define | DMA_GCR_GCRCSR_CLK2_EN_Pos (10)
#define | DMA_GCR_GCRCSR_CLK2_EN_Msk (0x1ul << DMA_GCR_GCRCSR_CLK2_EN_Pos)
#define | DMA_GCR_GCRCSR_CLK3_EN_Pos (11)
#define | DMA_GCR_GCRCSR_CLK3_EN_Msk (0x1ul << DMA_GCR_GCRCSR_CLK3_EN_Pos)
#define | DMA_GCR_GCRCSR_CLK4_EN_Pos (12)
#define | DMA_GCR_GCRCSR_CLK4_EN_Msk (0x1ul << DMA_GCR_GCRCSR_CLK4_EN_Pos)
#define | DMA_GCR_GCRCSR_CRC_CLK_EN_Pos (24)
#define | DMA_GCR_GCRCSR_CRC_CLK_EN_Msk (0x1ul << DMA_GCR_GCRCSR_CRC_CLK_EN_Pos)
#define | DMA_GCR_DSSR0_CH1_SEL_Pos (8)
#define | DMA_GCR_DSSR0_CH1_SEL_Msk (0x1ful << DMA_GCR_DSSR0_CH1_SEL_Pos)
#define | DMA_GCR_DSSR0_CH2_SEL_Pos (16)
#define | DMA_GCR_DSSR0_CH2_SEL_Msk (0x1ful << DMA_GCR_DSSR0_CH2_SEL_Pos)
#define | DMA_GCR_DSSR0_CH3_SEL_Pos (24)
#define | DMA_GCR_DSSR0_CH3_SEL_Msk (0x1ful << DMA_GCR_DSSR0_CH3_SEL_Pos)
#define | DMA_GCR_DSSR1_CH4_SEL_Pos (0)
#define | DMA_GCR_DSSR1_CH4_SEL_Msk (0x1ful << DMA_GCR_DSSR1_CH4_SEL_Pos)
#define | DMA_GCR_GCRISR_INTR1_Pos (1)
#define | DMA_GCR_GCRISR_INTR1_Msk (0x1ul << DMA_GCR_GCRISR_INTR1_Pos)
#define | DMA_GCR_GCRISR_INTR2_Pos (2)
#define | DMA_GCR_GCRISR_INTR2_Msk (0x1ul << DMA_GCR_GCRISR_INTR2_Pos)
#define | DMA_GCR_GCRISR_INTR3_Pos (3)
#define | DMA_GCR_GCRISR_INTR3_Msk (0x1ul << DMA_GCR_GCRISR_INTR3_Pos)
#define | DMA_GCR_GCRISR_INTR4_Pos (4)
#define | DMA_GCR_GCRISR_INTR4_Msk (0x1ul << DMA_GCR_GCRISR_INTR4_Pos)
#define | DMA_GCR_GCRISR_INTRCRC_Pos (16)
#define | DMA_GCR_GCRISR_INTRCRC_Msk (0x1ul << DMA_GCR_GCRISR_INTRCRC_Pos)
#define | PDMA_CSR_PDMACEN_Pos (0)
#define | PDMA_CSR_PDMACEN_Msk (0x1ul << PDMA_CSR_PDMACEN_Pos)
#define | PDMA_CSR_SW_RST_Pos (1)
#define | PDMA_CSR_SW_RST_Msk (0x1ul << PDMA_CSR_SW_RST_Pos)
#define | PDMA_CSR_MODE_SEL_Pos (2)
#define | PDMA_CSR_MODE_SEL_Msk (0x3ul << PDMA_CSR_MODE_SEL_Pos)
#define | PDMA_CSR_SAD_SEL_Pos (4)
#define | PDMA_CSR_SAD_SEL_Msk (0x3ul << PDMA_CSR_SAD_SEL_Pos)
#define | PDMA_CSR_DAD_SEL_Pos (6)
#define | PDMA_CSR_DAD_SEL_Msk (0x3ul << PDMA_CSR_DAD_SEL_Pos)
#define | PDMA_CSR_TO_EN_Pos (12)
#define | PDMA_CSR_TO_EN_Msk (0x1ul << PDMA_CSR_TO_EN_Pos)
#define | PDMA_CSR_APB_TWS_Pos (19)
#define | PDMA_CSR_APB_TWS_Msk (0x3ul << PDMA_CSR_APB_TWS_Pos)
#define | PDMA_CSR_TRIG_EN_Pos (23)
#define | PDMA_CSR_TRIG_EN_Msk (0x1ul << PDMA_CSR_TRIG_EN_Pos)
#define | PDMA_SAR_PDMA_SAR_Pos (0)
#define | PDMA_SAR_PDMA_SAR_Msk (0xfffffffful << PDMA_SAR_PDMA_SAR_Pos)
#define | PDMA_DAR_PDMA_DAR_Pos (0)
#define | PDMA_DAR_PDMA_DAR_Msk (0xfffffffful << PDMA_DAR_PDMA_DAR_Pos)
#define | PDMA_BCR_PDMA_BCR_Pos (0)
#define | PDMA_BCR_PDMA_BCR_Msk (0xfffful << PDMA_BCR_PDMA_BCR_Pos)
#define | PDMA_CSAR_PDMA_CSAR_Pos (0)
#define | PDMA_CSAR_PDMA_CSAR_Msk (0xfffffffful << PDMA_CSAR_PDMA_CSAR_Pos)
#define | PDMA_CDAR_PDMA_CDAR_Pos (0)
#define | PDMA_CDAR_PDMA_CDAR_Msk (0xfffffffful << PDMA_CDAR_PDMA_CDAR_Pos)
#define | PDMA_CBCR_PDMA_CBCR_Pos (0)
#define | PDMA_CBCR_PDMA_CBCR_Msk (0xfffffful << PDMA_CBCR_PDMA_CBCR_Pos)
#define | PDMA_IER_TABORT_IE_Pos (0)
#define | PDMA_IER_TABORT_IE_Msk (0x1ul << PDMA_IER_TABORT_IE_Pos)
#define | PDMA_IER_TD_IE_Pos (1)
#define | PDMA_IER_TD_IE_Msk (0x1ul << PDMA_IER_TD_IE_Pos)
#define | PDMA_IER_WRA_BCR_IE_Pos (2)
#define | PDMA_IER_WRA_BCR_IE_Msk (0xful << PDMA_IER_WRA_BCR_IE_Pos)
#define | PDMA_IER_TO_IE_Pos (6)
#define | PDMA_IER_TO_IE_Msk (0x1ul << PDMA_IER_TO_IE_Pos)
#define | PDMA_ISR_TABORT_IS_Pos (0)
#define | PDMA_ISR_TABORT_IS_Msk (0x1ul << PDMA_ISR_TABORT_IS_Pos)
#define | PDMA_ISR_TD_IS_Pos (1)
#define | PDMA_ISR_TD_IS_Msk (0x1ul << PDMA_ISR_TD_IS_Pos)
#define | PDMA_ISR_WRA_BCR_IS_Pos (2)
#define | PDMA_ISR_WRA_BCR_IS_Msk (0xful << PDMA_ISR_WRA_BCR_IS_Pos)
#define | PDMA_ISR_TO_IS_Pos (6)
#define | PDMA_ISR_TO_IS_Msk (0x1ul << PDMA_ISR_TO_IS_Pos)
#define | PDMA_TCR_PDMA_TCR_Pos (0)
#define | PDMA_TCR_PDMA_TCR_Msk (0xfffful << PDMA_TCR_PDMA_TCR_Pos)
#define | FMC_ISPCON_ISPEN_Pos (0)
#define | FMC_ISPCON_ISPEN_Msk (0x1ul << FMC_ISPCON_ISPEN_Pos)
#define | FMC_ISPCON_BS_Pos (1)
#define | FMC_ISPCON_BS_Msk (0x1ul << FMC_ISPCON_BS_Pos)
#define | FMC_ISPCON_APUEN_Pos (3)
#define | FMC_ISPCON_APUEN_Msk (0x1ul << FMC_ISPCON_APUEN_Pos)
#define | FMC_ISPCON_CFGUEN_Pos (4)
#define | FMC_ISPCON_CFGUEN_Msk (0x1ul << FMC_ISPCON_CFGUEN_Pos)
#define | FMC_ISPCON_LDUEN_Pos (5)
#define | FMC_ISPCON_LDUEN_Msk (0x1ul << FMC_ISPCON_LDUEN_Pos)
#define | FMC_ISPCON_ISPFF_Pos (6)
#define | FMC_ISPCON_ISPFF_Msk (0x1ul << FMC_ISPCON_ISPFF_Pos)
#define | FMC_ISPADR_ISPADR_Pos (0)
#define | FMC_ISPADR_ISPADR_Msk (0xfffffffful << FMC_ISPADR_ISPADR_Pos)
#define | FMC_ISPDAT_ISPDAT_Pos (0)
#define | FMC_ISPDAT_ISPDAT_Msk (0xfffffffful << FMC_ISPDAT_ISPDAT_Pos)
#define | FMC_ISPCMD_FCTRL_Pos (0)
#define | FMC_ISPCMD_FCTRL_Msk (0xful << FMC_ISPCMD_FCTRL_Pos)
#define | FMC_ISPCMD_FCEN_Pos (4)
#define | FMC_ISPCMD_FCEN_Msk (0x1ul << FMC_ISPCMD_FCEN_Pos)
#define | FMC_ISPCMD_FOEN_Pos (5)
#define | FMC_ISPCMD_FOEN_Msk (0x1ul << FMC_ISPCMD_FOEN_Pos)
#define | FMC_ISPTRG_ISPGO_Pos (0)
#define | FMC_ISPTRG_ISPGO_Msk (0x1ul << FMC_ISPTRG_ISPGO_Pos)
#define | FMC_DFBADR_DFBADR_Pos (0)
#define | FMC_DFBADR_DFBADR_Msk (0xfffffffful << FMC_DFBADR_DFBADR_Pos)
#define | FMC_ISPSTA_ISPBUSY_Pos (0)
#define | FMC_ISPSTA_ISPBUSY_Msk (0x1ul << FMC_ISPSTA_ISPBUSY_Pos)
#define | FMC_ISPSTA_CBS_Pos (1)
#define | FMC_ISPSTA_CBS_Msk (0x3ul << FMC_ISPSTA_CBS_Pos)
#define | FMC_ISPSTA_PGFF_Pos (5)
#define | FMC_ISPSTA_PGFF_Msk (0x1ul << FMC_ISPSTA_PGFF_Pos)
#define | FMC_ISPSTA_ISPFF_Pos (6)
#define | FMC_ISPSTA_ISPFF_Msk (0x1ul << FMC_ISPSTA_ISPFF_Pos)
#define | SYS_PDID_PDID_Pos (0)
#define | SYS_PDID_PDID_Msk (0xfffffffful << SYS_PDID_PDID_Pos)
#define | SYS_RST_SRC_RSTS_POR_Pos (0)
#define | SYS_RST_SRC_RSTS_POR_Msk (0x1ul << SYS_RST_SRC_RSTS_POR_Pos)
#define | SYS_RST_SRC_RSTS_PAD_Pos (1)
#define | SYS_RST_SRC_RSTS_PAD_Msk (0x1ul << SYS_RST_SRC_RSTS_PAD_Pos)
#define | SYS_RST_SRC_RSTS_WDT_Pos (2)
#define | SYS_RST_SRC_RSTS_WDT_Msk (0x1ul << SYS_RST_SRC_RSTS_WDT_Pos)
#define | SYS_RST_SRC_RSTS_BOD_Pos (4)
#define | SYS_RST_SRC_RSTS_BOD_Msk (0x1ul << SYS_RST_SRC_RSTS_BOD_Pos)
#define | SYS_RST_SRC_RSTS_SYS_Pos (5)
#define | SYS_RST_SRC_RSTS_SYS_Msk (0x1ul << SYS_RST_SRC_RSTS_SYS_Pos)
#define | SYS_RST_SRC_RSTS_CPU_Pos (7)
#define | SYS_RST_SRC_RSTS_CPU_Msk (0x1ul << SYS_RST_SRC_RSTS_CPU_Pos)
#define | SYS_IPRST_CTL1_CHIP_RST_Pos (0)
#define | SYS_IPRST_CTL1_CHIP_RST_Msk (0x1ul << SYS_IPRST_CTL1_CHIP_RST_Pos)
#define | SYS_IPRST_CTL1_CPU_RST_Pos (1)
#define | SYS_IPRST_CTL1_CPU_RST_Msk (0x1ul << SYS_IPRST_CTL1_CPU_RST_Pos)
#define | SYS_IPRST_CTL1_DMA_RST_Pos (2)
#define | SYS_IPRST_CTL1_DMA_RST_Msk (0x1ul << SYS_IPRST_CTL1_DMA_RST_Pos)
#define | SYS_IPRST_CTL2_GPIO_RST_Pos (1)
#define | SYS_IPRST_CTL2_GPIO_RST_Msk (0x1ul << SYS_IPRST_CTL2_GPIO_RST_Pos)
#define | SYS_IPRST_CTL2_TMR0_RST_Pos (2)
#define | SYS_IPRST_CTL2_TMR0_RST_Msk (0x1ul << SYS_IPRST_CTL2_TMR0_RST_Pos)
#define | SYS_IPRST_CTL2_TMR1_RST_Pos (3)
#define | SYS_IPRST_CTL2_TMR1_RST_Msk (0x1ul << SYS_IPRST_CTL2_TMR1_RST_Pos)
#define | SYS_IPRST_CTL2_TMR2_RST_Pos (4)
#define | SYS_IPRST_CTL2_TMR2_RST_Msk (0x1ul << SYS_IPRST_CTL2_TMR2_RST_Pos)
#define | SYS_IPRST_CTL2_TMR3_RST_Pos (5)
#define | SYS_IPRST_CTL2_TMR3_RST_Msk (0x1ul << SYS_IPRST_CTL2_TMR3_RST_Pos)
#define | SYS_IPRST_CTL2_I2C0_RST_Pos (8)
#define | SYS_IPRST_CTL2_I2C0_RST_Msk (0x1ul << SYS_IPRST_CTL2_I2C0_RST_Pos)
#define | SYS_IPRST_CTL2_I2C1_RST_Pos (9)
#define | SYS_IPRST_CTL2_I2C1_RST_Msk (0x1ul << SYS_IPRST_CTL2_I2C1_RST_Pos)
#define | SYS_IPRST_CTL2_SPI0_RST_Pos (12)
#define | SYS_IPRST_CTL2_SPI0_RST_Msk (0x1ul << SYS_IPRST_CTL2_SPI0_RST_Pos)
#define | SYS_IPRST_CTL2_SPI1_RST_Pos (13)
#define | SYS_IPRST_CTL2_SPI1_RST_Msk (0x1ul << SYS_IPRST_CTL2_SPI1_RST_Pos)
#define | SYS_IPRST_CTL2_UART0_RST_Pos (16)
#define | SYS_IPRST_CTL2_UART0_RST_Msk (0x1ul << SYS_IPRST_CTL2_UART0_RST_Pos)
#define | SYS_IPRST_CTL2_UART1_RST_Pos (17)
#define | SYS_IPRST_CTL2_UART1_RST_Msk (0x1ul << SYS_IPRST_CTL2_UART1_RST_Pos)
#define | SYS_IPRST_CTL2_PWM0_RST_Pos (20)
#define | SYS_IPRST_CTL2_PWM0_RST_Msk (0x1ul << SYS_IPRST_CTL2_PWM0_RST_Pos)
#define | SYS_IPRST_CTL2_ACMP01_RST_Pos (22)
#define | SYS_IPRST_CTL2_ACMP01_RST_Msk (0x1ul << SYS_IPRST_CTL2_ACMP01_RST_Pos)
#define | SYS_IPRST_CTL2_LCD_RST_Pos (26)
#define | SYS_IPRST_CTL2_LCD_RST_Msk (0x1ul << SYS_IPRST_CTL2_LCD_RST_Pos)
#define | SYS_IPRST_CTL2_ADC_RST_Pos (28)
#define | SYS_IPRST_CTL2_ADC_RST_Msk (0x1ul << SYS_IPRST_CTL2_ADC_RST_Pos)
#define | SYS_IPRST_CTL2_SC0_RST_Pos (30)
#define | SYS_IPRST_CTL2_SC0_RST_Msk (0x1ul << SYS_IPRST_CTL2_SC0_RST_Pos)
#define | SYS_IPRST_CTL2_SC1_RST_Pos (31)
#define | SYS_IPRST_CTL2_SC1_RST_Msk (0x1ul << SYS_IPRST_CTL2_SC1_RST_Pos)
#define | SYS_TEMPCTL_VTEMP_EN_Pos (0)
#define | SYS_TEMPCTL_VTEMP_EN_Msk (0x1ul << SYS_TEMPCTL_VTEMP_EN_Pos)
#define | SYS_PA_L_MFP_PA0_MFP_Pos (0)
#define | SYS_PA_L_MFP_PA0_MFP_Msk (0xful << SYS_PA_L_MFP_PA0_MFP_Pos)
#define | SYS_PA_L_MFP_PA1_MFP_Pos (4)
#define | SYS_PA_L_MFP_PA1_MFP_Msk (0xful << SYS_PA_L_MFP_PA1_MFP_Pos)
#define | SYS_PA_L_MFP_PA2_MFP_Pos (8)
#define | SYS_PA_L_MFP_PA2_MFP_Msk (0xful << SYS_PA_L_MFP_PA2_MFP_Pos)
#define | SYS_PA_L_MFP_PA3_MFP_Pos (12)
#define | SYS_PA_L_MFP_PA3_MFP_Msk (0xful << SYS_PA_L_MFP_PA3_MFP_Pos)
#define | SYS_PA_L_MFP_PA4_MFP_Pos (16)
#define | SYS_PA_L_MFP_PA4_MFP_Msk (0xful << SYS_PA_L_MFP_PA4_MFP_Pos)
#define | SYS_PA_L_MFP_PA5_MFP_Pos (20)
#define | SYS_PA_L_MFP_PA5_MFP_Msk (0xful << SYS_PA_L_MFP_PA5_MFP_Pos)
#define | SYS_PA_L_MFP_PA6_MFP_Pos (24)
#define | SYS_PA_L_MFP_PA6_MFP_Msk (0xful << SYS_PA_L_MFP_PA6_MFP_Pos)
#define | SYS_PA_L_MFP_PA7_MFP_Pos (28)
#define | SYS_PA_L_MFP_PA7_MFP_Msk (0xful << SYS_PA_L_MFP_PA7_MFP_Pos)
#define | SYS_PA_H_MFP_PA8_MFP_Pos (0)
#define | SYS_PA_H_MFP_PA8_MFP_Msk (0xful << SYS_PA_H_MFP_PA8_MFP_Pos)
#define | SYS_PA_H_MFP_PA9_MFP_Pos (4)
#define | SYS_PA_H_MFP_PA9_MFP_Msk (0xful << SYS_PA_H_MFP_PA9_MFP_Pos)
#define | SYS_PA_H_MFP_PA10_MFP_Pos (8)
#define | SYS_PA_H_MFP_PA10_MFP_Msk (0xful << SYS_PA_H_MFP_PA10_MFP_Pos)
#define | SYS_PA_H_MFP_PA11_MFP_Pos (12)
#define | SYS_PA_H_MFP_PA11_MFP_Msk (0xful << SYS_PA_H_MFP_PA11_MFP_Pos)
#define | SYS_PA_H_MFP_PA12_MFP_Pos (16)
#define | SYS_PA_H_MFP_PA12_MFP_Msk (0xful << SYS_PA_H_MFP_PA12_MFP_Pos)
#define | SYS_PA_H_MFP_PA13_MFP_Pos (20)
#define | SYS_PA_H_MFP_PA13_MFP_Msk (0xful << SYS_PA_H_MFP_PA13_MFP_Pos)
#define | SYS_PA_H_MFP_PA14_MFP_Pos (24)
#define | SYS_PA_H_MFP_PA14_MFP_Msk (0xful << SYS_PA_H_MFP_PA14_MFP_Pos)
#define | SYS_PA_H_MFP_PA15_MFP_Pos (28)
#define | SYS_PA_H_MFP_PA15_MFP_Msk (0xful << SYS_PA_H_MFP_PA15_MFP_Pos)
#define | SYS_PB_L_MFP_PB0_MFP_Pos (0)
#define | SYS_PB_L_MFP_PB0_MFP_Msk (0xful << SYS_PB_L_MFP_PB0_MFP_Pos)
#define | SYS_PB_L_MFP_PB1_MFP_Pos (4)
#define | SYS_PB_L_MFP_PB1_MFP_Msk (0xful << SYS_PB_L_MFP_PB1_MFP_Pos)
#define | SYS_PB_L_MFP_PB2_MFP_Pos (8)
#define | SYS_PB_L_MFP_PB2_MFP_Msk (0xful << SYS_PB_L_MFP_PB2_MFP_Pos)
#define | SYS_PB_L_MFP_PB3_MFP_Pos (12)
#define | SYS_PB_L_MFP_PB3_MFP_Msk (0xful << SYS_PB_L_MFP_PB3_MFP_Pos)
#define | SYS_PB_L_MFP_PB4_MFP_Pos (16)
#define | SYS_PB_L_MFP_PB4_MFP_Msk (0xful << SYS_PB_L_MFP_PB4_MFP_Pos)
#define | SYS_PB_L_MFP_PB5_MFP_Pos (20)
#define | SYS_PB_L_MFP_PB5_MFP_Msk (0xful << SYS_PB_L_MFP_PB5_MFP_Pos)
#define | SYS_PB_L_MFP_PB6_MFP_Pos (24)
#define | SYS_PB_L_MFP_PB6_MFP_Msk (0xful << SYS_PB_L_MFP_PB6_MFP_Pos)
#define | SYS_PB_L_MFP_PB7_MFP_Pos (28)
#define | SYS_PB_L_MFP_PB7_MFP_Msk (0xful << SYS_PB_L_MFP_PB7_MFP_Pos)
#define | SYS_PB_H_MFP_PB8_MFP_Pos (0)
#define | SYS_PB_H_MFP_PB8_MFP_Msk (0xful << SYS_PB_H_MFP_PB8_MFP_Pos)
#define | SYS_PB_H_MFP_PB9_MFP_Pos (4)
#define | SYS_PB_H_MFP_PB9_MFP_Msk (0xful << SYS_PB_H_MFP_PB9_MFP_Pos)
#define | SYS_PB_H_MFP_PB10_MFP_Pos (8)
#define | SYS_PB_H_MFP_PB10_MFP_Msk (0xful << SYS_PB_H_MFP_PB10_MFP_Pos)
#define | SYS_PB_H_MFP_PB11_MFP_Pos (12)
#define | SYS_PB_H_MFP_PB11_MFP_Msk (0xful << SYS_PB_H_MFP_PB11_MFP_Pos)
#define | SYS_PB_H_MFP_PB12_MFP_Pos (16)
#define | SYS_PB_H_MFP_PB12_MFP_Msk (0xful << SYS_PB_H_MFP_PB12_MFP_Pos)
#define | SYS_PB_H_MFP_PB13_MFP_Pos (20)
#define | SYS_PB_H_MFP_PB13_MFP_Msk (0xful << SYS_PB_H_MFP_PB13_MFP_Pos)
#define | SYS_PB_H_MFP_PB14_MFP_Pos (24)
#define | SYS_PB_H_MFP_PB14_MFP_Msk (0xful << SYS_PB_H_MFP_PB14_MFP_Pos)
#define | SYS_PB_H_MFP_PB15_MFP_Pos (28)
#define | SYS_PB_H_MFP_PB15_MFP_Msk (0xful << SYS_PB_H_MFP_PB15_MFP_Pos)
#define | SYS_PC_L_MFP_PC0_MFP_Pos (0)
#define | SYS_PC_L_MFP_PC0_MFP_Msk (0xful << SYS_PC_L_MFP_PC0_MFP_Pos)
#define | SYS_PC_L_MFP_PC1_MFP_Pos (4)
#define | SYS_PC_L_MFP_PC1_MFP_Msk (0xful << SYS_PC_L_MFP_PC1_MFP_Pos)
#define | SYS_PC_L_MFP_PC2_MFP_Pos (8)
#define | SYS_PC_L_MFP_PC2_MFP_Msk (0xful << SYS_PC_L_MFP_PC2_MFP_Pos)
#define | SYS_PC_L_MFP_PC3_MFP_Pos (12)
#define | SYS_PC_L_MFP_PC3_MFP_Msk (0xful << SYS_PC_L_MFP_PC3_MFP_Pos)
#define | SYS_PC_L_MFP_PC4_MFP_Pos (16)
#define | SYS_PC_L_MFP_PC4_MFP_Msk (0xful << SYS_PC_L_MFP_PC4_MFP_Pos)
#define | SYS_PC_L_MFP_PC5_MFP_Pos (20)
#define | SYS_PC_L_MFP_PC5_MFP_Msk (0xful << SYS_PC_L_MFP_PC5_MFP_Pos)
#define | SYS_PC_L_MFP_PC6_MFP_Pos (24)
#define | SYS_PC_L_MFP_PC6_MFP_Msk (0xful << SYS_PC_L_MFP_PC6_MFP_Pos)
#define | SYS_PC_L_MFP_PC7_MFP_Pos (28)
#define | SYS_PC_L_MFP_PC7_MFP_Msk (0xful << SYS_PC_L_MFP_PC7_MFP_Pos)
#define | SYS_PC_H_MFP_PC8_MFP_Pos (0)
#define | SYS_PC_H_MFP_PC8_MFP_Msk (0xful << SYS_PC_H_MFP_PC8_MFP_Pos)
#define | SYS_PC_H_MFP_PC9_MFP_Pos (4)
#define | SYS_PC_H_MFP_PC9_MFP_Msk (0xful << SYS_PC_H_MFP_PC9_MFP_Pos)
#define | SYS_PC_H_MFP_PC10_MFP_Pos (8)
#define | SYS_PC_H_MFP_PC10_MFP_Msk (0xful << SYS_PC_H_MFP_PC10_MFP_Pos)
#define | SYS_PC_H_MFP_PC11_MFP_Pos (12)
#define | SYS_PC_H_MFP_PC11_MFP_Msk (0xful << SYS_PC_H_MFP_PC11_MFP_Pos)
#define | SYS_PC_H_MFP_PC12_MFP_Pos (16)
#define | SYS_PC_H_MFP_PC12_MFP_Msk (0xful << SYS_PC_H_MFP_PC12_MFP_Pos)
#define | SYS_PC_H_MFP_PC13_MFP_Pos (20)
#define | SYS_PC_H_MFP_PC13_MFP_Msk (0xful << SYS_PC_H_MFP_PC13_MFP_Pos)
#define | SYS_PC_H_MFP_PC14_MFP_Pos (24)
#define | SYS_PC_H_MFP_PC14_MFP_Msk (0xful << SYS_PC_H_MFP_PC14_MFP_Pos)
#define | SYS_PC_H_MFP_PC15_MFP_Pos (28)
#define | SYS_PC_H_MFP_PC15_MFP_Msk (0xful << SYS_PC_H_MFP_PC15_MFP_Pos)
#define | SYS_PD_L_MFP_PD0_MFP_Pos (0)
#define | SYS_PD_L_MFP_PD0_MFP_Msk (0xful << SYS_PD_L_MFP_PD0_MFP_Pos)
#define | SYS_PD_L_MFP_PD1_MFP_Pos (4)
#define | SYS_PD_L_MFP_PD1_MFP_Msk (0xful << SYS_PD_L_MFP_PD1_MFP_Pos)
#define | SYS_PD_L_MFP_PD2_MFP_Pos (8)
#define | SYS_PD_L_MFP_PD2_MFP_Msk (0xful << SYS_PD_L_MFP_PD2_MFP_Pos)
#define | SYS_PD_L_MFP_PD3_MFP_Pos (12)
#define | SYS_PD_L_MFP_PD3_MFP_Msk (0xful << SYS_PD_L_MFP_PD3_MFP_Pos)
#define | SYS_PD_L_MFP_PD4_MFP_Pos (16)
#define | SYS_PD_L_MFP_PD4_MFP_Msk (0xful << SYS_PD_L_MFP_PD4_MFP_Pos)
#define | SYS_PD_L_MFP_PD5_MFP_Pos (20)
#define | SYS_PD_L_MFP_PD5_MFP_Msk (0xful << SYS_PD_L_MFP_PD5_MFP_Pos)
#define | SYS_PD_L_MFP_PD6_MFP_Pos (24)
#define | SYS_PD_L_MFP_PD6_MFP_Msk (0xful << SYS_PD_L_MFP_PD6_MFP_Pos)
#define | SYS_PD_L_MFP_PD7_MFP_Pos (28)
#define | SYS_PD_L_MFP_PD7_MFP_Msk (0xful << SYS_PD_L_MFP_PD7_MFP_Pos)
#define | SYS_PD_H_MFP_PD8_MFP_Pos (0)
#define | SYS_PD_H_MFP_PD8_MFP_Msk (0xful << SYS_PD_H_MFP_PD8_MFP_Pos)
#define | SYS_PD_H_MFP_PD9_MFP_Pos (4)
#define | SYS_PD_H_MFP_PD9_MFP_Msk (0xful << SYS_PD_H_MFP_PD9_MFP_Pos)
#define | SYS_PD_H_MFP_PD10_MFP_Pos (8)
#define | SYS_PD_H_MFP_PD10_MFP_Msk (0xful << SYS_PD_H_MFP_PD10_MFP_Pos)
#define | SYS_PD_H_MFP_PD11_MFP_Pos (12)
#define | SYS_PD_H_MFP_PD11_MFP_Msk (0xful << SYS_PD_H_MFP_PD11_MFP_Pos)
#define | SYS_PD_H_MFP_PD12_MFP_Pos (16)
#define | SYS_PD_H_MFP_PD12_MFP_Msk (0xful << SYS_PD_H_MFP_PD12_MFP_Pos)
#define | SYS_PD_H_MFP_PD13_MFP_Pos (20)
#define | SYS_PD_H_MFP_PD13_MFP_Msk (0xful << SYS_PD_H_MFP_PD13_MFP_Pos)
#define | SYS_PD_H_MFP_PD14_MFP_Pos (24)
#define | SYS_PD_H_MFP_PD14_MFP_Msk (0xful << SYS_PD_H_MFP_PD14_MFP_Pos)
#define | SYS_PD_H_MFP_PD15_MFP_Pos (28)
#define | SYS_PD_H_MFP_PD15_MFP_Msk (0xful << SYS_PD_H_MFP_PD15_MFP_Pos)
#define | SYS_PE_L_MFP_PE0_MFP_Pos (0)
#define | SYS_PE_L_MFP_PE0_MFP_Msk (0xful << SYS_PE_L_MFP_PE0_MFP_Pos)
#define | SYS_PE_L_MFP_PE1_MFP_Pos (4)
#define | SYS_PE_L_MFP_PE1_MFP_Msk (0xful << SYS_PE_L_MFP_PE1_MFP_Pos)
#define | SYS_PE_L_MFP_PE2_MFP_Pos (8)
#define | SYS_PE_L_MFP_PE2_MFP_Msk (0xful << SYS_PE_L_MFP_PE2_MFP_Pos)
#define | SYS_PE_L_MFP_PE3_MFP_Pos (12)
#define | SYS_PE_L_MFP_PE3_MFP_Msk (0xful << SYS_PE_L_MFP_PE3_MFP_Pos)
#define | SYS_PE_L_MFP_PE4_MFP_Pos (16)
#define | SYS_PE_L_MFP_PE4_MFP_Msk (0xful << SYS_PE_L_MFP_PE4_MFP_Pos)
#define | SYS_PE_L_MFP_PE5_MFP_Pos (20)
#define | SYS_PE_L_MFP_PE5_MFP_Msk (0xful << SYS_PE_L_MFP_PE5_MFP_Pos)
#define | SYS_PE_L_MFP_PE6_MFP_Pos (24)
#define | SYS_PE_L_MFP_PE6_MFP_Msk (0xful << SYS_PE_L_MFP_PE6_MFP_Pos)
#define | SYS_PE_L_MFP_PE7_MFP_Pos (28)
#define | SYS_PE_L_MFP_PE7_MFP_Msk (0xful << SYS_PE_L_MFP_PE7_MFP_Pos)
#define | SYS_PE_H_MFP_PE8_MFP_Pos (0)
#define | SYS_PE_H_MFP_PE8_MFP_Msk (0xful << SYS_PE_H_MFP_PE8_MFP_Pos)
#define | SYS_PE_H_MFP_PE9_MFP_Pos (4)
#define | SYS_PE_H_MFP_PE9_MFP_Msk (0xful << SYS_PE_H_MFP_PE9_MFP_Pos)
#define | SYS_PF_L_MFP_PF0_MFP_Pos (0)
#define | SYS_PF_L_MFP_PF0_MFP_Msk (0xful << SYS_PF_L_MFP_PF0_MFP_Pos)
#define | SYS_PF_L_MFP_PF1_MFP_Pos (4)
#define | SYS_PF_L_MFP_PF1_MFP_Msk (0xful << SYS_PF_L_MFP_PF1_MFP_Pos)
#define | SYS_PF_L_MFP_PF2_MFP_Pos (8)
#define | SYS_PF_L_MFP_PF2_MFP_Msk (0xful << SYS_PF_L_MFP_PF2_MFP_Pos)
#define | SYS_PF_L_MFP_PF3_MFP_Pos (12)
#define | SYS_PF_L_MFP_PF3_MFP_Msk (0xful << SYS_PF_L_MFP_PF3_MFP_Pos)
#define | SYS_PF_L_MFP_PF4_MFP_Pos (16)
#define | SYS_PF_L_MFP_PF4_MFP_Msk (0xful << SYS_PF_L_MFP_PF4_MFP_Pos)
#define | SYS_PF_L_MFP_PF5_MFP_Pos (20)
#define | SYS_PF_L_MFP_PF5_MFP_Msk (0xful << SYS_PF_L_MFP_PF5_MFP_Pos)
#define | SYS_PORCTL_POR_DIS_CODE_Pos (0)
#define | SYS_PORCTL_POR_DIS_CODE_Msk (0xfffful << SYS_PORCTL_POR_DIS_CODE_Pos)
#define | SYS_BODCTL_BOD17_EN_Pos (0)
#define | SYS_BODCTL_BOD17_EN_Msk (0x1ul << SYS_BODCTL_BOD17_EN_Pos)
#define | SYS_BODCTL_BOD20_EN_Pos (1)
#define | SYS_BODCTL_BOD20_EN_Msk (0x1ul << SYS_BODCTL_BOD20_EN_Pos)
#define | SYS_BODCTL_BOD25_EN_Pos (2)
#define | SYS_BODCTL_BOD25_EN_Msk (0x1ul << SYS_BODCTL_BOD25_EN_Pos)
#define | SYS_BODCTL_BOD17_RST_EN_Pos (4)
#define | SYS_BODCTL_BOD17_RST_EN_Msk (0x1ul << SYS_BODCTL_BOD17_RST_EN_Pos)
#define | SYS_BODCTL_BOD20_RST_EN_Pos (5)
#define | SYS_BODCTL_BOD20_RST_EN_Msk (0x1ul << SYS_BODCTL_BOD20_RST_EN_Pos)
#define | SYS_BODCTL_BOD25_RST_EN_Pos (6)
#define | SYS_BODCTL_BOD25_RST_EN_Msk (0x1ul << SYS_BODCTL_BOD25_RST_EN_Pos)
#define | SYS_BODCTL_BOD17_INT_EN_Pos (8)
#define | SYS_BODCTL_BOD17_INT_EN_Msk (0x1ul << SYS_BODCTL_BOD17_INT_EN_Pos)
#define | SYS_BODCTL_BOD20_INT_EN_Pos (9)
#define | SYS_BODCTL_BOD20_INT_EN_Msk (0x1ul << SYS_BODCTL_BOD20_INT_EN_Pos)
#define | SYS_BODCTL_BOD25_INT_EN_Pos (10)
#define | SYS_BODCTL_BOD25_INT_EN_Msk (0x1ul << SYS_BODCTL_BOD25_INT_EN_Pos)
#define | SYS_BODCTL_BOD17_TRIM_Pos (12)
#define | SYS_BODCTL_BOD17_TRIM_Msk (0xful << SYS_BODCTL_BOD17_TRIM_Pos)
#define | SYS_BODCTL_BOD20_TRIM_Pos (16)
#define | SYS_BODCTL_BOD20_TRIM_Msk (0xful << SYS_BODCTL_BOD20_TRIM_Pos)
#define | SYS_BODCTL_BOD25_TRIM_Pos (20)
#define | SYS_BODCTL_BOD25_TRIM_Msk (0xful << SYS_BODCTL_BOD25_TRIM_Pos)
#define | SYS_BODSTS_BOD_INT_Pos (0)
#define | SYS_BODSTS_BOD_INT_Msk (0x1ul << SYS_BODSTS_BOD_INT_Pos)
#define | SYS_BODSTS_BOD17_drop_Pos (1)
#define | SYS_BODSTS_BOD17_drop_Msk (0x1ul << SYS_BODSTS_BOD17_drop_Pos)
#define | SYS_BODSTS_BOD20_drop_Pos (2)
#define | SYS_BODSTS_BOD20_drop_Msk (0x1ul << SYS_BODSTS_BOD20_drop_Pos)
#define | SYS_BODSTS_BOD25_drop_Pos (3)
#define | SYS_BODSTS_BOD25_drop_Msk (0x1ul << SYS_BODSTS_BOD25_drop_Pos)
#define | SYS_BODSTS_BOD17_rise_Pos (4)
#define | SYS_BODSTS_BOD17_rise_Msk (0x1ul << SYS_BODSTS_BOD17_rise_Pos)
#define | SYS_BODSTS_BOD20_rise_Pos (5)
#define | SYS_BODSTS_BOD20_rise_Msk (0x1ul << SYS_BODSTS_BOD20_rise_Pos)
#define | SYS_BODSTS_BOD25_rise_Pos (6)
#define | SYS_BODSTS_BOD25_rise_Msk (0x1ul << SYS_BODSTS_BOD25_rise_Pos)
#define | SYS_BODSTS_BOD17_Pos (8)
#define | SYS_BODSTS_BOD17_Msk (0x1ul << SYS_BODSTS_BOD17_Pos)
#define | SYS_BODSTS_BOD20_Pos (9)
#define | SYS_BODSTS_BOD20_Msk (0x1ul << SYS_BODSTS_BOD20_Pos)
#define | SYS_BODSTS_BOD25_Pos (10)
#define | SYS_BODSTS_BOD25_Msk (0x1ul << SYS_BODSTS_BOD25_Pos)
#define | SYS_VREFCTL_BGP_EN_Pos (0)
#define | SYS_VREFCTL_BGP_EN_Msk (0x1ul << SYS_VREFCTL_BGP_EN_Pos)
#define | SYS_VREFCTL_REG_EN_Pos (1)
#define | SYS_VREFCTL_REG_EN_Msk (0x1ul << SYS_VREFCTL_REG_EN_Pos)
#define | SYS_VREFCTL_SEL25_Pos (2)
#define | SYS_VREFCTL_SEL25_Msk (0x3ul << SYS_VREFCTL_SEL25_Pos)
#define | SYS_VREFCTL_EXT_MODE_Pos (4)
#define | SYS_VREFCTL_EXT_MODE_Msk (0x1ul << SYS_VREFCTL_EXT_MODE_Pos)
#define | SYS_VREFCTL_VREF_TRIM_Pos (8)
#define | SYS_VREFCTL_VREF_TRIM_Msk (0xful << SYS_VREFCTL_VREF_TRIM_Pos)
#define | SYS_CTL_LDO_PD_Pos (0)
#define | SYS_CTL_LDO_PD_Msk (0x1ul << SYS_CTL_LDO_PD_Pos)
#define | SYS_CTL_LDO_LEVEL_Pos (2)
#define | SYS_CTL_LDO_LEVEL_Msk (0x3ul << SYS_CTL_LDO_LEVEL_Pos)
#define | SYS_IRCTRIMCTL_TRIM_SEL_Pos (0)
#define | SYS_IRCTRIMCTL_TRIM_SEL_Msk (0x3ul << SYS_IRCTRIMCTL_TRIM_SEL_Pos)
#define | SYS_IRCTRIMCTL_TRIM_LOOP_Pos (4)
#define | SYS_IRCTRIMCTL_TRIM_LOOP_Msk (0x3ul << SYS_IRCTRIMCTL_TRIM_LOOP_Pos)
#define | SYS_IRCTRIMCTL_TRIM_RETRY_CNT_Pos (6)
#define | SYS_IRCTRIMCTL_TRIM_RETRY_CNT_Msk (0x3ul << SYS_IRCTRIMCTL_TRIM_RETRY_CNT_Pos)
#define | SYS_IRCTRIMCTL_ERR_STOP_Pos (8)
#define | SYS_IRCTRIMCTL_ERR_STOP_Msk (0x1ul << SYS_IRCTRIMCTL_ERR_STOP_Pos)
#define | SYS_IRCTRIMIEN_TRIM_FAIL_IEN_Pos (1)
#define | SYS_IRCTRIMIEN_TRIM_FAIL_IEN_Msk (0x1ul << SYS_IRCTRIMIEN_TRIM_FAIL_IEN_Pos)
#define | SYS_IRCTRIMIEN_32K_ERR_IEN_Pos (2)
#define | SYS_IRCTRIMIEN_32K_ERR_IEN_Msk (0x1ul << SYS_IRCTRIMIEN_32K_ERR_IEN_Pos)
#define | SYS_IRCTRIMINT_FREQ_LOCK_Pos (0)
#define | SYS_IRCTRIMINT_FREQ_LOCK_Msk (0x1ul << SYS_IRCTRIMINT_FREQ_LOCK_Pos)
#define | SYS_IRCTRIMINT_TRIM_FAIL_INT_Pos (1)
#define | SYS_IRCTRIMINT_TRIM_FAIL_INT_Msk (0x1ul << SYS_IRCTRIMINT_TRIM_FAIL_INT_Pos)
#define | SYS_IRCTRIMINT_32K_ERR_INT_Pos (2)
#define | SYS_IRCTRIMINT_32K_ERR_INT_Msk (0x1ul << SYS_IRCTRIMINT_32K_ERR_INT_Pos)
#define | SYS_RegLockAddr_RegUnLock_Pos (0)
#define | SYS_RegLockAddr_RegUnLock_Msk (0x1ul << SYS_RegLockAddr_RegUnLock_Pos)
#define | GP_PMD_PMD0_Pos (0)
#define | GP_PMD_PMD0_Msk (0x3ul << GP_PMD_PMD0_Pos)
#define | GP_PMD_PMD1_Pos (2)
#define | GP_PMD_PMD1_Msk (0x3ul << GP_PMD_PMD1_Pos)
#define | GP_PMD_PMD2_Pos (4)
#define | GP_PMD_PMD2_Msk (0x3ul << GP_PMD_PMD2_Pos)
#define | GP_PMD_PMD3_Pos (6)
#define | GP_PMD_PMD3_Msk (0x3ul << GP_PMD_PMD3_Pos)
#define | GP_PMD_PMD4_Pos (8)
#define | GP_PMD_PMD4_Msk (0x3ul << GP_PMD_PMD4_Pos)
#define | GP_PMD_PMD5_Pos (10)
#define | GP_PMD_PMD5_Msk (0x3ul << GP_PMD_PMD5_Pos)
#define | GP_PMD_PMD6_Pos (12)
#define | GP_PMD_PMD6_Msk (0x3ul << GP_PMD_PMD6_Pos)
#define | GP_PMD_PMD7_Pos (14)
#define | GP_PMD_PMD7_Msk (0x3ul << GP_PMD_PMD7_Pos)
#define | GP_PMD_PMD8_Pos (16)
#define | GP_PMD_PMD8_Msk (0x3ul << GP_PMD_PMD8_Pos)
#define | GP_PMD_PMD9_Pos (18)
#define | GP_PMD_PMD9_Msk (0x3ul << GP_PMD_PMD9_Pos)
#define | GP_PMD_PMD10_Pos (20)
#define | GP_PMD_PMD10_Msk (0x3ul << GP_PMD_PMD10_Pos)
#define | GP_PMD_PMD11_Pos (22)
#define | GP_PMD_PMD11_Msk (0x3ul << GP_PMD_PMD11_Pos)
#define | GP_PMD_PMD12_Pos (24)
#define | GP_PMD_PMD12_Msk (0x3ul << GP_PMD_PMD12_Pos)
#define | GP_PMD_PMD13_Pos (26)
#define | GP_PMD_PMD13_Msk (0x3ul << GP_PMD_PMD13_Pos)
#define | GP_PMD_PMD14_Pos (28)
#define | GP_PMD_PMD14_Msk (0x3ul << GP_PMD_PMD14_Pos)
#define | GP_PMD_PMD15_Pos (30)
#define | GP_PMD_PMD15_Msk (0x3ul << GP_PMD_PMD15_Pos)
#define | GP_OFFD_OFFD_Pos (16)
#define | GP_OFFD_OFFD_Msk (0xfffful << GP_OFFD_OFFD_Pos)
#define | GP_DOUT_DOUT_Pos (0)
#define | GP_DOUT_DOUT_Msk (0xfffful << GP_DOUT_DOUT_Pos)
#define | GP_DMASK_DMASK_Pos (0)
#define | GP_DMASK_DMASK_Msk (0xfffful << GP_DMASK_DMASK_Pos)
#define | GP_PIN_PIN_Pos (0)
#define | GP_PIN_PIN_Msk (0xfffful << GP_PIN_PIN_Pos)
#define | GP_DBEN_DBEN_Pos (0)
#define | GP_DBEN_DBEN_Msk (0xfffful << GP_DBEN_DBEN_Pos)
#define | GP_IMD_IMD_Pos (0)
#define | GP_IMD_IMD_Msk (0xfffful << GP_IMD_IMD_Pos)
#define | GP_IER_FIER0_Pos (0)
#define | GP_IER_FIER0_Msk (0x1ul << GP_IER_FIER0_Pos)
#define | GP_IER_FIER1_Pos (1)
#define | GP_IER_FIER1_Msk (0x1ul << GP_IER_FIER1_Pos)
#define | GP_IER_FIER2_Pos (2)
#define | GP_IER_FIER2_Msk (0x1ul << GP_IER_FIER2_Pos)
#define | GP_IER_FIER3_Pos (3)
#define | GP_IER_FIER3_Msk (0x1ul << GP_IER_FIER3_Pos)
#define | GP_IER_FIER4_Pos (4)
#define | GP_IER_FIER4_Msk (0x1ul << GP_IER_FIER4_Pos)
#define | GP_IER_FIER5_Pos (5)
#define | GP_IER_FIER5_Msk (0x1ul << GP_IER_FIER5_Pos)
#define | GP_IER_FIER6_Pos (6)
#define | GP_IER_FIER6_Msk (0x1ul << GP_IER_FIER6_Pos)
#define | GP_IER_FIER7_Pos (7)
#define | GP_IER_FIER7_Msk (0x1ul << GP_IER_FIER7_Pos)
#define | GP_IER_FIER8_Pos (8)
#define | GP_IER_FIER8_Msk (0x1ul << GP_IER_FIER8_Pos)
#define | GP_IER_FIER9_Pos (9)
#define | GP_IER_FIER9_Msk (0x1ul << GP_IER_FIER9_Pos)
#define | GP_IER_FIER10_Pos (10)
#define | GP_IER_FIER10_Msk (0x1ul << GP_IER_FIER10_Pos)
#define | GP_IER_FIER11_Pos (11)
#define | GP_IER_FIER11_Msk (0x1ul << GP_IER_FIER11_Pos)
#define | GP_IER_FIER12_Pos (12)
#define | GP_IER_FIER12_Msk (0x1ul << GP_IER_FIER12_Pos)
#define | GP_IER_FIER13_Pos (13)
#define | GP_IER_FIER13_Msk (0x1ul << GP_IER_FIER13_Pos)
#define | GP_IER_FIER14_Pos (14)
#define | GP_IER_FIER14_Msk (0x1ul << GP_IER_FIER14_Pos)
#define | GP_IER_FIER15_Pos (15)
#define | GP_IER_FIER15_Msk (0x1ul << GP_IER_FIER15_Pos)
#define | GP_IER_RIER0_Pos (16)
#define | GP_IER_RIER0_Msk (0x1ul << GP_IER_RIER0_Pos)
#define | GP_IER_RIER1_Pos (17)
#define | GP_IER_RIER1_Msk (0x1ul << GP_IER_RIER1_Pos)
#define | GP_IER_RIER2_Pos (18)
#define | GP_IER_RIER2_Msk (0x1ul << GP_IER_RIER2_Pos)
#define | GP_IER_RIER3_Pos (19)
#define | GP_IER_RIER3_Msk (0x1ul << GP_IER_RIER3_Pos)
#define | GP_IER_RIER4_Pos (20)
#define | GP_IER_RIER4_Msk (0x1ul << GP_IER_RIER4_Pos)
#define | GP_IER_RIER5_Pos (21)
#define | GP_IER_RIER5_Msk (0x1ul << GP_IER_RIER5_Pos)
#define | GP_IER_RIER6_Pos (22)
#define | GP_IER_RIER6_Msk (0x1ul << GP_IER_RIER6_Pos)
#define | GP_IER_RIER7_Pos (23)
#define | GP_IER_RIER7_Msk (0x1ul << GP_IER_RIER7_Pos)
#define | GP_IER_RIER8_Pos (24)
#define | GP_IER_RIER8_Msk (0x1ul << GP_IER_RIER8_Pos)
#define | GP_IER_RIER9_Pos (25)
#define | GP_IER_RIER9_Msk (0x1ul << GP_IER_RIER9_Pos)
#define | GP_IER_RIER10_Pos (26)
#define | GP_IER_RIER10_Msk (0x1ul << GP_IER_RIER10_Pos)
#define | GP_IER_RIER11_Pos (27)
#define | GP_IER_RIER11_Msk (0x1ul << GP_IER_RIER11_Pos)
#define | GP_IER_RIER12_Pos (28)
#define | GP_IER_RIER12_Msk (0x1ul << GP_IER_RIER12_Pos)
#define | GP_IER_RIER13_Pos (29)
#define | GP_IER_RIER13_Msk (0x1ul << GP_IER_RIER13_Pos)
#define | GP_IER_RIER14_Pos (30)
#define | GP_IER_RIER14_Msk (0x1ul << GP_IER_RIER14_Pos)
#define | GP_IER_RIER15_Pos (31)
#define | GP_IER_RIER15_Msk (0x1ul << GP_IER_RIER15_Pos)
#define | GP_ISRC_ISRC_Pos (0)
#define | GP_ISRC_ISRC_Msk (0xfffful << GP_ISRC_ISRC_Pos)
#define | GP_PUEN_PUEN_Pos (0)
#define | GP_PUEN_PUEN_Msk (0xfffful << GP_PUEN_PUEN_Pos)
#define | GP_DBNCECON_DBCLKSEL_Pos (0)
#define | GP_DBNCECON_DBCLKSEL_Msk (0xful << GP_DBNCECON_DBCLKSEL_Pos)
#define | GP_DBNCECON_DBCLKSRC_Pos (4)
#define | GP_DBNCECON_DBCLKSRC_Msk (0x1ul << GP_DBNCECON_DBCLKSRC_Pos)
#define | GP_DBNCECON_DBCLK_ON_Pos (5)
#define | GP_DBNCECON_DBCLK_ON_Msk (0x1ul << GP_DBNCECON_DBCLK_ON_Pos)
#define | I2C_CON_IPEN_Pos (0)
#define | I2C_CON_IPEN_Msk (0x1ul << I2C_CON_IPEN_Pos)
#define | I2C_CON_ACK_Pos (1)
#define | I2C_CON_ACK_Msk (0x1ul << I2C_CON_ACK_Pos)
#define | I2C_CON_STOP_Pos (2)
#define | I2C_CON_STOP_Msk (0x1ul << I2C_CON_STOP_Pos)
#define | I2C_CON_START_Pos (3)
#define | I2C_CON_START_Msk (0x1ul << I2C_CON_START_Pos)
#define | I2C_CON_I2C_STS_Pos (4)
#define | I2C_CON_I2C_STS_Msk (0x1ul << I2C_CON_I2C_STS_Pos)
#define | I2C_CON_INTEN_Pos (7)
#define | I2C_CON_INTEN_Msk (0x1ul << I2C_CON_INTEN_Pos)
#define | I2C_INTSTS_INTSTS_Pos (0)
#define | I2C_INTSTS_INTSTS_Msk (0x1ul << I2C_INTSTS_INTSTS_Pos)
#define | I2C_INTSTS_TIF_Pos (1)
#define | I2C_INTSTS_TIF_Msk (0x1ul << I2C_INTSTS_TIF_Pos)
#define | I2C_INTSTS_WAKEUP_ACK_DONE_Pos (7)
#define | I2C_INTSTS_WAKEUP_ACK_DONE_Msk (0x1ul << I2C_INTSTS_WAKEUP_ACK_DONE_Pos)
#define | I2C_STATUS_STATUS_Pos (0)
#define | I2C_STATUS_STATUS_Msk (0xfful << I2C_STATUS_STATUS_Pos)
#define | I2C_DIV_CLK_DIV_Pos (0)
#define | I2C_DIV_CLK_DIV_Msk (0xfful << I2C_DIV_CLK_DIV_Pos)
#define | I2C_TOUT_TOUTEN_Pos (0)
#define | I2C_TOUT_TOUTEN_Msk (0x1ul << I2C_TOUT_TOUTEN_Pos)
#define | I2C_TOUT_DIV4_Pos (1)
#define | I2C_TOUT_DIV4_Msk (0x1ul << I2C_TOUT_DIV4_Pos)
#define | I2C_DATA_DATA_Pos (0)
#define | I2C_DATA_DATA_Msk (0xfful << I2C_DATA_DATA_Pos)
#define | I2C_SADDR0_GCALL_Pos (0)
#define | I2C_SADDR0_GCALL_Msk (0x1ul << I2C_SADDR0_GCALL_Pos)
#define | I2C_SADDR0_SADDR_Pos (1)
#define | I2C_SADDR0_SADDR_Msk (0x7ful << I2C_SADDR0_SADDR_Pos)
#define | I2C_SADDR1_GCALL_Pos (0)
#define | I2C_SADDR1_GCALL_Msk (0x1ul << I2C_SADDR1_GCALL_Pos)
#define | I2C_SADDR1_SADDR_Pos (1)
#define | I2C_SADDR1_SADDR_Msk (0x7ful << I2C_SADDR1_SADDR_Pos)
#define | I2C_SAMASK0_SAMASK_Pos (1)
#define | I2C_SAMASK0_SAMASK_Msk (0x7ful << I2C_SAMASK0_SAMASK_Pos)
#define | I2C_SAMASK1_SAMASK_Pos (1)
#define | I2C_SAMASK1_SAMASK_Msk (0x7ful << I2C_SAMASK1_SAMASK_Pos)
#define | I2C_CON2_WKUPEN_Pos (0)
#define | I2C_CON2_WKUPEN_Msk (0x1ul << I2C_CON2_WKUPEN_Pos)
#define | I2C_CON2_OVER_INTEN_Pos (1)
#define | I2C_CON2_OVER_INTEN_Msk (0x1ul << I2C_CON2_OVER_INTEN_Pos)
#define | I2C_CON2_UNDER_INTEN_Pos (2)
#define | I2C_CON2_UNDER_INTEN_Msk (0x1ul << I2C_CON2_UNDER_INTEN_Pos)
#define | I2C_CON2_TWOFF_EN_Pos (4)
#define | I2C_CON2_TWOFF_EN_Msk (0x1ul << I2C_CON2_TWOFF_EN_Pos)
#define | I2C_CON2_NOSTRETCH_Pos (5)
#define | I2C_CON2_NOSTRETCH_Msk (0x1ul << I2C_CON2_NOSTRETCH_Pos)
#define | I2C_STATUS2_WKUPIF_Pos (0)
#define | I2C_STATUS2_WKUPIF_Msk (0x1ul << I2C_STATUS2_WKUPIF_Pos)
#define | I2C_STATUS2_OVERUN_Pos (1)
#define | I2C_STATUS2_OVERUN_Msk (0x1ul << I2C_STATUS2_OVERUN_Pos)
#define | I2C_STATUS2_UNDERUN_Pos (2)
#define | I2C_STATUS2_UNDERUN_Msk (0x1ul << I2C_STATUS2_UNDERUN_Pos)
#define | I2C_STATUS2_WR_STATUS_Pos (3)
#define | I2C_STATUS2_WR_STATUS_Msk (0x1ul << I2C_STATUS2_WR_STATUS_Pos)
#define | I2C_STATUS2_FULL_Pos (4)
#define | I2C_STATUS2_FULL_Msk (0x1ul << I2C_STATUS2_FULL_Pos)
#define | I2C_STATUS2_EMPTY_Pos (5)
#define | I2C_STATUS2_EMPTY_Msk (0x1ul << I2C_STATUS2_EMPTY_Pos)
#define | I2C_STATUS2_BUS_FREE_Pos (6)
#define | I2C_STATUS2_BUS_FREE_Msk (0x1ul << I2C_STATUS2_BUS_FREE_Pos)
#define | LCD_CTL_EN_Pos (0)
#define | LCD_CTL_EN_Msk (0x1ul << LCD_CTL_EN_Pos)
#define | LCD_CTL_MUX_Pos (1)
#define | LCD_CTL_MUX_Msk (0x7ul << LCD_CTL_MUX_Pos)
#define | LCD_CTL_FREQ_Pos (4)
#define | LCD_CTL_FREQ_Msk (0x7ul << LCD_CTL_FREQ_Pos)
#define | LCD_CTL_BLINK_Pos (7)
#define | LCD_CTL_BLINK_Msk (0x1ul << LCD_CTL_BLINK_Pos)
#define | LCD_CTL_PDDISP_EN_Pos (8)
#define | LCD_CTL_PDDISP_EN_Msk (0x1ul << LCD_CTL_PDDISP_EN_Pos)
#define | LCD_CTL_PDINT_EN_Pos (9)
#define | LCD_CTL_PDINT_EN_Msk (0x1ul << LCD_CTL_PDINT_EN_Pos)
#define | LCD_DISPCTL_CPUMP_EN_Pos (0)
#define | LCD_DISPCTL_CPUMP_EN_Msk (0x1ul << LCD_DISPCTL_CPUMP_EN_Pos)
#define | LCD_DISPCTL_BIAS_SEL_Pos (1)
#define | LCD_DISPCTL_BIAS_SEL_Msk (0x3ul << LCD_DISPCTL_BIAS_SEL_Pos)
#define | LCD_DISPCTL_IBRL_EN_Pos (4)
#define | LCD_DISPCTL_IBRL_EN_Msk (0x1ul << LCD_DISPCTL_IBRL_EN_Pos)
#define | LCD_DISPCTL_BV_SEL_Pos (6)
#define | LCD_DISPCTL_BV_SEL_Msk (0x1ul << LCD_DISPCTL_BV_SEL_Pos)
#define | LCD_DISPCTL_CPUMP_VOL_SET_Pos (8)
#define | LCD_DISPCTL_CPUMP_VOL_SET_Msk (0x7ul << LCD_DISPCTL_CPUMP_VOL_SET_Pos)
#define | LCD_DISPCTL_CPUMP_FREQ_Pos (11)
#define | LCD_DISPCTL_CPUMP_FREQ_Msk (0x7ul << LCD_DISPCTL_CPUMP_FREQ_Pos)
#define | LCD_DISPCTL_Ext_C_Pos (16)
#define | LCD_DISPCTL_Ext_C_Msk (0x1ul << LCD_DISPCTL_Ext_C_Pos)
#define | LCD_DISPCTL_Res_Sel_Pos (17)
#define | LCD_DISPCTL_Res_Sel_Msk (0x3ul << LCD_DISPCTL_Res_Sel_Pos)
#define | LCD_MEM_0_SEG_0_4x_Pos (0)
#define | LCD_MEM_0_SEG_0_4x_Msk (0x3ful << LCD_MEM_0_SEG_0_4x_Pos)
#define | LCD_MEM_0_SEG_1_4x_Pos (8)
#define | LCD_MEM_0_SEG_1_4x_Msk (0x7ful << LCD_MEM_0_SEG_1_4x_Pos)
#define | LCD_MEM_0_SEG_2_4x_Pos (16)
#define | LCD_MEM_0_SEG_2_4x_Msk (0x3ful << LCD_MEM_0_SEG_2_4x_Pos)
#define | LCD_MEM_0_SEG_3_4x_Pos (24)
#define | LCD_MEM_0_SEG_3_4x_Msk (0x3ful << LCD_MEM_0_SEG_3_4x_Pos)
#define | LCD_MEM_1_SEG_0_4x_Pos (0)
#define | LCD_MEM_1_SEG_0_4x_Msk (0x3ful << LCD_MEM_1_SEG_0_4x_Pos)
#define | LCD_MEM_1_SEG_1_4x_Pos (8)
#define | LCD_MEM_1_SEG_1_4x_Msk (0x7ful << LCD_MEM_1_SEG_1_4x_Pos)
#define | LCD_MEM_1_SEG_2_4x_Pos (16)
#define | LCD_MEM_1_SEG_2_4x_Msk (0x3ful << LCD_MEM_1_SEG_2_4x_Pos)
#define | LCD_MEM_1_SEG_3_4x_Pos (24)
#define | LCD_MEM_1_SEG_3_4x_Msk (0x3ful << LCD_MEM_1_SEG_3_4x_Pos)
#define | LCD_MEM_2_SEG_0_4x_Pos (0)
#define | LCD_MEM_2_SEG_0_4x_Msk (0x3ful << LCD_MEM_2_SEG_0_4x_Pos)
#define | LCD_MEM_2_SEG_1_4x_Pos (8)
#define | LCD_MEM_2_SEG_1_4x_Msk (0x7ful << LCD_MEM_2_SEG_1_4x_Pos)
#define | LCD_MEM_2_SEG_2_4x_Pos (16)
#define | LCD_MEM_2_SEG_2_4x_Msk (0x3ful << LCD_MEM_2_SEG_2_4x_Pos)
#define | LCD_MEM_2_SEG_3_4x_Pos (24)
#define | LCD_MEM_2_SEG_3_4x_Msk (0x3ful << LCD_MEM_2_SEG_3_4x_Pos)
#define | LCD_MEM_3_SEG_0_4x_Pos (0)
#define | LCD_MEM_3_SEG_0_4x_Msk (0x3ful << LCD_MEM_3_SEG_0_4x_Pos)
#define | LCD_MEM_3_SEG_1_4x_Pos (8)
#define | LCD_MEM_3_SEG_1_4x_Msk (0x7ful << LCD_MEM_3_SEG_1_4x_Pos)
#define | LCD_MEM_3_SEG_2_4x_Pos (16)
#define | LCD_MEM_3_SEG_2_4x_Msk (0x3ful << LCD_MEM_3_SEG_2_4x_Pos)
#define | LCD_MEM_3_SEG_3_4x_Pos (24)
#define | LCD_MEM_3_SEG_3_4x_Msk (0x3ful << LCD_MEM_3_SEG_3_4x_Pos)
#define | LCD_MEM_4_SEG_0_4x_Pos (0)
#define | LCD_MEM_4_SEG_0_4x_Msk (0x3ful << LCD_MEM_4_SEG_0_4x_Pos)
#define | LCD_MEM_4_SEG_1_4x_Pos (8)
#define | LCD_MEM_4_SEG_1_4x_Msk (0x7ful << LCD_MEM_4_SEG_1_4x_Pos)
#define | LCD_MEM_4_SEG_2_4x_Pos (16)
#define | LCD_MEM_4_SEG_2_4x_Msk (0x3ful << LCD_MEM_4_SEG_2_4x_Pos)
#define | LCD_MEM_4_SEG_3_4x_Pos (24)
#define | LCD_MEM_4_SEG_3_4x_Msk (0x3ful << LCD_MEM_4_SEG_3_4x_Pos)
#define | LCD_MEM_5_SEG_0_4x_Pos (0)
#define | LCD_MEM_5_SEG_0_4x_Msk (0x3ful << LCD_MEM_5_SEG_0_4x_Pos)
#define | LCD_MEM_5_SEG_1_4x_Pos (8)
#define | LCD_MEM_5_SEG_1_4x_Msk (0x7ful << LCD_MEM_5_SEG_1_4x_Pos)
#define | LCD_MEM_5_SEG_2_4x_Pos (16)
#define | LCD_MEM_5_SEG_2_4x_Msk (0x3ful << LCD_MEM_5_SEG_2_4x_Pos)
#define | LCD_MEM_5_SEG_3_4x_Pos (24)
#define | LCD_MEM_5_SEG_3_4x_Msk (0x3ful << LCD_MEM_5_SEG_3_4x_Pos)
#define | LCD_MEM_6_SEG_0_4x_Pos (0)
#define | LCD_MEM_6_SEG_0_4x_Msk (0x3ful << LCD_MEM_6_SEG_0_4x_Pos)
#define | LCD_MEM_6_SEG_1_4x_Pos (8)
#define | LCD_MEM_6_SEG_1_4x_Msk (0x7ful << LCD_MEM_6_SEG_1_4x_Pos)
#define | LCD_MEM_6_SEG_2_4x_Pos (16)
#define | LCD_MEM_6_SEG_2_4x_Msk (0x3ful << LCD_MEM_6_SEG_2_4x_Pos)
#define | LCD_MEM_6_SEG_3_4x_Pos (24)
#define | LCD_MEM_6_SEG_3_4x_Msk (0x3ful << LCD_MEM_6_SEG_3_4x_Pos)
#define | LCD_MEM_7_SEG_0_4x_Pos (0)
#define | LCD_MEM_7_SEG_0_4x_Msk (0x3ful << LCD_MEM_7_SEG_0_4x_Pos)
#define | LCD_MEM_7_SEG_1_4x_Pos (8)
#define | LCD_MEM_7_SEG_1_4x_Msk (0x7ful << LCD_MEM_7_SEG_1_4x_Pos)
#define | LCD_MEM_7_SEG_2_4x_Pos (16)
#define | LCD_MEM_7_SEG_2_4x_Msk (0x3ful << LCD_MEM_7_SEG_2_4x_Pos)
#define | LCD_MEM_7_SEG_3_4x_Pos (24)
#define | LCD_MEM_7_SEG_3_4x_Msk (0x3ful << LCD_MEM_7_SEG_3_4x_Pos)
#define | LCD_MEM_8_SEG_0_4x_Pos (0)
#define | LCD_MEM_8_SEG_0_4x_Msk (0x3ful << LCD_MEM_8_SEG_0_4x_Pos)
#define | LCD_MEM_8_SEG_1_4x_Pos (8)
#define | LCD_MEM_8_SEG_1_4x_Msk (0x7ful << LCD_MEM_8_SEG_1_4x_Pos)
#define | LCD_MEM_8_SEG_2_4x_Pos (16)
#define | LCD_MEM_8_SEG_2_4x_Msk (0x3ful << LCD_MEM_8_SEG_2_4x_Pos)
#define | LCD_MEM_8_SEG_3_4x_Pos (24)
#define | LCD_MEM_8_SEG_3_4x_Msk (0x3ful << LCD_MEM_8_SEG_3_4x_Pos)
#define | LCD_FCR_FCEN_Pos (0)
#define | LCD_FCR_FCEN_Msk (0x1ul << LCD_FCR_FCEN_Pos)
#define | LCD_FCR_FCINTEN_Pos (1)
#define | LCD_FCR_FCINTEN_Msk (0x1ul << LCD_FCR_FCINTEN_Pos)
#define | LCD_FCR_PRESCL_Pos (2)
#define | LCD_FCR_PRESCL_Msk (0x3ul << LCD_FCR_PRESCL_Pos)
#define | LCD_FCR_FCV_Pos (4)
#define | LCD_FCR_FCV_Msk (0x3ful << LCD_FCR_FCV_Pos)
#define | LCD_FCSTS_FCSTS_Pos (0)
#define | LCD_FCSTS_FCSTS_Msk (0x1ul << LCD_FCSTS_FCSTS_Pos)
#define | LCD_FCSTS_PDSTS_Pos (1)
#define | LCD_FCSTS_PDSTS_Msk (0x1ul << LCD_FCSTS_PDSTS_Pos)
#define | PWM_PRES_CP01_Pos (0)
#define | PWM_PRES_CP01_Msk (0xfful << PWM_PRES_CP01_Pos)
#define | PWM_PRES_CP23_Pos (8)
#define | PWM_PRES_CP23_Msk (0xfful << PWM_PRES_CP23_Pos)
#define | PWM_PRES_DZ01_Pos (16)
#define | PWM_PRES_DZ01_Msk (0xfful << PWM_PRES_DZ01_Pos)
#define | PWM_PRES_DZ23_Pos (24)
#define | PWM_PRES_DZ23_Msk (0xfful << PWM_PRES_DZ23_Pos)
#define | PWM_CLKSEL_CLKSEL0_Pos (0)
#define | PWM_CLKSEL_CLKSEL0_Msk (0x7ul << PWM_CLKSEL_CLKSEL0_Pos)
#define | PWM_CLKSEL_CLKSEL1_Pos (4)
#define | PWM_CLKSEL_CLKSEL1_Msk (0x7ul << PWM_CLKSEL_CLKSEL1_Pos)
#define | PWM_CLKSEL_CLKSEL2_Pos (8)
#define | PWM_CLKSEL_CLKSEL2_Msk (0x7ul << PWM_CLKSEL_CLKSEL2_Pos)
#define | PWM_CLKSEL_CLKSEL3_Pos (12)
#define | PWM_CLKSEL_CLKSEL3_Msk (0x7ul << PWM_CLKSEL_CLKSEL3_Pos)
#define | PWM_CTL_CH0EN_Pos (0)
#define | PWM_CTL_CH0EN_Msk (0x1ul << PWM_CTL_CH0EN_Pos)
#define | PWM_CTL_CH0INV_Pos (2)
#define | PWM_CTL_CH0INV_Msk (0x1ul << PWM_CTL_CH0INV_Pos)
#define | PWM_CTL_CH0MOD_Pos (3)
#define | PWM_CTL_CH0MOD_Msk (0x1ul << PWM_CTL_CH0MOD_Pos)
#define | PWM_CTL_DZEN01_Pos (4)
#define | PWM_CTL_DZEN01_Msk (0x1ul << PWM_CTL_DZEN01_Pos)
#define | PWM_CTL_DZEN23_Pos (5)
#define | PWM_CTL_DZEN23_Msk (0x1ul << PWM_CTL_DZEN23_Pos)
#define | PWM_CTL_CH1EN_Pos (8)
#define | PWM_CTL_CH1EN_Msk (0x1ul << PWM_CTL_CH1EN_Pos)
#define | PWM_CTL_CH1INV_Pos (10)
#define | PWM_CTL_CH1INV_Msk (0x1ul << PWM_CTL_CH1INV_Pos)
#define | PWM_CTL_CH1MOD_Pos (11)
#define | PWM_CTL_CH1MOD_Msk (0x1ul << PWM_CTL_CH1MOD_Pos)
#define | PWM_CTL_CH2EN_Pos (16)
#define | PWM_CTL_CH2EN_Msk (0x1ul << PWM_CTL_CH2EN_Pos)
#define | PWM_CTL_CH2INV_Pos (18)
#define | PWM_CTL_CH2INV_Msk (0x1ul << PWM_CTL_CH2INV_Pos)
#define | PWM_CTL_CH2MOD_Pos (19)
#define | PWM_CTL_CH2MOD_Msk (0x1ul << PWM_CTL_CH2MOD_Pos)
#define | PWM_CTL_CH3EN_Pos (24)
#define | PWM_CTL_CH3EN_Msk (0x1ul << PWM_CTL_CH3EN_Pos)
#define | PWM_CTL_CH3INV_Pos (26)
#define | PWM_CTL_CH3INV_Msk (0x1ul << PWM_CTL_CH3INV_Pos)
#define | PWM_CTL_CH3MOD_Pos (27)
#define | PWM_CTL_CH3MOD_Msk (0x1ul << PWM_CTL_CH3MOD_Pos)
#define | PWM_CTL_PWMTYPE01_Pos (30)
#define | PWM_CTL_PWMTYPE01_Msk (0x1ul << PWM_CTL_PWMTYPE01_Pos)
#define | PWM_CTL_PWMTYPE23_Pos (31)
#define | PWM_CTL_PWMTYPE23_Msk (0x1ul << PWM_CTL_PWMTYPE23_Pos)
#define | PWM_INTEN_TMIE0_Pos (0)
#define | PWM_INTEN_TMIE0_Msk (0x1ul << PWM_INTEN_TMIE0_Pos)
#define | PWM_INTEN_TMIE1_Pos (1)
#define | PWM_INTEN_TMIE1_Msk (0x1ul << PWM_INTEN_TMIE1_Pos)
#define | PWM_INTEN_TMIE2_Pos (2)
#define | PWM_INTEN_TMIE2_Msk (0x1ul << PWM_INTEN_TMIE2_Pos)
#define | PWM_INTEN_TMIE3_Pos (3)
#define | PWM_INTEN_TMIE3_Msk (0x1ul << PWM_INTEN_TMIE3_Pos)
#define | PWM_INTSTS_TMINT0_Pos (0)
#define | PWM_INTSTS_TMINT0_Msk (0x1ul << PWM_INTSTS_TMINT0_Pos)
#define | PWM_INTSTS_TMINT1_Pos (1)
#define | PWM_INTSTS_TMINT1_Msk (0x1ul << PWM_INTSTS_TMINT1_Pos)
#define | PWM_INTSTS_TMINT2_Pos (2)
#define | PWM_INTSTS_TMINT2_Msk (0x1ul << PWM_INTSTS_TMINT2_Pos)
#define | PWM_INTSTS_TMINT3_Pos (3)
#define | PWM_INTSTS_TMINT3_Msk (0x1ul << PWM_INTSTS_TMINT3_Pos)
#define | PWM_INTSTS_Duty0Syncflag_Pos (4)
#define | PWM_INTSTS_Duty0Syncflag_Msk (0x1ul << PWM_INTSTS_Duty0Syncflag_Pos)
#define | PWM_INTSTS_Duty1Syncflag_Pos (5)
#define | PWM_INTSTS_Duty1Syncflag_Msk (0x1ul << PWM_INTSTS_Duty1Syncflag_Pos)
#define | PWM_INTSTS_Duty2Syncflag_Pos (6)
#define | PWM_INTSTS_Duty2Syncflag_Msk (0x1ul << PWM_INTSTS_Duty2Syncflag_Pos)
#define | PWM_INTSTS_Duty3Syncflag_Pos (7)
#define | PWM_INTSTS_Duty3Syncflag_Msk (0x1ul << PWM_INTSTS_Duty3Syncflag_Pos)
#define | PWM_INTSTS_PresSyncFlag_Pos (8)
#define | PWM_INTSTS_PresSyncFlag_Msk (0x1ul << PWM_INTSTS_PresSyncFlag_Pos)
#define | PWM_OE_CH0_OE_Pos (0)
#define | PWM_OE_CH0_OE_Msk (0x1ul << PWM_OE_CH0_OE_Pos)
#define | PWM_OE_CH1_OE_Pos (1)
#define | PWM_OE_CH1_OE_Msk (0x1ul << PWM_OE_CH1_OE_Pos)
#define | PWM_OE_CH2_OE_Pos (2)
#define | PWM_OE_CH2_OE_Msk (0x1ul << PWM_OE_CH2_OE_Pos)
#define | PWM_OE_CH3_OE_Pos (3)
#define | PWM_OE_CH3_OE_Msk (0x1ul << PWM_OE_CH3_OE_Pos)
#define | PWM_DUTY0_CN_Pos (0)
#define | PWM_DUTY0_CN_Msk (0xfffful << PWM_DUTY0_CN_Pos)
#define | PWM_DUTY0_CM_Pos (16)
#define | PWM_DUTY0_CM_Msk (0xfffful << PWM_DUTY0_CM_Pos)
#define | PWM_DATA0_DATA_Pos (0)
#define | PWM_DATA0_DATA_Msk (0xfffful << PWM_DATA0_DATA_Pos)
#define | PWM_DATA0_DATA_H_Pos (16)
#define | PWM_DATA0_DATA_H_Msk (0x7ffful << PWM_DATA0_DATA_H_Pos)
#define | PWM_DATA0_sync_Pos (31)
#define | PWM_DATA0_sync_Msk (0x1ul << PWM_DATA0_sync_Pos)
#define | PWM_DUTY1_CN_Pos (0)
#define | PWM_DUTY1_CN_Msk (0xfffful << PWM_DUTY1_CN_Pos)
#define | PWM_DUTY1_CM_Pos (16)
#define | PWM_DUTY1_CM_Msk (0xfffful << PWM_DUTY1_CM_Pos)
#define | PWM_DATA1_DATA_Pos (0)
#define | PWM_DATA1_DATA_Msk (0xfffful << PWM_DATA1_DATA_Pos)
#define | PWM_DATA1_DATA_H_Pos (16)
#define | PWM_DATA1_DATA_H_Msk (0x7ffful << PWM_DATA1_DATA_H_Pos)
#define | PWM_DATA1_sync_Pos (31)
#define | PWM_DATA1_sync_Msk (0x1ul << PWM_DATA1_sync_Pos)
#define | PWM_DUTY2_CN_Pos (0)
#define | PWM_DUTY2_CN_Msk (0xfffful << PWM_DUTY2_CN_Pos)
#define | PWM_DUTY2_CM_Pos (16)
#define | PWM_DUTY2_CM_Msk (0xfffful << PWM_DUTY2_CM_Pos)
#define | PWM_DATA2_DATA_Pos (0)
#define | PWM_DATA2_DATA_Msk (0xfffful << PWM_DATA2_DATA_Pos)
#define | PWM_DATA2_DATA_H_Pos (16)
#define | PWM_DATA2_DATA_H_Msk (0x7ffful << PWM_DATA2_DATA_H_Pos)
#define | PWM_DATA2_sync_Pos (31)
#define | PWM_DATA2_sync_Msk (0x1ul << PWM_DATA2_sync_Pos)
#define | PWM_DUTY3_CN_Pos (0)
#define | PWM_DUTY3_CN_Msk (0xfffful << PWM_DUTY3_CN_Pos)
#define | PWM_DUTY3_CM_Pos (16)
#define | PWM_DUTY3_CM_Msk (0xfffful << PWM_DUTY3_CM_Pos)
#define | PWM_DATA3_DATA_Pos (0)
#define | PWM_DATA3_DATA_Msk (0xfffful << PWM_DATA3_DATA_Pos)
#define | PWM_DATA3_DATA_H_Pos (16)
#define | PWM_DATA3_DATA_H_Msk (0x7ffful << PWM_DATA3_DATA_H_Pos)
#define | PWM_DATA3_sync_Pos (31)
#define | PWM_DATA3_sync_Msk (0x1ul << PWM_DATA3_sync_Pos)
#define | PWM_CAPCTL_INV0_Pos (0)
#define | PWM_CAPCTL_INV0_Msk (0x1ul << PWM_CAPCTL_INV0_Pos)
#define | PWM_CAPCTL_CAPCH0EN_Pos (1)
#define | PWM_CAPCTL_CAPCH0EN_Msk (0x1ul << PWM_CAPCTL_CAPCH0EN_Pos)
#define | PWM_CAPCTL_CAPCH0PADEN_Pos (2)
#define | PWM_CAPCTL_CAPCH0PADEN_Msk (0x1ul << PWM_CAPCTL_CAPCH0PADEN_Pos)
#define | PWM_CAPCTL_CH0PDMAEN_Pos (3)
#define | PWM_CAPCTL_CH0PDMAEN_Msk (0x1ul << PWM_CAPCTL_CH0PDMAEN_Pos)
#define | PWM_CAPCTL_PDMACAPMOD0_Pos (4)
#define | PWM_CAPCTL_PDMACAPMOD0_Msk (0x3ul << PWM_CAPCTL_PDMACAPMOD0_Pos)
#define | PWM_CAPCTL_CAPRELOADREN0_Pos (6)
#define | PWM_CAPCTL_CAPRELOADREN0_Msk (0x1ul << PWM_CAPCTL_CAPRELOADREN0_Pos)
#define | PWM_CAPCTL_CAPRELOADFEN0_Pos (7)
#define | PWM_CAPCTL_CAPRELOADFEN0_Msk (0x1ul << PWM_CAPCTL_CAPRELOADFEN0_Pos)
#define | PWM_CAPCTL_INV1_Pos (8)
#define | PWM_CAPCTL_INV1_Msk (0x1ul << PWM_CAPCTL_INV1_Pos)
#define | PWM_CAPCTL_CAPCH1EN_Pos (9)
#define | PWM_CAPCTL_CAPCH1EN_Msk (0x1ul << PWM_CAPCTL_CAPCH1EN_Pos)
#define | PWM_CAPCTL_CAPCH1PADEN_Pos (10)
#define | PWM_CAPCTL_CAPCH1PADEN_Msk (0x1ul << PWM_CAPCTL_CAPCH1PADEN_Pos)
#define | PWM_CAPCTL_CH0RFORDER_Pos (12)
#define | PWM_CAPCTL_CH0RFORDER_Msk (0x1ul << PWM_CAPCTL_CH0RFORDER_Pos)
#define | PWM_CAPCTL_CH01CASK_Pos (13)
#define | PWM_CAPCTL_CH01CASK_Msk (0x1ul << PWM_CAPCTL_CH01CASK_Pos)
#define | PWM_CAPCTL_CAPRELOADREN1_Pos (14)
#define | PWM_CAPCTL_CAPRELOADREN1_Msk (0x1ul << PWM_CAPCTL_CAPRELOADREN1_Pos)
#define | PWM_CAPCTL_CAPRELOADFEN1_Pos (15)
#define | PWM_CAPCTL_CAPRELOADFEN1_Msk (0x1ul << PWM_CAPCTL_CAPRELOADFEN1_Pos)
#define | PWM_CAPCTL_INV2_Pos (16)
#define | PWM_CAPCTL_INV2_Msk (0x1ul << PWM_CAPCTL_INV2_Pos)
#define | PWM_CAPCTL_CAPCH2EN_Pos (17)
#define | PWM_CAPCTL_CAPCH2EN_Msk (0x1ul << PWM_CAPCTL_CAPCH2EN_Pos)
#define | PWM_CAPCTL_CAPCH2PADEN_Pos (18)
#define | PWM_CAPCTL_CAPCH2PADEN_Msk (0x1ul << PWM_CAPCTL_CAPCH2PADEN_Pos)
#define | PWM_CAPCTL_CH2PDMAEN_Pos (19)
#define | PWM_CAPCTL_CH2PDMAEN_Msk (0x1ul << PWM_CAPCTL_CH2PDMAEN_Pos)
#define | PWM_CAPCTL_PDMACAPMOD2_Pos (20)
#define | PWM_CAPCTL_PDMACAPMOD2_Msk (0x3ul << PWM_CAPCTL_PDMACAPMOD2_Pos)
#define | PWM_CAPCTL_CAPRELOADREN2_Pos (22)
#define | PWM_CAPCTL_CAPRELOADREN2_Msk (0x1ul << PWM_CAPCTL_CAPRELOADREN2_Pos)
#define | PWM_CAPCTL_CAPRELOADFEN2_Pos (23)
#define | PWM_CAPCTL_CAPRELOADFEN2_Msk (0x1ul << PWM_CAPCTL_CAPRELOADFEN2_Pos)
#define | PWM_CAPCTL_INV3_Pos (24)
#define | PWM_CAPCTL_INV3_Msk (0x1ul << PWM_CAPCTL_INV3_Pos)
#define | PWM_CAPCTL_CAPCH3EN_Pos (25)
#define | PWM_CAPCTL_CAPCH3EN_Msk (0x1ul << PWM_CAPCTL_CAPCH3EN_Pos)
#define | PWM_CAPCTL_CAPCH3PADEN_Pos (26)
#define | PWM_CAPCTL_CAPCH3PADEN_Msk (0x1ul << PWM_CAPCTL_CAPCH3PADEN_Pos)
#define | PWM_CAPCTL_CH2RFORDER_Pos (28)
#define | PWM_CAPCTL_CH2RFORDER_Msk (0x1ul << PWM_CAPCTL_CH2RFORDER_Pos)
#define | PWM_CAPCTL_CH23CASK_Pos (29)
#define | PWM_CAPCTL_CH23CASK_Msk (0x1ul << PWM_CAPCTL_CH23CASK_Pos)
#define | PWM_CAPCTL_CAPRELOADREN3_Pos (30)
#define | PWM_CAPCTL_CAPRELOADREN3_Msk (0x1ul << PWM_CAPCTL_CAPRELOADREN3_Pos)
#define | PWM_CAPCTL_CAPRELOADFEN3_Pos (31)
#define | PWM_CAPCTL_CAPRELOADFEN3_Msk (0x1ul << PWM_CAPCTL_CAPRELOADFEN3_Pos)
#define | PWM_CAPINTEN_CRL_IE0_Pos (0)
#define | PWM_CAPINTEN_CRL_IE0_Msk (0x1ul << PWM_CAPINTEN_CRL_IE0_Pos)
#define | PWM_CAPINTEN_CFL_IE0_Pos (1)
#define | PWM_CAPINTEN_CFL_IE0_Msk (0x1ul << PWM_CAPINTEN_CFL_IE0_Pos)
#define | PWM_CAPINTEN_CRL_IE1_Pos (8)
#define | PWM_CAPINTEN_CRL_IE1_Msk (0x1ul << PWM_CAPINTEN_CRL_IE1_Pos)
#define | PWM_CAPINTEN_CFL_IE1_Pos (9)
#define | PWM_CAPINTEN_CFL_IE1_Msk (0x1ul << PWM_CAPINTEN_CFL_IE1_Pos)
#define | PWM_CAPINTEN_CRL_IE2_Pos (16)
#define | PWM_CAPINTEN_CRL_IE2_Msk (0x1ul << PWM_CAPINTEN_CRL_IE2_Pos)
#define | PWM_CAPINTEN_CFL_IE2_Pos (17)
#define | PWM_CAPINTEN_CFL_IE2_Msk (0x1ul << PWM_CAPINTEN_CFL_IE2_Pos)
#define | PWM_CAPINTEN_CRL_IE3_Pos (24)
#define | PWM_CAPINTEN_CRL_IE3_Msk (0x1ul << PWM_CAPINTEN_CRL_IE3_Pos)
#define | PWM_CAPINTEN_CFL_IE3_Pos (25)
#define | PWM_CAPINTEN_CFL_IE3_Msk (0x1ul << PWM_CAPINTEN_CFL_IE3_Pos)
#define | PWM_CAPINTSTS_CAPIF0_Pos (0)
#define | PWM_CAPINTSTS_CAPIF0_Msk (0x1ul << PWM_CAPINTSTS_CAPIF0_Pos)
#define | PWM_CAPINTSTS_CRLI0_Pos (1)
#define | PWM_CAPINTSTS_CRLI0_Msk (0x1ul << PWM_CAPINTSTS_CRLI0_Pos)
#define | PWM_CAPINTSTS_CFLI0_Pos (2)
#define | PWM_CAPINTSTS_CFLI0_Msk (0x1ul << PWM_CAPINTSTS_CFLI0_Pos)
#define | PWM_CAPINTSTS_CAPOVR0_Pos (3)
#define | PWM_CAPINTSTS_CAPOVR0_Msk (0x1ul << PWM_CAPINTSTS_CAPOVR0_Pos)
#define | PWM_CAPINTSTS_CAPOVF0_Pos (4)
#define | PWM_CAPINTSTS_CAPOVF0_Msk (0x1ul << PWM_CAPINTSTS_CAPOVF0_Pos)
#define | PWM_CAPINTSTS_CAPIF1_Pos (8)
#define | PWM_CAPINTSTS_CAPIF1_Msk (0x1ul << PWM_CAPINTSTS_CAPIF1_Pos)
#define | PWM_CAPINTSTS_CRLI1_Pos (9)
#define | PWM_CAPINTSTS_CRLI1_Msk (0x1ul << PWM_CAPINTSTS_CRLI1_Pos)
#define | PWM_CAPINTSTS_CFLI1_Pos (10)
#define | PWM_CAPINTSTS_CFLI1_Msk (0x1ul << PWM_CAPINTSTS_CFLI1_Pos)
#define | PWM_CAPINTSTS_CAPOVR1_Pos (11)
#define | PWM_CAPINTSTS_CAPOVR1_Msk (0x1ul << PWM_CAPINTSTS_CAPOVR1_Pos)
#define | PWM_CAPINTSTS_CAPOVF1_Pos (12)
#define | PWM_CAPINTSTS_CAPOVF1_Msk (0x1ul << PWM_CAPINTSTS_CAPOVF1_Pos)
#define | PWM_CAPINTSTS_CAPIF2_Pos (16)
#define | PWM_CAPINTSTS_CAPIF2_Msk (0x1ul << PWM_CAPINTSTS_CAPIF2_Pos)
#define | PWM_CAPINTSTS_CRLI2_Pos (17)
#define | PWM_CAPINTSTS_CRLI2_Msk (0x1ul << PWM_CAPINTSTS_CRLI2_Pos)
#define | PWM_CAPINTSTS_CFLI2_Pos (18)
#define | PWM_CAPINTSTS_CFLI2_Msk (0x1ul << PWM_CAPINTSTS_CFLI2_Pos)
#define | PWM_CAPINTSTS_CAPOVR2_Pos (19)
#define | PWM_CAPINTSTS_CAPOVR2_Msk (0x1ul << PWM_CAPINTSTS_CAPOVR2_Pos)
#define | PWM_CAPINTSTS_CAPOVF2_Pos (20)
#define | PWM_CAPINTSTS_CAPOVF2_Msk (0x1ul << PWM_CAPINTSTS_CAPOVF2_Pos)
#define | PWM_CAPINTSTS_CAPIF3_Pos (24)
#define | PWM_CAPINTSTS_CAPIF3_Msk (0x1ul << PWM_CAPINTSTS_CAPIF3_Pos)
#define | PWM_CAPINTSTS_CRLI3_Pos (25)
#define | PWM_CAPINTSTS_CRLI3_Msk (0x1ul << PWM_CAPINTSTS_CRLI3_Pos)
#define | PWM_CAPINTSTS_CFLI3_Pos (26)
#define | PWM_CAPINTSTS_CFLI3_Msk (0x1ul << PWM_CAPINTSTS_CFLI3_Pos)
#define | PWM_CAPINTSTS_CAPOVR3_Pos (27)
#define | PWM_CAPINTSTS_CAPOVR3_Msk (0x1ul << PWM_CAPINTSTS_CAPOVR3_Pos)
#define | PWM_CAPINTSTS_CAPOVF3_Pos (28)
#define | PWM_CAPINTSTS_CAPOVF3_Msk (0x1ul << PWM_CAPINTSTS_CAPOVF3_Pos)
#define | PWM_CRL0_CRL_Pos (0)
#define | PWM_CRL0_CRL_Msk (0xfffful << PWM_CRL0_CRL_Pos)
#define | PWM_CRL0_CRL_H_Pos (16)
#define | PWM_CRL0_CRL_H_Msk (0xfffful << PWM_CRL0_CRL_H_Pos)
#define | PWM_CFL0_CFL_Pos (0)
#define | PWM_CFL0_CFL_Msk (0xfffful << PWM_CFL0_CFL_Pos)
#define | PWM_CFL0_CFL_H_Pos (16)
#define | PWM_CFL0_CFL_H_Msk (0xfffful << PWM_CFL0_CFL_H_Pos)
#define | PWM_CRL1_CRL_Pos (0)
#define | PWM_CRL1_CRL_Msk (0xfffful << PWM_CRL1_CRL_Pos)
#define | PWM_CRL1_CRL_H_Pos (16)
#define | PWM_CRL1_CRL_H_Msk (0xfffful << PWM_CRL1_CRL_H_Pos)
#define | PWM_CFL1_CFL_Pos (0)
#define | PWM_CFL1_CFL_Msk (0xfffful << PWM_CFL1_CFL_Pos)
#define | PWM_CFL1_CFL_H_Pos (16)
#define | PWM_CFL1_CFL_H_Msk (0xfffful << PWM_CFL1_CFL_H_Pos)
#define | PWM_CRL2_CRL_Pos (0)
#define | PWM_CRL2_CRL_Msk (0xfffful << PWM_CRL2_CRL_Pos)
#define | PWM_CRL2_CRL_H_Pos (16)
#define | PWM_CRL2_CRL_H_Msk (0xfffful << PWM_CRL2_CRL_H_Pos)
#define | PWM_CFL2_CFL_Pos (0)
#define | PWM_CFL2_CFL_Msk (0xfffful << PWM_CFL2_CFL_Pos)
#define | PWM_CFL2_CFL_H_Pos (16)
#define | PWM_CFL2_CFL_H_Msk (0xfffful << PWM_CFL2_CFL_H_Pos)
#define | PWM_CRL3_CRL_Pos (0)
#define | PWM_CRL3_CRL_Msk (0xfffful << PWM_CRL3_CRL_Pos)
#define | PWM_CRL3_CRL_H_Pos (16)
#define | PWM_CRL3_CRL_H_Msk (0xfffful << PWM_CRL3_CRL_H_Pos)
#define | PWM_CFL3_CFL_Pos (0)
#define | PWM_CFL3_CFL_Msk (0xfffful << PWM_CFL3_CFL_Pos)
#define | PWM_CFL3_CFL_H_Pos (16)
#define | PWM_CFL3_CFL_H_Msk (0xfffful << PWM_CFL3_CFL_H_Pos)
#define | PWM_PDMACH0_PDMACH01_Pos (0)
#define | PWM_PDMACH0_PDMACH01_Msk (0xfful << PWM_PDMACH0_PDMACH01_Pos)
#define | PWM_PDMACH0_PDMACH02_Pos (8)
#define | PWM_PDMACH0_PDMACH02_Msk (0xfful << PWM_PDMACH0_PDMACH02_Pos)
#define | PWM_PDMACH0_PDMACH03_Pos (16)
#define | PWM_PDMACH0_PDMACH03_Msk (0xfful << PWM_PDMACH0_PDMACH03_Pos)
#define | PWM_PDMACH0_PDMACH04_Pos (24)
#define | PWM_PDMACH0_PDMACH04_Msk (0xfful << PWM_PDMACH0_PDMACH04_Pos)
#define | PWM_PDMACH2_PDMACH21_Pos (0)
#define | PWM_PDMACH2_PDMACH21_Msk (0xfful << PWM_PDMACH2_PDMACH21_Pos)
#define | PWM_PDMACH2_PDMACH22_Pos (8)
#define | PWM_PDMACH2_PDMACH22_Msk (0xfful << PWM_PDMACH2_PDMACH22_Pos)
#define | PWM_PDMACH2_PDMACH23_Pos (16)
#define | PWM_PDMACH2_PDMACH23_Msk (0xfful << PWM_PDMACH2_PDMACH23_Pos)
#define | PWM_PDMACH2_PDMACH24_Pos (24)
#define | PWM_PDMACH2_PDMACH24_Msk (0xfful << PWM_PDMACH2_PDMACH24_Pos)
#define | PWM_ADTRGEN_TRGCH0EN_Pos (0)
#define | PWM_ADTRGEN_TRGCH0EN_Msk (0x1ul << PWM_ADTRGEN_TRGCH0EN_Pos)
#define | PWM_ADTRGEN_TRGCH1EN_Pos (1)
#define | PWM_ADTRGEN_TRGCH1EN_Msk (0x1ul << PWM_ADTRGEN_TRGCH1EN_Pos)
#define | PWM_ADTRGEN_TRGCH2EN_Pos (2)
#define | PWM_ADTRGEN_TRGCH2EN_Msk (0x1ul << PWM_ADTRGEN_TRGCH2EN_Pos)
#define | PWM_ADTRGEN_TRGCH3EN_Pos (3)
#define | PWM_ADTRGEN_TRGCH3EN_Msk (0x1ul << PWM_ADTRGEN_TRGCH3EN_Pos)
#define | PWM_ADTRGSTS_ADTRG0Flag_Pos (0)
#define | PWM_ADTRGSTS_ADTRG0Flag_Msk (0x1ul << PWM_ADTRGSTS_ADTRG0Flag_Pos)
#define | PWM_ADTRGSTS_ADTRG1Flag_Pos (1)
#define | PWM_ADTRGSTS_ADTRG1Flag_Msk (0x1ul << PWM_ADTRGSTS_ADTRG1Flag_Pos)
#define | PWM_ADTRGSTS_ADTRG2Flag_Pos (2)
#define | PWM_ADTRGSTS_ADTRG2Flag_Msk (0x1ul << PWM_ADTRGSTS_ADTRG2Flag_Pos)
#define | PWM_ADTRGSTS_ADTRG3Flag_Pos (3)
#define | PWM_ADTRGSTS_ADTRG3Flag_Msk (0x1ul << PWM_ADTRGSTS_ADTRG3Flag_Pos)
#define | RTC_INIR_ACTIVE_Pos (0)
#define | RTC_INIR_ACTIVE_Msk (0x1ul << RTC_INIR_ACTIVE_Pos)
#define | RTC_INIR_INIR_Pos (0)
#define | RTC_INIR_INIR_Msk (0xfffffffful << RTC_INIR_INIR_Pos)
#define | RTC_AER_AER_Pos (0)
#define | RTC_AER_AER_Msk (0xfffful << RTC_AER_AER_Pos)
#define | RTC_AER_ENF_Pos (16)
#define | RTC_AER_ENF_Msk (0x1ul << RTC_AER_ENF_Pos)
#define | RTC_FCR_FCR_Pos (0)
#define | RTC_FCR_FCR_Msk (0x3ffffful << RTC_FCR_FCR_Pos)
#define | RTC_TLR_1SEC_Pos (0)
#define | RTC_TLR_1SEC_Msk (0xful << RTC_TLR_1SEC_Pos)
#define | RTC_TLR_10SEC_Pos (4)
#define | RTC_TLR_10SEC_Msk (0x7ul << RTC_TLR_10SEC_Pos)
#define | RTC_TLR_1MIN_Pos (8)
#define | RTC_TLR_1MIN_Msk (0xful << RTC_TLR_1MIN_Pos)
#define | RTC_TLR_10MIN_Pos (12)
#define | RTC_TLR_10MIN_Msk (0x7ul << RTC_TLR_10MIN_Pos)
#define | RTC_TLR_1HR_Pos (16)
#define | RTC_TLR_1HR_Msk (0xful << RTC_TLR_1HR_Pos)
#define | RTC_TLR_10HR_Pos (20)
#define | RTC_TLR_10HR_Msk (0x3ul << RTC_TLR_10HR_Pos)
#define | RTC_CLR_1DAY_Pos (0)
#define | RTC_CLR_1DAY_Msk (0xful << RTC_CLR_1DAY_Pos)
#define | RTC_CLR_10DAY_Pos (4)
#define | RTC_CLR_10DAY_Msk (0x3ul << RTC_CLR_10DAY_Pos)
#define | RTC_CLR_1MON_Pos (8)
#define | RTC_CLR_1MON_Msk (0xful << RTC_CLR_1MON_Pos)
#define | RTC_CLR_10MON_Pos (12)
#define | RTC_CLR_10MON_Msk (0x1ul << RTC_CLR_10MON_Pos)
#define | RTC_CLR_1YEAR_Pos (16)
#define | RTC_CLR_1YEAR_Msk (0xful << RTC_CLR_1YEAR_Pos)
#define | RTC_CLR_10YEAR_Pos (20)
#define | RTC_CLR_10YEAR_Msk (0xful << RTC_CLR_10YEAR_Pos)
#define | RTC_TSSR_24H_12H_Pos (0)
#define | RTC_TSSR_24H_12H_Msk (0x1ul << RTC_TSSR_24H_12H_Pos)
#define | RTC_DWR_DWR_Pos (0)
#define | RTC_DWR_DWR_Msk (0x7ul << RTC_DWR_DWR_Pos)
#define | RTC_TAR_1SEC_Pos (0)
#define | RTC_TAR_1SEC_Msk (0xful << RTC_TAR_1SEC_Pos)
#define | RTC_TAR_10SEC_Pos (4)
#define | RTC_TAR_10SEC_Msk (0x7ul << RTC_TAR_10SEC_Pos)
#define | RTC_TAR_1MIN_Pos (8)
#define | RTC_TAR_1MIN_Msk (0xful << RTC_TAR_1MIN_Pos)
#define | RTC_TAR_10MIN_Pos (12)
#define | RTC_TAR_10MIN_Msk (0x7ul << RTC_TAR_10MIN_Pos)
#define | RTC_TAR_1HR_Pos (16)
#define | RTC_TAR_1HR_Msk (0xful << RTC_TAR_1HR_Pos)
#define | RTC_TAR_10HR_Pos (20)
#define | RTC_TAR_10HR_Msk (0x3ul << RTC_TAR_10HR_Pos)
#define | RTC_CAR_1DAY_Pos (0)
#define | RTC_CAR_1DAY_Msk (0xful << RTC_CAR_1DAY_Pos)
#define | RTC_CAR_10DAY_Pos (4)
#define | RTC_CAR_10DAY_Msk (0x3ul << RTC_CAR_10DAY_Pos)
#define | RTC_CAR_1MON_Pos (8)
#define | RTC_CAR_1MON_Msk (0xful << RTC_CAR_1MON_Pos)
#define | RTC_CAR_10MON_Pos (12)
#define | RTC_CAR_10MON_Msk (0x1ul << RTC_CAR_10MON_Pos)
#define | RTC_CAR_1YEAR_Pos (16)
#define | RTC_CAR_1YEAR_Msk (0xful << RTC_CAR_1YEAR_Pos)
#define | RTC_CAR_10YEAR_Pos (20)
#define | RTC_CAR_10YEAR_Msk (0xful << RTC_CAR_10YEAR_Pos)
#define | RTC_LIR_LIR_Pos (0)
#define | RTC_LIR_LIR_Msk (0x1ul << RTC_LIR_LIR_Pos)
#define | RTC_RIER_AIER_Pos (0)
#define | RTC_RIER_AIER_Msk (0x1ul << RTC_RIER_AIER_Pos)
#define | RTC_RIER_TIER_Pos (1)
#define | RTC_RIER_TIER_Msk (0x1ul << RTC_RIER_TIER_Pos)
#define | RTC_RIER_SNOOPIER_Pos (2)
#define | RTC_RIER_SNOOPIER_Msk (0x1ul << RTC_RIER_SNOOPIER_Pos)
#define | RTC_RIIR_AIF_Pos (0)
#define | RTC_RIIR_AIF_Msk (0x1ul << RTC_RIIR_AIF_Pos)
#define | RTC_RIIR_TIF_Pos (1)
#define | RTC_RIIR_TIF_Msk (0x1ul << RTC_RIIR_TIF_Pos)
#define | RTC_RIIR_SNOOPIF_Pos (2)
#define | RTC_RIIR_SNOOPIF_Msk (0x1ul << RTC_RIIR_SNOOPIF_Pos)
#define | RTC_TTR_TTR_Pos (0)
#define | RTC_TTR_TTR_Msk (0x7ul << RTC_TTR_TTR_Pos)
#define | RTC_TTR_TWKE_Pos (3)
#define | RTC_TTR_TWKE_Msk (0x1ul << RTC_TTR_TWKE_Pos)
#define | RTC_SPRCTL_SNOOPEN_Pos (0)
#define | RTC_SPRCTL_SNOOPEN_Msk (0x1ul << RTC_SPRCTL_SNOOPEN_Pos)
#define | RTC_SPRCTL_SNOOPEDGE_Pos (1)
#define | RTC_SPRCTL_SNOOPEDGE_Msk (0x1ul << RTC_SPRCTL_SNOOPEDGE_Pos)
#define | RTC_SPR0_SPARE_Pos (0)
#define | RTC_SPR0_SPARE_Msk (0xfffffffful << RTC_SPR0_SPARE_Pos)
#define | RTC_SPR1_SPARE_Pos (0)
#define | RTC_SPR1_SPARE_Msk (0xfffffffful << RTC_SPR1_SPARE_Pos)
#define | RTC_SPR2_SPARE_Pos (0)
#define | RTC_SPR2_SPARE_Msk (0xfffffffful << RTC_SPR2_SPARE_Pos)
#define | RTC_SPR3_SPARE_Pos (0)
#define | RTC_SPR3_SPARE_Msk (0xfffffffful << RTC_SPR3_SPARE_Pos)
#define | RTC_SPR4_SPARE_Pos (0)
#define | RTC_SPR4_SPARE_Msk (0xfffffffful << RTC_SPR4_SPARE_Pos)
#define | RTC_SPR5_SPARE_Pos (0)
#define | RTC_SPR5_SPARE_Msk (0xfffffffful << RTC_SPR5_SPARE_Pos)
#define | RTC_SPR6_SPARE_Pos (0)
#define | RTC_SPR6_SPARE_Msk (0xfffffffful << RTC_SPR6_SPARE_Pos)
#define | RTC_SPR7_SPARE_Pos (0)
#define | RTC_SPR7_SPARE_Msk (0xfffffffful << RTC_SPR7_SPARE_Pos)
#define | RTC_SPR8_SPARE_Pos (0)
#define | RTC_SPR8_SPARE_Msk (0xfffffffful << RTC_SPR8_SPARE_Pos)
#define | RTC_SPR9_SPARE_Pos (0)
#define | RTC_SPR9_SPARE_Msk (0xfffffffful << RTC_SPR9_SPARE_Pos)
#define | RTC_SPR10_SPARE_Pos (0)
#define | RTC_SPR10_SPARE_Msk (0xfffffffful << RTC_SPR10_SPARE_Pos)
#define | RTC_SPR11_SPARE_Pos (0)
#define | RTC_SPR11_SPARE_Msk (0xfffffffful << RTC_SPR11_SPARE_Pos)
#define | RTC_SPR12_SPARE_Pos (0)
#define | RTC_SPR12_SPARE_Msk (0xfffffffful << RTC_SPR12_SPARE_Pos)
#define | RTC_SPR13_SPARE_Pos (0)
#define | RTC_SPR13_SPARE_Msk (0xfffffffful << RTC_SPR13_SPARE_Pos)
#define | RTC_SPR14_SPARE_Pos (0)
#define | RTC_SPR14_SPARE_Msk (0xfffffffful << RTC_SPR14_SPARE_Pos)
#define | RTC_SPR15_SPARE_Pos (0)
#define | RTC_SPR15_SPARE_Msk (0xfffffffful << RTC_SPR15_SPARE_Pos)
#define | RTC_SPR16_SPARE_Pos (0)
#define | RTC_SPR16_SPARE_Msk (0xfffffffful << RTC_SPR16_SPARE_Pos)
#define | RTC_SPR17_SPARE_Pos (0)
#define | RTC_SPR17_SPARE_Msk (0xfffffffful << RTC_SPR17_SPARE_Pos)
#define | RTC_SPR18_SPARE_Pos (0)
#define | RTC_SPR18_SPARE_Msk (0xfffffffful << RTC_SPR18_SPARE_Pos)
#define | RTC_SPR19_SPARE_Pos (0)
#define | RTC_SPR19_SPARE_Msk (0xfffffffful << RTC_SPR19_SPARE_Pos)
#define | SC_DAT_DAT_Pos (0)
#define | SC_DAT_DAT_Msk (0xfful << SC_DAT_DAT_Pos)
#define | SC_CTL_SC_CEN_Pos (0)
#define | SC_CTL_SC_CEN_Msk (0x1ul << SC_CTL_SC_CEN_Pos)
#define | SC_CTL_DIS_RX_Pos (1)
#define | SC_CTL_DIS_RX_Msk (0x1ul << SC_CTL_DIS_RX_Pos)
#define | SC_CTL_DIS_TX_Pos (2)
#define | SC_CTL_DIS_TX_Msk (0x1ul << SC_CTL_DIS_TX_Pos)
#define | SC_CTL_AUTO_CON_EN_Pos (3)
#define | SC_CTL_AUTO_CON_EN_Msk (0x1ul << SC_CTL_AUTO_CON_EN_Pos)
#define | SC_CTL_CON_SEL_Pos (4)
#define | SC_CTL_CON_SEL_Msk (0x3ul << SC_CTL_CON_SEL_Pos)
#define | SC_CTL_RX_FTRI_LEV_Pos (6)
#define | SC_CTL_RX_FTRI_LEV_Msk (0x3ul << SC_CTL_RX_FTRI_LEV_Pos)
#define | SC_CTL_BGT_Pos (8)
#define | SC_CTL_BGT_Msk (0x1ful << SC_CTL_BGT_Pos)
#define | SC_CTL_TMR_SEL_Pos (13)
#define | SC_CTL_TMR_SEL_Msk (0x3ul << SC_CTL_TMR_SEL_Pos)
#define | SC_CTL_SLEN_Pos (15)
#define | SC_CTL_SLEN_Msk (0x1ul << SC_CTL_SLEN_Pos)
#define | SC_CTL_RX_ERETRY_Pos (16)
#define | SC_CTL_RX_ERETRY_Msk (0x7ul << SC_CTL_RX_ERETRY_Pos)
#define | SC_CTL_RX_ERETRY_EN_Pos (19)
#define | SC_CTL_RX_ERETRY_EN_Msk (0x1ul << SC_CTL_RX_ERETRY_EN_Pos)
#define | SC_CTL_TX_ERETRY_Pos (20)
#define | SC_CTL_TX_ERETRY_Msk (0x7ul << SC_CTL_TX_ERETRY_Pos)
#define | SC_CTL_TX_ERETRY_EN_Pos (23)
#define | SC_CTL_TX_ERETRY_EN_Msk (0x1ul << SC_CTL_TX_ERETRY_EN_Pos)
#define | SC_CTL_CD_DEB_SEL_Pos (24)
#define | SC_CTL_CD_DEB_SEL_Msk (0x3ul << SC_CTL_CD_DEB_SEL_Pos)
#define | SC_ALTCTL_TX_RST_Pos (0)
#define | SC_ALTCTL_TX_RST_Msk (0x1ul << SC_ALTCTL_TX_RST_Pos)
#define | SC_ALTCTL_RX_RST_Pos (1)
#define | SC_ALTCTL_RX_RST_Msk (0x1ul << SC_ALTCTL_RX_RST_Pos)
#define | SC_ALTCTL_DACT_EN_Pos (2)
#define | SC_ALTCTL_DACT_EN_Msk (0x1ul << SC_ALTCTL_DACT_EN_Pos)
#define | SC_ALTCTL_ACT_EN_Pos (3)
#define | SC_ALTCTL_ACT_EN_Msk (0x1ul << SC_ALTCTL_ACT_EN_Pos)
#define | SC_ALTCTL_WARST_EN_Pos (4)
#define | SC_ALTCTL_WARST_EN_Msk (0x1ul << SC_ALTCTL_WARST_EN_Pos)
#define | SC_ALTCTL_TMR0_SEN_Pos (5)
#define | SC_ALTCTL_TMR0_SEN_Msk (0x1ul << SC_ALTCTL_TMR0_SEN_Pos)
#define | SC_ALTCTL_TMR1_SEN_Pos (6)
#define | SC_ALTCTL_TMR1_SEN_Msk (0x1ul << SC_ALTCTL_TMR1_SEN_Pos)
#define | SC_ALTCTL_TMR2_SEN_Pos (7)
#define | SC_ALTCTL_TMR2_SEN_Msk (0x1ul << SC_ALTCTL_TMR2_SEN_Pos)
#define | SC_ALTCTL_INIT_SEL_Pos (8)
#define | SC_ALTCTL_INIT_SEL_Msk (0x3ul << SC_ALTCTL_INIT_SEL_Pos)
#define | SC_ALTCTL_RX_BGT_EN_Pos (12)
#define | SC_ALTCTL_RX_BGT_EN_Msk (0x1ul << SC_ALTCTL_RX_BGT_EN_Pos)
#define | SC_ALTCTL_TMR0_ATV_Pos (13)
#define | SC_ALTCTL_TMR0_ATV_Msk (0x1ul << SC_ALTCTL_TMR0_ATV_Pos)
#define | SC_ALTCTL_TMR1_ATV_Pos (14)
#define | SC_ALTCTL_TMR1_ATV_Msk (0x1ul << SC_ALTCTL_TMR1_ATV_Pos)
#define | SC_ALTCTL_TMR2_ATV_Pos (15)
#define | SC_ALTCTL_TMR2_ATV_Msk (0x1ul << SC_ALTCTL_TMR2_ATV_Pos)
#define | SC_EGTR_EGT_Pos (0)
#define | SC_EGTR_EGT_Msk (0xfful << SC_EGTR_EGT_Pos)
#define | SC_RFTMR_RFTM_Pos (0)
#define | SC_RFTMR_RFTM_Msk (0x1fful << SC_RFTMR_RFTM_Pos)
#define | SC_ETUCR_ETU_RDIV_Pos (0)
#define | SC_ETUCR_ETU_RDIV_Msk (0xffful << SC_ETUCR_ETU_RDIV_Pos)
#define | SC_ETUCR_COMPEN_EN_Pos (15)
#define | SC_ETUCR_COMPEN_EN_Msk (0x1ul << SC_ETUCR_COMPEN_EN_Pos)
#define | SC_IER_RDA_IE_Pos (0)
#define | SC_IER_RDA_IE_Msk (0x1ul << SC_IER_RDA_IE_Pos)
#define | SC_IER_TBE_IE_Pos (1)
#define | SC_IER_TBE_IE_Msk (0x1ul << SC_IER_TBE_IE_Pos)
#define | SC_IER_TERR_IE_Pos (2)
#define | SC_IER_TERR_IE_Msk (0x1ul << SC_IER_TERR_IE_Pos)
#define | SC_IER_TMR0_IE_Pos (3)
#define | SC_IER_TMR0_IE_Msk (0x1ul << SC_IER_TMR0_IE_Pos)
#define | SC_IER_TMR1_IE_Pos (4)
#define | SC_IER_TMR1_IE_Msk (0x1ul << SC_IER_TMR1_IE_Pos)
#define | SC_IER_TMR2_IE_Pos (5)
#define | SC_IER_TMR2_IE_Msk (0x1ul << SC_IER_TMR2_IE_Pos)
#define | SC_IER_BGT_IE_Pos (6)
#define | SC_IER_BGT_IE_Msk (0x1ul << SC_IER_BGT_IE_Pos)
#define | SC_IER_CD_IE_Pos (7)
#define | SC_IER_CD_IE_Msk (0x1ul << SC_IER_CD_IE_Pos)
#define | SC_IER_INIT_IE_Pos (8)
#define | SC_IER_INIT_IE_Msk (0x1ul << SC_IER_INIT_IE_Pos)
#define | SC_IER_RTMR_IE_Pos (9)
#define | SC_IER_RTMR_IE_Msk (0x1ul << SC_IER_RTMR_IE_Pos)
#define | SC_IER_ACON_ERR_IE_Pos (10)
#define | SC_IER_ACON_ERR_IE_Msk (0x1ul << SC_IER_ACON_ERR_IE_Pos)
#define | SC_ISR_RDA_IS_Pos (0)
#define | SC_ISR_RDA_IS_Msk (0x1ul << SC_ISR_RDA_IS_Pos)
#define | SC_ISR_TBE_IS_Pos (1)
#define | SC_ISR_TBE_IS_Msk (0x1ul << SC_ISR_TBE_IS_Pos)
#define | SC_ISR_TERR_IS_Pos (2)
#define | SC_ISR_TERR_IS_Msk (0x1ul << SC_ISR_TERR_IS_Pos)
#define | SC_ISR_TMR0_IS_Pos (3)
#define | SC_ISR_TMR0_IS_Msk (0x1ul << SC_ISR_TMR0_IS_Pos)
#define | SC_ISR_TMR1_IS_Pos (4)
#define | SC_ISR_TMR1_IS_Msk (0x1ul << SC_ISR_TMR1_IS_Pos)
#define | SC_ISR_TMR2_IS_Pos (5)
#define | SC_ISR_TMR2_IS_Msk (0x1ul << SC_ISR_TMR2_IS_Pos)
#define | SC_ISR_BGT_IS_Pos (6)
#define | SC_ISR_BGT_IS_Msk (0x1ul << SC_ISR_BGT_IS_Pos)
#define | SC_ISR_CD_IS_Pos (7)
#define | SC_ISR_CD_IS_Msk (0x1ul << SC_ISR_CD_IS_Pos)
#define | SC_ISR_INIT_IS_Pos (8)
#define | SC_ISR_INIT_IS_Msk (0x1ul << SC_ISR_INIT_IS_Pos)
#define | SC_ISR_RTMR_IS_Pos (9)
#define | SC_ISR_RTMR_IS_Msk (0x1ul << SC_ISR_RTMR_IS_Pos)
#define | SC_ISR_ACON_ERR_IS_Pos (10)
#define | SC_ISR_ACON_ERR_IS_Msk (0x1ul << SC_ISR_ACON_ERR_IS_Pos)
#define | SC_TRSR_RX_OVER_F_Pos (0)
#define | SC_TRSR_RX_OVER_F_Msk (0x1ul << SC_TRSR_RX_OVER_F_Pos)
#define | SC_TRSR_RX_EMPTY_F_Pos (1)
#define | SC_TRSR_RX_EMPTY_F_Msk (0x1ul << SC_TRSR_RX_EMPTY_F_Pos)
#define | SC_TRSR_RX_FULL_F_Pos (2)
#define | SC_TRSR_RX_FULL_F_Msk (0x1ul << SC_TRSR_RX_FULL_F_Pos)
#define | SC_TRSR_RX_EPA_F_Pos (4)
#define | SC_TRSR_RX_EPA_F_Msk (0x1ul << SC_TRSR_RX_EPA_F_Pos)
#define | SC_TRSR_RX_EFR_F_Pos (5)
#define | SC_TRSR_RX_EFR_F_Msk (0x1ul << SC_TRSR_RX_EFR_F_Pos)
#define | SC_TRSR_RX_EBR_F_Pos (6)
#define | SC_TRSR_RX_EBR_F_Msk (0x1ul << SC_TRSR_RX_EBR_F_Pos)
#define | SC_TRSR_TX_OVER_F_Pos (8)
#define | SC_TRSR_TX_OVER_F_Msk (0x1ul << SC_TRSR_TX_OVER_F_Pos)
#define | SC_TRSR_TX_EMPTY_F_Pos (9)
#define | SC_TRSR_TX_EMPTY_F_Msk (0x1ul << SC_TRSR_TX_EMPTY_F_Pos)
#define | SC_TRSR_TX_FULL_F_Pos (10)
#define | SC_TRSR_TX_FULL_F_Msk (0x1ul << SC_TRSR_TX_FULL_F_Pos)
#define | SC_TRSR_RX_POINT_F_Pos (16)
#define | SC_TRSR_RX_POINT_F_Msk (0x7ul << SC_TRSR_RX_POINT_F_Pos)
#define | SC_TRSR_RX_REERR_Pos (21)
#define | SC_TRSR_RX_REERR_Msk (0x1ul << SC_TRSR_RX_REERR_Pos)
#define | SC_TRSR_RX_OVER_ERETRY_Pos (22)
#define | SC_TRSR_RX_OVER_ERETRY_Msk (0x1ul << SC_TRSR_RX_OVER_ERETRY_Pos)
#define | SC_TRSR_RX_ATV_Pos (23)
#define | SC_TRSR_RX_ATV_Msk (0x1ul << SC_TRSR_RX_ATV_Pos)
#define | SC_TRSR_TX_POINT_F_Pos (24)
#define | SC_TRSR_TX_POINT_F_Msk (0x7ul << SC_TRSR_TX_POINT_F_Pos)
#define | SC_TRSR_TX_REERR_Pos (29)
#define | SC_TRSR_TX_REERR_Msk (0x1ul << SC_TRSR_TX_REERR_Pos)
#define | SC_TRSR_TX_OVER_ERETRY_Pos (30)
#define | SC_TRSR_TX_OVER_ERETRY_Msk (0x1ul << SC_TRSR_TX_OVER_ERETRY_Pos)
#define | SC_TRSR_TX_ATV_Pos (31)
#define | SC_TRSR_TX_ATV_Msk (0x1ul << SC_TRSR_TX_ATV_Pos)
#define | SC_PINCSR_POW_EN_Pos (0)
#define | SC_PINCSR_POW_EN_Msk (0x1ul << SC_PINCSR_POW_EN_Pos)
#define | SC_PINCSR_SC_RST_Pos (1)
#define | SC_PINCSR_SC_RST_Msk (0x1ul << SC_PINCSR_SC_RST_Pos)
#define | SC_PINCSR_CD_REM_F_Pos (2)
#define | SC_PINCSR_CD_REM_F_Msk (0x1ul << SC_PINCSR_CD_REM_F_Pos)
#define | SC_PINCSR_CD_INS_F_Pos (3)
#define | SC_PINCSR_CD_INS_F_Msk (0x1ul << SC_PINCSR_CD_INS_F_Pos)
#define | SC_PINCSR_CD_PIN_ST_Pos (4)
#define | SC_PINCSR_CD_PIN_ST_Msk (0x1ul << SC_PINCSR_CD_PIN_ST_Pos)
#define | SC_PINCSR_CLK_KEEP_Pos (6)
#define | SC_PINCSR_CLK_KEEP_Msk (0x1ul << SC_PINCSR_CLK_KEEP_Pos)
#define | SC_PINCSR_ADAC_CD_EN_Pos (7)
#define | SC_PINCSR_ADAC_CD_EN_Msk (0x1ul << SC_PINCSR_ADAC_CD_EN_Pos)
#define | SC_PINCSR_SC_OEN_ST_Pos (8)
#define | SC_PINCSR_SC_OEN_ST_Msk (0x1ul << SC_PINCSR_SC_OEN_ST_Pos)
#define | SC_PINCSR_SC_DATA_O_Pos (9)
#define | SC_PINCSR_SC_DATA_O_Msk (0x1ul << SC_PINCSR_SC_DATA_O_Pos)
#define | SC_PINCSR_CD_LEV_Pos (10)
#define | SC_PINCSR_CD_LEV_Msk (0x1ul << SC_PINCSR_CD_LEV_Pos)
#define | SC_PINCSR_POW_INV_Pos (11)
#define | SC_PINCSR_POW_INV_Msk (0x1ul << SC_PINCSR_POW_INV_Pos)
#define | SC_PINCSR_SC_DATA_I_ST_Pos (16)
#define | SC_PINCSR_SC_DATA_I_ST_Msk (0x1ul << SC_PINCSR_SC_DATA_I_ST_Pos)
#define | SC_TMR0_CNT_Pos (0)
#define | SC_TMR0_CNT_Msk (0xfffffful << SC_TMR0_CNT_Pos)
#define | SC_TMR0_MODE_Pos (24)
#define | SC_TMR0_MODE_Msk (0xful << SC_TMR0_MODE_Pos)
#define | SC_TMR1_CNT_Pos (0)
#define | SC_TMR1_CNT_Msk (0xfful << SC_TMR1_CNT_Pos)
#define | SC_TMR1_MODE_Pos (24)
#define | SC_TMR1_MODE_Msk (0xful << SC_TMR1_MODE_Pos)
#define | SC_TMR2_CNT_Pos (0)
#define | SC_TMR2_CNT_Msk (0xfful << SC_TMR2_CNT_Pos)
#define | SC_TMR2_MODE_Pos (24)
#define | SC_TMR2_MODE_Msk (0xful << SC_TMR2_MODE_Pos)
#define | SC_UACTL_UA_MODE_EN_Pos (0)
#define | SC_UACTL_UA_MODE_EN_Msk (0x1ul << SC_UACTL_UA_MODE_EN_Pos)
#define | SC_UACTL_DATA_LEN_Pos (4)
#define | SC_UACTL_DATA_LEN_Msk (0x3ul << SC_UACTL_DATA_LEN_Pos)
#define | SC_UACTL_PBDIS_Pos (6)
#define | SC_UACTL_PBDIS_Msk (0x1ul << SC_UACTL_PBDIS_Pos)
#define | SC_UACTL_OPE_Pos (7)
#define | SC_UACTL_OPE_Msk (0x1ul << SC_UACTL_OPE_Pos)
#define | SC_TDRA_TDR0_Pos (0)
#define | SC_TDRA_TDR0_Msk (0xfffffful << SC_TDRA_TDR0_Pos)
#define | SC_TDRB_TDR1_Pos (0)
#define | SC_TDRB_TDR1_Msk (0xfful << SC_TDRB_TDR1_Pos)
#define | SC_TDRB_TDR2_Pos (8)
#define | SC_TDRB_TDR2_Msk (0xfful << SC_TDRB_TDR2_Pos)
#define | SPI_CTL_GO_BUSY_Pos (0)
#define | SPI_CTL_GO_BUSY_Msk (0x1ul << SPI_CTL_GO_BUSY_Pos)
#define | SPI_CTL_RX_NEG_Pos (1)
#define | SPI_CTL_RX_NEG_Msk (0x1ul << SPI_CTL_RX_NEG_Pos)
#define | SPI_CTL_TX_NEG_Pos (2)
#define | SPI_CTL_TX_NEG_Msk (0x1ul << SPI_CTL_TX_NEG_Pos)
#define | SPI_CTL_TX_BIT_LEN_Pos (3)
#define | SPI_CTL_TX_BIT_LEN_Msk (0x1ful << SPI_CTL_TX_BIT_LEN_Pos)
#define | SPI_CTL_LSB_Pos (10)
#define | SPI_CTL_LSB_Msk (0x1ul << SPI_CTL_LSB_Pos)
#define | SPI_CTL_CLKP_Pos (11)
#define | SPI_CTL_CLKP_Msk (0x1ul << SPI_CTL_CLKP_Pos)
#define | SPI_CTL_SP_CYCLE_Pos (12)
#define | SPI_CTL_SP_CYCLE_Msk (0xful << SPI_CTL_SP_CYCLE_Pos)
#define | SPI_CTL_INTEN_Pos (17)
#define | SPI_CTL_INTEN_Msk (0x1ul << SPI_CTL_INTEN_Pos)
#define | SPI_CTL_SLAVE_Pos (18)
#define | SPI_CTL_SLAVE_Msk (0x1ul << SPI_CTL_SLAVE_Pos)
#define | SPI_CTL_REORDER_Pos (19)
#define | SPI_CTL_REORDER_Msk (0x1ul << SPI_CTL_REORDER_Pos)
#define | SPI_CTL_FIFOM_Pos (21)
#define | SPI_CTL_FIFOM_Msk (0x1ul << SPI_CTL_FIFOM_Pos)
#define | SPI_CTL_TWOB_Pos (22)
#define | SPI_CTL_TWOB_Msk (0x1ul << SPI_CTL_TWOB_Pos)
#define | SPI_CTL_VARCLK_EN_Pos (23)
#define | SPI_CTL_VARCLK_EN_Msk (0x1ul << SPI_CTL_VARCLK_EN_Pos)
#define | SPI_CTL_DUAL_IO_DIR_Pos (28)
#define | SPI_CTL_DUAL_IO_DIR_Msk (0x1ul << SPI_CTL_DUAL_IO_DIR_Pos)
#define | SPI_CTL_DUAL_IO_EN_Pos (29)
#define | SPI_CTL_DUAL_IO_EN_Msk (0x1ul << SPI_CTL_DUAL_IO_EN_Pos)
#define | SPI_CTL_WKEUP_EN_Pos (31)
#define | SPI_CTL_WKEUP_EN_Msk (0x1ul << SPI_CTL_WKEUP_EN_Pos)
#define | SPI_STATUS_RX_EMPTY_Pos (0)
#define | SPI_STATUS_RX_EMPTY_Msk (0x1ul << SPI_STATUS_RX_EMPTY_Pos)
#define | SPI_STATUS_RX_FULL_Pos (1)
#define | SPI_STATUS_RX_FULL_Msk (0x1ul << SPI_STATUS_RX_FULL_Pos)
#define | SPI_STATUS_TX_EMPTY_Pos (2)
#define | SPI_STATUS_TX_EMPTY_Msk (0x1ul << SPI_STATUS_TX_EMPTY_Pos)
#define | SPI_STATUS_TX_FULL_Pos (3)
#define | SPI_STATUS_TX_FULL_Msk (0x1ul << SPI_STATUS_TX_FULL_Pos)
#define | SPI_STATUS_LTRIG_FLAG_Pos (4)
#define | SPI_STATUS_LTRIG_FLAG_Msk (0x1ul << SPI_STATUS_LTRIG_FLAG_Pos)
#define | SPI_STATUS_SLV_START_INTSTS_Pos (6)
#define | SPI_STATUS_SLV_START_INTSTS_Msk (0x1ul << SPI_STATUS_SLV_START_INTSTS_Pos)
#define | SPI_STATUS_INTSTS_Pos (7)
#define | SPI_STATUS_INTSTS_Msk (0x1ul << SPI_STATUS_INTSTS_Pos)
#define | SPI_STATUS_RXINT_STS_Pos (8)
#define | SPI_STATUS_RXINT_STS_Msk (0x1ul << SPI_STATUS_RXINT_STS_Pos)
#define | SPI_STATUS_RX_OVER_RUN_Pos (9)
#define | SPI_STATUS_RX_OVER_RUN_Msk (0x1ul << SPI_STATUS_RX_OVER_RUN_Pos)
#define | SPI_STATUS_TXINT_STS_Pos (10)
#define | SPI_STATUS_TXINT_STS_Msk (0x1ul << SPI_STATUS_TXINT_STS_Pos)
#define | SPI_STATUS_TIME_OUT_STS_Pos (12)
#define | SPI_STATUS_TIME_OUT_STS_Msk (0x1ul << SPI_STATUS_TIME_OUT_STS_Pos)
#define | SPI_STATUS_RX_FIFO_CNT_Pos (16)
#define | SPI_STATUS_RX_FIFO_CNT_Msk (0xful << SPI_STATUS_RX_FIFO_CNT_Pos)
#define | SPI_STATUS_TX_FIFO_CNT_Pos (20)
#define | SPI_STATUS_TX_FIFO_CNT_Msk (0xful << SPI_STATUS_TX_FIFO_CNT_Pos)
#define | SPI_CLKDIV_DIVIDER1_Pos (0)
#define | SPI_CLKDIV_DIVIDER1_Msk (0xfful << SPI_CLKDIV_DIVIDER1_Pos)
#define | SPI_CLKDIV_DIVIDER2_Pos (16)
#define | SPI_CLKDIV_DIVIDER2_Msk (0xfful << SPI_CLKDIV_DIVIDER2_Pos)
#define | SPI_SSR_SSR_Pos (0)
#define | SPI_SSR_SSR_Msk (0x3ul << SPI_SSR_SSR_Pos)
#define | SPI_SSR_SS_LVL_Pos (2)
#define | SPI_SSR_SS_LVL_Msk (0x1ul << SPI_SSR_SS_LVL_Pos)
#define | SPI_SSR_AUTOSS_Pos (3)
#define | SPI_SSR_AUTOSS_Msk (0x1ul << SPI_SSR_AUTOSS_Pos)
#define | SPI_SSR_SS_LTRIG_Pos (4)
#define | SPI_SSR_SS_LTRIG_Msk (0x1ul << SPI_SSR_SS_LTRIG_Pos)
#define | SPI_SSR_NOSLVSEL_Pos (5)
#define | SPI_SSR_NOSLVSEL_Msk (0x1ul << SPI_SSR_NOSLVSEL_Pos)
#define | SPI_SSR_SLV_ABORT_Pos (8)
#define | SPI_SSR_SLV_ABORT_Msk (0x1ul << SPI_SSR_SLV_ABORT_Pos)
#define | SPI_SSR_SSTA_INTEN_Pos (9)
#define | SPI_SSR_SSTA_INTEN_Msk (0x1ul << SPI_SSR_SSTA_INTEN_Pos)
#define | SPI_SSR_SS_INT_OPT_Pos (16)
#define | SPI_SSR_SS_INT_OPT_Msk (0x1ul << SPI_SSR_SS_INT_OPT_Pos)
#define | SPI_RX0_RDATA_Pos (0)
#define | SPI_RX0_RDATA_Msk (0xfffffffful << SPI_RX0_RDATA_Pos)
#define | SPI_RX1_RDATA_Pos (0)
#define | SPI_RX1_RDATA_Msk (0xfffffffful << SPI_RX1_RDATA_Pos)
#define | SPI_TX0_TDATA_Pos (0)
#define | SPI_TX0_TDATA_Msk (0xfffffffful << SPI_TX0_TDATA_Pos)
#define | SPI_TX1_TDATA_Pos (0)
#define | SPI_TX1_TDATA_Msk (0xfffffffful << SPI_TX1_TDATA_Pos)
#define | SPI_VARCLK_VARCLK_Pos (0)
#define | SPI_VARCLK_VARCLK_Msk (0xfffffffful << SPI_VARCLK_VARCLK_Pos)
#define | SPI_DMA_TX_DMA_EN_Pos (0)
#define | SPI_DMA_TX_DMA_EN_Msk (0x1ul << SPI_DMA_TX_DMA_EN_Pos)
#define | SPI_DMA_RX_DMA_EN_Pos (1)
#define | SPI_DMA_RX_DMA_EN_Msk (0x1ul << SPI_DMA_RX_DMA_EN_Pos)
#define | SPI_DMA_PDMA_RST_Pos (2)
#define | SPI_DMA_PDMA_RST_Msk (0x1ul << SPI_DMA_PDMA_RST_Pos)
#define | SPI_FFCTL_RX_CLR_Pos (0)
#define | SPI_FFCTL_RX_CLR_Msk (0x1ul << SPI_FFCTL_RX_CLR_Pos)
#define | SPI_FFCTL_TX_CLR_Pos (1)
#define | SPI_FFCTL_TX_CLR_Msk (0x1ul << SPI_FFCTL_TX_CLR_Pos)
#define | SPI_FFCTL_RX_INTEN_Pos (2)
#define | SPI_FFCTL_RX_INTEN_Msk (0x1ul << SPI_FFCTL_RX_INTEN_Pos)
#define | SPI_FFCTL_TX_INTEN_Pos (3)
#define | SPI_FFCTL_TX_INTEN_Msk (0x1ul << SPI_FFCTL_TX_INTEN_Pos)
#define | SPI_FFCTL_RXOVR_INTEN_Pos (4)
#define | SPI_FFCTL_RXOVR_INTEN_Msk (0x1ul << SPI_FFCTL_RXOVR_INTEN_Pos)
#define | SPI_FFCTL_TIMEOUT_EN_Pos (7)
#define | SPI_FFCTL_TIMEOUT_EN_Msk (0x1ul << SPI_FFCTL_TIMEOUT_EN_Pos)
#define | SPI_FFCTL_RX_THRESHOLD_Pos (24)
#define | SPI_FFCTL_RX_THRESHOLD_Msk (0x7ul << SPI_FFCTL_RX_THRESHOLD_Pos)
#define | SPI_FFCTL_TX_THRESHOLD_Pos (28)
#define | SPI_FFCTL_TX_THRESHOLD_Msk (0x7ul << SPI_FFCTL_TX_THRESHOLD_Pos)
#define | TIMER_CTL_TMR_EN_Pos (0)
#define | TIMER_CTL_TMR_EN_Msk (0x1ul << TIMER_CTL_TMR_EN_Pos)
#define | TIMER_CTL_SW_RST_Pos (1)
#define | TIMER_CTL_SW_RST_Msk (0x1ul << TIMER_CTL_SW_RST_Pos)
#define | TIMER_CTL_WAKE_EN_Pos (2)
#define | TIMER_CTL_WAKE_EN_Msk (0x1ul << TIMER_CTL_WAKE_EN_Pos)
#define | TIMER_CTL_DBGACK_EN_Pos (3)
#define | TIMER_CTL_DBGACK_EN_Msk (0x1ul << TIMER_CTL_DBGACK_EN_Pos)
#define | TIMER_CTL_MODE_SEL_Pos (4)
#define | TIMER_CTL_MODE_SEL_Msk (0x3ul << TIMER_CTL_MODE_SEL_Pos)
#define | TIMER_CTL_ACMP_EN_TMR_Pos (6)
#define | TIMER_CTL_ACMP_EN_TMR_Msk (0x1ul << TIMER_CTL_ACMP_EN_TMR_Pos)
#define | TIMER_CTL_TMR_ACT_Pos (7)
#define | TIMER_CTL_TMR_ACT_Msk (0x1ul << TIMER_CTL_TMR_ACT_Pos)
#define | TIMER_CTL_ADC_TEEN_Pos (8)
#define | TIMER_CTL_ADC_TEEN_Msk (0x1ul << TIMER_CTL_ADC_TEEN_Pos)
#define | TIMER_CTL_DAC_TEEN_Pos (9)
#define | TIMER_CTL_DAC_TEEN_Msk (0x1ul << TIMER_CTL_DAC_TEEN_Pos)
#define | TIMER_CTL_PDMA_TEEN_Pos (10)
#define | TIMER_CTL_PDMA_TEEN_Msk (0x1ul << TIMER_CTL_PDMA_TEEN_Pos)
#define | TIMER_CTL_CAP_TRG_EN_Pos (11)
#define | TIMER_CTL_CAP_TRG_EN_Msk (0x1ul << TIMER_CTL_CAP_TRG_EN_Pos)
#define | TIMER_CTL_EVENT_EN_Pos (12)
#define | TIMER_CTL_EVENT_EN_Msk (0x1ul << TIMER_CTL_EVENT_EN_Pos)
#define | TIMER_CTL_EVENT_EDGE_Pos (13)
#define | TIMER_CTL_EVENT_EDGE_Msk (0x1ul << TIMER_CTL_EVENT_EDGE_Pos)
#define | TIMER_CTL_EVNT_DEB_EN_Pos (14)
#define | TIMER_CTL_EVNT_DEB_EN_Msk (0x1ul << TIMER_CTL_EVNT_DEB_EN_Pos)
#define | TIMER_CTL_TCAP_EN_Pos (16)
#define | TIMER_CTL_TCAP_EN_Msk (0x1ul << TIMER_CTL_TCAP_EN_Pos)
#define | TIMER_CTL_TCAP_MODE_Pos (17)
#define | TIMER_CTL_TCAP_MODE_Msk (0x1ul << TIMER_CTL_TCAP_MODE_Pos)
#define | TIMER_CTL_TCAP_EDGE_Pos (18)
#define | TIMER_CTL_TCAP_EDGE_Msk (0x3ul << TIMER_CTL_TCAP_EDGE_Pos)
#define | TIMER_CTL_TCAP_CNT_MODE_Pos (20)
#define | TIMER_CTL_TCAP_CNT_MODE_Msk (0x1ul << TIMER_CTL_TCAP_CNT_MODE_Pos)
#define | TIMER_CTL_TCAP_DEB_EN_Pos (22)
#define | TIMER_CTL_TCAP_DEB_EN_Msk (0x1ul << TIMER_CTL_TCAP_DEB_EN_Pos)
#define | TIMER_CTL_INTR_TRG_EN_Pos (24)
#define | TIMER_CTL_INTR_TRG_EN_Msk (0x1ul << TIMER_CTL_INTR_TRG_EN_Pos)
#define | TIMER_CTL_INTR_TRG_MODE_Pos (25)
#define | TIMER_CTL_INTR_TRG_MODE_Msk (0x1ul << TIMER_CTL_INTR_TRG_MODE_Pos)
#define | TIMER_PRECNT_PRESCALE_CNT_Pos (0)
#define | TIMER_PRECNT_PRESCALE_CNT_Msk (0xfful << TIMER_PRECNT_PRESCALE_CNT_Pos)
#define | TIMER_CMPR_TMR_CMP_Pos (0)
#define | TIMER_CMPR_TMR_CMP_Msk (0xfffffful << TIMER_CMPR_TMR_CMP_Pos)
#define | TIMER_IER_TMR_IE_Pos (0)
#define | TIMER_IER_TMR_IE_Msk (0x1ul << TIMER_IER_TMR_IE_Pos)
#define | TIMER_IER_TCAP_IE_Pos (1)
#define | TIMER_IER_TCAP_IE_Msk (0x1ul << TIMER_IER_TCAP_IE_Pos)
#define | TIMER_ISR_TMR_IS_Pos (0)
#define | TIMER_ISR_TMR_IS_Msk (0x1ul << TIMER_ISR_TMR_IS_Pos)
#define | TIMER_ISR_TCAP_IS_Pos (1)
#define | TIMER_ISR_TCAP_IS_Msk (0x1ul << TIMER_ISR_TCAP_IS_Pos)
#define | TIMER_ISR_TMR_WAKE_STS_Pos (4)
#define | TIMER_ISR_TMR_WAKE_STS_Msk (0x1ul << TIMER_ISR_TMR_WAKE_STS_Pos)
#define | TIMER_ISR_NCAP_DET_STS_Pos (5)
#define | TIMER_ISR_NCAP_DET_STS_Msk (0x1ul << TIMER_ISR_NCAP_DET_STS_Pos)
#define | TIMER_ISR_TCAP_IS_FEDGE_Pos (6)
#define | TIMER_ISR_TCAP_IS_FEDGE_Msk (0x1ul << TIMER_ISR_TCAP_IS_FEDGE_Pos)
#define | TIMER_DR_TDR_Pos (0)
#define | TIMER_DR_TDR_Msk (0xfffffful << TIMER_DR_TDR_Pos)
#define | TIMER_DR_RSTACT_Pos (31)
#define | TIMER_DR_RSTACT_Msk (0x1ul << TIMER_DR_RSTACT_Pos)
#define | TIMER_TCAP_CAP_Pos (0)
#define | TIMER_TCAP_CAP_Msk (0xfffffful << TIMER_TCAP_CAP_Pos)
#define | TIMER_ECTL_EVNT_GEN_EN_Pos (0)
#define | TIMER_ECTL_EVNT_GEN_EN_Msk (0x1ul << TIMER_ECTL_EVNT_GEN_EN_Pos)
#define | TIMER_ECTL_EVNT_GEN_POL_Pos (1)
#define | TIMER_ECTL_EVNT_GEN_POL_Msk (0x1ul << TIMER_ECTL_EVNT_GEN_POL_Pos)
#define | TIMER_ECTL_EVNT_CNT_SRC_Pos (8)
#define | TIMER_ECTL_EVNT_CNT_SRC_Msk (0x1ul << TIMER_ECTL_EVNT_CNT_SRC_Pos)
#define | TIMER_ECTL_EVNT_GEN_SRC_Pos (12)
#define | TIMER_ECTL_EVNT_GEN_SRC_Msk (0x1ul << TIMER_ECTL_EVNT_GEN_SRC_Pos)
#define | TIMER_ECTL_CAP_SRC_Pos (16)
#define | TIMER_ECTL_CAP_SRC_Msk (0x1ul << TIMER_ECTL_CAP_SRC_Pos)
#define | TIMER_ECTL_EVNT_DROP_CNT_Pos (24)
#define | TIMER_ECTL_EVNT_DROP_CNT_Msk (0xfful << TIMER_ECTL_EVNT_DROP_CNT_Pos)
#define | UART_DAT_DAT_Pos (0)
#define | UART_DAT_DAT_Msk (0xfful << UART_DAT_DAT_Pos)
#define | UART_CTL_RX_RST_Pos (0)
#define | UART_CTL_RX_RST_Msk (0x1ul << UART_CTL_RX_RST_Pos)
#define | UART_CTL_TX_RST_Pos (1)
#define | UART_CTL_TX_RST_Msk (0x1ul << UART_CTL_TX_RST_Pos)
#define | UART_CTL_RX_DIS_Pos (2)
#define | UART_CTL_RX_DIS_Msk (0x1ul << UART_CTL_RX_DIS_Pos)
#define | UART_CTL_TX_DIS_Pos (3)
#define | UART_CTL_TX_DIS_Msk (0x1ul << UART_CTL_TX_DIS_Pos)
#define | UART_CTL_AUTO_RTS_EN_Pos (4)
#define | UART_CTL_AUTO_RTS_EN_Msk (0x1ul << UART_CTL_AUTO_RTS_EN_Pos)
#define | UART_CTL_AUTO_CTS_EN_Pos (5)
#define | UART_CTL_AUTO_CTS_EN_Msk (0x1ul << UART_CTL_AUTO_CTS_EN_Pos)
#define | UART_CTL_DMA_RX_EN_Pos (6)
#define | UART_CTL_DMA_RX_EN_Msk (0x1ul << UART_CTL_DMA_RX_EN_Pos)
#define | UART_CTL_DMA_TX_EN_Pos (7)
#define | UART_CTL_DMA_TX_EN_Msk (0x1ul << UART_CTL_DMA_TX_EN_Pos)
#define | UART_CTL_WAKE_CTS_EN_Pos (8)
#define | UART_CTL_WAKE_CTS_EN_Msk (0x1ul << UART_CTL_WAKE_CTS_EN_Pos)
#define | UART_CTL_WAKE_DATA_EN_Pos (9)
#define | UART_CTL_WAKE_DATA_EN_Msk (0x1ul << UART_CTL_WAKE_DATA_EN_Pos)
#define | UART_CTL_ABAUD_EN_Pos (12)
#define | UART_CTL_ABAUD_EN_Msk (0x1ul << UART_CTL_ABAUD_EN_Pos)
#define | UART_CTL_WAKE_THRESH_EN_Pos (17)
#define | UART_CTL_WAKE_THRESH_EN_Msk (0x1ul << UART_CTL_WAKE_THRESH_EN_Pos)
#define | UART_CTL_WAKE_RS485_AAD_EN_Pos (18)
#define | UART_CTL_WAKE_RS485_AAD_EN_Msk (0x1ul << UART_CTL_WAKE_RS485_AAD_EN_Pos)
#define | UART_CTL_PWM_SEL_Pos (24)
#define | UART_CTL_PWM_SEL_Msk (0x7ul << UART_CTL_PWM_SEL_Pos)
#define | UART_TLCTL_DATA_LEN_Pos (0)
#define | UART_TLCTL_DATA_LEN_Msk (0x3ul << UART_TLCTL_DATA_LEN_Pos)
#define | UART_TLCTL_NSB_Pos (2)
#define | UART_TLCTL_NSB_Msk (0x1ul << UART_TLCTL_NSB_Pos)
#define | UART_TLCTL_PBE_Pos (3)
#define | UART_TLCTL_PBE_Msk (0x1ul << UART_TLCTL_PBE_Pos)
#define | UART_TLCTL_EPE_Pos (4)
#define | UART_TLCTL_EPE_Msk (0x1ul << UART_TLCTL_EPE_Pos)
#define | UART_TLCTL_SPE_Pos (5)
#define | UART_TLCTL_SPE_Msk (0x1ul << UART_TLCTL_SPE_Pos)
#define | UART_TLCTL_BCB_Pos (6)
#define | UART_TLCTL_BCB_Msk (0x1ul << UART_TLCTL_BCB_Pos)
#define | UART_TLCTL_RFITL_Pos (8)
#define | UART_TLCTL_RFITL_Msk (0x3ul << UART_TLCTL_RFITL_Pos)
#define | UART_TLCTL_RTS_TRI_LEV_Pos (12)
#define | UART_TLCTL_RTS_TRI_LEV_Msk (0x3ul << UART_TLCTL_RTS_TRI_LEV_Pos)
#define | UART_IER_RDA_IE_Pos (0)
#define | UART_IER_RDA_IE_Msk (0x1ul << UART_IER_RDA_IE_Pos)
#define | UART_IER_THRE_IE_Pos (1)
#define | UART_IER_THRE_IE_Msk (0x1ul << UART_IER_THRE_IE_Pos)
#define | UART_IER_RLS_IE_Pos (2)
#define | UART_IER_RLS_IE_Msk (0x1ul << UART_IER_RLS_IE_Pos)
#define | UART_IER_MODEM_IE_Pos (3)
#define | UART_IER_MODEM_IE_Msk (0x1ul << UART_IER_MODEM_IE_Pos)
#define | UART_IER_RTO_IE_Pos (4)
#define | UART_IER_RTO_IE_Msk (0x1ul << UART_IER_RTO_IE_Pos)
#define | UART_IER_BUF_ERR_IE_Pos (5)
#define | UART_IER_BUF_ERR_IE_Msk (0x1ul << UART_IER_BUF_ERR_IE_Pos)
#define | UART_IER_WAKE_IE_Pos (6)
#define | UART_IER_WAKE_IE_Msk (0x1ul << UART_IER_WAKE_IE_Pos)
#define | UART_IER_ABAUD_IE_Pos (7)
#define | UART_IER_ABAUD_IE_Msk (0x1ul << UART_IER_ABAUD_IE_Pos)
#define | UART_IER_LIN_IE_Pos (8)
#define | UART_IER_LIN_IE_Msk (0x1ul << UART_IER_LIN_IE_Pos)
#define | UART_ISR_RDA_IS_Pos (0)
#define | UART_ISR_RDA_IS_Msk (0x1ul << UART_ISR_RDA_IS_Pos)
#define | UART_ISR_THRE_IS_Pos (1)
#define | UART_ISR_THRE_IS_Msk (0x1ul << UART_ISR_THRE_IS_Pos)
#define | UART_ISR_RLS_IS_Pos (2)
#define | UART_ISR_RLS_IS_Msk (0x1ul << UART_ISR_RLS_IS_Pos)
#define | UART_ISR_MODEM_IS_Pos (3)
#define | UART_ISR_MODEM_IS_Msk (0x1ul << UART_ISR_MODEM_IS_Pos)
#define | UART_ISR_RTO_IS_Pos (4)
#define | UART_ISR_RTO_IS_Msk (0x1ul << UART_ISR_RTO_IS_Pos)
#define | UART_ISR_BUF_ERR_IS_Pos (5)
#define | UART_ISR_BUF_ERR_IS_Msk (0x1ul << UART_ISR_BUF_ERR_IS_Pos)
#define | UART_ISR_WAKE_IS_Pos (6)
#define | UART_ISR_WAKE_IS_Msk (0x1ul << UART_ISR_WAKE_IS_Pos)
#define | UART_ISR_ABAUD_IS_Pos (7)
#define | UART_ISR_ABAUD_IS_Msk (0x1ul << UART_ISR_ABAUD_IS_Pos)
#define | UART_ISR_LIN_IS_Pos (8)
#define | UART_ISR_LIN_IS_Msk (0x1ul << UART_ISR_LIN_IS_Pos)
#define | UART_TRSR_RS485_ADDET_F_Pos (0)
#define | UART_TRSR_RS485_ADDET_F_Msk (0x1ul << UART_TRSR_RS485_ADDET_F_Pos)
#define | UART_TRSR_ABAUD_F_Pos (1)
#define | UART_TRSR_ABAUD_F_Msk (0x1ul << UART_TRSR_ABAUD_F_Pos)
#define | UART_TRSR_ABAUD_TOUT_F_Pos (2)
#define | UART_TRSR_ABAUD_TOUT_F_Msk (0x1ul << UART_TRSR_ABAUD_TOUT_F_Pos)
#define | UART_TRSR_LIN_TX_F_Pos (3)
#define | UART_TRSR_LIN_TX_F_Msk (0x1ul << UART_TRSR_LIN_TX_F_Pos)
#define | UART_TRSR_LIN_RX_F_Pos (4)
#define | UART_TRSR_LIN_RX_F_Msk (0x1ul << UART_TRSR_LIN_RX_F_Pos)
#define | UART_TRSR_BIT_ERR_F_Pos (5)
#define | UART_TRSR_BIT_ERR_F_Msk (0x1ul << UART_TRSR_BIT_ERR_F_Pos)
#define | UART_TRSR_LIN_RX_SYNC_ERR_F_Pos (8)
#define | UART_TRSR_LIN_RX_SYNC_ERR_F_Msk (0x1ul << UART_TRSR_LIN_RX_SYNC_ERR_F_Pos)
#define | UART_FSR_RX_OVER_F_Pos (0)
#define | UART_FSR_RX_OVER_F_Msk (0x1ul << UART_FSR_RX_OVER_F_Pos)
#define | UART_FSR_RX_EMPTY_F_Pos (1)
#define | UART_FSR_RX_EMPTY_F_Msk (0x1ul << UART_FSR_RX_EMPTY_F_Pos)
#define | UART_FSR_RX_FULL_F_Pos (2)
#define | UART_FSR_RX_FULL_F_Msk (0x1ul << UART_FSR_RX_FULL_F_Pos)
#define | UART_FSR_PE_F_Pos (4)
#define | UART_FSR_PE_F_Msk (0x1ul << UART_FSR_PE_F_Pos)
#define | UART_FSR_FE_F_Pos (5)
#define | UART_FSR_FE_F_Msk (0x1ul << UART_FSR_FE_F_Pos)
#define | UART_FSR_BI_F_Pos (6)
#define | UART_FSR_BI_F_Msk (0x1ul << UART_FSR_BI_F_Pos)
#define | UART_FSR_TX_OVER_F_Pos (8)
#define | UART_FSR_TX_OVER_F_Msk (0x1ul << UART_FSR_TX_OVER_F_Pos)
#define | UART_FSR_TX_EMPTY_F_Pos (9)
#define | UART_FSR_TX_EMPTY_F_Msk (0x1ul << UART_FSR_TX_EMPTY_F_Pos)
#define | UART_FSR_TX_FULL_F_Pos (10)
#define | UART_FSR_TX_FULL_F_Msk (0x1ul << UART_FSR_TX_FULL_F_Pos)
#define | UART_FSR_TE_F_Pos (11)
#define | UART_FSR_TE_F_Msk (0x1ul << UART_FSR_TE_F_Pos)
#define | UART_FSR_RX_POINTER_F_Pos (16)
#define | UART_FSR_RX_POINTER_F_Msk (0x1ful << UART_FSR_RX_POINTER_F_Pos)
#define | UART_FSR_TX_POINTER_F_Pos (24)
#define | UART_FSR_TX_POINTER_F_Msk (0x1ful << UART_FSR_TX_POINTER_F_Pos)
#define | UART_MCSR_LEV_RTS_Pos (0)
#define | UART_MCSR_LEV_RTS_Msk (0x1ul << UART_MCSR_LEV_RTS_Pos)
#define | UART_MCSR_RTS_ST_Pos (1)
#define | UART_MCSR_RTS_ST_Msk (0x1ul << UART_MCSR_RTS_ST_Pos)
#define | UART_MCSR_LEV_CTS_Pos (16)
#define | UART_MCSR_LEV_CTS_Msk (0x1ul << UART_MCSR_LEV_CTS_Pos)
#define | UART_MCSR_CTS_ST_Pos (17)
#define | UART_MCSR_CTS_ST_Msk (0x1ul << UART_MCSR_CTS_ST_Pos)
#define | UART_MCSR_DCT_F_Pos (18)
#define | UART_MCSR_DCT_F_Msk (0x1ul << UART_MCSR_DCT_F_Pos)
#define | UART_TMCTL_TOIC_Pos (0)
#define | UART_TMCTL_TOIC_Msk (0x1fful << UART_TMCTL_TOIC_Pos)
#define | UART_TMCTL_DLY_Pos (16)
#define | UART_TMCTL_DLY_Msk (0xfful << UART_TMCTL_DLY_Pos)
#define | UART_BAUD_BRD_Pos (0)
#define | UART_BAUD_BRD_Msk (0xfffful << UART_BAUD_BRD_Pos)
#define | UART_BAUD_DIV_16_EN_Pos (31)
#define | UART_BAUD_DIV_16_EN_Msk (0x1ul << UART_BAUD_DIV_16_EN_Pos)
#define | UART_IRCR_TX_SELECT_Pos (1)
#define | UART_IRCR_TX_SELECT_Msk (0x1ul << UART_IRCR_TX_SELECT_Pos)
#define | UART_IRCR_INV_TX_Pos (5)
#define | UART_IRCR_INV_TX_Msk (0x1ul << UART_IRCR_INV_TX_Pos)
#define | UART_IRCR_INV_RX_Pos (6)
#define | UART_IRCR_INV_RX_Msk (0x1ul << UART_IRCR_INV_RX_Pos)
#define | UART_ALT_CTL_LIN_TX_BCNT_Pos (0)
#define | UART_ALT_CTL_LIN_TX_BCNT_Msk (0x7ul << UART_ALT_CTL_LIN_TX_BCNT_Pos)
#define | UART_ALT_CTL_LIN_HEAD_SEL_Pos (4)
#define | UART_ALT_CTL_LIN_HEAD_SEL_Msk (0x3ul << UART_ALT_CTL_LIN_HEAD_SEL_Pos)
#define | UART_ALT_CTL_LIN_RX_EN_Pos (6)
#define | UART_ALT_CTL_LIN_RX_EN_Msk (0x1ul << UART_ALT_CTL_LIN_RX_EN_Pos)
#define | UART_ALT_CTL_LIN_TX_EN_Pos (7)
#define | UART_ALT_CTL_LIN_TX_EN_Msk (0x1ul << UART_ALT_CTL_LIN_TX_EN_Pos)
#define | UART_ALT_CTL_Bit_ERR_EN_Pos (8)
#define | UART_ALT_CTL_Bit_ERR_EN_Msk (0x1ul << UART_ALT_CTL_Bit_ERR_EN_Pos)
#define | UART_ALT_CTL_RS485_NMM_Pos (16)
#define | UART_ALT_CTL_RS485_NMM_Msk (0x1ul << UART_ALT_CTL_RS485_NMM_Pos)
#define | UART_ALT_CTL_RS485_AAD_Pos (17)
#define | UART_ALT_CTL_RS485_AAD_Msk (0x1ul << UART_ALT_CTL_RS485_AAD_Pos)
#define | UART_ALT_CTL_RS485_AUD_Pos (18)
#define | UART_ALT_CTL_RS485_AUD_Msk (0x1ul << UART_ALT_CTL_RS485_AUD_Pos)
#define | UART_ALT_CTL_RS485_ADD_EN_Pos (19)
#define | UART_ALT_CTL_RS485_ADD_EN_Msk (0x1ul << UART_ALT_CTL_RS485_ADD_EN_Pos)
#define | UART_ALT_CTL_ADDR_PID_MATCH_Pos (24)
#define | UART_ALT_CTL_ADDR_PID_MATCH_Msk (0xfful << UART_ALT_CTL_ADDR_PID_MATCH_Pos)
#define | UART_FUN_SEL_FUN_SEL_Pos (0)
#define | UART_FUN_SEL_FUN_SEL_Msk (0x3ul << UART_FUN_SEL_FUN_SEL_Pos)
#define | UART_BR_COMP_BR_COMP_Pos (0)
#define | UART_BR_COMP_BR_COMP_Msk (0x1fful << UART_BR_COMP_BR_COMP_Pos)
#define | UART_BR_COMP_BR_COMP_DEC_Pos (31)
#define | UART_BR_COMP_BR_COMP_DEC_Msk (0x1ul << UART_BR_COMP_BR_COMP_DEC_Pos)
#define | WDT_CTL_WTR_Pos (0)
#define | WDT_CTL_WTR_Msk (0x1ul << WDT_CTL_WTR_Pos)
#define | WDT_CTL_WTRE_Pos (1)
#define | WDT_CTL_WTRE_Msk (0x1ul << WDT_CTL_WTRE_Pos)
#define | WDT_CTL_WTWKE_Pos (2)
#define | WDT_CTL_WTWKE_Msk (0x1ul << WDT_CTL_WTWKE_Pos)
#define | WDT_CTL_WTE_Pos (3)
#define | WDT_CTL_WTE_Msk (0x1ul << WDT_CTL_WTE_Pos)
#define | WDT_CTL_WTIS_Pos (4)
#define | WDT_CTL_WTIS_Msk (0x7ul << WDT_CTL_WTIS_Pos)
#define | WDT_CTL_WTRDSEL_Pos (8)
#define | WDT_CTL_WTRDSEL_Msk (0x3ul << WDT_CTL_WTRDSEL_Pos)
#define | WDT_IER_IE_Pos (0)
#define | WDT_IER_IE_Msk (0x1ul << WDT_IER_IE_Pos)
#define | WDT_ISR_IS_Pos (0)
#define | WDT_ISR_IS_Msk (0x1ul << WDT_ISR_IS_Pos)
#define | WDT_ISR_RST_IS_Pos (1)
#define | WDT_ISR_RST_IS_Msk (0x1ul << WDT_ISR_RST_IS_Pos)
#define | WDT_ISR_WAKE_IS_Pos (2)
#define | WDT_ISR_WAKE_IS_Msk (0x1ul << WDT_ISR_WAKE_IS_Pos)
#define | WWDT_RLD_WWDTRLD_Pos (0)
#define | WWDT_RLD_WWDTRLD_Msk (0xfffffffful << WWDT_RLD_RLD_Pos)
#define | WWDT_CR_WWDTEN_Pos (0)
#define | WWDT_CR_WWDTEN_Msk (0x1ul << WWDT_CR_WWDTEN_Pos)
#define | WWDT_CR_PERIODSEL_Pos (8)
#define | WWDT_CR_PERIODSEL_Msk (0xful << WWDT_CR_PERIODSEL_Pos)
#define | WWDT_CR_WINCMP_Pos (16)
#define | WWDT_CR_WINCMP_Msk (0x3ful << WWDT_CR_WINCMP_Pos)
#define | WWDT_CR_DBGEN_Pos (31)
#define | WWDT_CR_DBGEN_Msk (0x1ul << WWDT_CR_DBGEN_Pos)
#define | WWDT_IER_WWDTIE_Pos (0)
#define | WWDT_IER_WWDTIE_Msk (0x1ul << WWDT_IER_WWDTIE_Pos)
#define | WWDT_STS_IF_Pos (0)
#define | WWDT_STS_IF_Msk (0x1ul << WWDT_STS_IF_Pos)
#define | WWDT_STS_RF_Pos (1)
#define | WWDT_STS_RF_Msk (0x1ul << WWDT_STS_RF_Pos)
#define | WWDT_VAL_WWDTVAL_Pos (0)
#define | WWDT_VAL_WWDTVAL_Msk (0x3ful << WWDT_VAL_WWDTVAL_Pos)

## Typedefs
typedef enum IRQn | IRQn_Type
typedef volatile unsigned char | vu8
| Define 8-bit unsigned volatile data type. More...
typedef volatile unsigned short | vu16
| Define 16-bit unsigned volatile data type. More...
typedef volatile unsigned long | vu32
| Define 32-bit unsigned volatile data type. More...

## Enumerations
enum | IRQn { NonMaskableInt_IRQn = -14 , HardFault_IRQn = -13 , SVCall_IRQn = -5 , PendSV_IRQn = -2 , SysTick_IRQn = -1 , BOD_IRQn = 0 , WDT_IRQn = 1 , EINT0_IRQn = 2 , EINT1_IRQn = 3 , GPABC_IRQn = 4 , GPDEF_IRQn = 5 , PWM0_IRQn = 6 , TMR0_IRQn = 8 , TMR1_IRQn = 9 , TMR2_IRQn = 10 , TMR3_IRQn = 11 , UART0_IRQn = 12 , UART1_IRQn = 13 , SPI0_IRQn = 14 , SPI1_IRQn = 15 , HIRC_IRQn = 17 , I2C0_IRQn = 18 , I2C1_IRQn = 19 , SC0_IRQn = 21 , SC1_IRQn = 22 , LCD_IRQn = 25 , PDMA_IRQn = 26 , PDWU_IRQn = 28 , ADC_IRQn = 29 , ACMP_IRQn = 30 , RTC_IRQn = 31 }

## Detailed Description

Nano102/112 peripheral access layer header file. This file contains all the peripheral register's definitions, bits definitions and memory mapping for NuMicro Nano102/112 MCU.

SPDX-License-Identifier: Apache-2.0

Copyright
  (C) 2018 Nuvoton Technology Corp. All rights reserved.

Definition in file Nano1X2Series.h.

## Macro Definition Documentation

## ◆ DMA_CRC_CHECKSUM_CRC_CHECKSUM_Msk

#define DMA_CRC_CHECKSUM_CRC_CHECKSUM_Msk (0xfffffffful << DMA_CRC_CHECKSUM_CRC_CHECKSUM_Pos)

DMA_CRC_T::CHECKSUM: CRC_CHECKSUM Mask

Definition at line 2329 of file Nano1X2Series.h.

## ◆ DMA_CRC_CHECKSUM_CRC_CHECKSUM_Pos

#define DMA_CRC_CHECKSUM_CRC_CHECKSUM_Pos (0)

DMA_CRC_T::CHECKSUM: CRC_CHECKSUM Position

Definition at line 2328 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_CHECKSUM_COM_Msk

#define DMA_CRC_CTL_CHECKSUM_COM_Msk (0x1ul << DMA_CRC_CTL_CHECKSUM_COM_Pos)

DMA_CRC_T::CTL: CHECKSUM_COM Mask

Definition at line 2290 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_CHECKSUM_COM_Pos

#define DMA_CRC_CTL_CHECKSUM_COM_Pos (27)

DMA_CRC_T::CTL: CHECKSUM_COM Position

Definition at line 2289 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_CHECKSUM_RVS_Msk

#define DMA_CRC_CTL_CHECKSUM_RVS_Msk (0x1ul << DMA_CRC_CTL_CHECKSUM_RVS_Pos)

DMA_CRC_T::CTL: CHECKSUM_RVS Mask

Definition at line 2284 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_CHECKSUM_RVS_Pos

#define DMA_CRC_CTL_CHECKSUM_RVS_Pos (25)

DMA_CRC_T::CTL: CHECKSUM_RVS Position

Definition at line 2283 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_CPU_WDLEN_Msk

#define DMA_CRC_CTL_CPU_WDLEN_Msk (0x3ul << DMA_CRC_CTL_CPU_WDLEN_Pos)

DMA_CRC_T::CTL: CPU_WDLEN Mask

Definition at line 2293 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_CPU_WDLEN_Pos

#define DMA_CRC_CTL_CPU_WDLEN_Pos (28)

DMA_CRC_T::CTL: CPU_WDLEN Position

Definition at line 2292 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_CRC_MODE_Msk

#define DMA_CRC_CTL_CRC_MODE_Msk (0x3ul << DMA_CRC_CTL_CRC_MODE_Pos)

DMA_CRC_T::CTL: CRC_MODE Mask

Definition at line 2296 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_CRC_MODE_Pos

#define DMA_CRC_CTL_CRC_MODE_Pos (30)

DMA_CRC_T::CTL: CRC_MODE Position

Definition at line 2295 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_CRC_RST_Msk

#define DMA_CRC_CTL_CRC_RST_Msk (0x1ul << DMA_CRC_CTL_CRC_RST_Pos)

DMA_CRC_T::CTL: CRC_RST Mask

Definition at line 2275 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_CRC_RST_Pos

#define DMA_CRC_CTL_CRC_RST_Pos (1)

DMA_CRC_T::CTL: CRC_RST Position

Definition at line 2274 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_CRCCEN_Msk

#define DMA_CRC_CTL_CRCCEN_Msk (0x1ul << DMA_CRC_CTL_CRCCEN_Pos)

DMA_CRC_T::CTL: CRCCEN Mask

Definition at line 2272 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_CRCCEN_Pos

#define DMA_CRC_CTL_CRCCEN_Pos (0)

    @addtogroup DMA_CRC_CONST DMA_CRC Bit Field Definition
    Constant Definitions for DMA_CRC Controller

DMA_CRC_T::CTL: CRCCEN Position

Definition at line 2271 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_TRIG_EN_Msk

#define DMA_CRC_CTL_TRIG_EN_Msk (0x1ul << DMA_CRC_CTL_TRIG_EN_Pos)

DMA_CRC_T::CTL: TRIG_EN Mask

Definition at line 2278 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_TRIG_EN_Pos

#define DMA_CRC_CTL_TRIG_EN_Pos (23)

DMA_CRC_T::CTL: TRIG_EN Position

Definition at line 2277 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_WDATA_COM_Msk

#define DMA_CRC_CTL_WDATA_COM_Msk (0x1ul << DMA_CRC_CTL_WDATA_COM_Pos)

DMA_CRC_T::CTL: WDATA_COM Mask

Definition at line 2287 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_WDATA_COM_Pos

#define DMA_CRC_CTL_WDATA_COM_Pos (26)

DMA_CRC_T::CTL: WDATA_COM Position

Definition at line 2286 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_WDATA_RVS_Msk

#define DMA_CRC_CTL_WDATA_RVS_Msk (0x1ul << DMA_CRC_CTL_WDATA_RVS_Pos)

DMA_CRC_T::CTL: WDATA_RVS Mask

Definition at line 2281 of file Nano1X2Series.h.

## ◆ DMA_CRC_CTL_WDATA_RVS_Pos

#define DMA_CRC_CTL_WDATA_RVS_Pos (24)

DMA_CRC_T::CTL: WDATA_RVS Position

Definition at line 2280 of file Nano1X2Series.h.

## ◆ DMA_CRC_DMABCR_CRC_DMABCR_Msk

#define DMA_CRC_DMABCR_CRC_DMABCR_Msk (0xfffful << DMA_CRC_DMABCR_CRC_DMABCR_Pos)

DMA_CRC_T::DMABCR: CRC_DMABCR Mask

Definition at line 2302 of file Nano1X2Series.h.

## ◆ DMA_CRC_DMABCR_CRC_DMABCR_Pos

#define DMA_CRC_DMABCR_CRC_DMABCR_Pos (0)

DMA_CRC_T::DMABCR: CRC_DMABCR Position

Definition at line 2301 of file Nano1X2Series.h.

## ◆ DMA_CRC_DMACBCR_CRC_DMACBCR_Msk

#define DMA_CRC_DMACBCR_CRC_DMACBCR_Msk (0xfffful << DMA_CRC_DMACBCR_CRC_DMACBCR_Pos)

DMA_CRC_T::DMACBCR: CRC_DMACBCR Mask

Definition at line 2308 of file Nano1X2Series.h.

## ◆ DMA_CRC_DMACBCR_CRC_DMACBCR_Pos

#define DMA_CRC_DMACBCR_CRC_DMACBCR_Pos (0)

DMA_CRC_T::DMACBCR: CRC_DMACBCR Position

Definition at line 2307 of file Nano1X2Series.h.

## ◆ DMA_CRC_DMACSAR_CRC_DMACSAR_Msk

#define DMA_CRC_DMACSAR_CRC_DMACSAR_Msk (0xfffffffful << DMA_CRC_DMACSAR_CRC_DMACSAR_Pos)

DMA_CRC_T::DMACSAR: CRC_DMACSAR Mask

Definition at line 2305 of file Nano1X2Series.h.

## ◆ DMA_CRC_DMACSAR_CRC_DMACSAR_Pos

#define DMA_CRC_DMACSAR_CRC_DMACSAR_Pos (0)

DMA_CRC_T::DMACSAR: CRC_DMACSAR Position

Definition at line 2304 of file Nano1X2Series.h.

## ◆ DMA_CRC_DMAIER_BLKD_IE_Msk

#define DMA_CRC_DMAIER_BLKD_IE_Msk (0x1ul << DMA_CRC_DMAIER_BLKD_IE_Pos)

DMA_CRC_T::DMAIER: BLKD_IE Mask

Definition at line 2314 of file Nano1X2Series.h.

## ◆ DMA_CRC_DMAIER_BLKD_IE_Pos

#define DMA_CRC_DMAIER_BLKD_IE_Pos (1)

DMA_CRC_T::DMAIER: BLKD_IE Position

Definition at line 2313 of file Nano1X2Series.h.

## ◆ DMA_CRC_DMAIER_TABORT_IE_Msk

#define DMA_CRC_DMAIER_TABORT_IE_Msk (0x1ul << DMA_CRC_DMAIER_TABORT_IE_Pos)

DMA_CRC_T::DMAIER: TABORT_IE Mask

Definition at line 2311 of file Nano1X2Series.h.

## ◆ DMA_CRC_DMAIER_TABORT_IE_Pos

#define DMA_CRC_DMAIER_TABORT_IE_Pos (0)

DMA_CRC_T::DMAIER: TABORT_IE Position

Definition at line 2310 of file Nano1X2Series.h.

## ◆ DMA_CRC_DMAISR_BLKD_IF_Msk

#define DMA_CRC_DMAISR_BLKD_IF_Msk (0x1ul << DMA_CRC_DMAISR_BLKD_IF_Pos)

DMA_CRC_T::DMAISR: BLKD_IF Mask

Definition at line 2320 of file Nano1X2Series.h.

## ◆ DMA_CRC_DMAISR_BLKD_IF_Pos

#define DMA_CRC_DMAISR_BLKD_IF_Pos (1)

DMA_CRC_T::DMAISR: BLKD_IF Position

Definition at line 2319 of file Nano1X2Series.h.

## ◆ DMA_CRC_DMAISR_TABORT_IF_Msk

#define DMA_CRC_DMAISR_TABORT_IF_Msk (0x1ul << DMA_CRC_DMAISR_TABORT_IF_Pos)

DMA_CRC_T::DMAISR: TABORT_IF Mask

Definition at line 2317 of file Nano1X2Series.h.

## ◆ DMA_CRC_DMAISR_TABORT_IF_Pos

#define DMA_CRC_DMAISR_TABORT_IF_Pos (0)

DMA_CRC_T::DMAISR: TABORT_IF Position

Definition at line 2316 of file Nano1X2Series.h.

## ◆ DMA_CRC_DMASAR_CRC_DMASAR_Msk

#define DMA_CRC_DMASAR_CRC_DMASAR_Msk (0xfffffffful << DMA_CRC_DMASAR_CRC_DMASAR_Pos)

DMA_CRC_T::DMASAR: CRC_DMASAR Mask

Definition at line 2299 of file Nano1X2Series.h.

## ◆ DMA_CRC_DMASAR_CRC_DMASAR_Pos

#define DMA_CRC_DMASAR_CRC_DMASAR_Pos (0)

DMA_CRC_T::DMASAR: CRC_DMASAR Position

Definition at line 2298 of file Nano1X2Series.h.

## ◆ DMA_CRC_SEED_CRC_SEED_Msk

#define DMA_CRC_SEED_CRC_SEED_Msk (0xfffffffful << DMA_CRC_SEED_CRC_SEED_Pos)

DMA_CRC_T::SEED: CRC_SEED Mask

Definition at line 2326 of file Nano1X2Series.h.

## ◆ DMA_CRC_SEED_CRC_SEED_Pos

#define DMA_CRC_SEED_CRC_SEED_Pos (0)

DMA_CRC_T::SEED: CRC_SEED Position

Definition at line 2325 of file Nano1X2Series.h.

## ◆ DMA_CRC_WDATA_CRC_WDATA_Msk

#define DMA_CRC_WDATA_CRC_WDATA_Msk (0xfffffffful << DMA_CRC_WDATA_CRC_WDATA_Pos)

DMA_CRC_T::WDATA: CRC_WDATA Mask

Definition at line 2323 of file Nano1X2Series.h.

## ◆ DMA_CRC_WDATA_CRC_WDATA_Pos

#define DMA_CRC_WDATA_CRC_WDATA_Pos (0)

DMA_CRC_T::WDATA: CRC_WDATA Position

Definition at line 2322 of file Nano1X2Series.h.

## ◆ DMA_GCR_DSSR0_CH1_SEL_Msk

#define DMA_GCR_DSSR0_CH1_SEL_Msk (0x1ful << DMA_GCR_DSSR0_CH1_SEL_Pos)

DMA_GCR_T::DSSR0: CH1_SEL Mask

Definition at line 2355 of file Nano1X2Series.h.

## ◆ DMA_GCR_DSSR0_CH1_SEL_Pos

#define DMA_GCR_DSSR0_CH1_SEL_Pos (8)

DMA_GCR_T::DSSR0: CH1_SEL Position

Definition at line 2354 of file Nano1X2Series.h.

## ◆ DMA_GCR_DSSR0_CH2_SEL_Msk

#define DMA_GCR_DSSR0_CH2_SEL_Msk (0x1ful << DMA_GCR_DSSR0_CH2_SEL_Pos)

DMA_GCR_T::DSSR0: CH2_SEL Mask

Definition at line 2358 of file Nano1X2Series.h.

## ◆ DMA_GCR_DSSR0_CH2_SEL_Pos

#define DMA_GCR_DSSR0_CH2_SEL_Pos (16)

DMA_GCR_T::DSSR0: CH2_SEL Position

Definition at line 2357 of file Nano1X2Series.h.

## ◆ DMA_GCR_DSSR0_CH3_SEL_Msk

#define DMA_GCR_DSSR0_CH3_SEL_Msk (0x1ful << DMA_GCR_DSSR0_CH3_SEL_Pos)

DMA_GCR_T::DSSR0: CH3_SEL Mask

Definition at line 2361 of file Nano1X2Series.h.

## ◆ DMA_GCR_DSSR0_CH3_SEL_Pos

#define DMA_GCR_DSSR0_CH3_SEL_Pos (24)

DMA_GCR_T::DSSR0: CH3_SEL Position

Definition at line 2360 of file Nano1X2Series.h.

## ◆ DMA_GCR_DSSR1_CH4_SEL_Msk

#define DMA_GCR_DSSR1_CH4_SEL_Msk (0x1ful << DMA_GCR_DSSR1_CH4_SEL_Pos)

DMA_GCR_T::DSSR1: CH4_SEL Mask

Definition at line 2364 of file Nano1X2Series.h.

## ◆ DMA_GCR_DSSR1_CH4_SEL_Pos

#define DMA_GCR_DSSR1_CH4_SEL_Pos (0)

DMA_GCR_T::DSSR1: CH4_SEL Position

Definition at line 2363 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRCSR_CLK1_EN_Msk

#define DMA_GCR_GCRCSR_CLK1_EN_Msk (0x1ul << DMA_GCR_GCRCSR_CLK1_EN_Pos)

DMA_GCR_T::GCRCSR: CLK1_EN Mask

Definition at line 2340 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRCSR_CLK1_EN_Pos

#define DMA_GCR_GCRCSR_CLK1_EN_Pos (9)

    @addtogroup DMA_GCR_CONST DMA_GCR Bit Field Definition
    Constant Definitions for DMA_GCR Controller

DMA_GCR_T::GCRCSR: CLK1_EN Position

Definition at line 2339 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRCSR_CLK2_EN_Msk

#define DMA_GCR_GCRCSR_CLK2_EN_Msk (0x1ul << DMA_GCR_GCRCSR_CLK2_EN_Pos)

DMA_GCR_T::GCRCSR: CLK2_EN Mask

Definition at line 2343 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRCSR_CLK2_EN_Pos

#define DMA_GCR_GCRCSR_CLK2_EN_Pos (10)

DMA_GCR_T::GCRCSR: CLK2_EN Position

Definition at line 2342 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRCSR_CLK3_EN_Msk

#define DMA_GCR_GCRCSR_CLK3_EN_Msk (0x1ul << DMA_GCR_GCRCSR_CLK3_EN_Pos)

DMA_GCR_T::GCRCSR: CLK3_EN Mask

Definition at line 2346 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRCSR_CLK3_EN_Pos

#define DMA_GCR_GCRCSR_CLK3_EN_Pos (11)

DMA_GCR_T::GCRCSR: CLK3_EN Position

Definition at line 2345 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRCSR_CLK4_EN_Msk

#define DMA_GCR_GCRCSR_CLK4_EN_Msk (0x1ul << DMA_GCR_GCRCSR_CLK4_EN_Pos)

DMA_GCR_T::GCRCSR: CLK4_EN Mask

Definition at line 2349 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRCSR_CLK4_EN_Pos

#define DMA_GCR_GCRCSR_CLK4_EN_Pos (12)

DMA_GCR_T::GCRCSR: CLK4_EN Position

Definition at line 2348 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRCSR_CRC_CLK_EN_Msk

#define DMA_GCR_GCRCSR_CRC_CLK_EN_Msk (0x1ul << DMA_GCR_GCRCSR_CRC_CLK_EN_Pos)

DMA_GCR_T::GCRCSR: CRC_CLK_EN Mask

Definition at line 2352 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRCSR_CRC_CLK_EN_Pos

#define DMA_GCR_GCRCSR_CRC_CLK_EN_Pos (24)

DMA_GCR_T::GCRCSR: CRC_CLK_EN Position

Definition at line 2351 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRISR_INTR1_Msk

#define DMA_GCR_GCRISR_INTR1_Msk (0x1ul << DMA_GCR_GCRISR_INTR1_Pos)

DMA_GCR_T::GCRISR: INTR1 Mask

Definition at line 2367 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRISR_INTR1_Pos

#define DMA_GCR_GCRISR_INTR1_Pos (1)

DMA_GCR_T::GCRISR: INTR1 Position

Definition at line 2366 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRISR_INTR2_Msk

#define DMA_GCR_GCRISR_INTR2_Msk (0x1ul << DMA_GCR_GCRISR_INTR2_Pos)

DMA_GCR_T::GCRISR: INTR2 Mask

Definition at line 2370 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRISR_INTR2_Pos

#define DMA_GCR_GCRISR_INTR2_Pos (2)

DMA_GCR_T::GCRISR: INTR2 Position

Definition at line 2369 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRISR_INTR3_Msk

#define DMA_GCR_GCRISR_INTR3_Msk (0x1ul << DMA_GCR_GCRISR_INTR3_Pos)

DMA_GCR_T::GCRISR: INTR3 Mask

Definition at line 2373 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRISR_INTR3_Pos

#define DMA_GCR_GCRISR_INTR3_Pos (3)

DMA_GCR_T::GCRISR: INTR3 Position

Definition at line 2372 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRISR_INTR4_Msk

#define DMA_GCR_GCRISR_INTR4_Msk (0x1ul << DMA_GCR_GCRISR_INTR4_Pos)

DMA_GCR_T::GCRISR: INTR4 Mask

Definition at line 2376 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRISR_INTR4_Pos

#define DMA_GCR_GCRISR_INTR4_Pos (4)

DMA_GCR_T::GCRISR: INTR4 Position

Definition at line 2375 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRISR_INTRCRC_Msk

#define DMA_GCR_GCRISR_INTRCRC_Msk (0x1ul << DMA_GCR_GCRISR_INTRCRC_Pos)

DMA_GCR_T::GCRISR: INTRCRC Mask

Definition at line 2379 of file Nano1X2Series.h.

## ◆ DMA_GCR_GCRISR_INTRCRC_Pos

#define DMA_GCR_GCRISR_INTRCRC_Pos (16)

DMA_GCR_T::GCRISR: INTRCRC Position

Definition at line 2378 of file Nano1X2Series.h.

## ◆ FMC_DFBADR_DFBADR_Msk

#define FMC_DFBADR_DFBADR_Msk (0xfffffffful << FMC_DFBADR_DFBADR_Pos)

FMC_T::DFBADR: DFBADR Mask

Definition at line 2653 of file Nano1X2Series.h.

## ◆ FMC_DFBADR_DFBADR_Pos

#define FMC_DFBADR_DFBADR_Pos (0)

FMC_T::DFBADR: DFBADR Position

Definition at line 2652 of file Nano1X2Series.h.

## ◆ FMC_ISPADR_ISPADR_Msk

#define FMC_ISPADR_ISPADR_Msk (0xfffffffful << FMC_ISPADR_ISPADR_Pos)

FMC_T::ISPADR: ISPADR Mask

Definition at line 2635 of file Nano1X2Series.h.

## ◆ FMC_ISPADR_ISPADR_Pos

#define FMC_ISPADR_ISPADR_Pos (0)

FMC_T::ISPADR: ISPADR Position

Definition at line 2634 of file Nano1X2Series.h.

## ◆ FMC_ISPCMD_FCEN_Msk

#define FMC_ISPCMD_FCEN_Msk (0x1ul << FMC_ISPCMD_FCEN_Pos)

FMC_T::ISPCMD: FCEN Mask

Definition at line 2644 of file Nano1X2Series.h.

## ◆ FMC_ISPCMD_FCEN_Pos

#define FMC_ISPCMD_FCEN_Pos (4)

FMC_T::ISPCMD: FCEN Position

Definition at line 2643 of file Nano1X2Series.h.

## ◆ FMC_ISPCMD_FCTRL_Msk

#define FMC_ISPCMD_FCTRL_Msk (0xful << FMC_ISPCMD_FCTRL_Pos)

FMC_T::ISPCMD: FCTRL Mask

Definition at line 2641 of file Nano1X2Series.h.

## ◆ FMC_ISPCMD_FCTRL_Pos

#define FMC_ISPCMD_FCTRL_Pos (0)

FMC_T::ISPCMD: FCTRL Position

Definition at line 2640 of file Nano1X2Series.h.

## ◆ FMC_ISPCMD_FOEN_Msk

#define FMC_ISPCMD_FOEN_Msk (0x1ul << FMC_ISPCMD_FOEN_Pos)

FMC_T::ISPCMD: FOEN Mask

Definition at line 2647 of file Nano1X2Series.h.

## ◆ FMC_ISPCMD_FOEN_Pos

#define FMC_ISPCMD_FOEN_Pos (5)

FMC_T::ISPCMD: FOEN Position

Definition at line 2646 of file Nano1X2Series.h.

## ◆ FMC_ISPCON_APUEN_Msk

#define FMC_ISPCON_APUEN_Msk (0x1ul << FMC_ISPCON_APUEN_Pos)

FMC_T::ISPCON: APUEN Mask

Definition at line 2623 of file Nano1X2Series.h.

## ◆ FMC_ISPCON_APUEN_Pos

#define FMC_ISPCON_APUEN_Pos (3)

FMC_T::ISPCON: APUEN Position

Definition at line 2622 of file Nano1X2Series.h.

## ◆ FMC_ISPCON_BS_Msk

#define FMC_ISPCON_BS_Msk (0x1ul << FMC_ISPCON_BS_Pos)

FMC_T::ISPCON: BS Mask

Definition at line 2620 of file Nano1X2Series.h.

## ◆ FMC_ISPCON_BS_Pos

#define FMC_ISPCON_BS_Pos (1)

FMC_T::ISPCON: BS Position

Definition at line 2619 of file Nano1X2Series.h.

## ◆ FMC_ISPCON_CFGUEN_Msk

#define FMC_ISPCON_CFGUEN_Msk (0x1ul << FMC_ISPCON_CFGUEN_Pos)

FMC_T::ISPCON: CFGUEN Mask

Definition at line 2626 of file Nano1X2Series.h.

## ◆ FMC_ISPCON_CFGUEN_Pos

#define FMC_ISPCON_CFGUEN_Pos (4)

FMC_T::ISPCON: CFGUEN Position

Definition at line 2625 of file Nano1X2Series.h.

## ◆ FMC_ISPCON_ISPEN_Msk

#define FMC_ISPCON_ISPEN_Msk (0x1ul << FMC_ISPCON_ISPEN_Pos)

FMC_T::ISPCON: ISPEN Mask

Definition at line 2617 of file Nano1X2Series.h.

## ◆ FMC_ISPCON_ISPEN_Pos

#define FMC_ISPCON_ISPEN_Pos (0)

    @addtogroup FMC_CONST FMC Bit Field Definition
    Constant Definitions for FMC Controller

FMC_T::ISPCON: ISPEN Position

Definition at line 2616 of file Nano1X2Series.h.

## ◆ FMC_ISPCON_ISPFF_Msk

#define FMC_ISPCON_ISPFF_Msk (0x1ul << FMC_ISPCON_ISPFF_Pos)

FMC_T::ISPCON: ISPFF Mask

Definition at line 2632 of file Nano1X2Series.h.

## ◆ FMC_ISPCON_ISPFF_Pos

#define FMC_ISPCON_ISPFF_Pos (6)

FMC_T::ISPCON: ISPFF Position

Definition at line 2631 of file Nano1X2Series.h.

## ◆ FMC_ISPCON_LDUEN_Msk

#define FMC_ISPCON_LDUEN_Msk (0x1ul << FMC_ISPCON_LDUEN_Pos)

FMC_T::ISPCON: LDUEN Mask

Definition at line 2629 of file Nano1X2Series.h.

## ◆ FMC_ISPCON_LDUEN_Pos

#define FMC_ISPCON_LDUEN_Pos (5)

FMC_T::ISPCON: LDUEN Position

Definition at line 2628 of file Nano1X2Series.h.

## ◆ FMC_ISPDAT_ISPDAT_Msk

#define FMC_ISPDAT_ISPDAT_Msk (0xfffffffful << FMC_ISPDAT_ISPDAT_Pos)

FMC_T::ISPDAT: ISPDAT Mask

Definition at line 2638 of file Nano1X2Series.h.

## ◆ FMC_ISPDAT_ISPDAT_Pos

#define FMC_ISPDAT_ISPDAT_Pos (0)

FMC_T::ISPDAT: ISPDAT Position

Definition at line 2637 of file Nano1X2Series.h.

## ◆ FMC_ISPSTA_CBS_Msk

#define FMC_ISPSTA_CBS_Msk (0x3ul << FMC_ISPSTA_CBS_Pos)

FMC_T::ISPSTA: CBS Mask

Definition at line 2659 of file Nano1X2Series.h.

## ◆ FMC_ISPSTA_CBS_Pos

#define FMC_ISPSTA_CBS_Pos (1)

FMC_T::ISPSTA: CBS Position

Definition at line 2658 of file Nano1X2Series.h.

## ◆ FMC_ISPSTA_ISPBUSY_Msk

#define FMC_ISPSTA_ISPBUSY_Msk (0x1ul << FMC_ISPSTA_ISPBUSY_Pos)

FMC_T::ISPSTA: ISPBUSY Mask

Definition at line 2656 of file Nano1X2Series.h.

## ◆ FMC_ISPSTA_ISPBUSY_Pos

#define FMC_ISPSTA_ISPBUSY_Pos (0)

FMC_T::ISPSTA: ISPBUSY Position

Definition at line 2655 of file Nano1X2Series.h.

## ◆ FMC_ISPSTA_ISPFF_Msk

#define FMC_ISPSTA_ISPFF_Msk (0x1ul << FMC_ISPSTA_ISPFF_Pos)

FMC_T::ISPSTA: ISPFF Mask

Definition at line 2665 of file Nano1X2Series.h.

## ◆ FMC_ISPSTA_ISPFF_Pos

#define FMC_ISPSTA_ISPFF_Pos (6)

FMC_T::ISPSTA: ISPFF Position

Definition at line 2664 of file Nano1X2Series.h.

## ◆ FMC_ISPSTA_PGFF_Msk

#define FMC_ISPSTA_PGFF_Msk (0x1ul << FMC_ISPSTA_PGFF_Pos)

FMC_T::ISPSTA: PGFF Mask

Definition at line 2662 of file Nano1X2Series.h.

## ◆ FMC_ISPSTA_PGFF_Pos

#define FMC_ISPSTA_PGFF_Pos (5)

FMC_T::ISPSTA: PGFF Position

Definition at line 2661 of file Nano1X2Series.h.

## ◆ FMC_ISPTRG_ISPGO_Msk

#define FMC_ISPTRG_ISPGO_Msk (0x1ul << FMC_ISPTRG_ISPGO_Pos)

FMC_T::ISPTRG: ISPGO Mask

Definition at line 2650 of file Nano1X2Series.h.

## ◆ FMC_ISPTRG_ISPGO_Pos

#define FMC_ISPTRG_ISPGO_Pos (0)

FMC_T::ISPTRG: ISPGO Position

Definition at line 2649 of file Nano1X2Series.h.

## ◆ GP_DBEN_DBEN_Msk

#define GP_DBEN_DBEN_Msk (0xfffful << GP_DBEN_DBEN_Pos)

GPIO_T::DBEN: DBEN Mask

Definition at line 4759 of file Nano1X2Series.h.

## ◆ GP_DBEN_DBEN_Pos

#define GP_DBEN_DBEN_Pos (0)

GPIO_T::DBEN: DBEN Position

Definition at line 4758 of file Nano1X2Series.h.

## ◆ GP_DBNCECON_DBCLK_ON_Msk

#define GP_DBNCECON_DBCLK_ON_Msk (0x1ul << GP_DBNCECON_DBCLK_ON_Pos)

GP_DB_T::DBNCECON: DBCLK_ON Mask

Definition at line 4878 of file Nano1X2Series.h.

## ◆ GP_DBNCECON_DBCLK_ON_Pos

#define GP_DBNCECON_DBCLK_ON_Pos (5)

GP_DB_T::DBNCECON: DBCLK_ON Position

Definition at line 4877 of file Nano1X2Series.h.

## ◆ GP_DBNCECON_DBCLKSEL_Msk

#define GP_DBNCECON_DBCLKSEL_Msk (0xful << GP_DBNCECON_DBCLKSEL_Pos)

GP_DB_T::DBNCECON: DBCLKSEL Mask

Definition at line 4872 of file Nano1X2Series.h.

## ◆ GP_DBNCECON_DBCLKSEL_Pos

#define GP_DBNCECON_DBCLKSEL_Pos (0)

    @addtogroup GP_DB_CONST GP_DB Bit Field Definition
    Constant Definitions for GP_DB Controller

GP_DB_T::DBNCECON: DBCLKSEL Position

Definition at line 4871 of file Nano1X2Series.h.

## ◆ GP_DBNCECON_DBCLKSRC_Msk

#define GP_DBNCECON_DBCLKSRC_Msk (0x1ul << GP_DBNCECON_DBCLKSRC_Pos)

GP_DB_T::DBNCECON: DBCLKSRC Mask

Definition at line 4875 of file Nano1X2Series.h.

## ◆ GP_DBNCECON_DBCLKSRC_Pos

#define GP_DBNCECON_DBCLKSRC_Pos (4)

GP_DB_T::DBNCECON: DBCLKSRC Position

Definition at line 4874 of file Nano1X2Series.h.

## ◆ GP_DMASK_DMASK_Msk

#define GP_DMASK_DMASK_Msk (0xfffful << GP_DMASK_DMASK_Pos)

GPIO_T::DMASK: DMASK Mask

Definition at line 4753 of file Nano1X2Series.h.

## ◆ GP_DMASK_DMASK_Pos

#define GP_DMASK_DMASK_Pos (0)

GPIO_T::DMASK: DMASK Position

Definition at line 4752 of file Nano1X2Series.h.

## ◆ GP_DOUT_DOUT_Msk

#define GP_DOUT_DOUT_Msk (0xfffful << GP_DOUT_DOUT_Pos)

GPIO_T::DOUT: DOUT Mask

Definition at line 4750 of file Nano1X2Series.h.

## ◆ GP_DOUT_DOUT_Pos

#define GP_DOUT_DOUT_Pos (0)

GPIO_T::DOUT: DOUT Position

Definition at line 4749 of file Nano1X2Series.h.

## ◆ GP_IER_FIER0_Msk

#define GP_IER_FIER0_Msk (0x1ul << GP_IER_FIER0_Pos)

GPIO_T::IER: FIER0 Mask

Definition at line 4765 of file Nano1X2Series.h.

## ◆ GP_IER_FIER0_Pos

#define GP_IER_FIER0_Pos (0)

GPIO_T::IER: FIER0 Position

Definition at line 4764 of file Nano1X2Series.h.

## ◆ GP_IER_FIER10_Msk

#define GP_IER_FIER10_Msk (0x1ul << GP_IER_FIER10_Pos)

GPIO_T::IER: FIER10 Mask

Definition at line 4795 of file Nano1X2Series.h.

## ◆ GP_IER_FIER10_Pos

#define GP_IER_FIER10_Pos (10)

GPIO_T::IER: FIER10 Position

Definition at line 4794 of file Nano1X2Series.h.

## ◆ GP_IER_FIER11_Msk

#define GP_IER_FIER11_Msk (0x1ul << GP_IER_FIER11_Pos)

GPIO_T::IER: FIER11 Mask

Definition at line 4798 of file Nano1X2Series.h.

## ◆ GP_IER_FIER11_Pos

#define GP_IER_FIER11_Pos (11)

GPIO_T::IER: FIER11 Position

Definition at line 4797 of file Nano1X2Series.h.

## ◆ GP_IER_FIER12_Msk

#define GP_IER_FIER12_Msk (0x1ul << GP_IER_FIER12_Pos)

GPIO_T::IER: FIER12 Mask

Definition at line 4801 of file Nano1X2Series.h.

## ◆ GP_IER_FIER12_Pos

#define GP_IER_FIER12_Pos (12)

GPIO_T::IER: FIER12 Position

Definition at line 4800 of file Nano1X2Series.h.

## ◆ GP_IER_FIER13_Msk

#define GP_IER_FIER13_Msk (0x1ul << GP_IER_FIER13_Pos)

GPIO_T::IER: FIER13 Mask

Definition at line 4804 of file Nano1X2Series.h.

## ◆ GP_IER_FIER13_Pos

#define GP_IER_FIER13_Pos (13)

GPIO_T::IER: FIER13 Position

Definition at line 4803 of file Nano1X2Series.h.

## ◆ GP_IER_FIER14_Msk

#define GP_IER_FIER14_Msk (0x1ul << GP_IER_FIER14_Pos)

GPIO_T::IER: FIER14 Mask

Definition at line 4807 of file Nano1X2Series.h.

## ◆ GP_IER_FIER14_Pos

#define GP_IER_FIER14_Pos (14)

GPIO_T::IER: FIER14 Position

Definition at line 4806 of file Nano1X2Series.h.

## ◆ GP_IER_FIER15_Msk

#define GP_IER_FIER15_Msk (0x1ul << GP_IER_FIER15_Pos)

GPIO_T::IER: FIER15 Mask

Definition at line 4810 of file Nano1X2Series.h.

## ◆ GP_IER_FIER15_Pos

#define GP_IER_FIER15_Pos (15)

GPIO_T::IER: FIER15 Position

Definition at line 4809 of file Nano1X2Series.h.

## ◆ GP_IER_FIER1_Msk

#define GP_IER_FIER1_Msk (0x1ul << GP_IER_FIER1_Pos)

GPIO_T::IER: FIER1 Mask

Definition at line 4768 of file Nano1X2Series.h.

## ◆ GP_IER_FIER1_Pos

#define GP_IER_FIER1_Pos (1)

GPIO_T::IER: FIER1 Position

Definition at line 4767 of file Nano1X2Series.h.

## ◆ GP_IER_FIER2_Msk

#define GP_IER_FIER2_Msk (0x1ul << GP_IER_FIER2_Pos)

GPIO_T::IER: FIER2 Mask

Definition at line 4771 of file Nano1X2Series.h.

## ◆ GP_IER_FIER2_Pos

#define GP_IER_FIER2_Pos (2)

GPIO_T::IER: FIER2 Position

Definition at line 4770 of file Nano1X2Series.h.

## ◆ GP_IER_FIER3_Msk

#define GP_IER_FIER3_Msk (0x1ul << GP_IER_FIER3_Pos)

GPIO_T::IER: FIER3 Mask

Definition at line 4774 of file Nano1X2Series.h.

## ◆ GP_IER_FIER3_Pos

#define GP_IER_FIER3_Pos (3)

GPIO_T::IER: FIER3 Position

Definition at line 4773 of file Nano1X2Series.h.

## ◆ GP_IER_FIER4_Msk

#define GP_IER_FIER4_Msk (0x1ul << GP_IER_FIER4_Pos)

GPIO_T::IER: FIER4 Mask

Definition at line 4777 of file Nano1X2Series.h.

## ◆ GP_IER_FIER4_Pos

#define GP_IER_FIER4_Pos (4)

GPIO_T::IER: FIER4 Position

Definition at line 4776 of file Nano1X2Series.h.

## ◆ GP_IER_FIER5_Msk

#define GP_IER_FIER5_Msk (0x1ul << GP_IER_FIER5_Pos)

GPIO_T::IER: FIER5 Mask

Definition at line 4780 of file Nano1X2Series.h.

## ◆ GP_IER_FIER5_Pos

#define GP_IER_FIER5_Pos (5)

GPIO_T::IER: FIER5 Position

Definition at line 4779 of file Nano1X2Series.h.

## ◆ GP_IER_FIER6_Msk

#define GP_IER_FIER6_Msk (0x1ul << GP_IER_FIER6_Pos)

GPIO_T::IER: FIER6 Mask

Definition at line 4783 of file Nano1X2Series.h.

## ◆ GP_IER_FIER6_Pos

#define GP_IER_FIER6_Pos (6)

GPIO_T::IER: FIER6 Position

Definition at line 4782 of file Nano1X2Series.h.

## ◆ GP_IER_FIER7_Msk

#define GP_IER_FIER7_Msk (0x1ul << GP_IER_FIER7_Pos)

GPIO_T::IER: FIER7 Mask

Definition at line 4786 of file Nano1X2Series.h.

## ◆ GP_IER_FIER7_Pos

#define GP_IER_FIER7_Pos (7)

GPIO_T::IER: FIER7 Position

Definition at line 4785 of file Nano1X2Series.h.

## ◆ GP_IER_FIER8_Msk

#define GP_IER_FIER8_Msk (0x1ul << GP_IER_FIER8_Pos)

GPIO_T::IER: FIER8 Mask

Definition at line 4789 of file Nano1X2Series.h.

## ◆ GP_IER_FIER8_Pos

#define GP_IER_FIER8_Pos (8)

GPIO_T::IER: FIER8 Position

Definition at line 4788 of file Nano1X2Series.h.

## ◆ GP_IER_FIER9_Msk

#define GP_IER_FIER9_Msk (0x1ul << GP_IER_FIER9_Pos)

GPIO_T::IER: FIER9 Mask

Definition at line 4792 of file Nano1X2Series.h.

## ◆ GP_IER_FIER9_Pos

#define GP_IER_FIER9_Pos (9)

GPIO_T::IER: FIER9 Position

Definition at line 4791 of file Nano1X2Series.h.

## ◆ GP_IER_RIER0_Msk

#define GP_IER_RIER0_Msk (0x1ul << GP_IER_RIER0_Pos)

GPIO_T::IER: RIER0 Mask

Definition at line 4813 of file Nano1X2Series.h.

## ◆ GP_IER_RIER0_Pos

#define GP_IER_RIER0_Pos (16)

GPIO_T::IER: RIER0 Position

Definition at line 4812 of file Nano1X2Series.h.

## ◆ GP_IER_RIER10_Msk

#define GP_IER_RIER10_Msk (0x1ul << GP_IER_RIER10_Pos)

GPIO_T::IER: RIER10 Mask

Definition at line 4843 of file Nano1X2Series.h.

## ◆ GP_IER_RIER10_Pos

#define GP_IER_RIER10_Pos (26)

GPIO_T::IER: RIER10 Position

Definition at line 4842 of file Nano1X2Series.h.

## ◆ GP_IER_RIER11_Msk

#define GP_IER_RIER11_Msk (0x1ul << GP_IER_RIER11_Pos)

GPIO_T::IER: RIER11 Mask

Definition at line 4846 of file Nano1X2Series.h.

## ◆ GP_IER_RIER11_Pos

#define GP_IER_RIER11_Pos (27)

GPIO_T::IER: RIER11 Position

Definition at line 4845 of file Nano1X2Series.h.

## ◆ GP_IER_RIER12_Msk

#define GP_IER_RIER12_Msk (0x1ul << GP_IER_RIER12_Pos)

GPIO_T::IER: RIER12 Mask

Definition at line 4849 of file Nano1X2Series.h.

## ◆ GP_IER_RIER12_Pos

#define GP_IER_RIER12_Pos (28)

GPIO_T::IER: RIER12 Position

Definition at line 4848 of file Nano1X2Series.h.

## ◆ GP_IER_RIER13_Msk

#define GP_IER_RIER13_Msk (0x1ul << GP_IER_RIER13_Pos)

GPIO_T::IER: RIER13 Mask

Definition at line 4852 of file Nano1X2Series.h.

## ◆ GP_IER_RIER13_Pos

#define GP_IER_RIER13_Pos (29)

GPIO_T::IER: RIER13 Position

Definition at line 4851 of file Nano1X2Series.h.

## ◆ GP_IER_RIER14_Msk

#define GP_IER_RIER14_Msk (0x1ul << GP_IER_RIER14_Pos)

GPIO_T::IER: RIER14 Mask

Definition at line 4855 of file Nano1X2Series.h.

## ◆ GP_IER_RIER14_Pos

#define GP_IER_RIER14_Pos (30)

GPIO_T::IER: RIER14 Position

Definition at line 4854 of file Nano1X2Series.h.

## ◆ GP_IER_RIER15_Msk

#define GP_IER_RIER15_Msk (0x1ul << GP_IER_RIER15_Pos)

GPIO_T::IER: RIER15 Mask

Definition at line 4858 of file Nano1X2Series.h.

## ◆ GP_IER_RIER15_Pos

#define GP_IER_RIER15_Pos (31)

GPIO_T::IER: RIER15 Position

Definition at line 4857 of file Nano1X2Series.h.

## ◆ GP_IER_RIER1_Msk

#define GP_IER_RIER1_Msk (0x1ul << GP_IER_RIER1_Pos)

GPIO_T::IER: RIER1 Mask

Definition at line 4816 of file Nano1X2Series.h.

## ◆ GP_IER_RIER1_Pos

#define GP_IER_RIER1_Pos (17)

GPIO_T::IER: RIER1 Position

Definition at line 4815 of file Nano1X2Series.h.

## ◆ GP_IER_RIER2_Msk

#define GP_IER_RIER2_Msk (0x1ul << GP_IER_RIER2_Pos)

GPIO_T::IER: RIER2 Mask

Definition at line 4819 of file Nano1X2Series.h.

## ◆ GP_IER_RIER2_Pos

#define GP_IER_RIER2_Pos (18)

GPIO_T::IER: RIER2 Position

Definition at line 4818 of file Nano1X2Series.h.

## ◆ GP_IER_RIER3_Msk

#define GP_IER_RIER3_Msk (0x1ul << GP_IER_RIER3_Pos)

GPIO_T::IER: RIER3 Mask

Definition at line 4822 of file Nano1X2Series.h.

## ◆ GP_IER_RIER3_Pos

#define GP_IER_RIER3_Pos (19)

GPIO_T::IER: RIER3 Position

Definition at line 4821 of file Nano1X2Series.h.

## ◆ GP_IER_RIER4_Msk

#define GP_IER_RIER4_Msk (0x1ul << GP_IER_RIER4_Pos)

GPIO_T::IER: RIER4 Mask

Definition at line 4825 of file Nano1X2Series.h.

## ◆ GP_IER_RIER4_Pos

#define GP_IER_RIER4_Pos (20)

GPIO_T::IER: RIER4 Position

Definition at line 4824 of file Nano1X2Series.h.

## ◆ GP_IER_RIER5_Msk

#define GP_IER_RIER5_Msk (0x1ul << GP_IER_RIER5_Pos)

GPIO_T::IER: RIER5 Mask

Definition at line 4828 of file Nano1X2Series.h.

## ◆ GP_IER_RIER5_Pos

#define GP_IER_RIER5_Pos (21)

GPIO_T::IER: RIER5 Position

Definition at line 4827 of file Nano1X2Series.h.

## ◆ GP_IER_RIER6_Msk

#define GP_IER_RIER6_Msk (0x1ul << GP_IER_RIER6_Pos)

GPIO_T::IER: RIER6 Mask

Definition at line 4831 of file Nano1X2Series.h.

## ◆ GP_IER_RIER6_Pos

#define GP_IER_RIER6_Pos (22)

GPIO_T::IER: RIER6 Position

Definition at line 4830 of file Nano1X2Series.h.

## ◆ GP_IER_RIER7_Msk

#define GP_IER_RIER7_Msk (0x1ul << GP_IER_RIER7_Pos)

GPIO_T::IER: RIER7 Mask

Definition at line 4834 of file Nano1X2Series.h.

## ◆ GP_IER_RIER7_Pos

#define GP_IER_RIER7_Pos (23)

GPIO_T::IER: RIER7 Position

Definition at line 4833 of file Nano1X2Series.h.

## ◆ GP_IER_RIER8_Msk

#define GP_IER_RIER8_Msk (0x1ul << GP_IER_RIER8_Pos)

GPIO_T::IER: RIER8 Mask

Definition at line 4837 of file Nano1X2Series.h.

## ◆ GP_IER_RIER8_Pos

#define GP_IER_RIER8_Pos (24)

GPIO_T::IER: RIER8 Position

Definition at line 4836 of file Nano1X2Series.h.

## ◆ GP_IER_RIER9_Msk

#define GP_IER_RIER9_Msk (0x1ul << GP_IER_RIER9_Pos)

GPIO_T::IER: RIER9 Mask

Definition at line 4840 of file Nano1X2Series.h.

## ◆ GP_IER_RIER9_Pos

#define GP_IER_RIER9_Pos (25)

GPIO_T::IER: RIER9 Position

Definition at line 4839 of file Nano1X2Series.h.

## ◆ GP_IMD_IMD_Msk

#define GP_IMD_IMD_Msk (0xfffful << GP_IMD_IMD_Pos)

GPIO_T::IMD: IMD Mask

Definition at line 4762 of file Nano1X2Series.h.

## ◆ GP_IMD_IMD_Pos

#define GP_IMD_IMD_Pos (0)

GPIO_T::IMD: IMD Position

Definition at line 4761 of file Nano1X2Series.h.

## ◆ GP_ISRC_ISRC_Msk

#define GP_ISRC_ISRC_Msk (0xfffful << GP_ISRC_ISRC_Pos)

GPIO_T::ISRC: ISRC Mask

Definition at line 4861 of file Nano1X2Series.h.

## ◆ GP_ISRC_ISRC_Pos

#define GP_ISRC_ISRC_Pos (0)

GPIO_T::ISRC: ISRC Position

Definition at line 4860 of file Nano1X2Series.h.

## ◆ GP_OFFD_OFFD_Msk

#define GP_OFFD_OFFD_Msk (0xfffful << GP_OFFD_OFFD_Pos)

GPIO_T::OFFD: OFFD Mask

Definition at line 4747 of file Nano1X2Series.h.

## ◆ GP_OFFD_OFFD_Pos

#define GP_OFFD_OFFD_Pos (16)

GPIO_T::OFFD: OFFD Position

Definition at line 4746 of file Nano1X2Series.h.

## ◆ GP_PIN_PIN_Msk

#define GP_PIN_PIN_Msk (0xfffful << GP_PIN_PIN_Pos)

GPIO_T::PIN: PIN Mask

Definition at line 4756 of file Nano1X2Series.h.

## ◆ GP_PIN_PIN_Pos

#define GP_PIN_PIN_Pos (0)

GPIO_T::PIN: PIN Position

Definition at line 4755 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD0_Msk

#define GP_PMD_PMD0_Msk (0x3ul << GP_PMD_PMD0_Pos)

GPIO_T::PMD: PMD0 Mask

Definition at line 4699 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD0_Pos

#define GP_PMD_PMD0_Pos (0)

    @addtogroup GPIO_CONST GPIO Bit Field Definition
    Constant Definitions for GPIO Controller

GPIO_T::PMD: PMD0 Position

Definition at line 4698 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD10_Msk

#define GP_PMD_PMD10_Msk (0x3ul << GP_PMD_PMD10_Pos)

GPIO_T::PMD: PMD10 Mask

Definition at line 4729 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD10_Pos

#define GP_PMD_PMD10_Pos (20)

GPIO_T::PMD: PMD10 Position

Definition at line 4728 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD11_Msk

#define GP_PMD_PMD11_Msk (0x3ul << GP_PMD_PMD11_Pos)

GPIO_T::PMD: PMD11 Mask

Definition at line 4732 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD11_Pos

#define GP_PMD_PMD11_Pos (22)

GPIO_T::PMD: PMD11 Position

Definition at line 4731 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD12_Msk

#define GP_PMD_PMD12_Msk (0x3ul << GP_PMD_PMD12_Pos)

GPIO_T::PMD: PMD12 Mask

Definition at line 4735 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD12_Pos

#define GP_PMD_PMD12_Pos (24)

GPIO_T::PMD: PMD12 Position

Definition at line 4734 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD13_Msk

#define GP_PMD_PMD13_Msk (0x3ul << GP_PMD_PMD13_Pos)

GPIO_T::PMD: PMD13 Mask

Definition at line 4738 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD13_Pos

#define GP_PMD_PMD13_Pos (26)

GPIO_T::PMD: PMD13 Position

Definition at line 4737 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD14_Msk

#define GP_PMD_PMD14_Msk (0x3ul << GP_PMD_PMD14_Pos)

GPIO_T::PMD: PMD14 Mask

Definition at line 4741 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD14_Pos

#define GP_PMD_PMD14_Pos (28)

GPIO_T::PMD: PMD14 Position

Definition at line 4740 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD15_Msk

#define GP_PMD_PMD15_Msk (0x3ul << GP_PMD_PMD15_Pos)

GPIO_T::PMD: PMD15 Mask

Definition at line 4744 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD15_Pos

#define GP_PMD_PMD15_Pos (30)

GPIO_T::PMD: PMD15 Position

Definition at line 4743 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD1_Msk

#define GP_PMD_PMD1_Msk (0x3ul << GP_PMD_PMD1_Pos)

GPIO_T::PMD: PMD1 Mask

Definition at line 4702 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD1_Pos

#define GP_PMD_PMD1_Pos (2)

GPIO_T::PMD: PMD1 Position

Definition at line 4701 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD2_Msk

#define GP_PMD_PMD2_Msk (0x3ul << GP_PMD_PMD2_Pos)

GPIO_T::PMD: PMD2 Mask

Definition at line 4705 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD2_Pos

#define GP_PMD_PMD2_Pos (4)

GPIO_T::PMD: PMD2 Position

Definition at line 4704 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD3_Msk

#define GP_PMD_PMD3_Msk (0x3ul << GP_PMD_PMD3_Pos)

GPIO_T::PMD: PMD3 Mask

Definition at line 4708 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD3_Pos

#define GP_PMD_PMD3_Pos (6)

GPIO_T::PMD: PMD3 Position

Definition at line 4707 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD4_Msk

#define GP_PMD_PMD4_Msk (0x3ul << GP_PMD_PMD4_Pos)

GPIO_T::PMD: PMD4 Mask

Definition at line 4711 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD4_Pos

#define GP_PMD_PMD4_Pos (8)

GPIO_T::PMD: PMD4 Position

Definition at line 4710 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD5_Msk

#define GP_PMD_PMD5_Msk (0x3ul << GP_PMD_PMD5_Pos)

GPIO_T::PMD: PMD5 Mask

Definition at line 4714 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD5_Pos

#define GP_PMD_PMD5_Pos (10)

GPIO_T::PMD: PMD5 Position

Definition at line 4713 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD6_Msk

#define GP_PMD_PMD6_Msk (0x3ul << GP_PMD_PMD6_Pos)

GPIO_T::PMD: PMD6 Mask

Definition at line 4717 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD6_Pos

#define GP_PMD_PMD6_Pos (12)

GPIO_T::PMD: PMD6 Position

Definition at line 4716 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD7_Msk

#define GP_PMD_PMD7_Msk (0x3ul << GP_PMD_PMD7_Pos)

GPIO_T::PMD: PMD7 Mask

Definition at line 4720 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD7_Pos

#define GP_PMD_PMD7_Pos (14)

GPIO_T::PMD: PMD7 Position

Definition at line 4719 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD8_Msk

#define GP_PMD_PMD8_Msk (0x3ul << GP_PMD_PMD8_Pos)

GPIO_T::PMD: PMD8 Mask

Definition at line 4723 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD8_Pos

#define GP_PMD_PMD8_Pos (16)

GPIO_T::PMD: PMD8 Position

Definition at line 4722 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD9_Msk

#define GP_PMD_PMD9_Msk (0x3ul << GP_PMD_PMD9_Pos)

GPIO_T::PMD: PMD9 Mask

Definition at line 4726 of file Nano1X2Series.h.

## ◆ GP_PMD_PMD9_Pos

#define GP_PMD_PMD9_Pos (18)

GPIO_T::PMD: PMD9 Position

Definition at line 4725 of file Nano1X2Series.h.

## ◆ GP_PUEN_PUEN_Msk

#define GP_PUEN_PUEN_Msk (0xfffful << GP_PUEN_PUEN_Pos)

GPIO_T::PUEN: PUEN Mask

Definition at line 4864 of file Nano1X2Series.h.

## ◆ GP_PUEN_PUEN_Pos

#define GP_PUEN_PUEN_Pos (0)

GPIO_T::PUEN: PUEN Position

Definition at line 4863 of file Nano1X2Series.h.

## ◆ I2C_CON2_NOSTRETCH_Msk

#define I2C_CON2_NOSTRETCH_Msk (0x1ul << I2C_CON2_NOSTRETCH_Pos)

I2C_T::CON2: NOSTRETCH Mask

Definition at line 5208 of file Nano1X2Series.h.

## ◆ I2C_CON2_NOSTRETCH_Pos

#define I2C_CON2_NOSTRETCH_Pos (5)

I2C_T::CON2: NOSTRETCH Position

Definition at line 5207 of file Nano1X2Series.h.

## ◆ I2C_CON2_OVER_INTEN_Msk

#define I2C_CON2_OVER_INTEN_Msk (0x1ul << I2C_CON2_OVER_INTEN_Pos)

I2C_T::CON2: OVER_INTEN Mask

Definition at line 5199 of file Nano1X2Series.h.

## ◆ I2C_CON2_OVER_INTEN_Pos

#define I2C_CON2_OVER_INTEN_Pos (1)

I2C_T::CON2: OVER_INTEN Position

Definition at line 5198 of file Nano1X2Series.h.

## ◆ I2C_CON2_TWOFF_EN_Msk

#define I2C_CON2_TWOFF_EN_Msk (0x1ul << I2C_CON2_TWOFF_EN_Pos)

I2C_T::CON2: TWOFF_EN Mask

Definition at line 5205 of file Nano1X2Series.h.

## ◆ I2C_CON2_TWOFF_EN_Pos

#define I2C_CON2_TWOFF_EN_Pos (4)

I2C_T::CON2: TWOFF_EN Position

Definition at line 5204 of file Nano1X2Series.h.

## ◆ I2C_CON2_UNDER_INTEN_Msk

#define I2C_CON2_UNDER_INTEN_Msk (0x1ul << I2C_CON2_UNDER_INTEN_Pos)

I2C_T::CON2: UNDER_INTEN Mask

Definition at line 5202 of file Nano1X2Series.h.

## ◆ I2C_CON2_UNDER_INTEN_Pos

#define I2C_CON2_UNDER_INTEN_Pos (2)

I2C_T::CON2: UNDER_INTEN Position

Definition at line 5201 of file Nano1X2Series.h.

## ◆ I2C_CON2_WKUPEN_Msk

#define I2C_CON2_WKUPEN_Msk (0x1ul << I2C_CON2_WKUPEN_Pos)

I2C_T::CON2: WKUPEN Mask

Definition at line 5196 of file Nano1X2Series.h.

## ◆ I2C_CON2_WKUPEN_Pos

#define I2C_CON2_WKUPEN_Pos (0)

I2C_T::CON2: WKUPEN Position

Definition at line 5195 of file Nano1X2Series.h.

## ◆ I2C_CON_ACK_Msk

#define I2C_CON_ACK_Msk (0x1ul << I2C_CON_ACK_Pos)

I2C_T::CON: ACK Mask

Definition at line 5139 of file Nano1X2Series.h.

## ◆ I2C_CON_ACK_Pos

#define I2C_CON_ACK_Pos (1)

I2C_T::CON: ACK Position

Definition at line 5138 of file Nano1X2Series.h.

## ◆ I2C_CON_I2C_STS_Msk

#define I2C_CON_I2C_STS_Msk (0x1ul << I2C_CON_I2C_STS_Pos)

I2C_T::CON: I2C_STS Mask

Definition at line 5148 of file Nano1X2Series.h.

## ◆ I2C_CON_I2C_STS_Pos

#define I2C_CON_I2C_STS_Pos (4)

I2C_T::CON: I2C_STS Position

Definition at line 5147 of file Nano1X2Series.h.

## ◆ I2C_CON_INTEN_Msk

#define I2C_CON_INTEN_Msk (0x1ul << I2C_CON_INTEN_Pos)

I2C_T::CON: INTEN Mask

Definition at line 5151 of file Nano1X2Series.h.

## ◆ I2C_CON_INTEN_Pos

#define I2C_CON_INTEN_Pos (7)

I2C_T::CON: INTEN Position

Definition at line 5150 of file Nano1X2Series.h.

## ◆ I2C_CON_IPEN_Msk

#define I2C_CON_IPEN_Msk (0x1ul << I2C_CON_IPEN_Pos)

I2C_T::CON: IPEN Mask

Definition at line 5136 of file Nano1X2Series.h.

## ◆ I2C_CON_IPEN_Pos

#define I2C_CON_IPEN_Pos (0)

    @addtogroup I2C_CONST I2C Bit Field Definition
    Constant Definitions for I2C Controller

I2C_T::CON: IPEN Position

Definition at line 5135 of file Nano1X2Series.h.

## ◆ I2C_CON_START_Msk

#define I2C_CON_START_Msk (0x1ul << I2C_CON_START_Pos)

I2C_T::CON: START Mask

Definition at line 5145 of file Nano1X2Series.h.

## ◆ I2C_CON_START_Pos

#define I2C_CON_START_Pos (3)

I2C_T::CON: START Position

Definition at line 5144 of file Nano1X2Series.h.

## ◆ I2C_CON_STOP_Msk

#define I2C_CON_STOP_Msk (0x1ul << I2C_CON_STOP_Pos)

I2C_T::CON: STOP Mask

Definition at line 5142 of file Nano1X2Series.h.

## ◆ I2C_CON_STOP_Pos

#define I2C_CON_STOP_Pos (2)

I2C_T::CON: STOP Position

Definition at line 5141 of file Nano1X2Series.h.

## ◆ I2C_DATA_DATA_Msk

#define I2C_DATA_DATA_Msk (0xfful << I2C_DATA_DATA_Pos)

I2C_T::DATA: DATA Mask

Definition at line 5175 of file Nano1X2Series.h.

## ◆ I2C_DATA_DATA_Pos

#define I2C_DATA_DATA_Pos (0)

I2C_T::DATA: DATA Position

Definition at line 5174 of file Nano1X2Series.h.

## ◆ I2C_DIV_CLK_DIV_Msk

#define I2C_DIV_CLK_DIV_Msk (0xfful << I2C_DIV_CLK_DIV_Pos)

I2C_T::DIV: CLK_DIV Mask

Definition at line 5166 of file Nano1X2Series.h.

## ◆ I2C_DIV_CLK_DIV_Pos

#define I2C_DIV_CLK_DIV_Pos (0)

I2C_T::DIV: CLK_DIV Position

Definition at line 5165 of file Nano1X2Series.h.

## ◆ I2C_INTSTS_INTSTS_Msk

#define I2C_INTSTS_INTSTS_Msk (0x1ul << I2C_INTSTS_INTSTS_Pos)

I2C_T::INTSTS: INTSTS Mask

Definition at line 5154 of file Nano1X2Series.h.

## ◆ I2C_INTSTS_INTSTS_Pos

#define I2C_INTSTS_INTSTS_Pos (0)

I2C_T::INTSTS: INTSTS Position

Definition at line 5153 of file Nano1X2Series.h.

## ◆ I2C_INTSTS_TIF_Msk

#define I2C_INTSTS_TIF_Msk (0x1ul << I2C_INTSTS_TIF_Pos)

I2C_T::INTSTS: TIF Mask

Definition at line 5157 of file Nano1X2Series.h.

## ◆ I2C_INTSTS_TIF_Pos

#define I2C_INTSTS_TIF_Pos (1)

I2C_T::INTSTS: TIF Position

Definition at line 5156 of file Nano1X2Series.h.

## ◆ I2C_INTSTS_WAKEUP_ACK_DONE_Msk

#define I2C_INTSTS_WAKEUP_ACK_DONE_Msk (0x1ul << I2C_INTSTS_WAKEUP_ACK_DONE_Pos)

I2C_T::INTSTS: WAKEUP_ACK_DONE Mask

Definition at line 5160 of file Nano1X2Series.h.

## ◆ I2C_INTSTS_WAKEUP_ACK_DONE_Pos

#define I2C_INTSTS_WAKEUP_ACK_DONE_Pos (7)

I2C_T::INTSTS: WAKEUP_ACK_DONE Position

Definition at line 5159 of file Nano1X2Series.h.

## ◆ I2C_SADDR0_GCALL_Msk

#define I2C_SADDR0_GCALL_Msk (0x1ul << I2C_SADDR0_GCALL_Pos)

I2C_T::SADDR0: GCALL Mask

Definition at line 5178 of file Nano1X2Series.h.

## ◆ I2C_SADDR0_GCALL_Pos

#define I2C_SADDR0_GCALL_Pos (0)

I2C_T::SADDR0: GCALL Position

Definition at line 5177 of file Nano1X2Series.h.

## ◆ I2C_SADDR0_SADDR_Msk

#define I2C_SADDR0_SADDR_Msk (0x7ful << I2C_SADDR0_SADDR_Pos)

I2C_T::SADDR0: SADDR Mask

Definition at line 5181 of file Nano1X2Series.h.

## ◆ I2C_SADDR0_SADDR_Pos

#define I2C_SADDR0_SADDR_Pos (1)

I2C_T::SADDR0: SADDR Position

Definition at line 5180 of file Nano1X2Series.h.

## ◆ I2C_SADDR1_GCALL_Msk

#define I2C_SADDR1_GCALL_Msk (0x1ul << I2C_SADDR1_GCALL_Pos)

I2C_T::SADDR1: GCALL Mask

Definition at line 5184 of file Nano1X2Series.h.

## ◆ I2C_SADDR1_GCALL_Pos

#define I2C_SADDR1_GCALL_Pos (0)

I2C_T::SADDR1: GCALL Position

Definition at line 5183 of file Nano1X2Series.h.

## ◆ I2C_SADDR1_SADDR_Msk

#define I2C_SADDR1_SADDR_Msk (0x7ful << I2C_SADDR1_SADDR_Pos)

I2C_T::SADDR1: SADDR Mask

Definition at line 5187 of file Nano1X2Series.h.

## ◆ I2C_SADDR1_SADDR_Pos

#define I2C_SADDR1_SADDR_Pos (1)

I2C_T::SADDR1: SADDR Position

Definition at line 5186 of file Nano1X2Series.h.

## ◆ I2C_SAMASK0_SAMASK_Msk

#define I2C_SAMASK0_SAMASK_Msk (0x7ful << I2C_SAMASK0_SAMASK_Pos)

I2C_T::SAMASK0: SAMASK Mask

Definition at line 5190 of file Nano1X2Series.h.

## ◆ I2C_SAMASK0_SAMASK_Pos

#define I2C_SAMASK0_SAMASK_Pos (1)

I2C_T::SAMASK0: SAMASK Position

Definition at line 5189 of file Nano1X2Series.h.

## ◆ I2C_SAMASK1_SAMASK_Msk

#define I2C_SAMASK1_SAMASK_Msk (0x7ful << I2C_SAMASK1_SAMASK_Pos)

I2C_T::SAMASK1: SAMASK Mask

Definition at line 5193 of file Nano1X2Series.h.

## ◆ I2C_SAMASK1_SAMASK_Pos

#define I2C_SAMASK1_SAMASK_Pos (1)

I2C_T::SAMASK1: SAMASK Position

Definition at line 5192 of file Nano1X2Series.h.

## ◆ I2C_STATUS2_BUS_FREE_Msk

#define I2C_STATUS2_BUS_FREE_Msk (0x1ul << I2C_STATUS2_BUS_FREE_Pos)

I2C_T::STATUS2: BUS_FREE Mask

Definition at line 5229 of file Nano1X2Series.h.

## ◆ I2C_STATUS2_BUS_FREE_Pos

#define I2C_STATUS2_BUS_FREE_Pos (6)

I2C_T::STATUS2: BUS_FREE Position

Definition at line 5228 of file Nano1X2Series.h.

## ◆ I2C_STATUS2_EMPTY_Msk

#define I2C_STATUS2_EMPTY_Msk (0x1ul << I2C_STATUS2_EMPTY_Pos)

I2C_T::STATUS2: EMPTY Mask

Definition at line 5226 of file Nano1X2Series.h.

## ◆ I2C_STATUS2_EMPTY_Pos

#define I2C_STATUS2_EMPTY_Pos (5)

I2C_T::STATUS2: EMPTY Position

Definition at line 5225 of file Nano1X2Series.h.

## ◆ I2C_STATUS2_FULL_Msk

#define I2C_STATUS2_FULL_Msk (0x1ul << I2C_STATUS2_FULL_Pos)

I2C_T::STATUS2: FULL Mask

Definition at line 5223 of file Nano1X2Series.h.

## ◆ I2C_STATUS2_FULL_Pos

#define I2C_STATUS2_FULL_Pos (4)

I2C_T::STATUS2: FULL Position

Definition at line 5222 of file Nano1X2Series.h.

## ◆ I2C_STATUS2_OVERUN_Msk

#define I2C_STATUS2_OVERUN_Msk (0x1ul << I2C_STATUS2_OVERUN_Pos)

I2C_T::STATUS2: OVERUN Mask

Definition at line 5214 of file Nano1X2Series.h.

## ◆ I2C_STATUS2_OVERUN_Pos

#define I2C_STATUS2_OVERUN_Pos (1)

I2C_T::STATUS2: OVERUN Position

Definition at line 5213 of file Nano1X2Series.h.

## ◆ I2C_STATUS2_UNDERUN_Msk

#define I2C_STATUS2_UNDERUN_Msk (0x1ul << I2C_STATUS2_UNDERUN_Pos)

I2C_T::STATUS2: UNDERUN Mask

Definition at line 5217 of file Nano1X2Series.h.

## ◆ I2C_STATUS2_UNDERUN_Pos

#define I2C_STATUS2_UNDERUN_Pos (2)

I2C_T::STATUS2: UNDERUN Position

Definition at line 5216 of file Nano1X2Series.h.

## ◆ I2C_STATUS2_WKUPIF_Msk

#define I2C_STATUS2_WKUPIF_Msk (0x1ul << I2C_STATUS2_WKUPIF_Pos)

I2C_T::STATUS2: WKUPIF Mask

Definition at line 5211 of file Nano1X2Series.h.

## ◆ I2C_STATUS2_WKUPIF_Pos

#define I2C_STATUS2_WKUPIF_Pos (0)

I2C_T::STATUS2: WKUPIF Position

Definition at line 5210 of file Nano1X2Series.h.

## ◆ I2C_STATUS2_WR_STATUS_Msk

#define I2C_STATUS2_WR_STATUS_Msk (0x1ul << I2C_STATUS2_WR_STATUS_Pos)

I2C_T::STATUS2: WR_STATUS Mask

Definition at line 5220 of file Nano1X2Series.h.

## ◆ I2C_STATUS2_WR_STATUS_Pos

#define I2C_STATUS2_WR_STATUS_Pos (3)

I2C_T::STATUS2: WR_STATUS Position

Definition at line 5219 of file Nano1X2Series.h.

## ◆ I2C_STATUS_STATUS_Msk

#define I2C_STATUS_STATUS_Msk (0xfful << I2C_STATUS_STATUS_Pos)

I2C_T::STATUS: STATUS Mask

Definition at line 5163 of file Nano1X2Series.h.

## ◆ I2C_STATUS_STATUS_Pos

#define I2C_STATUS_STATUS_Pos (0)

I2C_T::STATUS: STATUS Position

Definition at line 5162 of file Nano1X2Series.h.

## ◆ I2C_TOUT_DIV4_Msk

#define I2C_TOUT_DIV4_Msk (0x1ul << I2C_TOUT_DIV4_Pos)

I2C_T::TOUT: DIV4 Mask

Definition at line 5172 of file Nano1X2Series.h.

## ◆ I2C_TOUT_DIV4_Pos

#define I2C_TOUT_DIV4_Pos (1)

I2C_T::TOUT: DIV4 Position

Definition at line 5171 of file Nano1X2Series.h.

## ◆ I2C_TOUT_TOUTEN_Msk

#define I2C_TOUT_TOUTEN_Msk (0x1ul << I2C_TOUT_TOUTEN_Pos)

I2C_T::TOUT: TOUTEN Mask

Definition at line 5169 of file Nano1X2Series.h.

## ◆ I2C_TOUT_TOUTEN_Pos

#define I2C_TOUT_TOUTEN_Pos (0)

I2C_T::TOUT: TOUTEN Position

Definition at line 5168 of file Nano1X2Series.h.

## ◆ LCD_CTL_BLINK_Msk

#define LCD_CTL_BLINK_Msk (0x1ul << LCD_CTL_BLINK_Pos)

LCD_T::CTL: BLINK Mask

Definition at line 5566 of file Nano1X2Series.h.

## ◆ LCD_CTL_BLINK_Pos

#define LCD_CTL_BLINK_Pos (7)

LCD_T::CTL: BLINK Position

Definition at line 5565 of file Nano1X2Series.h.

## ◆ LCD_CTL_EN_Msk

#define LCD_CTL_EN_Msk (0x1ul << LCD_CTL_EN_Pos)

LCD_T::CTL: EN Mask

Definition at line 5557 of file Nano1X2Series.h.

## ◆ LCD_CTL_EN_Pos

#define LCD_CTL_EN_Pos (0)

    @addtogroup LCD_CONST LCD Bit Field Definition
    Constant Definitions for LCD Controller

LCD_T::CTL: EN Position

Definition at line 5556 of file Nano1X2Series.h.

## ◆ LCD_CTL_FREQ_Msk

#define LCD_CTL_FREQ_Msk (0x7ul << LCD_CTL_FREQ_Pos)

LCD_T::CTL: FREQ Mask

Definition at line 5563 of file Nano1X2Series.h.

## ◆ LCD_CTL_FREQ_Pos

#define LCD_CTL_FREQ_Pos (4)

LCD_T::CTL: FREQ Position

Definition at line 5562 of file Nano1X2Series.h.

## ◆ LCD_CTL_MUX_Msk

#define LCD_CTL_MUX_Msk (0x7ul << LCD_CTL_MUX_Pos)

LCD_T::CTL: MUX Mask

Definition at line 5560 of file Nano1X2Series.h.

## ◆ LCD_CTL_MUX_Pos

#define LCD_CTL_MUX_Pos (1)

LCD_T::CTL: MUX Position

Definition at line 5559 of file Nano1X2Series.h.

## ◆ LCD_CTL_PDDISP_EN_Msk

#define LCD_CTL_PDDISP_EN_Msk (0x1ul << LCD_CTL_PDDISP_EN_Pos)

LCD_T::CTL: PDDISP_EN Mask

Definition at line 5569 of file Nano1X2Series.h.

## ◆ LCD_CTL_PDDISP_EN_Pos

#define LCD_CTL_PDDISP_EN_Pos (8)

LCD_T::CTL: PDDISP_EN Position

Definition at line 5568 of file Nano1X2Series.h.

## ◆ LCD_CTL_PDINT_EN_Msk

#define LCD_CTL_PDINT_EN_Msk (0x1ul << LCD_CTL_PDINT_EN_Pos)

LCD_T::CTL: PDINT_EN Mask

Definition at line 5572 of file Nano1X2Series.h.

## ◆ LCD_CTL_PDINT_EN_Pos

#define LCD_CTL_PDINT_EN_Pos (9)

LCD_T::CTL: PDINT_EN Position

Definition at line 5571 of file Nano1X2Series.h.

## ◆ LCD_DISPCTL_BIAS_SEL_Msk

#define LCD_DISPCTL_BIAS_SEL_Msk (0x3ul << LCD_DISPCTL_BIAS_SEL_Pos)

LCD_T::DISPCTL: BIAS_SEL Mask

Definition at line 5578 of file Nano1X2Series.h.

## ◆ LCD_DISPCTL_BIAS_SEL_Pos

#define LCD_DISPCTL_BIAS_SEL_Pos (1)

LCD_T::DISPCTL: BIAS_SEL Position

Definition at line 5577 of file Nano1X2Series.h.

## ◆ LCD_DISPCTL_BV_SEL_Msk

#define LCD_DISPCTL_BV_SEL_Msk (0x1ul << LCD_DISPCTL_BV_SEL_Pos)

LCD_T::DISPCTL: BV_SEL Mask

Definition at line 5584 of file Nano1X2Series.h.

## ◆ LCD_DISPCTL_BV_SEL_Pos

#define LCD_DISPCTL_BV_SEL_Pos (6)

LCD_T::DISPCTL: BV_SEL Position

Definition at line 5583 of file Nano1X2Series.h.

## ◆ LCD_DISPCTL_CPUMP_EN_Msk

#define LCD_DISPCTL_CPUMP_EN_Msk (0x1ul << LCD_DISPCTL_CPUMP_EN_Pos)

LCD_T::DISPCTL: CPUMP_EN Mask

Definition at line 5575 of file Nano1X2Series.h.

## ◆ LCD_DISPCTL_CPUMP_EN_Pos

#define LCD_DISPCTL_CPUMP_EN_Pos (0)

LCD_T::DISPCTL: CPUMP_EN Position

Definition at line 5574 of file Nano1X2Series.h.

## ◆ LCD_DISPCTL_CPUMP_FREQ_Msk

#define LCD_DISPCTL_CPUMP_FREQ_Msk (0x7ul << LCD_DISPCTL_CPUMP_FREQ_Pos)

LCD_T::DISPCTL: CPUMP_FREQ Mask

Definition at line 5590 of file Nano1X2Series.h.

## ◆ LCD_DISPCTL_CPUMP_FREQ_Pos

#define LCD_DISPCTL_CPUMP_FREQ_Pos (11)

LCD_T::DISPCTL: CPUMP_FREQ Position

Definition at line 5589 of file Nano1X2Series.h.

## ◆ LCD_DISPCTL_CPUMP_VOL_SET_Msk

#define LCD_DISPCTL_CPUMP_VOL_SET_Msk (0x7ul << LCD_DISPCTL_CPUMP_VOL_SET_Pos)

LCD_T::DISPCTL: CPUMP_VOL_SET Mask

Definition at line 5587 of file Nano1X2Series.h.

## ◆ LCD_DISPCTL_CPUMP_VOL_SET_Pos

#define LCD_DISPCTL_CPUMP_VOL_SET_Pos (8)

LCD_T::DISPCTL: CPUMP_VOL_SET Position

Definition at line 5586 of file Nano1X2Series.h.

## ◆ LCD_DISPCTL_Ext_C_Msk

#define LCD_DISPCTL_Ext_C_Msk (0x1ul << LCD_DISPCTL_Ext_C_Pos)

LCD_T::DISPCTL: Ext_C Mask

Definition at line 5593 of file Nano1X2Series.h.

## ◆ LCD_DISPCTL_Ext_C_Pos

#define LCD_DISPCTL_Ext_C_Pos (16)

LCD_T::DISPCTL: Ext_C Position

Definition at line 5592 of file Nano1X2Series.h.

## ◆ LCD_DISPCTL_IBRL_EN_Msk

#define LCD_DISPCTL_IBRL_EN_Msk (0x1ul << LCD_DISPCTL_IBRL_EN_Pos)

LCD_T::DISPCTL: IBRL_EN Mask

Definition at line 5581 of file Nano1X2Series.h.

## ◆ LCD_DISPCTL_IBRL_EN_Pos

#define LCD_DISPCTL_IBRL_EN_Pos (4)

LCD_T::DISPCTL: IBRL_EN Position

Definition at line 5580 of file Nano1X2Series.h.

## ◆ LCD_DISPCTL_Res_Sel_Msk

#define LCD_DISPCTL_Res_Sel_Msk (0x3ul << LCD_DISPCTL_Res_Sel_Pos)

LCD_T::DISPCTL: Res_Sel Mask

Definition at line 5596 of file Nano1X2Series.h.

## ◆ LCD_DISPCTL_Res_Sel_Pos

#define LCD_DISPCTL_Res_Sel_Pos (17)

LCD_T::DISPCTL: Res_Sel Position

Definition at line 5595 of file Nano1X2Series.h.

## ◆ LCD_FCR_FCEN_Msk

#define LCD_FCR_FCEN_Msk (0x1ul << LCD_FCR_FCEN_Pos)

LCD_T::FCR: FCEN Mask

Definition at line 5707 of file Nano1X2Series.h.

## ◆ LCD_FCR_FCEN_Pos

#define LCD_FCR_FCEN_Pos (0)

LCD_T::FCR: FCEN Position

Definition at line 5706 of file Nano1X2Series.h.

## ◆ LCD_FCR_FCINTEN_Msk

#define LCD_FCR_FCINTEN_Msk (0x1ul << LCD_FCR_FCINTEN_Pos)

LCD_T::FCR: FCINTEN Mask

Definition at line 5710 of file Nano1X2Series.h.

## ◆ LCD_FCR_FCINTEN_Pos

#define LCD_FCR_FCINTEN_Pos (1)

LCD_T::FCR: FCINTEN Position

Definition at line 5709 of file Nano1X2Series.h.

## ◆ LCD_FCR_FCV_Msk

#define LCD_FCR_FCV_Msk (0x3ful << LCD_FCR_FCV_Pos)

LCD_T::FCR: FCV Mask

Definition at line 5716 of file Nano1X2Series.h.

## ◆ LCD_FCR_FCV_Pos

#define LCD_FCR_FCV_Pos (4)

LCD_T::FCR: FCV Position

Definition at line 5715 of file Nano1X2Series.h.

## ◆ LCD_FCR_PRESCL_Msk

#define LCD_FCR_PRESCL_Msk (0x3ul << LCD_FCR_PRESCL_Pos)

LCD_T::FCR: PRESCL Mask

Definition at line 5713 of file Nano1X2Series.h.

## ◆ LCD_FCR_PRESCL_Pos

#define LCD_FCR_PRESCL_Pos (2)

LCD_T::FCR: PRESCL Position

Definition at line 5712 of file Nano1X2Series.h.

## ◆ LCD_FCSTS_FCSTS_Msk

#define LCD_FCSTS_FCSTS_Msk (0x1ul << LCD_FCSTS_FCSTS_Pos)

LCD_T::FCSTS: FCSTS Mask

Definition at line 5719 of file Nano1X2Series.h.

## ◆ LCD_FCSTS_FCSTS_Pos

#define LCD_FCSTS_FCSTS_Pos (0)

LCD_T::FCSTS: FCSTS Position

Definition at line 5718 of file Nano1X2Series.h.

## ◆ LCD_FCSTS_PDSTS_Msk

#define LCD_FCSTS_PDSTS_Msk (0x1ul << LCD_FCSTS_PDSTS_Pos)

LCD_T::FCSTS: PDSTS Mask

Definition at line 5722 of file Nano1X2Series.h.

## ◆ LCD_FCSTS_PDSTS_Pos

#define LCD_FCSTS_PDSTS_Pos (1)

LCD_T::FCSTS: PDSTS Position

Definition at line 5721 of file Nano1X2Series.h.

## ◆ LCD_MEM_0_SEG_0_4x_Msk

#define LCD_MEM_0_SEG_0_4x_Msk (0x3ful << LCD_MEM_0_SEG_0_4x_Pos)

LCD_T::MEM_0: SEG_0_4x Mask

Definition at line 5599 of file Nano1X2Series.h.

## ◆ LCD_MEM_0_SEG_0_4x_Pos

#define LCD_MEM_0_SEG_0_4x_Pos (0)

LCD_T::MEM_0: SEG_0_4x Position

Definition at line 5598 of file Nano1X2Series.h.

## ◆ LCD_MEM_0_SEG_1_4x_Msk

#define LCD_MEM_0_SEG_1_4x_Msk (0x7ful << LCD_MEM_0_SEG_1_4x_Pos)

LCD_T::MEM_0: SEG_1_4x Mask

Definition at line 5602 of file Nano1X2Series.h.

## ◆ LCD_MEM_0_SEG_1_4x_Pos

#define LCD_MEM_0_SEG_1_4x_Pos (8)

LCD_T::MEM_0: SEG_1_4x Position

Definition at line 5601 of file Nano1X2Series.h.

## ◆ LCD_MEM_0_SEG_2_4x_Msk

#define LCD_MEM_0_SEG_2_4x_Msk (0x3ful << LCD_MEM_0_SEG_2_4x_Pos)

LCD_T::MEM_0: SEG_2_4x Mask

Definition at line 5605 of file Nano1X2Series.h.

## ◆ LCD_MEM_0_SEG_2_4x_Pos

#define LCD_MEM_0_SEG_2_4x_Pos (16)

LCD_T::MEM_0: SEG_2_4x Position

Definition at line 5604 of file Nano1X2Series.h.

## ◆ LCD_MEM_0_SEG_3_4x_Msk

#define LCD_MEM_0_SEG_3_4x_Msk (0x3ful << LCD_MEM_0_SEG_3_4x_Pos)

LCD_T::MEM_0: SEG_3_4x Mask

Definition at line 5608 of file Nano1X2Series.h.

## ◆ LCD_MEM_0_SEG_3_4x_Pos

#define LCD_MEM_0_SEG_3_4x_Pos (24)

LCD_T::MEM_0: SEG_3_4x Position

Definition at line 5607 of file Nano1X2Series.h.

## ◆ LCD_MEM_1_SEG_0_4x_Msk

#define LCD_MEM_1_SEG_0_4x_Msk (0x3ful << LCD_MEM_1_SEG_0_4x_Pos)

LCD_T::MEM_1: SEG_0_4x Mask

Definition at line 5611 of file Nano1X2Series.h.

## ◆ LCD_MEM_1_SEG_0_4x_Pos

#define LCD_MEM_1_SEG_0_4x_Pos (0)

LCD_T::MEM_1: SEG_0_4x Position

Definition at line 5610 of file Nano1X2Series.h.

## ◆ LCD_MEM_1_SEG_1_4x_Msk

#define LCD_MEM_1_SEG_1_4x_Msk (0x7ful << LCD_MEM_1_SEG_1_4x_Pos)

LCD_T::MEM_1: SEG_1_4x Mask

Definition at line 5614 of file Nano1X2Series.h.

## ◆ LCD_MEM_1_SEG_1_4x_Pos

#define LCD_MEM_1_SEG_1_4x_Pos (8)

LCD_T::MEM_1: SEG_1_4x Position

Definition at line 5613 of file Nano1X2Series.h.

## ◆ LCD_MEM_1_SEG_2_4x_Msk

#define LCD_MEM_1_SEG_2_4x_Msk (0x3ful << LCD_MEM_1_SEG_2_4x_Pos)

LCD_T::MEM_1: SEG_2_4x Mask

Definition at line 5617 of file Nano1X2Series.h.

## ◆ LCD_MEM_1_SEG_2_4x_Pos

#define LCD_MEM_1_SEG_2_4x_Pos (16)

LCD_T::MEM_1: SEG_2_4x Position

Definition at line 5616 of file Nano1X2Series.h.

## ◆ LCD_MEM_1_SEG_3_4x_Msk

#define LCD_MEM_1_SEG_3_4x_Msk (0x3ful << LCD_MEM_1_SEG_3_4x_Pos)

LCD_T::MEM_1: SEG_3_4x Mask

Definition at line 5620 of file Nano1X2Series.h.

## ◆ LCD_MEM_1_SEG_3_4x_Pos

#define LCD_MEM_1_SEG_3_4x_Pos (24)

LCD_T::MEM_1: SEG_3_4x Position

Definition at line 5619 of file Nano1X2Series.h.

## ◆ LCD_MEM_2_SEG_0_4x_Msk

#define LCD_MEM_2_SEG_0_4x_Msk (0x3ful << LCD_MEM_2_SEG_0_4x_Pos)

LCD_T::MEM_2: SEG_0_4x Mask

Definition at line 5623 of file Nano1X2Series.h.

## ◆ LCD_MEM_2_SEG_0_4x_Pos

#define LCD_MEM_2_SEG_0_4x_Pos (0)

LCD_T::MEM_2: SEG_0_4x Position

Definition at line 5622 of file Nano1X2Series.h.

## ◆ LCD_MEM_2_SEG_1_4x_Msk

#define LCD_MEM_2_SEG_1_4x_Msk (0x7ful << LCD_MEM_2_SEG_1_4x_Pos)

LCD_T::MEM_2: SEG_1_4x Mask

Definition at line 5626 of file Nano1X2Series.h.

## ◆ LCD_MEM_2_SEG_1_4x_Pos

#define LCD_MEM_2_SEG_1_4x_Pos (8)

LCD_T::MEM_2: SEG_1_4x Position

Definition at line 5625 of file Nano1X2Series.h.

## ◆ LCD_MEM_2_SEG_2_4x_Msk

#define LCD_MEM_2_SEG_2_4x_Msk (0x3ful << LCD_MEM_2_SEG_2_4x_Pos)

LCD_T::MEM_2: SEG_2_4x Mask

Definition at line 5629 of file Nano1X2Series.h.

## ◆ LCD_MEM_2_SEG_2_4x_Pos

#define LCD_MEM_2_SEG_2_4x_Pos (16)

LCD_T::MEM_2: SEG_2_4x Position

Definition at line 5628 of file Nano1X2Series.h.

## ◆ LCD_MEM_2_SEG_3_4x_Msk

#define LCD_MEM_2_SEG_3_4x_Msk (0x3ful << LCD_MEM_2_SEG_3_4x_Pos)

LCD_T::MEM_2: SEG_3_4x Mask

Definition at line 5632 of file Nano1X2Series.h.

## ◆ LCD_MEM_2_SEG_3_4x_Pos

#define LCD_MEM_2_SEG_3_4x_Pos (24)

LCD_T::MEM_2: SEG_3_4x Position

Definition at line 5631 of file Nano1X2Series.h.

## ◆ LCD_MEM_3_SEG_0_4x_Msk

#define LCD_MEM_3_SEG_0_4x_Msk (0x3ful << LCD_MEM_3_SEG_0_4x_Pos)

LCD_T::MEM_3: SEG_0_4x Mask

Definition at line 5635 of file Nano1X2Series.h.

## ◆ LCD_MEM_3_SEG_0_4x_Pos

#define LCD_MEM_3_SEG_0_4x_Pos (0)

LCD_T::MEM_3: SEG_0_4x Position

Definition at line 5634 of file Nano1X2Series.h.

## ◆ LCD_MEM_3_SEG_1_4x_Msk

#define LCD_MEM_3_SEG_1_4x_Msk (0x7ful << LCD_MEM_3_SEG_1_4x_Pos)

LCD_T::MEM_3: SEG_1_4x Mask

Definition at line 5638 of file Nano1X2Series.h.

## ◆ LCD_MEM_3_SEG_1_4x_Pos

#define LCD_MEM_3_SEG_1_4x_Pos (8)

LCD_T::MEM_3: SEG_1_4x Position

Definition at line 5637 of file Nano1X2Series.h.

## ◆ LCD_MEM_3_SEG_2_4x_Msk

#define LCD_MEM_3_SEG_2_4x_Msk (0x3ful << LCD_MEM_3_SEG_2_4x_Pos)

LCD_T::MEM_3: SEG_2_4x Mask

Definition at line 5641 of file Nano1X2Series.h.

## ◆ LCD_MEM_3_SEG_2_4x_Pos

#define LCD_MEM_3_SEG_2_4x_Pos (16)

LCD_T::MEM_3: SEG_2_4x Position

Definition at line 5640 of file Nano1X2Series.h.

## ◆ LCD_MEM_3_SEG_3_4x_Msk

#define LCD_MEM_3_SEG_3_4x_Msk (0x3ful << LCD_MEM_3_SEG_3_4x_Pos)

LCD_T::MEM_3: SEG_3_4x Mask

Definition at line 5644 of file Nano1X2Series.h.

## ◆ LCD_MEM_3_SEG_3_4x_Pos

#define LCD_MEM_3_SEG_3_4x_Pos (24)

LCD_T::MEM_3: SEG_3_4x Position

Definition at line 5643 of file Nano1X2Series.h.

## ◆ LCD_MEM_4_SEG_0_4x_Msk

#define LCD_MEM_4_SEG_0_4x_Msk (0x3ful << LCD_MEM_4_SEG_0_4x_Pos)

LCD_T::MEM_4: SEG_0_4x Mask

Definition at line 5647 of file Nano1X2Series.h.

## ◆ LCD_MEM_4_SEG_0_4x_Pos

#define LCD_MEM_4_SEG_0_4x_Pos (0)

LCD_T::MEM_4: SEG_0_4x Position

Definition at line 5646 of file Nano1X2Series.h.

## ◆ LCD_MEM_4_SEG_1_4x_Msk

#define LCD_MEM_4_SEG_1_4x_Msk (0x7ful << LCD_MEM_4_SEG_1_4x_Pos)

LCD_T::MEM_4: SEG_1_4x Mask

Definition at line 5650 of file Nano1X2Series.h.

## ◆ LCD_MEM_4_SEG_1_4x_Pos

#define LCD_MEM_4_SEG_1_4x_Pos (8)

LCD_T::MEM_4: SEG_1_4x Position

Definition at line 5649 of file Nano1X2Series.h.

## ◆ LCD_MEM_4_SEG_2_4x_Msk

#define LCD_MEM_4_SEG_2_4x_Msk (0x3ful << LCD_MEM_4_SEG_2_4x_Pos)

LCD_T::MEM_4: SEG_2_4x Mask

Definition at line 5653 of file Nano1X2Series.h.

## ◆ LCD_MEM_4_SEG_2_4x_Pos

#define LCD_MEM_4_SEG_2_4x_Pos (16)

LCD_T::MEM_4: SEG_2_4x Position

Definition at line 5652 of file Nano1X2Series.h.

## ◆ LCD_MEM_4_SEG_3_4x_Msk

#define LCD_MEM_4_SEG_3_4x_Msk (0x3ful << LCD_MEM_4_SEG_3_4x_Pos)

LCD_T::MEM_4: SEG_3_4x Mask

Definition at line 5656 of file Nano1X2Series.h.

## ◆ LCD_MEM_4_SEG_3_4x_Pos

#define LCD_MEM_4_SEG_3_4x_Pos (24)

LCD_T::MEM_4: SEG_3_4x Position

Definition at line 5655 of file Nano1X2Series.h.

## ◆ LCD_MEM_5_SEG_0_4x_Msk

#define LCD_MEM_5_SEG_0_4x_Msk (0x3ful << LCD_MEM_5_SEG_0_4x_Pos)

LCD_T::MEM_5: SEG_0_4x Mask

Definition at line 5659 of file Nano1X2Series.h.

## ◆ LCD_MEM_5_SEG_0_4x_Pos

#define LCD_MEM_5_SEG_0_4x_Pos (0)

LCD_T::MEM_5: SEG_0_4x Position

Definition at line 5658 of file Nano1X2Series.h.

## ◆ LCD_MEM_5_SEG_1_4x_Msk

#define LCD_MEM_5_SEG_1_4x_Msk (0x7ful << LCD_MEM_5_SEG_1_4x_Pos)

LCD_T::MEM_5: SEG_1_4x Mask

Definition at line 5662 of file Nano1X2Series.h.

## ◆ LCD_MEM_5_SEG_1_4x_Pos

#define LCD_MEM_5_SEG_1_4x_Pos (8)

LCD_T::MEM_5: SEG_1_4x Position

Definition at line 5661 of file Nano1X2Series.h.

## ◆ LCD_MEM_5_SEG_2_4x_Msk

#define LCD_MEM_5_SEG_2_4x_Msk (0x3ful << LCD_MEM_5_SEG_2_4x_Pos)

LCD_T::MEM_5: SEG_2_4x Mask

Definition at line 5665 of file Nano1X2Series.h.

## ◆ LCD_MEM_5_SEG_2_4x_Pos

#define LCD_MEM_5_SEG_2_4x_Pos (16)

LCD_T::MEM_5: SEG_2_4x Position

Definition at line 5664 of file Nano1X2Series.h.

## ◆ LCD_MEM_5_SEG_3_4x_Msk

#define LCD_MEM_5_SEG_3_4x_Msk (0x3ful << LCD_MEM_5_SEG_3_4x_Pos)

LCD_T::MEM_5: SEG_3_4x Mask

Definition at line 5668 of file Nano1X2Series.h.

## ◆ LCD_MEM_5_SEG_3_4x_Pos

#define LCD_MEM_5_SEG_3_4x_Pos (24)

LCD_T::MEM_5: SEG_3_4x Position

Definition at line 5667 of file Nano1X2Series.h.

## ◆ LCD_MEM_6_SEG_0_4x_Msk

#define LCD_MEM_6_SEG_0_4x_Msk (0x3ful << LCD_MEM_6_SEG_0_4x_Pos)

LCD_T::MEM_6: SEG_0_4x Mask

Definition at line 5671 of file Nano1X2Series.h.

## ◆ LCD_MEM_6_SEG_0_4x_Pos

#define LCD_MEM_6_SEG_0_4x_Pos (0)

LCD_T::MEM_6: SEG_0_4x Position

Definition at line 5670 of file Nano1X2Series.h.

## ◆ LCD_MEM_6_SEG_1_4x_Msk

#define LCD_MEM_6_SEG_1_4x_Msk (0x7ful << LCD_MEM_6_SEG_1_4x_Pos)

LCD_T::MEM_6: SEG_1_4x Mask

Definition at line 5674 of file Nano1X2Series.h.

## ◆ LCD_MEM_6_SEG_1_4x_Pos

#define LCD_MEM_6_SEG_1_4x_Pos (8)

LCD_T::MEM_6: SEG_1_4x Position

Definition at line 5673 of file Nano1X2Series.h.

## ◆ LCD_MEM_6_SEG_2_4x_Msk

#define LCD_MEM_6_SEG_2_4x_Msk (0x3ful << LCD_MEM_6_SEG_2_4x_Pos)

LCD_T::MEM_6: SEG_2_4x Mask

Definition at line 5677 of file Nano1X2Series.h.

## ◆ LCD_MEM_6_SEG_2_4x_Pos

#define LCD_MEM_6_SEG_2_4x_Pos (16)

LCD_T::MEM_6: SEG_2_4x Position

Definition at line 5676 of file Nano1X2Series.h.

## ◆ LCD_MEM_6_SEG_3_4x_Msk

#define LCD_MEM_6_SEG_3_4x_Msk (0x3ful << LCD_MEM_6_SEG_3_4x_Pos)

LCD_T::MEM_6: SEG_3_4x Mask

Definition at line 5680 of file Nano1X2Series.h.

## ◆ LCD_MEM_6_SEG_3_4x_Pos

#define LCD_MEM_6_SEG_3_4x_Pos (24)

LCD_T::MEM_6: SEG_3_4x Position

Definition at line 5679 of file Nano1X2Series.h.

## ◆ LCD_MEM_7_SEG_0_4x_Msk

#define LCD_MEM_7_SEG_0_4x_Msk (0x3ful << LCD_MEM_7_SEG_0_4x_Pos)

LCD_T::MEM_7: SEG_0_4x Mask

Definition at line 5683 of file Nano1X2Series.h.

## ◆ LCD_MEM_7_SEG_0_4x_Pos

#define LCD_MEM_7_SEG_0_4x_Pos (0)

LCD_T::MEM_7: SEG_0_4x Position

Definition at line 5682 of file Nano1X2Series.h.

## ◆ LCD_MEM_7_SEG_1_4x_Msk

#define LCD_MEM_7_SEG_1_4x_Msk (0x7ful << LCD_MEM_7_SEG_1_4x_Pos)

LCD_T::MEM_7: SEG_1_4x Mask

Definition at line 5686 of file Nano1X2Series.h.

## ◆ LCD_MEM_7_SEG_1_4x_Pos

#define LCD_MEM_7_SEG_1_4x_Pos (8)

LCD_T::MEM_7: SEG_1_4x Position

Definition at line 5685 of file Nano1X2Series.h.

## ◆ LCD_MEM_7_SEG_2_4x_Msk

#define LCD_MEM_7_SEG_2_4x_Msk (0x3ful << LCD_MEM_7_SEG_2_4x_Pos)

LCD_T::MEM_7: SEG_2_4x Mask

Definition at line 5689 of file Nano1X2Series.h.

## ◆ LCD_MEM_7_SEG_2_4x_Pos

#define LCD_MEM_7_SEG_2_4x_Pos (16)

LCD_T::MEM_7: SEG_2_4x Position

Definition at line 5688 of file Nano1X2Series.h.

## ◆ LCD_MEM_7_SEG_3_4x_Msk

#define LCD_MEM_7_SEG_3_4x_Msk (0x3ful << LCD_MEM_7_SEG_3_4x_Pos)

LCD_T::MEM_7: SEG_3_4x Mask

Definition at line 5692 of file Nano1X2Series.h.

## ◆ LCD_MEM_7_SEG_3_4x_Pos

#define LCD_MEM_7_SEG_3_4x_Pos (24)

LCD_T::MEM_7: SEG_3_4x Position

Definition at line 5691 of file Nano1X2Series.h.

## ◆ LCD_MEM_8_SEG_0_4x_Msk

#define LCD_MEM_8_SEG_0_4x_Msk (0x3ful << LCD_MEM_8_SEG_0_4x_Pos)

LCD_T::MEM_8: SEG_0_4x Mask

Definition at line 5695 of file Nano1X2Series.h.

## ◆ LCD_MEM_8_SEG_0_4x_Pos

#define LCD_MEM_8_SEG_0_4x_Pos (0)

LCD_T::MEM_8: SEG_0_4x Position

Definition at line 5694 of file Nano1X2Series.h.

## ◆ LCD_MEM_8_SEG_1_4x_Msk

#define LCD_MEM_8_SEG_1_4x_Msk (0x7ful << LCD_MEM_8_SEG_1_4x_Pos)

LCD_T::MEM_8: SEG_1_4x Mask

Definition at line 5698 of file Nano1X2Series.h.

## ◆ LCD_MEM_8_SEG_1_4x_Pos

#define LCD_MEM_8_SEG_1_4x_Pos (8)

LCD_T::MEM_8: SEG_1_4x Position

Definition at line 5697 of file Nano1X2Series.h.

## ◆ LCD_MEM_8_SEG_2_4x_Msk

#define LCD_MEM_8_SEG_2_4x_Msk (0x3ful << LCD_MEM_8_SEG_2_4x_Pos)

LCD_T::MEM_8: SEG_2_4x Mask

Definition at line 5701 of file Nano1X2Series.h.

## ◆ LCD_MEM_8_SEG_2_4x_Pos

#define LCD_MEM_8_SEG_2_4x_Pos (16)

LCD_T::MEM_8: SEG_2_4x Position

Definition at line 5700 of file Nano1X2Series.h.

## ◆ LCD_MEM_8_SEG_3_4x_Msk

#define LCD_MEM_8_SEG_3_4x_Msk (0x3ful << LCD_MEM_8_SEG_3_4x_Pos)

LCD_T::MEM_8: SEG_3_4x Mask

Definition at line 5704 of file Nano1X2Series.h.

## ◆ LCD_MEM_8_SEG_3_4x_Pos

#define LCD_MEM_8_SEG_3_4x_Pos (24)

LCD_T::MEM_8: SEG_3_4x Position

Definition at line 5703 of file Nano1X2Series.h.

## ◆ PDMA_BCR_PDMA_BCR_Msk

#define PDMA_BCR_PDMA_BCR_Msk (0xfffful << PDMA_BCR_PDMA_BCR_Pos)

PDMA_T::BCR: PDMA_BCR Mask

Definition at line 2419 of file Nano1X2Series.h.

## ◆ PDMA_BCR_PDMA_BCR_Pos

#define PDMA_BCR_PDMA_BCR_Pos (0)

PDMA_T::BCR: PDMA_BCR Position

Definition at line 2418 of file Nano1X2Series.h.

## ◆ PDMA_CBCR_PDMA_CBCR_Msk

#define PDMA_CBCR_PDMA_CBCR_Msk (0xfffffful << PDMA_CBCR_PDMA_CBCR_Pos)

PDMA_T::CBCR: PDMA_CBCR Mask

Definition at line 2428 of file Nano1X2Series.h.

## ◆ PDMA_CBCR_PDMA_CBCR_Pos

#define PDMA_CBCR_PDMA_CBCR_Pos (0)

PDMA_T::CBCR: PDMA_CBCR Position

Definition at line 2427 of file Nano1X2Series.h.

## ◆ PDMA_CDAR_PDMA_CDAR_Msk

#define PDMA_CDAR_PDMA_CDAR_Msk (0xfffffffful << PDMA_CDAR_PDMA_CDAR_Pos)

PDMA_T::CDAR: PDMA_CDAR Mask

Definition at line 2425 of file Nano1X2Series.h.

## ◆ PDMA_CDAR_PDMA_CDAR_Pos

#define PDMA_CDAR_PDMA_CDAR_Pos (0)

PDMA_T::CDAR: PDMA_CDAR Position

Definition at line 2424 of file Nano1X2Series.h.

## ◆ PDMA_CSAR_PDMA_CSAR_Msk

#define PDMA_CSAR_PDMA_CSAR_Msk (0xfffffffful << PDMA_CSAR_PDMA_CSAR_Pos)

PDMA_T::CSAR: PDMA_CSAR Mask

Definition at line 2422 of file Nano1X2Series.h.

## ◆ PDMA_CSAR_PDMA_CSAR_Pos

#define PDMA_CSAR_PDMA_CSAR_Pos (0)

PDMA_T::CSAR: PDMA_CSAR Position

Definition at line 2421 of file Nano1X2Series.h.

## ◆ PDMA_CSR_APB_TWS_Msk

#define PDMA_CSR_APB_TWS_Msk (0x3ul << PDMA_CSR_APB_TWS_Pos)

PDMA_T::CSR: APB_TWS Mask

Definition at line 2407 of file Nano1X2Series.h.

## ◆ PDMA_CSR_APB_TWS_Pos

#define PDMA_CSR_APB_TWS_Pos (19)

PDMA_T::CSR: APB_TWS Position

Definition at line 2406 of file Nano1X2Series.h.

## ◆ PDMA_CSR_DAD_SEL_Msk

#define PDMA_CSR_DAD_SEL_Msk (0x3ul << PDMA_CSR_DAD_SEL_Pos)

PDMA_T::CSR: DAD_SEL Mask

Definition at line 2401 of file Nano1X2Series.h.

## ◆ PDMA_CSR_DAD_SEL_Pos

#define PDMA_CSR_DAD_SEL_Pos (6)

PDMA_T::CSR: DAD_SEL Position

Definition at line 2400 of file Nano1X2Series.h.

## ◆ PDMA_CSR_MODE_SEL_Msk

#define PDMA_CSR_MODE_SEL_Msk (0x3ul << PDMA_CSR_MODE_SEL_Pos)

PDMA_T::CSR: MODE_SEL Mask

Definition at line 2395 of file Nano1X2Series.h.

## ◆ PDMA_CSR_MODE_SEL_Pos

#define PDMA_CSR_MODE_SEL_Pos (2)

PDMA_T::CSR: MODE_SEL Position

Definition at line 2394 of file Nano1X2Series.h.

## ◆ PDMA_CSR_PDMACEN_Msk

#define PDMA_CSR_PDMACEN_Msk (0x1ul << PDMA_CSR_PDMACEN_Pos)

PDMA_T::CSR: PDMACEN Mask

Definition at line 2389 of file Nano1X2Series.h.

## ◆ PDMA_CSR_PDMACEN_Pos

#define PDMA_CSR_PDMACEN_Pos (0)

    @addtogroup PDMA_CONST PDMA Bit Field Definition
    Constant Definitions for PDMA Controller

PDMA_T::CSR: PDMACEN Position

Definition at line 2388 of file Nano1X2Series.h.

## ◆ PDMA_CSR_SAD_SEL_Msk

#define PDMA_CSR_SAD_SEL_Msk (0x3ul << PDMA_CSR_SAD_SEL_Pos)

PDMA_T::CSR: SAD_SEL Mask

Definition at line 2398 of file Nano1X2Series.h.

## ◆ PDMA_CSR_SAD_SEL_Pos

#define PDMA_CSR_SAD_SEL_Pos (4)

PDMA_T::CSR: SAD_SEL Position

Definition at line 2397 of file Nano1X2Series.h.

## ◆ PDMA_CSR_SW_RST_Msk

#define PDMA_CSR_SW_RST_Msk (0x1ul << PDMA_CSR_SW_RST_Pos)

PDMA_T::CSR: SW_RST Mask

Definition at line 2392 of file Nano1X2Series.h.

## ◆ PDMA_CSR_SW_RST_Pos

#define PDMA_CSR_SW_RST_Pos (1)

PDMA_T::CSR: SW_RST Position

Definition at line 2391 of file Nano1X2Series.h.

## ◆ PDMA_CSR_TO_EN_Msk

#define PDMA_CSR_TO_EN_Msk (0x1ul << PDMA_CSR_TO_EN_Pos)

PDMA_T::CSR: TO_EN Mask

Definition at line 2404 of file Nano1X2Series.h.

## ◆ PDMA_CSR_TO_EN_Pos

#define PDMA_CSR_TO_EN_Pos (12)

PDMA_T::CSR: TO_EN Position

Definition at line 2403 of file Nano1X2Series.h.

## ◆ PDMA_CSR_TRIG_EN_Msk

#define PDMA_CSR_TRIG_EN_Msk (0x1ul << PDMA_CSR_TRIG_EN_Pos)

PDMA_T::CSR: TRIG_EN Mask

Definition at line 2410 of file Nano1X2Series.h.

## ◆ PDMA_CSR_TRIG_EN_Pos

#define PDMA_CSR_TRIG_EN_Pos (23)

PDMA_T::CSR: TRIG_EN Position

Definition at line 2409 of file Nano1X2Series.h.

## ◆ PDMA_DAR_PDMA_DAR_Msk

#define PDMA_DAR_PDMA_DAR_Msk (0xfffffffful << PDMA_DAR_PDMA_DAR_Pos)

PDMA_T::DAR: PDMA_DAR Mask

Definition at line 2416 of file Nano1X2Series.h.

## ◆ PDMA_DAR_PDMA_DAR_Pos

#define PDMA_DAR_PDMA_DAR_Pos (0)

PDMA_T::DAR: PDMA_DAR Position

Definition at line 2415 of file Nano1X2Series.h.

## ◆ PDMA_IER_TABORT_IE_Msk

#define PDMA_IER_TABORT_IE_Msk (0x1ul << PDMA_IER_TABORT_IE_Pos)

PDMA_T::IER: TABORT_IE Mask

Definition at line 2431 of file Nano1X2Series.h.

## ◆ PDMA_IER_TABORT_IE_Pos

#define PDMA_IER_TABORT_IE_Pos (0)

PDMA_T::IER: TABORT_IE Position

Definition at line 2430 of file Nano1X2Series.h.

## ◆ PDMA_IER_TD_IE_Msk

#define PDMA_IER_TD_IE_Msk (0x1ul << PDMA_IER_TD_IE_Pos)

PDMA_T::IER: TD_IE Mask

Definition at line 2434 of file Nano1X2Series.h.

## ◆ PDMA_IER_TD_IE_Pos

#define PDMA_IER_TD_IE_Pos (1)

PDMA_T::IER: TD_IE Position

Definition at line 2433 of file Nano1X2Series.h.

## ◆ PDMA_IER_TO_IE_Msk

#define PDMA_IER_TO_IE_Msk (0x1ul << PDMA_IER_TO_IE_Pos)

PDMA_T::IER: TO_IE Mask

Definition at line 2440 of file Nano1X2Series.h.

## ◆ PDMA_IER_TO_IE_Pos

#define PDMA_IER_TO_IE_Pos (6)

PDMA_T::IER: TO_IE Position

Definition at line 2439 of file Nano1X2Series.h.

## ◆ PDMA_IER_WRA_BCR_IE_Msk

#define PDMA_IER_WRA_BCR_IE_Msk (0xful << PDMA_IER_WRA_BCR_IE_Pos)

PDMA_T::IER: WRA_BCR_IE Mask

Definition at line 2437 of file Nano1X2Series.h.

## ◆ PDMA_IER_WRA_BCR_IE_Pos

#define PDMA_IER_WRA_BCR_IE_Pos (2)

PDMA_T::IER: WRA_BCR_IE Position

Definition at line 2436 of file Nano1X2Series.h.

## ◆ PDMA_ISR_TABORT_IS_Msk

#define PDMA_ISR_TABORT_IS_Msk (0x1ul << PDMA_ISR_TABORT_IS_Pos)

PDMA_T::ISR: TABORT_IS Mask

Definition at line 2443 of file Nano1X2Series.h.

## ◆ PDMA_ISR_TABORT_IS_Pos

#define PDMA_ISR_TABORT_IS_Pos (0)

PDMA_T::ISR: TABORT_IS Position

Definition at line 2442 of file Nano1X2Series.h.

## ◆ PDMA_ISR_TD_IS_Msk

#define PDMA_ISR_TD_IS_Msk (0x1ul << PDMA_ISR_TD_IS_Pos)

PDMA_T::ISR: TD_IS Mask

Definition at line 2446 of file Nano1X2Series.h.

## ◆ PDMA_ISR_TD_IS_Pos

#define PDMA_ISR_TD_IS_Pos (1)

PDMA_T::ISR: TD_IS Position

Definition at line 2445 of file Nano1X2Series.h.

## ◆ PDMA_ISR_TO_IS_Msk

#define PDMA_ISR_TO_IS_Msk (0x1ul << PDMA_ISR_TO_IS_Pos)

PDMA_T::ISR: TO_IS Mask

Definition at line 2452 of file Nano1X2Series.h.

## ◆ PDMA_ISR_TO_IS_Pos

#define PDMA_ISR_TO_IS_Pos (6)

PDMA_T::ISR: TO_IS Position

Definition at line 2451 of file Nano1X2Series.h.

## ◆ PDMA_ISR_WRA_BCR_IS_Msk

#define PDMA_ISR_WRA_BCR_IS_Msk (0xful << PDMA_ISR_WRA_BCR_IS_Pos)

PDMA_T::ISR: WRA_BCR_IS Mask

Definition at line 2449 of file Nano1X2Series.h.

## ◆ PDMA_ISR_WRA_BCR_IS_Pos

#define PDMA_ISR_WRA_BCR_IS_Pos (2)

PDMA_T::ISR: WRA_BCR_IS Position

Definition at line 2448 of file Nano1X2Series.h.

## ◆ PDMA_SAR_PDMA_SAR_Msk

#define PDMA_SAR_PDMA_SAR_Msk (0xfffffffful << PDMA_SAR_PDMA_SAR_Pos)

PDMA_T::SAR: PDMA_SAR Mask

Definition at line 2413 of file Nano1X2Series.h.

## ◆ PDMA_SAR_PDMA_SAR_Pos

#define PDMA_SAR_PDMA_SAR_Pos (0)

PDMA_T::SAR: PDMA_SAR Position

Definition at line 2412 of file Nano1X2Series.h.

## ◆ PDMA_TCR_PDMA_TCR_Msk

#define PDMA_TCR_PDMA_TCR_Msk (0xfffful << PDMA_TCR_PDMA_TCR_Pos)

PDMA_T::TCR: PDMA_TCR Mask

Definition at line 2455 of file Nano1X2Series.h.

## ◆ PDMA_TCR_PDMA_TCR_Pos

#define PDMA_TCR_PDMA_TCR_Pos (0)

PDMA_T::TCR: PDMA_TCR Position

Definition at line 2454 of file Nano1X2Series.h.

## ◆ PWM_ADTRGEN_TRGCH0EN_Msk

#define PWM_ADTRGEN_TRGCH0EN_Msk (0x1ul << PWM_ADTRGEN_TRGCH0EN_Pos)

PWM_T::ADTRGEN: TRGCH0EN Mask

Definition at line 7038 of file Nano1X2Series.h.

## ◆ PWM_ADTRGEN_TRGCH0EN_Pos

#define PWM_ADTRGEN_TRGCH0EN_Pos (0)

PWM_T::ADTRGEN: TRGCH0EN Position

Definition at line 7037 of file Nano1X2Series.h.

## ◆ PWM_ADTRGEN_TRGCH1EN_Msk

#define PWM_ADTRGEN_TRGCH1EN_Msk (0x1ul << PWM_ADTRGEN_TRGCH1EN_Pos)

PWM_T::ADTRGEN: TRGCH1EN Mask

Definition at line 7041 of file Nano1X2Series.h.

## ◆ PWM_ADTRGEN_TRGCH1EN_Pos

#define PWM_ADTRGEN_TRGCH1EN_Pos (1)

PWM_T::ADTRGEN: TRGCH1EN Position

Definition at line 7040 of file Nano1X2Series.h.

## ◆ PWM_ADTRGEN_TRGCH2EN_Msk

#define PWM_ADTRGEN_TRGCH2EN_Msk (0x1ul << PWM_ADTRGEN_TRGCH2EN_Pos)

PWM_T::ADTRGEN: TRGCH2EN Mask

Definition at line 7044 of file Nano1X2Series.h.

## ◆ PWM_ADTRGEN_TRGCH2EN_Pos

#define PWM_ADTRGEN_TRGCH2EN_Pos (2)

PWM_T::ADTRGEN: TRGCH2EN Position

Definition at line 7043 of file Nano1X2Series.h.

## ◆ PWM_ADTRGEN_TRGCH3EN_Msk

#define PWM_ADTRGEN_TRGCH3EN_Msk (0x1ul << PWM_ADTRGEN_TRGCH3EN_Pos)

PWM_T::ADTRGEN: TRGCH3EN Mask

Definition at line 7047 of file Nano1X2Series.h.

## ◆ PWM_ADTRGEN_TRGCH3EN_Pos

#define PWM_ADTRGEN_TRGCH3EN_Pos (3)

PWM_T::ADTRGEN: TRGCH3EN Position

Definition at line 7046 of file Nano1X2Series.h.

## ◆ PWM_ADTRGSTS_ADTRG0Flag_Msk

#define PWM_ADTRGSTS_ADTRG0Flag_Msk (0x1ul << PWM_ADTRGSTS_ADTRG0Flag_Pos)

PWM_T::ADTRGSTS: ADTRG0Flag Mask

Definition at line 7050 of file Nano1X2Series.h.

## ◆ PWM_ADTRGSTS_ADTRG0Flag_Pos

#define PWM_ADTRGSTS_ADTRG0Flag_Pos (0)

PWM_T::ADTRGSTS: ADTRG0Flag Position

Definition at line 7049 of file Nano1X2Series.h.

## ◆ PWM_ADTRGSTS_ADTRG1Flag_Msk

#define PWM_ADTRGSTS_ADTRG1Flag_Msk (0x1ul << PWM_ADTRGSTS_ADTRG1Flag_Pos)

PWM_T::ADTRGSTS: ADTRG1Flag Mask

Definition at line 7053 of file Nano1X2Series.h.

## ◆ PWM_ADTRGSTS_ADTRG1Flag_Pos

#define PWM_ADTRGSTS_ADTRG1Flag_Pos (1)

PWM_T::ADTRGSTS: ADTRG1Flag Position

Definition at line 7052 of file Nano1X2Series.h.

## ◆ PWM_ADTRGSTS_ADTRG2Flag_Msk

#define PWM_ADTRGSTS_ADTRG2Flag_Msk (0x1ul << PWM_ADTRGSTS_ADTRG2Flag_Pos)

PWM_T::ADTRGSTS: ADTRG2Flag Mask

Definition at line 7056 of file Nano1X2Series.h.

## ◆ PWM_ADTRGSTS_ADTRG2Flag_Pos

#define PWM_ADTRGSTS_ADTRG2Flag_Pos (2)

PWM_T::ADTRGSTS: ADTRG2Flag Position

Definition at line 7055 of file Nano1X2Series.h.

## ◆ PWM_ADTRGSTS_ADTRG3Flag_Msk

#define PWM_ADTRGSTS_ADTRG3Flag_Msk (0x1ul << PWM_ADTRGSTS_ADTRG3Flag_Pos)

PWM_T::ADTRGSTS: ADTRG3Flag Mask

Definition at line 7059 of file Nano1X2Series.h.

## ◆ PWM_ADTRGSTS_ADTRG3Flag_Pos

#define PWM_ADTRGSTS_ADTRG3Flag_Pos (3)

PWM_T::ADTRGSTS: ADTRG3Flag Position

Definition at line 7058 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPCH0EN_Msk

#define PWM_CAPCTL_CAPCH0EN_Msk (0x1ul << PWM_CAPCTL_CAPCH0EN_Pos)

PWM_T::CAPCTL: CAPCH0EN Mask

Definition at line 6801 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPCH0EN_Pos

#define PWM_CAPCTL_CAPCH0EN_Pos (1)

PWM_T::CAPCTL: CAPCH0EN Position

Definition at line 6800 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPCH0PADEN_Msk

#define PWM_CAPCTL_CAPCH0PADEN_Msk (0x1ul << PWM_CAPCTL_CAPCH0PADEN_Pos)

PWM_T::CAPCTL: CAPCH0PADEN Mask

Definition at line 6804 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPCH0PADEN_Pos

#define PWM_CAPCTL_CAPCH0PADEN_Pos (2)

PWM_T::CAPCTL: CAPCH0PADEN Position

Definition at line 6803 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPCH1EN_Msk

#define PWM_CAPCTL_CAPCH1EN_Msk (0x1ul << PWM_CAPCTL_CAPCH1EN_Pos)

PWM_T::CAPCTL: CAPCH1EN Mask

Definition at line 6822 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPCH1EN_Pos

#define PWM_CAPCTL_CAPCH1EN_Pos (9)

PWM_T::CAPCTL: CAPCH1EN Position

Definition at line 6821 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPCH1PADEN_Msk

#define PWM_CAPCTL_CAPCH1PADEN_Msk (0x1ul << PWM_CAPCTL_CAPCH1PADEN_Pos)

PWM_T::CAPCTL: CAPCH1PADEN Mask

Definition at line 6825 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPCH1PADEN_Pos

#define PWM_CAPCTL_CAPCH1PADEN_Pos (10)

PWM_T::CAPCTL: CAPCH1PADEN Position

Definition at line 6824 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPCH2EN_Msk

#define PWM_CAPCTL_CAPCH2EN_Msk (0x1ul << PWM_CAPCTL_CAPCH2EN_Pos)

PWM_T::CAPCTL: CAPCH2EN Mask

Definition at line 6843 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPCH2EN_Pos

#define PWM_CAPCTL_CAPCH2EN_Pos (17)

PWM_T::CAPCTL: CAPCH2EN Position

Definition at line 6842 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPCH2PADEN_Msk

#define PWM_CAPCTL_CAPCH2PADEN_Msk (0x1ul << PWM_CAPCTL_CAPCH2PADEN_Pos)

PWM_T::CAPCTL: CAPCH2PADEN Mask

Definition at line 6846 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPCH2PADEN_Pos

#define PWM_CAPCTL_CAPCH2PADEN_Pos (18)

PWM_T::CAPCTL: CAPCH2PADEN Position

Definition at line 6845 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPCH3EN_Msk

#define PWM_CAPCTL_CAPCH3EN_Msk (0x1ul << PWM_CAPCTL_CAPCH3EN_Pos)

PWM_T::CAPCTL: CAPCH3EN Mask

Definition at line 6864 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPCH3EN_Pos

#define PWM_CAPCTL_CAPCH3EN_Pos (25)

PWM_T::CAPCTL: CAPCH3EN Position

Definition at line 6863 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPCH3PADEN_Msk

#define PWM_CAPCTL_CAPCH3PADEN_Msk (0x1ul << PWM_CAPCTL_CAPCH3PADEN_Pos)

PWM_T::CAPCTL: CAPCH3PADEN Mask

Definition at line 6867 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPCH3PADEN_Pos

#define PWM_CAPCTL_CAPCH3PADEN_Pos (26)

PWM_T::CAPCTL: CAPCH3PADEN Position

Definition at line 6866 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPRELOADFEN0_Msk

#define PWM_CAPCTL_CAPRELOADFEN0_Msk (0x1ul << PWM_CAPCTL_CAPRELOADFEN0_Pos)

PWM_T::CAPCTL: CAPRELOADFEN0 Mask

Definition at line 6816 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPRELOADFEN0_Pos

#define PWM_CAPCTL_CAPRELOADFEN0_Pos (7)

PWM_T::CAPCTL: CAPRELOADFEN0 Position

Definition at line 6815 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPRELOADFEN1_Msk

#define PWM_CAPCTL_CAPRELOADFEN1_Msk (0x1ul << PWM_CAPCTL_CAPRELOADFEN1_Pos)

PWM_T::CAPCTL: CAPRELOADFEN1 Mask

Definition at line 6837 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPRELOADFEN1_Pos

#define PWM_CAPCTL_CAPRELOADFEN1_Pos (15)

PWM_T::CAPCTL: CAPRELOADFEN1 Position

Definition at line 6836 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPRELOADFEN2_Msk

#define PWM_CAPCTL_CAPRELOADFEN2_Msk (0x1ul << PWM_CAPCTL_CAPRELOADFEN2_Pos)

PWM_T::CAPCTL: CAPRELOADFEN2 Mask

Definition at line 6858 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPRELOADFEN2_Pos

#define PWM_CAPCTL_CAPRELOADFEN2_Pos (23)

PWM_T::CAPCTL: CAPRELOADFEN2 Position

Definition at line 6857 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPRELOADFEN3_Msk

#define PWM_CAPCTL_CAPRELOADFEN3_Msk (0x1ul << PWM_CAPCTL_CAPRELOADFEN3_Pos)

PWM_T::CAPCTL: CAPRELOADFEN3 Mask

Definition at line 6879 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPRELOADFEN3_Pos

#define PWM_CAPCTL_CAPRELOADFEN3_Pos (31)

PWM_T::CAPCTL: CAPRELOADFEN3 Position

Definition at line 6878 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPRELOADREN0_Msk

#define PWM_CAPCTL_CAPRELOADREN0_Msk (0x1ul << PWM_CAPCTL_CAPRELOADREN0_Pos)

PWM_T::CAPCTL: CAPRELOADREN0 Mask

Definition at line 6813 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPRELOADREN0_Pos

#define PWM_CAPCTL_CAPRELOADREN0_Pos (6)

PWM_T::CAPCTL: CAPRELOADREN0 Position

Definition at line 6812 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPRELOADREN1_Msk

#define PWM_CAPCTL_CAPRELOADREN1_Msk (0x1ul << PWM_CAPCTL_CAPRELOADREN1_Pos)

PWM_T::CAPCTL: CAPRELOADREN1 Mask

Definition at line 6834 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPRELOADREN1_Pos

#define PWM_CAPCTL_CAPRELOADREN1_Pos (14)

PWM_T::CAPCTL: CAPRELOADREN1 Position

Definition at line 6833 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPRELOADREN2_Msk

#define PWM_CAPCTL_CAPRELOADREN2_Msk (0x1ul << PWM_CAPCTL_CAPRELOADREN2_Pos)

PWM_T::CAPCTL: CAPRELOADREN2 Mask

Definition at line 6855 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPRELOADREN2_Pos

#define PWM_CAPCTL_CAPRELOADREN2_Pos (22)

PWM_T::CAPCTL: CAPRELOADREN2 Position

Definition at line 6854 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPRELOADREN3_Msk

#define PWM_CAPCTL_CAPRELOADREN3_Msk (0x1ul << PWM_CAPCTL_CAPRELOADREN3_Pos)

PWM_T::CAPCTL: CAPRELOADREN3 Mask

Definition at line 6876 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CAPRELOADREN3_Pos

#define PWM_CAPCTL_CAPRELOADREN3_Pos (30)

PWM_T::CAPCTL: CAPRELOADREN3 Position

Definition at line 6875 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CH01CASK_Msk

#define PWM_CAPCTL_CH01CASK_Msk (0x1ul << PWM_CAPCTL_CH01CASK_Pos)

PWM_T::CAPCTL: CH01CASK Mask

Definition at line 6831 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CH01CASK_Pos

#define PWM_CAPCTL_CH01CASK_Pos (13)

PWM_T::CAPCTL: CH01CASK Position

Definition at line 6830 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CH0PDMAEN_Msk

#define PWM_CAPCTL_CH0PDMAEN_Msk (0x1ul << PWM_CAPCTL_CH0PDMAEN_Pos)

PWM_T::CAPCTL: CH0PDMAEN Mask

Definition at line 6807 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CH0PDMAEN_Pos

#define PWM_CAPCTL_CH0PDMAEN_Pos (3)

PWM_T::CAPCTL: CH0PDMAEN Position

Definition at line 6806 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CH0RFORDER_Msk

#define PWM_CAPCTL_CH0RFORDER_Msk (0x1ul << PWM_CAPCTL_CH0RFORDER_Pos)

PWM_T::CAPCTL: CH0RFORDER Mask

Definition at line 6828 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CH0RFORDER_Pos

#define PWM_CAPCTL_CH0RFORDER_Pos (12)

PWM_T::CAPCTL: CH0RFORDER Position

Definition at line 6827 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CH23CASK_Msk

#define PWM_CAPCTL_CH23CASK_Msk (0x1ul << PWM_CAPCTL_CH23CASK_Pos)

PWM_T::CAPCTL: CH23CASK Mask

Definition at line 6873 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CH23CASK_Pos

#define PWM_CAPCTL_CH23CASK_Pos (29)

PWM_T::CAPCTL: CH23CASK Position

Definition at line 6872 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CH2PDMAEN_Msk

#define PWM_CAPCTL_CH2PDMAEN_Msk (0x1ul << PWM_CAPCTL_CH2PDMAEN_Pos)

PWM_T::CAPCTL: CH2PDMAEN Mask

Definition at line 6849 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CH2PDMAEN_Pos

#define PWM_CAPCTL_CH2PDMAEN_Pos (19)

PWM_T::CAPCTL: CH2PDMAEN Position

Definition at line 6848 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CH2RFORDER_Msk

#define PWM_CAPCTL_CH2RFORDER_Msk (0x1ul << PWM_CAPCTL_CH2RFORDER_Pos)

PWM_T::CAPCTL: CH2RFORDER Mask

Definition at line 6870 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_CH2RFORDER_Pos

#define PWM_CAPCTL_CH2RFORDER_Pos (28)

PWM_T::CAPCTL: CH2RFORDER Position

Definition at line 6869 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_INV0_Msk

#define PWM_CAPCTL_INV0_Msk (0x1ul << PWM_CAPCTL_INV0_Pos)

PWM_T::CAPCTL: INV0 Mask

Definition at line 6798 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_INV0_Pos

#define PWM_CAPCTL_INV0_Pos (0)

PWM_T::CAPCTL: INV0 Position

Definition at line 6797 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_INV1_Msk

#define PWM_CAPCTL_INV1_Msk (0x1ul << PWM_CAPCTL_INV1_Pos)

PWM_T::CAPCTL: INV1 Mask

Definition at line 6819 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_INV1_Pos

#define PWM_CAPCTL_INV1_Pos (8)

PWM_T::CAPCTL: INV1 Position

Definition at line 6818 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_INV2_Msk

#define PWM_CAPCTL_INV2_Msk (0x1ul << PWM_CAPCTL_INV2_Pos)

PWM_T::CAPCTL: INV2 Mask

Definition at line 6840 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_INV2_Pos

#define PWM_CAPCTL_INV2_Pos (16)

PWM_T::CAPCTL: INV2 Position

Definition at line 6839 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_INV3_Msk

#define PWM_CAPCTL_INV3_Msk (0x1ul << PWM_CAPCTL_INV3_Pos)

PWM_T::CAPCTL: INV3 Mask

Definition at line 6861 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_INV3_Pos

#define PWM_CAPCTL_INV3_Pos (24)

PWM_T::CAPCTL: INV3 Position

Definition at line 6860 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_PDMACAPMOD0_Msk

#define PWM_CAPCTL_PDMACAPMOD0_Msk (0x3ul << PWM_CAPCTL_PDMACAPMOD0_Pos)

PWM_T::CAPCTL: PDMACAPMOD0 Mask

Definition at line 6810 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_PDMACAPMOD0_Pos

#define PWM_CAPCTL_PDMACAPMOD0_Pos (4)

PWM_T::CAPCTL: PDMACAPMOD0 Position

Definition at line 6809 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_PDMACAPMOD2_Msk

#define PWM_CAPCTL_PDMACAPMOD2_Msk (0x3ul << PWM_CAPCTL_PDMACAPMOD2_Pos)

PWM_T::CAPCTL: PDMACAPMOD2 Mask

Definition at line 6852 of file Nano1X2Series.h.

## ◆ PWM_CAPCTL_PDMACAPMOD2_Pos

#define PWM_CAPCTL_PDMACAPMOD2_Pos (20)

PWM_T::CAPCTL: PDMACAPMOD2 Position

Definition at line 6851 of file Nano1X2Series.h.

## ◆ PWM_CAPINTEN_CFL_IE0_Msk

#define PWM_CAPINTEN_CFL_IE0_Msk (0x1ul << PWM_CAPINTEN_CFL_IE0_Pos)

PWM_T::CAPINTEN: CFL_IE0 Mask

Definition at line 6885 of file Nano1X2Series.h.

## ◆ PWM_CAPINTEN_CFL_IE0_Pos

#define PWM_CAPINTEN_CFL_IE0_Pos (1)

PWM_T::CAPINTEN: CFL_IE0 Position

Definition at line 6884 of file Nano1X2Series.h.

## ◆ PWM_CAPINTEN_CFL_IE1_Msk

#define PWM_CAPINTEN_CFL_IE1_Msk (0x1ul << PWM_CAPINTEN_CFL_IE1_Pos)

PWM_T::CAPINTEN: CFL_IE1 Mask

Definition at line 6891 of file Nano1X2Series.h.

## ◆ PWM_CAPINTEN_CFL_IE1_Pos

#define PWM_CAPINTEN_CFL_IE1_Pos (9)

PWM_T::CAPINTEN: CFL_IE1 Position

Definition at line 6890 of file Nano1X2Series.h.

## ◆ PWM_CAPINTEN_CFL_IE2_Msk

#define PWM_CAPINTEN_CFL_IE2_Msk (0x1ul << PWM_CAPINTEN_CFL_IE2_Pos)

PWM_T::CAPINTEN: CFL_IE2 Mask

Definition at line 6897 of file Nano1X2Series.h.

## ◆ PWM_CAPINTEN_CFL_IE2_Pos

#define PWM_CAPINTEN_CFL_IE2_Pos (17)

PWM_T::CAPINTEN: CFL_IE2 Position

Definition at line 6896 of file Nano1X2Series.h.

## ◆ PWM_CAPINTEN_CFL_IE3_Msk

#define PWM_CAPINTEN_CFL_IE3_Msk (0x1ul << PWM_CAPINTEN_CFL_IE3_Pos)

PWM_T::CAPINTEN: CFL_IE3 Mask

Definition at line 6903 of file Nano1X2Series.h.

## ◆ PWM_CAPINTEN_CFL_IE3_Pos

#define PWM_CAPINTEN_CFL_IE3_Pos (25)

PWM_T::CAPINTEN: CFL_IE3 Position

Definition at line 6902 of file Nano1X2Series.h.

## ◆ PWM_CAPINTEN_CRL_IE0_Msk

#define PWM_CAPINTEN_CRL_IE0_Msk (0x1ul << PWM_CAPINTEN_CRL_IE0_Pos)

PWM_T::CAPINTEN: CRL_IE0 Mask

Definition at line 6882 of file Nano1X2Series.h.

## ◆ PWM_CAPINTEN_CRL_IE0_Pos

#define PWM_CAPINTEN_CRL_IE0_Pos (0)

PWM_T::CAPINTEN: CRL_IE0 Position

Definition at line 6881 of file Nano1X2Series.h.

## ◆ PWM_CAPINTEN_CRL_IE1_Msk

#define PWM_CAPINTEN_CRL_IE1_Msk (0x1ul << PWM_CAPINTEN_CRL_IE1_Pos)

PWM_T::CAPINTEN: CRL_IE1 Mask

Definition at line 6888 of file Nano1X2Series.h.

## ◆ PWM_CAPINTEN_CRL_IE1_Pos

#define PWM_CAPINTEN_CRL_IE1_Pos (8)

PWM_T::CAPINTEN: CRL_IE1 Position

Definition at line 6887 of file Nano1X2Series.h.

## ◆ PWM_CAPINTEN_CRL_IE2_Msk

#define PWM_CAPINTEN_CRL_IE2_Msk (0x1ul << PWM_CAPINTEN_CRL_IE2_Pos)

PWM_T::CAPINTEN: CRL_IE2 Mask

Definition at line 6894 of file Nano1X2Series.h.

## ◆ PWM_CAPINTEN_CRL_IE2_Pos

#define PWM_CAPINTEN_CRL_IE2_Pos (16)

PWM_T::CAPINTEN: CRL_IE2 Position

Definition at line 6893 of file Nano1X2Series.h.

## ◆ PWM_CAPINTEN_CRL_IE3_Msk

#define PWM_CAPINTEN_CRL_IE3_Msk (0x1ul << PWM_CAPINTEN_CRL_IE3_Pos)

PWM_T::CAPINTEN: CRL_IE3 Mask

Definition at line 6900 of file Nano1X2Series.h.

## ◆ PWM_CAPINTEN_CRL_IE3_Pos

#define PWM_CAPINTEN_CRL_IE3_Pos (24)

PWM_T::CAPINTEN: CRL_IE3 Position

Definition at line 6899 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPIF0_Msk

#define PWM_CAPINTSTS_CAPIF0_Msk (0x1ul << PWM_CAPINTSTS_CAPIF0_Pos)

PWM_T::CAPINTSTS: CAPIF0 Mask

Definition at line 6906 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPIF0_Pos

#define PWM_CAPINTSTS_CAPIF0_Pos (0)

PWM_T::CAPINTSTS: CAPIF0 Position

Definition at line 6905 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPIF1_Msk

#define PWM_CAPINTSTS_CAPIF1_Msk (0x1ul << PWM_CAPINTSTS_CAPIF1_Pos)

PWM_T::CAPINTSTS: CAPIF1 Mask

Definition at line 6921 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPIF1_Pos

#define PWM_CAPINTSTS_CAPIF1_Pos (8)

PWM_T::CAPINTSTS: CAPIF1 Position

Definition at line 6920 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPIF2_Msk

#define PWM_CAPINTSTS_CAPIF2_Msk (0x1ul << PWM_CAPINTSTS_CAPIF2_Pos)

PWM_T::CAPINTSTS: CAPIF2 Mask

Definition at line 6936 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPIF2_Pos

#define PWM_CAPINTSTS_CAPIF2_Pos (16)

PWM_T::CAPINTSTS: CAPIF2 Position

Definition at line 6935 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPIF3_Msk

#define PWM_CAPINTSTS_CAPIF3_Msk (0x1ul << PWM_CAPINTSTS_CAPIF3_Pos)

PWM_T::CAPINTSTS: CAPIF3 Mask

Definition at line 6951 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPIF3_Pos

#define PWM_CAPINTSTS_CAPIF3_Pos (24)

PWM_T::CAPINTSTS: CAPIF3 Position

Definition at line 6950 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPOVF0_Msk

#define PWM_CAPINTSTS_CAPOVF0_Msk (0x1ul << PWM_CAPINTSTS_CAPOVF0_Pos)

PWM_T::CAPINTSTS: CAPOVF0 Mask

Definition at line 6918 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPOVF0_Pos

#define PWM_CAPINTSTS_CAPOVF0_Pos (4)

PWM_T::CAPINTSTS: CAPOVF0 Position

Definition at line 6917 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPOVF1_Msk

#define PWM_CAPINTSTS_CAPOVF1_Msk (0x1ul << PWM_CAPINTSTS_CAPOVF1_Pos)

PWM_T::CAPINTSTS: CAPOVF1 Mask

Definition at line 6933 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPOVF1_Pos

#define PWM_CAPINTSTS_CAPOVF1_Pos (12)

PWM_T::CAPINTSTS: CAPOVF1 Position

Definition at line 6932 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPOVF2_Msk

#define PWM_CAPINTSTS_CAPOVF2_Msk (0x1ul << PWM_CAPINTSTS_CAPOVF2_Pos)

PWM_T::CAPINTSTS: CAPOVF2 Mask

Definition at line 6948 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPOVF2_Pos

#define PWM_CAPINTSTS_CAPOVF2_Pos (20)

PWM_T::CAPINTSTS: CAPOVF2 Position

Definition at line 6947 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPOVF3_Msk

#define PWM_CAPINTSTS_CAPOVF3_Msk (0x1ul << PWM_CAPINTSTS_CAPOVF3_Pos)

PWM_T::CAPINTSTS: CAPOVF3 Mask

Definition at line 6963 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPOVF3_Pos

#define PWM_CAPINTSTS_CAPOVF3_Pos (28)

PWM_T::CAPINTSTS: CAPOVF3 Position

Definition at line 6962 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPOVR0_Msk

#define PWM_CAPINTSTS_CAPOVR0_Msk (0x1ul << PWM_CAPINTSTS_CAPOVR0_Pos)

PWM_T::CAPINTSTS: CAPOVR0 Mask

Definition at line 6915 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPOVR0_Pos

#define PWM_CAPINTSTS_CAPOVR0_Pos (3)

PWM_T::CAPINTSTS: CAPOVR0 Position

Definition at line 6914 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPOVR1_Msk

#define PWM_CAPINTSTS_CAPOVR1_Msk (0x1ul << PWM_CAPINTSTS_CAPOVR1_Pos)

PWM_T::CAPINTSTS: CAPOVR1 Mask

Definition at line 6930 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPOVR1_Pos

#define PWM_CAPINTSTS_CAPOVR1_Pos (11)

PWM_T::CAPINTSTS: CAPOVR1 Position

Definition at line 6929 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPOVR2_Msk

#define PWM_CAPINTSTS_CAPOVR2_Msk (0x1ul << PWM_CAPINTSTS_CAPOVR2_Pos)

PWM_T::CAPINTSTS: CAPOVR2 Mask

Definition at line 6945 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPOVR2_Pos

#define PWM_CAPINTSTS_CAPOVR2_Pos (19)

PWM_T::CAPINTSTS: CAPOVR2 Position

Definition at line 6944 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPOVR3_Msk

#define PWM_CAPINTSTS_CAPOVR3_Msk (0x1ul << PWM_CAPINTSTS_CAPOVR3_Pos)

PWM_T::CAPINTSTS: CAPOVR3 Mask

Definition at line 6960 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CAPOVR3_Pos

#define PWM_CAPINTSTS_CAPOVR3_Pos (27)

PWM_T::CAPINTSTS: CAPOVR3 Position

Definition at line 6959 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CFLI0_Msk

#define PWM_CAPINTSTS_CFLI0_Msk (0x1ul << PWM_CAPINTSTS_CFLI0_Pos)

PWM_T::CAPINTSTS: CFLI0 Mask

Definition at line 6912 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CFLI0_Pos

#define PWM_CAPINTSTS_CFLI0_Pos (2)

PWM_T::CAPINTSTS: CFLI0 Position

Definition at line 6911 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CFLI1_Msk

#define PWM_CAPINTSTS_CFLI1_Msk (0x1ul << PWM_CAPINTSTS_CFLI1_Pos)

PWM_T::CAPINTSTS: CFLI1 Mask

Definition at line 6927 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CFLI1_Pos

#define PWM_CAPINTSTS_CFLI1_Pos (10)

PWM_T::CAPINTSTS: CFLI1 Position

Definition at line 6926 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CFLI2_Msk

#define PWM_CAPINTSTS_CFLI2_Msk (0x1ul << PWM_CAPINTSTS_CFLI2_Pos)

PWM_T::CAPINTSTS: CFLI2 Mask

Definition at line 6942 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CFLI2_Pos

#define PWM_CAPINTSTS_CFLI2_Pos (18)

PWM_T::CAPINTSTS: CFLI2 Position

Definition at line 6941 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CFLI3_Msk

#define PWM_CAPINTSTS_CFLI3_Msk (0x1ul << PWM_CAPINTSTS_CFLI3_Pos)

PWM_T::CAPINTSTS: CFLI3 Mask

Definition at line 6957 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CFLI3_Pos

#define PWM_CAPINTSTS_CFLI3_Pos (26)

PWM_T::CAPINTSTS: CFLI3 Position

Definition at line 6956 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CRLI0_Msk

#define PWM_CAPINTSTS_CRLI0_Msk (0x1ul << PWM_CAPINTSTS_CRLI0_Pos)

PWM_T::CAPINTSTS: CRLI0 Mask

Definition at line 6909 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CRLI0_Pos

#define PWM_CAPINTSTS_CRLI0_Pos (1)

PWM_T::CAPINTSTS: CRLI0 Position

Definition at line 6908 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CRLI1_Msk

#define PWM_CAPINTSTS_CRLI1_Msk (0x1ul << PWM_CAPINTSTS_CRLI1_Pos)

PWM_T::CAPINTSTS: CRLI1 Mask

Definition at line 6924 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CRLI1_Pos

#define PWM_CAPINTSTS_CRLI1_Pos (9)

PWM_T::CAPINTSTS: CRLI1 Position

Definition at line 6923 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CRLI2_Msk

#define PWM_CAPINTSTS_CRLI2_Msk (0x1ul << PWM_CAPINTSTS_CRLI2_Pos)

PWM_T::CAPINTSTS: CRLI2 Mask

Definition at line 6939 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CRLI2_Pos

#define PWM_CAPINTSTS_CRLI2_Pos (17)

PWM_T::CAPINTSTS: CRLI2 Position

Definition at line 6938 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CRLI3_Msk

#define PWM_CAPINTSTS_CRLI3_Msk (0x1ul << PWM_CAPINTSTS_CRLI3_Pos)

PWM_T::CAPINTSTS: CRLI3 Mask

Definition at line 6954 of file Nano1X2Series.h.

## ◆ PWM_CAPINTSTS_CRLI3_Pos

#define PWM_CAPINTSTS_CRLI3_Pos (25)

PWM_T::CAPINTSTS: CRLI3 Position

Definition at line 6953 of file Nano1X2Series.h.

## ◆ PWM_CFL0_CFL_H_Msk

#define PWM_CFL0_CFL_H_Msk (0xfffful << PWM_CFL0_CFL_H_Pos)

PWM_T::CFL0: CFL_H Mask

Definition at line 6975 of file Nano1X2Series.h.

## ◆ PWM_CFL0_CFL_H_Pos

#define PWM_CFL0_CFL_H_Pos (16)

PWM_T::CFL0: CFL_H Position

Definition at line 6974 of file Nano1X2Series.h.

## ◆ PWM_CFL0_CFL_Msk

#define PWM_CFL0_CFL_Msk (0xfffful << PWM_CFL0_CFL_Pos)

PWM_T::CFL0: CFL Mask

Definition at line 6972 of file Nano1X2Series.h.

## ◆ PWM_CFL0_CFL_Pos

#define PWM_CFL0_CFL_Pos (0)

PWM_T::CFL0: CFL Position

Definition at line 6971 of file Nano1X2Series.h.

## ◆ PWM_CFL1_CFL_H_Msk

#define PWM_CFL1_CFL_H_Msk (0xfffful << PWM_CFL1_CFL_H_Pos)

PWM_T::CFL1: CFL_H Mask

Definition at line 6987 of file Nano1X2Series.h.

## ◆ PWM_CFL1_CFL_H_Pos

#define PWM_CFL1_CFL_H_Pos (16)

PWM_T::CFL1: CFL_H Position

Definition at line 6986 of file Nano1X2Series.h.

## ◆ PWM_CFL1_CFL_Msk

#define PWM_CFL1_CFL_Msk (0xfffful << PWM_CFL1_CFL_Pos)

PWM_T::CFL1: CFL Mask

Definition at line 6984 of file Nano1X2Series.h.

## ◆ PWM_CFL1_CFL_Pos

#define PWM_CFL1_CFL_Pos (0)

PWM_T::CFL1: CFL Position

Definition at line 6983 of file Nano1X2Series.h.

## ◆ PWM_CFL2_CFL_H_Msk

#define PWM_CFL2_CFL_H_Msk (0xfffful << PWM_CFL2_CFL_H_Pos)

PWM_T::CFL2: CFL_H Mask

Definition at line 6999 of file Nano1X2Series.h.

## ◆ PWM_CFL2_CFL_H_Pos

#define PWM_CFL2_CFL_H_Pos (16)

PWM_T::CFL2: CFL_H Position

Definition at line 6998 of file Nano1X2Series.h.

## ◆ PWM_CFL2_CFL_Msk

#define PWM_CFL2_CFL_Msk (0xfffful << PWM_CFL2_CFL_Pos)

PWM_T::CFL2: CFL Mask

Definition at line 6996 of file Nano1X2Series.h.

## ◆ PWM_CFL2_CFL_Pos

#define PWM_CFL2_CFL_Pos (0)

PWM_T::CFL2: CFL Position

Definition at line 6995 of file Nano1X2Series.h.

## ◆ PWM_CFL3_CFL_H_Msk

#define PWM_CFL3_CFL_H_Msk (0xfffful << PWM_CFL3_CFL_H_Pos)

PWM_T::CFL3: CFL_H Mask

Definition at line 7011 of file Nano1X2Series.h.

## ◆ PWM_CFL3_CFL_H_Pos

#define PWM_CFL3_CFL_H_Pos (16)

PWM_T::CFL3: CFL_H Position

Definition at line 7010 of file Nano1X2Series.h.

## ◆ PWM_CFL3_CFL_Msk

#define PWM_CFL3_CFL_Msk (0xfffful << PWM_CFL3_CFL_Pos)

PWM_T::CFL3: CFL Mask

Definition at line 7008 of file Nano1X2Series.h.

## ◆ PWM_CFL3_CFL_Pos

#define PWM_CFL3_CFL_Pos (0)

PWM_T::CFL3: CFL Position

Definition at line 7007 of file Nano1X2Series.h.

## ◆ PWM_CLKSEL_CLKSEL0_Msk

#define PWM_CLKSEL_CLKSEL0_Msk (0x7ul << PWM_CLKSEL_CLKSEL0_Pos)

PWM_T::CLKSEL: CLKSEL0 Mask

Definition at line 6627 of file Nano1X2Series.h.

## ◆ PWM_CLKSEL_CLKSEL0_Pos

#define PWM_CLKSEL_CLKSEL0_Pos (0)

PWM_T::CLKSEL: CLKSEL0 Position

Definition at line 6626 of file Nano1X2Series.h.

## ◆ PWM_CLKSEL_CLKSEL1_Msk

#define PWM_CLKSEL_CLKSEL1_Msk (0x7ul << PWM_CLKSEL_CLKSEL1_Pos)

PWM_T::CLKSEL: CLKSEL1 Mask

Definition at line 6630 of file Nano1X2Series.h.

## ◆ PWM_CLKSEL_CLKSEL1_Pos

#define PWM_CLKSEL_CLKSEL1_Pos (4)

PWM_T::CLKSEL: CLKSEL1 Position

Definition at line 6629 of file Nano1X2Series.h.

## ◆ PWM_CLKSEL_CLKSEL2_Msk

#define PWM_CLKSEL_CLKSEL2_Msk (0x7ul << PWM_CLKSEL_CLKSEL2_Pos)

PWM_T::CLKSEL: CLKSEL2 Mask

Definition at line 6633 of file Nano1X2Series.h.

## ◆ PWM_CLKSEL_CLKSEL2_Pos

#define PWM_CLKSEL_CLKSEL2_Pos (8)

PWM_T::CLKSEL: CLKSEL2 Position

Definition at line 6632 of file Nano1X2Series.h.

## ◆ PWM_CLKSEL_CLKSEL3_Msk

#define PWM_CLKSEL_CLKSEL3_Msk (0x7ul << PWM_CLKSEL_CLKSEL3_Pos)

PWM_T::CLKSEL: CLKSEL3 Mask

Definition at line 6636 of file Nano1X2Series.h.

## ◆ PWM_CLKSEL_CLKSEL3_Pos

#define PWM_CLKSEL_CLKSEL3_Pos (12)

PWM_T::CLKSEL: CLKSEL3 Position

Definition at line 6635 of file Nano1X2Series.h.

## ◆ PWM_CRL0_CRL_H_Msk

#define PWM_CRL0_CRL_H_Msk (0xfffful << PWM_CRL0_CRL_H_Pos)

PWM_T::CRL0: CRL_H Mask

Definition at line 6969 of file Nano1X2Series.h.

## ◆ PWM_CRL0_CRL_H_Pos

#define PWM_CRL0_CRL_H_Pos (16)

PWM_T::CRL0: CRL_H Position

Definition at line 6968 of file Nano1X2Series.h.

## ◆ PWM_CRL0_CRL_Msk

#define PWM_CRL0_CRL_Msk (0xfffful << PWM_CRL0_CRL_Pos)

PWM_T::CRL0: CRL Mask

Definition at line 6966 of file Nano1X2Series.h.

## ◆ PWM_CRL0_CRL_Pos

#define PWM_CRL0_CRL_Pos (0)

PWM_T::CRL0: CRL Position

Definition at line 6965 of file Nano1X2Series.h.

## ◆ PWM_CRL1_CRL_H_Msk

#define PWM_CRL1_CRL_H_Msk (0xfffful << PWM_CRL1_CRL_H_Pos)

PWM_T::CRL1: CRL_H Mask

Definition at line 6981 of file Nano1X2Series.h.

## ◆ PWM_CRL1_CRL_H_Pos

#define PWM_CRL1_CRL_H_Pos (16)

PWM_T::CRL1: CRL_H Position

Definition at line 6980 of file Nano1X2Series.h.

## ◆ PWM_CRL1_CRL_Msk

#define PWM_CRL1_CRL_Msk (0xfffful << PWM_CRL1_CRL_Pos)

PWM_T::CRL1: CRL Mask

Definition at line 6978 of file Nano1X2Series.h.

## ◆ PWM_CRL1_CRL_Pos

#define PWM_CRL1_CRL_Pos (0)

PWM_T::CRL1: CRL Position

Definition at line 6977 of file Nano1X2Series.h.

## ◆ PWM_CRL2_CRL_H_Msk

#define PWM_CRL2_CRL_H_Msk (0xfffful << PWM_CRL2_CRL_H_Pos)

PWM_T::CRL2: CRL_H Mask

Definition at line 6993 of file Nano1X2Series.h.

## ◆ PWM_CRL2_CRL_H_Pos

#define PWM_CRL2_CRL_H_Pos (16)

PWM_T::CRL2: CRL_H Position

Definition at line 6992 of file Nano1X2Series.h.

## ◆ PWM_CRL2_CRL_Msk

#define PWM_CRL2_CRL_Msk (0xfffful << PWM_CRL2_CRL_Pos)

PWM_T::CRL2: CRL Mask

Definition at line 6990 of file Nano1X2Series.h.

## ◆ PWM_CRL2_CRL_Pos

#define PWM_CRL2_CRL_Pos (0)

PWM_T::CRL2: CRL Position

Definition at line 6989 of file Nano1X2Series.h.

## ◆ PWM_CRL3_CRL_H_Msk

#define PWM_CRL3_CRL_H_Msk (0xfffful << PWM_CRL3_CRL_H_Pos)

PWM_T::CRL3: CRL_H Mask

Definition at line 7005 of file Nano1X2Series.h.

## ◆ PWM_CRL3_CRL_H_Pos

#define PWM_CRL3_CRL_H_Pos (16)

PWM_T::CRL3: CRL_H Position

Definition at line 7004 of file Nano1X2Series.h.

## ◆ PWM_CRL3_CRL_Msk

#define PWM_CRL3_CRL_Msk (0xfffful << PWM_CRL3_CRL_Pos)

PWM_T::CRL3: CRL Mask

Definition at line 7002 of file Nano1X2Series.h.

## ◆ PWM_CRL3_CRL_Pos

#define PWM_CRL3_CRL_Pos (0)

PWM_T::CRL3: CRL Position

Definition at line 7001 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH0EN_Msk

#define PWM_CTL_CH0EN_Msk (0x1ul << PWM_CTL_CH0EN_Pos)

PWM_T::CTL: CH0EN Mask

Definition at line 6639 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH0EN_Pos

#define PWM_CTL_CH0EN_Pos (0)

PWM_T::CTL: CH0EN Position

Definition at line 6638 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH0INV_Msk

#define PWM_CTL_CH0INV_Msk (0x1ul << PWM_CTL_CH0INV_Pos)

PWM_T::CTL: CH0INV Mask

Definition at line 6642 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH0INV_Pos

#define PWM_CTL_CH0INV_Pos (2)

PWM_T::CTL: CH0INV Position

Definition at line 6641 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH0MOD_Msk

#define PWM_CTL_CH0MOD_Msk (0x1ul << PWM_CTL_CH0MOD_Pos)

PWM_T::CTL: CH0MOD Mask

Definition at line 6645 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH0MOD_Pos

#define PWM_CTL_CH0MOD_Pos (3)

PWM_T::CTL: CH0MOD Position

Definition at line 6644 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH1EN_Msk

#define PWM_CTL_CH1EN_Msk (0x1ul << PWM_CTL_CH1EN_Pos)

PWM_T::CTL: CH1EN Mask

Definition at line 6654 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH1EN_Pos

#define PWM_CTL_CH1EN_Pos (8)

PWM_T::CTL: CH1EN Position

Definition at line 6653 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH1INV_Msk

#define PWM_CTL_CH1INV_Msk (0x1ul << PWM_CTL_CH1INV_Pos)

PWM_T::CTL: CH1INV Mask

Definition at line 6657 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH1INV_Pos

#define PWM_CTL_CH1INV_Pos (10)

PWM_T::CTL: CH1INV Position

Definition at line 6656 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH1MOD_Msk

#define PWM_CTL_CH1MOD_Msk (0x1ul << PWM_CTL_CH1MOD_Pos)

PWM_T::CTL: CH1MOD Mask

Definition at line 6660 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH1MOD_Pos

#define PWM_CTL_CH1MOD_Pos (11)

PWM_T::CTL: CH1MOD Position

Definition at line 6659 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH2EN_Msk

#define PWM_CTL_CH2EN_Msk (0x1ul << PWM_CTL_CH2EN_Pos)

PWM_T::CTL: CH2EN Mask

Definition at line 6663 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH2EN_Pos

#define PWM_CTL_CH2EN_Pos (16)

PWM_T::CTL: CH2EN Position

Definition at line 6662 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH2INV_Msk

#define PWM_CTL_CH2INV_Msk (0x1ul << PWM_CTL_CH2INV_Pos)

PWM_T::CTL: CH2INV Mask

Definition at line 6666 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH2INV_Pos

#define PWM_CTL_CH2INV_Pos (18)

PWM_T::CTL: CH2INV Position

Definition at line 6665 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH2MOD_Msk

#define PWM_CTL_CH2MOD_Msk (0x1ul << PWM_CTL_CH2MOD_Pos)

PWM_T::CTL: CH2MOD Mask

Definition at line 6669 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH2MOD_Pos

#define PWM_CTL_CH2MOD_Pos (19)

PWM_T::CTL: CH2MOD Position

Definition at line 6668 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH3EN_Msk

#define PWM_CTL_CH3EN_Msk (0x1ul << PWM_CTL_CH3EN_Pos)

PWM_T::CTL: CH3EN Mask

Definition at line 6672 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH3EN_Pos

#define PWM_CTL_CH3EN_Pos (24)

PWM_T::CTL: CH3EN Position

Definition at line 6671 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH3INV_Msk

#define PWM_CTL_CH3INV_Msk (0x1ul << PWM_CTL_CH3INV_Pos)

PWM_T::CTL: CH3INV Mask

Definition at line 6675 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH3INV_Pos

#define PWM_CTL_CH3INV_Pos (26)

PWM_T::CTL: CH3INV Position

Definition at line 6674 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH3MOD_Msk

#define PWM_CTL_CH3MOD_Msk (0x1ul << PWM_CTL_CH3MOD_Pos)

PWM_T::CTL: CH3MOD Mask

Definition at line 6678 of file Nano1X2Series.h.

## ◆ PWM_CTL_CH3MOD_Pos

#define PWM_CTL_CH3MOD_Pos (27)

PWM_T::CTL: CH3MOD Position

Definition at line 6677 of file Nano1X2Series.h.

## ◆ PWM_CTL_DZEN01_Msk

#define PWM_CTL_DZEN01_Msk (0x1ul << PWM_CTL_DZEN01_Pos)

PWM_T::CTL: DZEN01 Mask

Definition at line 6648 of file Nano1X2Series.h.

## ◆ PWM_CTL_DZEN01_Pos

#define PWM_CTL_DZEN01_Pos (4)

PWM_T::CTL: DZEN01 Position

Definition at line 6647 of file Nano1X2Series.h.

## ◆ PWM_CTL_DZEN23_Msk

#define PWM_CTL_DZEN23_Msk (0x1ul << PWM_CTL_DZEN23_Pos)

PWM_T::CTL: DZEN23 Mask

Definition at line 6651 of file Nano1X2Series.h.

## ◆ PWM_CTL_DZEN23_Pos

#define PWM_CTL_DZEN23_Pos (5)

PWM_T::CTL: DZEN23 Position

Definition at line 6650 of file Nano1X2Series.h.

## ◆ PWM_CTL_PWMTYPE01_Msk

#define PWM_CTL_PWMTYPE01_Msk (0x1ul << PWM_CTL_PWMTYPE01_Pos)

PWM_T::CTL: PWMTYPE01 Mask

Definition at line 6681 of file Nano1X2Series.h.

## ◆ PWM_CTL_PWMTYPE01_Pos

#define PWM_CTL_PWMTYPE01_Pos (30)

PWM_T::CTL: PWMTYPE01 Position

Definition at line 6680 of file Nano1X2Series.h.

## ◆ PWM_CTL_PWMTYPE23_Msk

#define PWM_CTL_PWMTYPE23_Msk (0x1ul << PWM_CTL_PWMTYPE23_Pos)

PWM_T::CTL: PWMTYPE23 Mask

Definition at line 6684 of file Nano1X2Series.h.

## ◆ PWM_CTL_PWMTYPE23_Pos

#define PWM_CTL_PWMTYPE23_Pos (31)

PWM_T::CTL: PWMTYPE23 Position

Definition at line 6683 of file Nano1X2Series.h.

## ◆ PWM_DATA0_DATA_H_Msk

#define PWM_DATA0_DATA_H_Msk (0x7ffful << PWM_DATA0_DATA_H_Pos)

PWM_T::DATA0: DATA_H Mask

Definition at line 6747 of file Nano1X2Series.h.

## ◆ PWM_DATA0_DATA_H_Pos

#define PWM_DATA0_DATA_H_Pos (16)

PWM_T::DATA0: DATA_H Position

Definition at line 6746 of file Nano1X2Series.h.

## ◆ PWM_DATA0_DATA_Msk

#define PWM_DATA0_DATA_Msk (0xfffful << PWM_DATA0_DATA_Pos)

PWM_T::DATA0: DATA Mask

Definition at line 6744 of file Nano1X2Series.h.

## ◆ PWM_DATA0_DATA_Pos

#define PWM_DATA0_DATA_Pos (0)

PWM_T::DATA0: DATA Position

Definition at line 6743 of file Nano1X2Series.h.

## ◆ PWM_DATA0_sync_Msk

#define PWM_DATA0_sync_Msk (0x1ul << PWM_DATA0_sync_Pos)

PWM_T::DATA0: sync Mask

Definition at line 6750 of file Nano1X2Series.h.

## ◆ PWM_DATA0_sync_Pos

#define PWM_DATA0_sync_Pos (31)

PWM_T::DATA0: sync Position

Definition at line 6749 of file Nano1X2Series.h.

## ◆ PWM_DATA1_DATA_H_Msk

#define PWM_DATA1_DATA_H_Msk (0x7ffful << PWM_DATA1_DATA_H_Pos)

PWM_T::DATA1: DATA_H Mask

Definition at line 6762 of file Nano1X2Series.h.

## ◆ PWM_DATA1_DATA_H_Pos

#define PWM_DATA1_DATA_H_Pos (16)

PWM_T::DATA1: DATA_H Position

Definition at line 6761 of file Nano1X2Series.h.

## ◆ PWM_DATA1_DATA_Msk

#define PWM_DATA1_DATA_Msk (0xfffful << PWM_DATA1_DATA_Pos)

PWM_T::DATA1: DATA Mask

Definition at line 6759 of file Nano1X2Series.h.

## ◆ PWM_DATA1_DATA_Pos

#define PWM_DATA1_DATA_Pos (0)

PWM_T::DATA1: DATA Position

Definition at line 6758 of file Nano1X2Series.h.

## ◆ PWM_DATA1_sync_Msk

#define PWM_DATA1_sync_Msk (0x1ul << PWM_DATA1_sync_Pos)

PWM_T::DATA1: sync Mask

Definition at line 6765 of file Nano1X2Series.h.

## ◆ PWM_DATA1_sync_Pos

#define PWM_DATA1_sync_Pos (31)

PWM_T::DATA1: sync Position

Definition at line 6764 of file Nano1X2Series.h.

## ◆ PWM_DATA2_DATA_H_Msk

#define PWM_DATA2_DATA_H_Msk (0x7ffful << PWM_DATA2_DATA_H_Pos)

PWM_T::DATA2: DATA_H Mask

Definition at line 6777 of file Nano1X2Series.h.

## ◆ PWM_DATA2_DATA_H_Pos

#define PWM_DATA2_DATA_H_Pos (16)

PWM_T::DATA2: DATA_H Position

Definition at line 6776 of file Nano1X2Series.h.

## ◆ PWM_DATA2_DATA_Msk

#define PWM_DATA2_DATA_Msk (0xfffful << PWM_DATA2_DATA_Pos)

PWM_T::DATA2: DATA Mask

Definition at line 6774 of file Nano1X2Series.h.

## ◆ PWM_DATA2_DATA_Pos

#define PWM_DATA2_DATA_Pos (0)

PWM_T::DATA2: DATA Position

Definition at line 6773 of file Nano1X2Series.h.

## ◆ PWM_DATA2_sync_Msk

#define PWM_DATA2_sync_Msk (0x1ul << PWM_DATA2_sync_Pos)

PWM_T::DATA2: sync Mask

Definition at line 6780 of file Nano1X2Series.h.

## ◆ PWM_DATA2_sync_Pos

#define PWM_DATA2_sync_Pos (31)

PWM_T::DATA2: sync Position

Definition at line 6779 of file Nano1X2Series.h.

## ◆ PWM_DATA3_DATA_H_Msk

#define PWM_DATA3_DATA_H_Msk (0x7ffful << PWM_DATA3_DATA_H_Pos)

PWM_T::DATA3: DATA_H Mask

Definition at line 6792 of file Nano1X2Series.h.

## ◆ PWM_DATA3_DATA_H_Pos

#define PWM_DATA3_DATA_H_Pos (16)

PWM_T::DATA3: DATA_H Position

Definition at line 6791 of file Nano1X2Series.h.

## ◆ PWM_DATA3_DATA_Msk

#define PWM_DATA3_DATA_Msk (0xfffful << PWM_DATA3_DATA_Pos)

PWM_T::DATA3: DATA Mask

Definition at line 6789 of file Nano1X2Series.h.

## ◆ PWM_DATA3_DATA_Pos

#define PWM_DATA3_DATA_Pos (0)

PWM_T::DATA3: DATA Position

Definition at line 6788 of file Nano1X2Series.h.

## ◆ PWM_DATA3_sync_Msk

#define PWM_DATA3_sync_Msk (0x1ul << PWM_DATA3_sync_Pos)

PWM_T::DATA3: sync Mask

Definition at line 6795 of file Nano1X2Series.h.

## ◆ PWM_DATA3_sync_Pos

#define PWM_DATA3_sync_Pos (31)

PWM_T::DATA3: sync Position

Definition at line 6794 of file Nano1X2Series.h.

## ◆ PWM_DUTY0_CM_Msk

#define PWM_DUTY0_CM_Msk (0xfffful << PWM_DUTY0_CM_Pos)

PWM_T::DUTY0: CM Mask

Definition at line 6741 of file Nano1X2Series.h.

## ◆ PWM_DUTY0_CM_Pos

#define PWM_DUTY0_CM_Pos (16)

PWM_T::DUTY0: CM Position

Definition at line 6740 of file Nano1X2Series.h.

## ◆ PWM_DUTY0_CN_Msk

#define PWM_DUTY0_CN_Msk (0xfffful << PWM_DUTY0_CN_Pos)

PWM_T::DUTY0: CN Mask

Definition at line 6738 of file Nano1X2Series.h.

## ◆ PWM_DUTY0_CN_Pos

#define PWM_DUTY0_CN_Pos (0)

PWM_T::DUTY0: CN Position

Definition at line 6737 of file Nano1X2Series.h.

## ◆ PWM_DUTY1_CM_Msk

#define PWM_DUTY1_CM_Msk (0xfffful << PWM_DUTY1_CM_Pos)

PWM_T::DUTY1: CM Mask

Definition at line 6756 of file Nano1X2Series.h.

## ◆ PWM_DUTY1_CM_Pos

#define PWM_DUTY1_CM_Pos (16)

PWM_T::DUTY1: CM Position

Definition at line 6755 of file Nano1X2Series.h.

## ◆ PWM_DUTY1_CN_Msk

#define PWM_DUTY1_CN_Msk (0xfffful << PWM_DUTY1_CN_Pos)

PWM_T::DUTY1: CN Mask

Definition at line 6753 of file Nano1X2Series.h.

## ◆ PWM_DUTY1_CN_Pos

#define PWM_DUTY1_CN_Pos (0)

PWM_T::DUTY1: CN Position

Definition at line 6752 of file Nano1X2Series.h.

## ◆ PWM_DUTY2_CM_Msk

#define PWM_DUTY2_CM_Msk (0xfffful << PWM_DUTY2_CM_Pos)

PWM_T::DUTY2: CM Mask

Definition at line 6771 of file Nano1X2Series.h.

## ◆ PWM_DUTY2_CM_Pos

#define PWM_DUTY2_CM_Pos (16)

PWM_T::DUTY2: CM Position

Definition at line 6770 of file Nano1X2Series.h.

## ◆ PWM_DUTY2_CN_Msk

#define PWM_DUTY2_CN_Msk (0xfffful << PWM_DUTY2_CN_Pos)

PWM_T::DUTY2: CN Mask

Definition at line 6768 of file Nano1X2Series.h.

## ◆ PWM_DUTY2_CN_Pos

#define PWM_DUTY2_CN_Pos (0)

PWM_T::DUTY2: CN Position

Definition at line 6767 of file Nano1X2Series.h.

## ◆ PWM_DUTY3_CM_Msk

#define PWM_DUTY3_CM_Msk (0xfffful << PWM_DUTY3_CM_Pos)

PWM_T::DUTY3: CM Mask

Definition at line 6786 of file Nano1X2Series.h.

## ◆ PWM_DUTY3_CM_Pos

#define PWM_DUTY3_CM_Pos (16)

PWM_T::DUTY3: CM Position

Definition at line 6785 of file Nano1X2Series.h.

## ◆ PWM_DUTY3_CN_Msk

#define PWM_DUTY3_CN_Msk (0xfffful << PWM_DUTY3_CN_Pos)

PWM_T::DUTY3: CN Mask

Definition at line 6783 of file Nano1X2Series.h.

## ◆ PWM_DUTY3_CN_Pos

#define PWM_DUTY3_CN_Pos (0)

PWM_T::DUTY3: CN Position

Definition at line 6782 of file Nano1X2Series.h.

## ◆ PWM_INTEN_TMIE0_Msk

#define PWM_INTEN_TMIE0_Msk (0x1ul << PWM_INTEN_TMIE0_Pos)

PWM_T::INTEN: TMIE0 Mask

Definition at line 6687 of file Nano1X2Series.h.

## ◆ PWM_INTEN_TMIE0_Pos

#define PWM_INTEN_TMIE0_Pos (0)

PWM_T::INTEN: TMIE0 Position

Definition at line 6686 of file Nano1X2Series.h.

## ◆ PWM_INTEN_TMIE1_Msk

#define PWM_INTEN_TMIE1_Msk (0x1ul << PWM_INTEN_TMIE1_Pos)

PWM_T::INTEN: TMIE1 Mask

Definition at line 6690 of file Nano1X2Series.h.

## ◆ PWM_INTEN_TMIE1_Pos

#define PWM_INTEN_TMIE1_Pos (1)

PWM_T::INTEN: TMIE1 Position

Definition at line 6689 of file Nano1X2Series.h.

## ◆ PWM_INTEN_TMIE2_Msk

#define PWM_INTEN_TMIE2_Msk (0x1ul << PWM_INTEN_TMIE2_Pos)

PWM_T::INTEN: TMIE2 Mask

Definition at line 6693 of file Nano1X2Series.h.

## ◆ PWM_INTEN_TMIE2_Pos

#define PWM_INTEN_TMIE2_Pos (2)

PWM_T::INTEN: TMIE2 Position

Definition at line 6692 of file Nano1X2Series.h.

## ◆ PWM_INTEN_TMIE3_Msk

#define PWM_INTEN_TMIE3_Msk (0x1ul << PWM_INTEN_TMIE3_Pos)

PWM_T::INTEN: TMIE3 Mask

Definition at line 6696 of file Nano1X2Series.h.

## ◆ PWM_INTEN_TMIE3_Pos

#define PWM_INTEN_TMIE3_Pos (3)

PWM_T::INTEN: TMIE3 Position

Definition at line 6695 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_Duty0Syncflag_Msk

#define PWM_INTSTS_Duty0Syncflag_Msk (0x1ul << PWM_INTSTS_Duty0Syncflag_Pos)

PWM_T::INTSTS: Duty0Syncflag Mask

Definition at line 6711 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_Duty0Syncflag_Pos

#define PWM_INTSTS_Duty0Syncflag_Pos (4)

PWM_T::INTSTS: Duty0Syncflag Position

Definition at line 6710 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_Duty1Syncflag_Msk

#define PWM_INTSTS_Duty1Syncflag_Msk (0x1ul << PWM_INTSTS_Duty1Syncflag_Pos)

PWM_T::INTSTS: Duty1Syncflag Mask

Definition at line 6714 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_Duty1Syncflag_Pos

#define PWM_INTSTS_Duty1Syncflag_Pos (5)

PWM_T::INTSTS: Duty1Syncflag Position

Definition at line 6713 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_Duty2Syncflag_Msk

#define PWM_INTSTS_Duty2Syncflag_Msk (0x1ul << PWM_INTSTS_Duty2Syncflag_Pos)

PWM_T::INTSTS: Duty2Syncflag Mask

Definition at line 6717 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_Duty2Syncflag_Pos

#define PWM_INTSTS_Duty2Syncflag_Pos (6)

PWM_T::INTSTS: Duty2Syncflag Position

Definition at line 6716 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_Duty3Syncflag_Msk

#define PWM_INTSTS_Duty3Syncflag_Msk (0x1ul << PWM_INTSTS_Duty3Syncflag_Pos)

PWM_T::INTSTS: Duty3Syncflag Mask

Definition at line 6720 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_Duty3Syncflag_Pos

#define PWM_INTSTS_Duty3Syncflag_Pos (7)

PWM_T::INTSTS: Duty3Syncflag Position

Definition at line 6719 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_PresSyncFlag_Msk

#define PWM_INTSTS_PresSyncFlag_Msk (0x1ul << PWM_INTSTS_PresSyncFlag_Pos)

PWM_T::INTSTS: PresSyncFlag Mask

Definition at line 6723 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_PresSyncFlag_Pos

#define PWM_INTSTS_PresSyncFlag_Pos (8)

PWM_T::INTSTS: PresSyncFlag Position

Definition at line 6722 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_TMINT0_Msk

#define PWM_INTSTS_TMINT0_Msk (0x1ul << PWM_INTSTS_TMINT0_Pos)

PWM_T::INTSTS: TMINT0 Mask

Definition at line 6699 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_TMINT0_Pos

#define PWM_INTSTS_TMINT0_Pos (0)

PWM_T::INTSTS: TMINT0 Position

Definition at line 6698 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_TMINT1_Msk

#define PWM_INTSTS_TMINT1_Msk (0x1ul << PWM_INTSTS_TMINT1_Pos)

PWM_T::INTSTS: TMINT1 Mask

Definition at line 6702 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_TMINT1_Pos

#define PWM_INTSTS_TMINT1_Pos (1)

PWM_T::INTSTS: TMINT1 Position

Definition at line 6701 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_TMINT2_Msk

#define PWM_INTSTS_TMINT2_Msk (0x1ul << PWM_INTSTS_TMINT2_Pos)

PWM_T::INTSTS: TMINT2 Mask

Definition at line 6705 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_TMINT2_Pos

#define PWM_INTSTS_TMINT2_Pos (2)

PWM_T::INTSTS: TMINT2 Position

Definition at line 6704 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_TMINT3_Msk

#define PWM_INTSTS_TMINT3_Msk (0x1ul << PWM_INTSTS_TMINT3_Pos)

PWM_T::INTSTS: TMINT3 Mask

Definition at line 6708 of file Nano1X2Series.h.

## ◆ PWM_INTSTS_TMINT3_Pos

#define PWM_INTSTS_TMINT3_Pos (3)

PWM_T::INTSTS: TMINT3 Position

Definition at line 6707 of file Nano1X2Series.h.

## ◆ PWM_OE_CH0_OE_Msk

#define PWM_OE_CH0_OE_Msk (0x1ul << PWM_OE_CH0_OE_Pos)

PWM_T::OE: CH0_OE Mask

Definition at line 6726 of file Nano1X2Series.h.

## ◆ PWM_OE_CH0_OE_Pos

#define PWM_OE_CH0_OE_Pos (0)

PWM_T::OE: CH0_OE Position

Definition at line 6725 of file Nano1X2Series.h.

## ◆ PWM_OE_CH1_OE_Msk

#define PWM_OE_CH1_OE_Msk (0x1ul << PWM_OE_CH1_OE_Pos)

PWM_T::OE: CH1_OE Mask

Definition at line 6729 of file Nano1X2Series.h.

## ◆ PWM_OE_CH1_OE_Pos

#define PWM_OE_CH1_OE_Pos (1)

PWM_T::OE: CH1_OE Position

Definition at line 6728 of file Nano1X2Series.h.

## ◆ PWM_OE_CH2_OE_Msk

#define PWM_OE_CH2_OE_Msk (0x1ul << PWM_OE_CH2_OE_Pos)

PWM_T::OE: CH2_OE Mask

Definition at line 6732 of file Nano1X2Series.h.

## ◆ PWM_OE_CH2_OE_Pos

#define PWM_OE_CH2_OE_Pos (2)

PWM_T::OE: CH2_OE Position

Definition at line 6731 of file Nano1X2Series.h.

## ◆ PWM_OE_CH3_OE_Msk

#define PWM_OE_CH3_OE_Msk (0x1ul << PWM_OE_CH3_OE_Pos)

PWM_T::OE: CH3_OE Mask

Definition at line 6735 of file Nano1X2Series.h.

## ◆ PWM_OE_CH3_OE_Pos

#define PWM_OE_CH3_OE_Pos (3)

PWM_T::OE: CH3_OE Position

Definition at line 6734 of file Nano1X2Series.h.

## ◆ PWM_PDMACH0_PDMACH01_Msk

#define PWM_PDMACH0_PDMACH01_Msk (0xfful << PWM_PDMACH0_PDMACH01_Pos)

PWM_T::PDMACH0: PDMACH01 Mask

Definition at line 7014 of file Nano1X2Series.h.

## ◆ PWM_PDMACH0_PDMACH01_Pos

#define PWM_PDMACH0_PDMACH01_Pos (0)

PWM_T::PDMACH0: PDMACH01 Position

Definition at line 7013 of file Nano1X2Series.h.

## ◆ PWM_PDMACH0_PDMACH02_Msk

#define PWM_PDMACH0_PDMACH02_Msk (0xfful << PWM_PDMACH0_PDMACH02_Pos)

PWM_T::PDMACH0: PDMACH02 Mask

Definition at line 7017 of file Nano1X2Series.h.

## ◆ PWM_PDMACH0_PDMACH02_Pos

#define PWM_PDMACH0_PDMACH02_Pos (8)

PWM_T::PDMACH0: PDMACH02 Position

Definition at line 7016 of file Nano1X2Series.h.

## ◆ PWM_PDMACH0_PDMACH03_Msk

#define PWM_PDMACH0_PDMACH03_Msk (0xfful << PWM_PDMACH0_PDMACH03_Pos)

PWM_T::PDMACH0: PDMACH03 Mask

Definition at line 7020 of file Nano1X2Series.h.

## ◆ PWM_PDMACH0_PDMACH03_Pos

#define PWM_PDMACH0_PDMACH03_Pos (16)

PWM_T::PDMACH0: PDMACH03 Position

Definition at line 7019 of file Nano1X2Series.h.

## ◆ PWM_PDMACH0_PDMACH04_Msk

#define PWM_PDMACH0_PDMACH04_Msk (0xfful << PWM_PDMACH0_PDMACH04_Pos)

PWM_T::PDMACH0: PDMACH04 Mask

Definition at line 7023 of file Nano1X2Series.h.

## ◆ PWM_PDMACH0_PDMACH04_Pos

#define PWM_PDMACH0_PDMACH04_Pos (24)

PWM_T::PDMACH0: PDMACH04 Position

Definition at line 7022 of file Nano1X2Series.h.

## ◆ PWM_PDMACH2_PDMACH21_Msk

#define PWM_PDMACH2_PDMACH21_Msk (0xfful << PWM_PDMACH2_PDMACH21_Pos)

PWM_T::PDMACH2: PDMACH21 Mask

Definition at line 7026 of file Nano1X2Series.h.

## ◆ PWM_PDMACH2_PDMACH21_Pos

#define PWM_PDMACH2_PDMACH21_Pos (0)

PWM_T::PDMACH2: PDMACH21 Position

Definition at line 7025 of file Nano1X2Series.h.

## ◆ PWM_PDMACH2_PDMACH22_Msk

#define PWM_PDMACH2_PDMACH22_Msk (0xfful << PWM_PDMACH2_PDMACH22_Pos)

PWM_T::PDMACH2: PDMACH22 Mask

Definition at line 7029 of file Nano1X2Series.h.

## ◆ PWM_PDMACH2_PDMACH22_Pos

#define PWM_PDMACH2_PDMACH22_Pos (8)

PWM_T::PDMACH2: PDMACH22 Position

Definition at line 7028 of file Nano1X2Series.h.

## ◆ PWM_PDMACH2_PDMACH23_Msk

#define PWM_PDMACH2_PDMACH23_Msk (0xfful << PWM_PDMACH2_PDMACH23_Pos)

PWM_T::PDMACH2: PDMACH23 Mask

Definition at line 7032 of file Nano1X2Series.h.

## ◆ PWM_PDMACH2_PDMACH23_Pos

#define PWM_PDMACH2_PDMACH23_Pos (16)

PWM_T::PDMACH2: PDMACH23 Position

Definition at line 7031 of file Nano1X2Series.h.

## ◆ PWM_PDMACH2_PDMACH24_Msk

#define PWM_PDMACH2_PDMACH24_Msk (0xfful << PWM_PDMACH2_PDMACH24_Pos)

PWM_T::PDMACH2: PDMACH24 Mask

Definition at line 7035 of file Nano1X2Series.h.

## ◆ PWM_PDMACH2_PDMACH24_Pos

#define PWM_PDMACH2_PDMACH24_Pos (24)

PWM_T::PDMACH2: PDMACH24 Position

Definition at line 7034 of file Nano1X2Series.h.

## ◆ PWM_PRES_CP01_Msk

#define PWM_PRES_CP01_Msk (0xfful << PWM_PRES_CP01_Pos)

PWM_T::PRES: CP01 Mask

Definition at line 6615 of file Nano1X2Series.h.

## ◆ PWM_PRES_CP01_Pos

#define PWM_PRES_CP01_Pos (0)

    @addtogroup PWM_CONST PWM Bit Field Definition
    Constant Definitions for PWM Controller

PWM_T::PRES: CP01 Position

Definition at line 6614 of file Nano1X2Series.h.

## ◆ PWM_PRES_CP23_Msk

#define PWM_PRES_CP23_Msk (0xfful << PWM_PRES_CP23_Pos)

PWM_T::PRES: CP23 Mask

Definition at line 6618 of file Nano1X2Series.h.

## ◆ PWM_PRES_CP23_Pos

#define PWM_PRES_CP23_Pos (8)

PWM_T::PRES: CP23 Position

Definition at line 6617 of file Nano1X2Series.h.

## ◆ PWM_PRES_DZ01_Msk

#define PWM_PRES_DZ01_Msk (0xfful << PWM_PRES_DZ01_Pos)

PWM_T::PRES: DZ01 Mask

Definition at line 6621 of file Nano1X2Series.h.

## ◆ PWM_PRES_DZ01_Pos

#define PWM_PRES_DZ01_Pos (16)

PWM_T::PRES: DZ01 Position

Definition at line 6620 of file Nano1X2Series.h.

## ◆ PWM_PRES_DZ23_Msk

#define PWM_PRES_DZ23_Msk (0xfful << PWM_PRES_DZ23_Pos)

PWM_T::PRES: DZ23 Mask

Definition at line 6624 of file Nano1X2Series.h.

## ◆ PWM_PRES_DZ23_Pos

#define PWM_PRES_DZ23_Pos (24)

PWM_T::PRES: DZ23 Position

Definition at line 6623 of file Nano1X2Series.h.

## ◆ RTC_AER_AER_Msk

#define RTC_AER_AER_Msk (0xfffful << RTC_AER_AER_Pos)

RTC_T::AER: AER Mask

Definition at line 7354 of file Nano1X2Series.h.

## ◆ RTC_AER_AER_Pos

#define RTC_AER_AER_Pos (0)

RTC_T::AER: AER Position

Definition at line 7353 of file Nano1X2Series.h.

## ◆ RTC_AER_ENF_Msk

#define RTC_AER_ENF_Msk (0x1ul << RTC_AER_ENF_Pos)

RTC_T::AER: ENF Mask

Definition at line 7357 of file Nano1X2Series.h.

## ◆ RTC_AER_ENF_Pos

#define RTC_AER_ENF_Pos (16)

RTC_T::AER: ENF Position

Definition at line 7356 of file Nano1X2Series.h.

## ◆ RTC_CAR_10DAY_Msk

#define RTC_CAR_10DAY_Msk (0x3ul << RTC_CAR_10DAY_Pos)

RTC_T::CAR: 10DAY Mask

Definition at line 7426 of file Nano1X2Series.h.

## ◆ RTC_CAR_10DAY_Pos

#define RTC_CAR_10DAY_Pos (4)

RTC_T::CAR: 10DAY Position

Definition at line 7425 of file Nano1X2Series.h.

## ◆ RTC_CAR_10MON_Msk

#define RTC_CAR_10MON_Msk (0x1ul << RTC_CAR_10MON_Pos)

RTC_T::CAR: 10MON Mask

Definition at line 7432 of file Nano1X2Series.h.

## ◆ RTC_CAR_10MON_Pos

#define RTC_CAR_10MON_Pos (12)

RTC_T::CAR: 10MON Position

Definition at line 7431 of file Nano1X2Series.h.

## ◆ RTC_CAR_10YEAR_Msk

#define RTC_CAR_10YEAR_Msk (0xful << RTC_CAR_10YEAR_Pos)

RTC_T::CAR: 10YEAR Mask

Definition at line 7438 of file Nano1X2Series.h.

## ◆ RTC_CAR_10YEAR_Pos

#define RTC_CAR_10YEAR_Pos (20)

RTC_T::CAR: 10YEAR Position

Definition at line 7437 of file Nano1X2Series.h.

## ◆ RTC_CAR_1DAY_Msk

#define RTC_CAR_1DAY_Msk (0xful << RTC_CAR_1DAY_Pos)

RTC_T::CAR: 1DAY Mask

Definition at line 7423 of file Nano1X2Series.h.

## ◆ RTC_CAR_1DAY_Pos

#define RTC_CAR_1DAY_Pos (0)

RTC_T::CAR: 1DAY Position

Definition at line 7422 of file Nano1X2Series.h.

## ◆ RTC_CAR_1MON_Msk

#define RTC_CAR_1MON_Msk (0xful << RTC_CAR_1MON_Pos)

RTC_T::CAR: 1MON Mask

Definition at line 7429 of file Nano1X2Series.h.

## ◆ RTC_CAR_1MON_Pos

#define RTC_CAR_1MON_Pos (8)

RTC_T::CAR: 1MON Position

Definition at line 7428 of file Nano1X2Series.h.

## ◆ RTC_CAR_1YEAR_Msk

#define RTC_CAR_1YEAR_Msk (0xful << RTC_CAR_1YEAR_Pos)

RTC_T::CAR: 1YEAR Mask

Definition at line 7435 of file Nano1X2Series.h.

## ◆ RTC_CAR_1YEAR_Pos

#define RTC_CAR_1YEAR_Pos (16)

RTC_T::CAR: 1YEAR Position

Definition at line 7434 of file Nano1X2Series.h.

## ◆ RTC_CLR_10DAY_Msk

#define RTC_CLR_10DAY_Msk (0x3ul << RTC_CLR_10DAY_Pos)

RTC_T::CLR: 10DAY Mask

Definition at line 7384 of file Nano1X2Series.h.

## ◆ RTC_CLR_10DAY_Pos

#define RTC_CLR_10DAY_Pos (4)

RTC_T::CLR: 10DAY Position

Definition at line 7383 of file Nano1X2Series.h.

## ◆ RTC_CLR_10MON_Msk

#define RTC_CLR_10MON_Msk (0x1ul << RTC_CLR_10MON_Pos)

RTC_T::CLR: 10MON Mask

Definition at line 7390 of file Nano1X2Series.h.

## ◆ RTC_CLR_10MON_Pos

#define RTC_CLR_10MON_Pos (12)

RTC_T::CLR: 10MON Position

Definition at line 7389 of file Nano1X2Series.h.

## ◆ RTC_CLR_10YEAR_Msk

#define RTC_CLR_10YEAR_Msk (0xful << RTC_CLR_10YEAR_Pos)

RTC_T::CLR: 10YEAR Mask

Definition at line 7396 of file Nano1X2Series.h.

## ◆ RTC_CLR_10YEAR_Pos

#define RTC_CLR_10YEAR_Pos (20)

RTC_T::CLR: 10YEAR Position

Definition at line 7395 of file Nano1X2Series.h.

## ◆ RTC_CLR_1DAY_Msk

#define RTC_CLR_1DAY_Msk (0xful << RTC_CLR_1DAY_Pos)

RTC_T::CLR: 1DAY Mask

Definition at line 7381 of file Nano1X2Series.h.

## ◆ RTC_CLR_1DAY_Pos

#define RTC_CLR_1DAY_Pos (0)

RTC_T::CLR: 1DAY Position

Definition at line 7380 of file Nano1X2Series.h.

## ◆ RTC_CLR_1MON_Msk

#define RTC_CLR_1MON_Msk (0xful << RTC_CLR_1MON_Pos)

RTC_T::CLR: 1MON Mask

Definition at line 7387 of file Nano1X2Series.h.

## ◆ RTC_CLR_1MON_Pos

#define RTC_CLR_1MON_Pos (8)

RTC_T::CLR: 1MON Position

Definition at line 7386 of file Nano1X2Series.h.

## ◆ RTC_CLR_1YEAR_Msk

#define RTC_CLR_1YEAR_Msk (0xful << RTC_CLR_1YEAR_Pos)

RTC_T::CLR: 1YEAR Mask

Definition at line 7393 of file Nano1X2Series.h.

## ◆ RTC_CLR_1YEAR_Pos

#define RTC_CLR_1YEAR_Pos (16)

RTC_T::CLR: 1YEAR Position

Definition at line 7392 of file Nano1X2Series.h.

## ◆ RTC_DWR_DWR_Msk

#define RTC_DWR_DWR_Msk (0x7ul << RTC_DWR_DWR_Pos)

RTC_T::DWR: DWR Mask

Definition at line 7402 of file Nano1X2Series.h.

## ◆ RTC_DWR_DWR_Pos

#define RTC_DWR_DWR_Pos (0)

RTC_T::DWR: DWR Position

Definition at line 7401 of file Nano1X2Series.h.

## ◆ RTC_FCR_FCR_Msk

#define RTC_FCR_FCR_Msk (0x3ffffful << RTC_FCR_FCR_Pos)

RTC_T::FCR: FCR Mask

Definition at line 7360 of file Nano1X2Series.h.

## ◆ RTC_FCR_FCR_Pos

#define RTC_FCR_FCR_Pos (0)

RTC_T::FCR: FCR Position

Definition at line 7359 of file Nano1X2Series.h.

## ◆ RTC_INIR_ACTIVE_Msk

#define RTC_INIR_ACTIVE_Msk (0x1ul << RTC_INIR_ACTIVE_Pos)

RTC_T::INIR: ACTIVE Mask

Definition at line 7348 of file Nano1X2Series.h.

## ◆ RTC_INIR_ACTIVE_Pos

#define RTC_INIR_ACTIVE_Pos (0)

    @addtogroup RTC_CONST RTC Bit Field Definition
    Constant Definitions for RTC Controller

RTC_T::INIR: ACTIVE Position

Definition at line 7347 of file Nano1X2Series.h.

## ◆ RTC_INIR_INIR_Msk

#define RTC_INIR_INIR_Msk (0xfffffffful << RTC_INIR_INIR_Pos)

RTC_T::INIR: INIR Mask

Definition at line 7351 of file Nano1X2Series.h.

## ◆ RTC_INIR_INIR_Pos

#define RTC_INIR_INIR_Pos (0)

RTC_T::INIR: INIR Position

Definition at line 7350 of file Nano1X2Series.h.

## ◆ RTC_LIR_LIR_Msk

#define RTC_LIR_LIR_Msk (0x1ul << RTC_LIR_LIR_Pos)

RTC_T::LIR: LIR Mask

Definition at line 7441 of file Nano1X2Series.h.

## ◆ RTC_LIR_LIR_Pos

#define RTC_LIR_LIR_Pos (0)

RTC_T::LIR: LIR Position

Definition at line 7440 of file Nano1X2Series.h.

## ◆ RTC_RIER_AIER_Msk

#define RTC_RIER_AIER_Msk (0x1ul << RTC_RIER_AIER_Pos)

RTC_T::RIER: AIER Mask

Definition at line 7444 of file Nano1X2Series.h.

## ◆ RTC_RIER_AIER_Pos

#define RTC_RIER_AIER_Pos (0)

RTC_T::RIER: AIER Position

Definition at line 7443 of file Nano1X2Series.h.

## ◆ RTC_RIER_SNOOPIER_Msk

#define RTC_RIER_SNOOPIER_Msk (0x1ul << RTC_RIER_SNOOPIER_Pos)

RTC_T::RIER: SNOOPIER Mask

Definition at line 7450 of file Nano1X2Series.h.

## ◆ RTC_RIER_SNOOPIER_Pos

#define RTC_RIER_SNOOPIER_Pos (2)

RTC_T::RIER: SNOOPIER Position

Definition at line 7449 of file Nano1X2Series.h.

## ◆ RTC_RIER_TIER_Msk

#define RTC_RIER_TIER_Msk (0x1ul << RTC_RIER_TIER_Pos)

RTC_T::RIER: TIER Mask

Definition at line 7447 of file Nano1X2Series.h.

## ◆ RTC_RIER_TIER_Pos

#define RTC_RIER_TIER_Pos (1)

RTC_T::RIER: TIER Position

Definition at line 7446 of file Nano1X2Series.h.

## ◆ RTC_RIIR_AIF_Msk

#define RTC_RIIR_AIF_Msk (0x1ul << RTC_RIIR_AIF_Pos)

RTC_T::RIIR: AIF Mask

Definition at line 7453 of file Nano1X2Series.h.

## ◆ RTC_RIIR_AIF_Pos

#define RTC_RIIR_AIF_Pos (0)

RTC_T::RIIR: AIF Position

Definition at line 7452 of file Nano1X2Series.h.

## ◆ RTC_RIIR_SNOOPIF_Msk

#define RTC_RIIR_SNOOPIF_Msk (0x1ul << RTC_RIIR_SNOOPIF_Pos)

RTC_T::RIIR: SNOOPIF Mask

Definition at line 7459 of file Nano1X2Series.h.

## ◆ RTC_RIIR_SNOOPIF_Pos

#define RTC_RIIR_SNOOPIF_Pos (2)

RTC_T::RIIR: SNOOPIF Position

Definition at line 7458 of file Nano1X2Series.h.

## ◆ RTC_RIIR_TIF_Msk

#define RTC_RIIR_TIF_Msk (0x1ul << RTC_RIIR_TIF_Pos)

RTC_T::RIIR: TIF Mask

Definition at line 7456 of file Nano1X2Series.h.

## ◆ RTC_RIIR_TIF_Pos

#define RTC_RIIR_TIF_Pos (1)

RTC_T::RIIR: TIF Position

Definition at line 7455 of file Nano1X2Series.h.

## ◆ RTC_SPR0_SPARE_Msk

#define RTC_SPR0_SPARE_Msk (0xfffffffful << RTC_SPR0_SPARE_Pos)

RTC_T::SPR0: SPARE Mask

Definition at line 7474 of file Nano1X2Series.h.

## ◆ RTC_SPR0_SPARE_Pos

#define RTC_SPR0_SPARE_Pos (0)

RTC_T::SPR0: SPARE Position

Definition at line 7473 of file Nano1X2Series.h.

## ◆ RTC_SPR10_SPARE_Msk

#define RTC_SPR10_SPARE_Msk (0xfffffffful << RTC_SPR10_SPARE_Pos)

RTC_T::SPR10: SPARE Mask

Definition at line 7504 of file Nano1X2Series.h.

## ◆ RTC_SPR10_SPARE_Pos

#define RTC_SPR10_SPARE_Pos (0)

RTC_T::SPR10: SPARE Position

Definition at line 7503 of file Nano1X2Series.h.

## ◆ RTC_SPR11_SPARE_Msk

#define RTC_SPR11_SPARE_Msk (0xfffffffful << RTC_SPR11_SPARE_Pos)

RTC_T::SPR11: SPARE Mask

Definition at line 7507 of file Nano1X2Series.h.

## ◆ RTC_SPR11_SPARE_Pos

#define RTC_SPR11_SPARE_Pos (0)

RTC_T::SPR11: SPARE Position

Definition at line 7506 of file Nano1X2Series.h.

## ◆ RTC_SPR12_SPARE_Msk

#define RTC_SPR12_SPARE_Msk (0xfffffffful << RTC_SPR12_SPARE_Pos)

RTC_T::SPR12: SPARE Mask

Definition at line 7510 of file Nano1X2Series.h.

## ◆ RTC_SPR12_SPARE_Pos

#define RTC_SPR12_SPARE_Pos (0)

RTC_T::SPR12: SPARE Position

Definition at line 7509 of file Nano1X2Series.h.

## ◆ RTC_SPR13_SPARE_Msk

#define RTC_SPR13_SPARE_Msk (0xfffffffful << RTC_SPR13_SPARE_Pos)

RTC_T::SPR13: SPARE Mask

Definition at line 7513 of file Nano1X2Series.h.

## ◆ RTC_SPR13_SPARE_Pos

#define RTC_SPR13_SPARE_Pos (0)

RTC_T::SPR13: SPARE Position

Definition at line 7512 of file Nano1X2Series.h.

## ◆ RTC_SPR14_SPARE_Msk

#define RTC_SPR14_SPARE_Msk (0xfffffffful << RTC_SPR14_SPARE_Pos)

RTC_T::SPR14: SPARE Mask

Definition at line 7516 of file Nano1X2Series.h.

## ◆ RTC_SPR14_SPARE_Pos

#define RTC_SPR14_SPARE_Pos (0)

RTC_T::SPR14: SPARE Position

Definition at line 7515 of file Nano1X2Series.h.

## ◆ RTC_SPR15_SPARE_Msk

#define RTC_SPR15_SPARE_Msk (0xfffffffful << RTC_SPR15_SPARE_Pos)

RTC_T::SPR15: SPARE Mask

Definition at line 7519 of file Nano1X2Series.h.

## ◆ RTC_SPR15_SPARE_Pos

#define RTC_SPR15_SPARE_Pos (0)

RTC_T::SPR15: SPARE Position

Definition at line 7518 of file Nano1X2Series.h.

## ◆ RTC_SPR16_SPARE_Msk

#define RTC_SPR16_SPARE_Msk (0xfffffffful << RTC_SPR16_SPARE_Pos)

RTC_T::SPR16: SPARE Mask

Definition at line 7522 of file Nano1X2Series.h.

## ◆ RTC_SPR16_SPARE_Pos

#define RTC_SPR16_SPARE_Pos (0)

RTC_T::SPR16: SPARE Position

Definition at line 7521 of file Nano1X2Series.h.

## ◆ RTC_SPR17_SPARE_Msk

#define RTC_SPR17_SPARE_Msk (0xfffffffful << RTC_SPR17_SPARE_Pos)

RTC_T::SPR17: SPARE Mask

Definition at line 7525 of file Nano1X2Series.h.

## ◆ RTC_SPR17_SPARE_Pos

#define RTC_SPR17_SPARE_Pos (0)

RTC_T::SPR17: SPARE Position

Definition at line 7524 of file Nano1X2Series.h.

## ◆ RTC_SPR18_SPARE_Msk

#define RTC_SPR18_SPARE_Msk (0xfffffffful << RTC_SPR18_SPARE_Pos)

RTC_T::SPR18: SPARE Mask

Definition at line 7528 of file Nano1X2Series.h.

## ◆ RTC_SPR18_SPARE_Pos

#define RTC_SPR18_SPARE_Pos (0)

RTC_T::SPR18: SPARE Position

Definition at line 7527 of file Nano1X2Series.h.

## ◆ RTC_SPR19_SPARE_Msk

#define RTC_SPR19_SPARE_Msk (0xfffffffful << RTC_SPR19_SPARE_Pos)

RTC_T::SPR19: SPARE Mask

Definition at line 7531 of file Nano1X2Series.h.

## ◆ RTC_SPR19_SPARE_Pos

#define RTC_SPR19_SPARE_Pos (0)

RTC_T::SPR19: SPARE Position

Definition at line 7530 of file Nano1X2Series.h.

## ◆ RTC_SPR1_SPARE_Msk

#define RTC_SPR1_SPARE_Msk (0xfffffffful << RTC_SPR1_SPARE_Pos)

RTC_T::SPR1: SPARE Mask

Definition at line 7477 of file Nano1X2Series.h.

## ◆ RTC_SPR1_SPARE_Pos

#define RTC_SPR1_SPARE_Pos (0)

RTC_T::SPR1: SPARE Position

Definition at line 7476 of file Nano1X2Series.h.

## ◆ RTC_SPR2_SPARE_Msk

#define RTC_SPR2_SPARE_Msk (0xfffffffful << RTC_SPR2_SPARE_Pos)

RTC_T::SPR2: SPARE Mask

Definition at line 7480 of file Nano1X2Series.h.

## ◆ RTC_SPR2_SPARE_Pos

#define RTC_SPR2_SPARE_Pos (0)

RTC_T::SPR2: SPARE Position

Definition at line 7479 of file Nano1X2Series.h.

## ◆ RTC_SPR3_SPARE_Msk

#define RTC_SPR3_SPARE_Msk (0xfffffffful << RTC_SPR3_SPARE_Pos)

RTC_T::SPR3: SPARE Mask

Definition at line 7483 of file Nano1X2Series.h.

## ◆ RTC_SPR3_SPARE_Pos

#define RTC_SPR3_SPARE_Pos (0)

RTC_T::SPR3: SPARE Position

Definition at line 7482 of file Nano1X2Series.h.

## ◆ RTC_SPR4_SPARE_Msk

#define RTC_SPR4_SPARE_Msk (0xfffffffful << RTC_SPR4_SPARE_Pos)

RTC_T::SPR4: SPARE Mask

Definition at line 7486 of file Nano1X2Series.h.

## ◆ RTC_SPR4_SPARE_Pos

#define RTC_SPR4_SPARE_Pos (0)

RTC_T::SPR4: SPARE Position

Definition at line 7485 of file Nano1X2Series.h.

## ◆ RTC_SPR5_SPARE_Msk

#define RTC_SPR5_SPARE_Msk (0xfffffffful << RTC_SPR5_SPARE_Pos)

RTC_T::SPR5: SPARE Mask

Definition at line 7489 of file Nano1X2Series.h.

## ◆ RTC_SPR5_SPARE_Pos

#define RTC_SPR5_SPARE_Pos (0)

RTC_T::SPR5: SPARE Position

Definition at line 7488 of file Nano1X2Series.h.

## ◆ RTC_SPR6_SPARE_Msk

#define RTC_SPR6_SPARE_Msk (0xfffffffful << RTC_SPR6_SPARE_Pos)

RTC_T::SPR6: SPARE Mask

Definition at line 7492 of file Nano1X2Series.h.

## ◆ RTC_SPR6_SPARE_Pos

#define RTC_SPR6_SPARE_Pos (0)

RTC_T::SPR6: SPARE Position

Definition at line 7491 of file Nano1X2Series.h.

## ◆ RTC_SPR7_SPARE_Msk

#define RTC_SPR7_SPARE_Msk (0xfffffffful << RTC_SPR7_SPARE_Pos)

RTC_T::SPR7: SPARE Mask

Definition at line 7495 of file Nano1X2Series.h.

## ◆ RTC_SPR7_SPARE_Pos

#define RTC_SPR7_SPARE_Pos (0)

RTC_T::SPR7: SPARE Position

Definition at line 7494 of file Nano1X2Series.h.

## ◆ RTC_SPR8_SPARE_Msk

#define RTC_SPR8_SPARE_Msk (0xfffffffful << RTC_SPR8_SPARE_Pos)

RTC_T::SPR8: SPARE Mask

Definition at line 7498 of file Nano1X2Series.h.

## ◆ RTC_SPR8_SPARE_Pos

#define RTC_SPR8_SPARE_Pos (0)

RTC_T::SPR8: SPARE Position

Definition at line 7497 of file Nano1X2Series.h.

## ◆ RTC_SPR9_SPARE_Msk

#define RTC_SPR9_SPARE_Msk (0xfffffffful << RTC_SPR9_SPARE_Pos)

RTC_T::SPR9: SPARE Mask

Definition at line 7501 of file Nano1X2Series.h.

## ◆ RTC_SPR9_SPARE_Pos

#define RTC_SPR9_SPARE_Pos (0)

RTC_T::SPR9: SPARE Position

Definition at line 7500 of file Nano1X2Series.h.

## ◆ RTC_SPRCTL_SNOOPEDGE_Msk

#define RTC_SPRCTL_SNOOPEDGE_Msk (0x1ul << RTC_SPRCTL_SNOOPEDGE_Pos)

RTC_T::SPRCTL: SNOOPEDGE Mask

Definition at line 7471 of file Nano1X2Series.h.

## ◆ RTC_SPRCTL_SNOOPEDGE_Pos

#define RTC_SPRCTL_SNOOPEDGE_Pos (1)

RTC_T::SPRCTL: SNOOPEDGE Position

Definition at line 7470 of file Nano1X2Series.h.

## ◆ RTC_SPRCTL_SNOOPEN_Msk

#define RTC_SPRCTL_SNOOPEN_Msk (0x1ul << RTC_SPRCTL_SNOOPEN_Pos)

RTC_T::SPRCTL: SNOOPEN Mask

Definition at line 7468 of file Nano1X2Series.h.

## ◆ RTC_SPRCTL_SNOOPEN_Pos

#define RTC_SPRCTL_SNOOPEN_Pos (0)

RTC_T::SPRCTL: SNOOPEN Position

Definition at line 7467 of file Nano1X2Series.h.

## ◆ RTC_TAR_10HR_Msk

#define RTC_TAR_10HR_Msk (0x3ul << RTC_TAR_10HR_Pos)

RTC_T::TAR: 10HR Mask

Definition at line 7420 of file Nano1X2Series.h.

## ◆ RTC_TAR_10HR_Pos

#define RTC_TAR_10HR_Pos (20)

RTC_T::TAR: 10HR Position

Definition at line 7419 of file Nano1X2Series.h.

## ◆ RTC_TAR_10MIN_Msk

#define RTC_TAR_10MIN_Msk (0x7ul << RTC_TAR_10MIN_Pos)

RTC_T::TAR: 10MIN Mask

Definition at line 7414 of file Nano1X2Series.h.

## ◆ RTC_TAR_10MIN_Pos

#define RTC_TAR_10MIN_Pos (12)

RTC_T::TAR: 10MIN Position

Definition at line 7413 of file Nano1X2Series.h.

## ◆ RTC_TAR_10SEC_Msk

#define RTC_TAR_10SEC_Msk (0x7ul << RTC_TAR_10SEC_Pos)

RTC_T::TAR: 10SEC Mask

Definition at line 7408 of file Nano1X2Series.h.

## ◆ RTC_TAR_10SEC_Pos

#define RTC_TAR_10SEC_Pos (4)

RTC_T::TAR: 10SEC Position

Definition at line 7407 of file Nano1X2Series.h.

## ◆ RTC_TAR_1HR_Msk

#define RTC_TAR_1HR_Msk (0xful << RTC_TAR_1HR_Pos)

RTC_T::TAR: 1HR Mask

Definition at line 7417 of file Nano1X2Series.h.

## ◆ RTC_TAR_1HR_Pos

#define RTC_TAR_1HR_Pos (16)

RTC_T::TAR: 1HR Position

Definition at line 7416 of file Nano1X2Series.h.

## ◆ RTC_TAR_1MIN_Msk

#define RTC_TAR_1MIN_Msk (0xful << RTC_TAR_1MIN_Pos)

RTC_T::TAR: 1MIN Mask

Definition at line 7411 of file Nano1X2Series.h.

## ◆ RTC_TAR_1MIN_Pos

#define RTC_TAR_1MIN_Pos (8)

RTC_T::TAR: 1MIN Position

Definition at line 7410 of file Nano1X2Series.h.

## ◆ RTC_TAR_1SEC_Msk

#define RTC_TAR_1SEC_Msk (0xful << RTC_TAR_1SEC_Pos)

RTC_T::TAR: 1SEC Mask

Definition at line 7405 of file Nano1X2Series.h.

## ◆ RTC_TAR_1SEC_Pos

#define RTC_TAR_1SEC_Pos (0)

RTC_T::TAR: 1SEC Position

Definition at line 7404 of file Nano1X2Series.h.

## ◆ RTC_TLR_10HR_Msk

#define RTC_TLR_10HR_Msk (0x3ul << RTC_TLR_10HR_Pos)

RTC_T::TLR: 10HR Mask

Definition at line 7378 of file Nano1X2Series.h.

## ◆ RTC_TLR_10HR_Pos

#define RTC_TLR_10HR_Pos (20)

RTC_T::TLR: 10HR Position

Definition at line 7377 of file Nano1X2Series.h.

## ◆ RTC_TLR_10MIN_Msk

#define RTC_TLR_10MIN_Msk (0x7ul << RTC_TLR_10MIN_Pos)

RTC_T::TLR: 10MIN Mask

Definition at line 7372 of file Nano1X2Series.h.

## ◆ RTC_TLR_10MIN_Pos

#define RTC_TLR_10MIN_Pos (12)

RTC_T::TLR: 10MIN Position

Definition at line 7371 of file Nano1X2Series.h.

## ◆ RTC_TLR_10SEC_Msk

#define RTC_TLR_10SEC_Msk (0x7ul << RTC_TLR_10SEC_Pos)

RTC_T::TLR: 10SEC Mask

Definition at line 7366 of file Nano1X2Series.h.

## ◆ RTC_TLR_10SEC_Pos

#define RTC_TLR_10SEC_Pos (4)

RTC_T::TLR: 10SEC Position

Definition at line 7365 of file Nano1X2Series.h.

## ◆ RTC_TLR_1HR_Msk

#define RTC_TLR_1HR_Msk (0xful << RTC_TLR_1HR_Pos)

RTC_T::TLR: 1HR Mask

Definition at line 7375 of file Nano1X2Series.h.

## ◆ RTC_TLR_1HR_Pos

#define RTC_TLR_1HR_Pos (16)

RTC_T::TLR: 1HR Position

Definition at line 7374 of file Nano1X2Series.h.

## ◆ RTC_TLR_1MIN_Msk

#define RTC_TLR_1MIN_Msk (0xful << RTC_TLR_1MIN_Pos)

RTC_T::TLR: 1MIN Mask

Definition at line 7369 of file Nano1X2Series.h.

## ◆ RTC_TLR_1MIN_Pos

#define RTC_TLR_1MIN_Pos (8)

RTC_T::TLR: 1MIN Position

Definition at line 7368 of file Nano1X2Series.h.

## ◆ RTC_TLR_1SEC_Msk

#define RTC_TLR_1SEC_Msk (0xful << RTC_TLR_1SEC_Pos)

RTC_T::TLR: 1SEC Mask

Definition at line 7363 of file Nano1X2Series.h.

## ◆ RTC_TLR_1SEC_Pos

#define RTC_TLR_1SEC_Pos (0)

RTC_T::TLR: 1SEC Position

Definition at line 7362 of file Nano1X2Series.h.

## ◆ RTC_TSSR_24H_12H_Msk

#define RTC_TSSR_24H_12H_Msk (0x1ul << RTC_TSSR_24H_12H_Pos)

RTC_T::TSSR: 24hr_12hr Mask

Definition at line 7399 of file Nano1X2Series.h.

## ◆ RTC_TSSR_24H_12H_Pos

#define RTC_TSSR_24H_12H_Pos (0)

RTC_T::TSSR: 24hr_12hr Position

Definition at line 7398 of file Nano1X2Series.h.

## ◆ RTC_TTR_TTR_Msk

#define RTC_TTR_TTR_Msk (0x7ul << RTC_TTR_TTR_Pos)

RTC_T::TTR: TTR Mask

Definition at line 7462 of file Nano1X2Series.h.

## ◆ RTC_TTR_TTR_Pos

#define RTC_TTR_TTR_Pos (0)

RTC_T::TTR: TTR Position

Definition at line 7461 of file Nano1X2Series.h.

## ◆ RTC_TTR_TWKE_Msk

#define RTC_TTR_TWKE_Msk (0x1ul << RTC_TTR_TWKE_Pos)

RTC_T::TTR: TWKE Mask

Definition at line 7465 of file Nano1X2Series.h.

## ◆ RTC_TTR_TWKE_Pos

#define RTC_TTR_TWKE_Pos (3)

RTC_T::TTR: TWKE Position

Definition at line 7464 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_ACT_EN_Msk

#define SC_ALTCTL_ACT_EN_Msk (0x1ul << SC_ALTCTL_ACT_EN_Pos)

SC_T::ALTCTL: ACT_EN Mask

Definition at line 8217 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_ACT_EN_Pos

#define SC_ALTCTL_ACT_EN_Pos (3)

SC_T::ALTCTL: ACT_EN Position

Definition at line 8216 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_DACT_EN_Msk

#define SC_ALTCTL_DACT_EN_Msk (0x1ul << SC_ALTCTL_DACT_EN_Pos)

SC_T::ALTCTL: DACT_EN Mask

Definition at line 8214 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_DACT_EN_Pos

#define SC_ALTCTL_DACT_EN_Pos (2)

SC_T::ALTCTL: DACT_EN Position

Definition at line 8213 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_INIT_SEL_Msk

#define SC_ALTCTL_INIT_SEL_Msk (0x3ul << SC_ALTCTL_INIT_SEL_Pos)

SC_T::ALTCTL: INIT_SEL Mask

Definition at line 8232 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_INIT_SEL_Pos

#define SC_ALTCTL_INIT_SEL_Pos (8)

SC_T::ALTCTL: INIT_SEL Position

Definition at line 8231 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_RX_BGT_EN_Msk

#define SC_ALTCTL_RX_BGT_EN_Msk (0x1ul << SC_ALTCTL_RX_BGT_EN_Pos)

SC_T::ALTCTL: RX_BGT_EN Mask

Definition at line 8235 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_RX_BGT_EN_Pos

#define SC_ALTCTL_RX_BGT_EN_Pos (12)

SC_T::ALTCTL: RX_BGT_EN Position

Definition at line 8234 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_RX_RST_Msk

#define SC_ALTCTL_RX_RST_Msk (0x1ul << SC_ALTCTL_RX_RST_Pos)

SC_T::ALTCTL: RX_RST Mask

Definition at line 8211 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_RX_RST_Pos

#define SC_ALTCTL_RX_RST_Pos (1)

SC_T::ALTCTL: RX_RST Position

Definition at line 8210 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_TMR0_ATV_Msk

#define SC_ALTCTL_TMR0_ATV_Msk (0x1ul << SC_ALTCTL_TMR0_ATV_Pos)

SC_T::ALTCTL: TMR0_ATV Mask

Definition at line 8238 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_TMR0_ATV_Pos

#define SC_ALTCTL_TMR0_ATV_Pos (13)

SC_T::ALTCTL: TMR0_ATV Position

Definition at line 8237 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_TMR0_SEN_Msk

#define SC_ALTCTL_TMR0_SEN_Msk (0x1ul << SC_ALTCTL_TMR0_SEN_Pos)

SC_T::ALTCTL: TMR0_SEN Mask

Definition at line 8223 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_TMR0_SEN_Pos

#define SC_ALTCTL_TMR0_SEN_Pos (5)

SC_T::ALTCTL: TMR0_SEN Position

Definition at line 8222 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_TMR1_ATV_Msk

#define SC_ALTCTL_TMR1_ATV_Msk (0x1ul << SC_ALTCTL_TMR1_ATV_Pos)

SC_T::ALTCTL: TMR1_ATV Mask

Definition at line 8241 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_TMR1_ATV_Pos

#define SC_ALTCTL_TMR1_ATV_Pos (14)

SC_T::ALTCTL: TMR1_ATV Position

Definition at line 8240 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_TMR1_SEN_Msk

#define SC_ALTCTL_TMR1_SEN_Msk (0x1ul << SC_ALTCTL_TMR1_SEN_Pos)

SC_T::ALTCTL: TMR1_SEN Mask

Definition at line 8226 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_TMR1_SEN_Pos

#define SC_ALTCTL_TMR1_SEN_Pos (6)

SC_T::ALTCTL: TMR1_SEN Position

Definition at line 8225 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_TMR2_ATV_Msk

#define SC_ALTCTL_TMR2_ATV_Msk (0x1ul << SC_ALTCTL_TMR2_ATV_Pos)

SC_T::ALTCTL: TMR2_ATV Mask

Definition at line 8244 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_TMR2_ATV_Pos

#define SC_ALTCTL_TMR2_ATV_Pos (15)

SC_T::ALTCTL: TMR2_ATV Position

Definition at line 8243 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_TMR2_SEN_Msk

#define SC_ALTCTL_TMR2_SEN_Msk (0x1ul << SC_ALTCTL_TMR2_SEN_Pos)

SC_T::ALTCTL: TMR2_SEN Mask

Definition at line 8229 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_TMR2_SEN_Pos

#define SC_ALTCTL_TMR2_SEN_Pos (7)

SC_T::ALTCTL: TMR2_SEN Position

Definition at line 8228 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_TX_RST_Msk

#define SC_ALTCTL_TX_RST_Msk (0x1ul << SC_ALTCTL_TX_RST_Pos)

SC_T::ALTCTL: TX_RST Mask

Definition at line 8208 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_TX_RST_Pos

#define SC_ALTCTL_TX_RST_Pos (0)

SC_T::ALTCTL: TX_RST Position

Definition at line 8207 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_WARST_EN_Msk

#define SC_ALTCTL_WARST_EN_Msk (0x1ul << SC_ALTCTL_WARST_EN_Pos)

SC_T::ALTCTL: WARST_EN Mask

Definition at line 8220 of file Nano1X2Series.h.

## ◆ SC_ALTCTL_WARST_EN_Pos

#define SC_ALTCTL_WARST_EN_Pos (4)

SC_T::ALTCTL: WARST_EN Position

Definition at line 8219 of file Nano1X2Series.h.

## ◆ SC_CTL_AUTO_CON_EN_Msk

#define SC_CTL_AUTO_CON_EN_Msk (0x1ul << SC_CTL_AUTO_CON_EN_Pos)

SC_T::CTL: AUTO_CON_EN Mask

Definition at line 8175 of file Nano1X2Series.h.

## ◆ SC_CTL_AUTO_CON_EN_Pos

#define SC_CTL_AUTO_CON_EN_Pos (3)

SC_T::CTL: AUTO_CON_EN Position

Definition at line 8174 of file Nano1X2Series.h.

## ◆ SC_CTL_BGT_Msk

#define SC_CTL_BGT_Msk (0x1ful << SC_CTL_BGT_Pos)

SC_T::CTL: BGT Mask

Definition at line 8184 of file Nano1X2Series.h.

## ◆ SC_CTL_BGT_Pos

#define SC_CTL_BGT_Pos (8)

SC_T::CTL: BGT Position

Definition at line 8183 of file Nano1X2Series.h.

## ◆ SC_CTL_CD_DEB_SEL_Msk

#define SC_CTL_CD_DEB_SEL_Msk (0x3ul << SC_CTL_CD_DEB_SEL_Pos)

SC_T::CTL: CD_DEB_SEL Mask

Definition at line 8205 of file Nano1X2Series.h.

## ◆ SC_CTL_CD_DEB_SEL_Pos

#define SC_CTL_CD_DEB_SEL_Pos (24)

SC_T::CTL: CD_DEB_SEL Position

Definition at line 8204 of file Nano1X2Series.h.

## ◆ SC_CTL_CON_SEL_Msk

#define SC_CTL_CON_SEL_Msk (0x3ul << SC_CTL_CON_SEL_Pos)

SC_T::CTL: CON_SEL Mask

Definition at line 8178 of file Nano1X2Series.h.

## ◆ SC_CTL_CON_SEL_Pos

#define SC_CTL_CON_SEL_Pos (4)

SC_T::CTL: CON_SEL Position

Definition at line 8177 of file Nano1X2Series.h.

## ◆ SC_CTL_DIS_RX_Msk

#define SC_CTL_DIS_RX_Msk (0x1ul << SC_CTL_DIS_RX_Pos)

SC_T::CTL: DIS_RX Mask

Definition at line 8169 of file Nano1X2Series.h.

## ◆ SC_CTL_DIS_RX_Pos

#define SC_CTL_DIS_RX_Pos (1)

SC_T::CTL: DIS_RX Position

Definition at line 8168 of file Nano1X2Series.h.

## ◆ SC_CTL_DIS_TX_Msk

#define SC_CTL_DIS_TX_Msk (0x1ul << SC_CTL_DIS_TX_Pos)

SC_T::CTL: DIS_TX Mask

Definition at line 8172 of file Nano1X2Series.h.

## ◆ SC_CTL_DIS_TX_Pos

#define SC_CTL_DIS_TX_Pos (2)

SC_T::CTL: DIS_TX Position

Definition at line 8171 of file Nano1X2Series.h.

## ◆ SC_CTL_RX_ERETRY_EN_Msk

#define SC_CTL_RX_ERETRY_EN_Msk (0x1ul << SC_CTL_RX_ERETRY_EN_Pos)

SC_T::CTL: RX_ERETRY_EN Mask

Definition at line 8196 of file Nano1X2Series.h.

## ◆ SC_CTL_RX_ERETRY_EN_Pos

#define SC_CTL_RX_ERETRY_EN_Pos (19)

SC_T::CTL: RX_ERETRY_EN Position

Definition at line 8195 of file Nano1X2Series.h.

## ◆ SC_CTL_RX_ERETRY_Msk

#define SC_CTL_RX_ERETRY_Msk (0x7ul << SC_CTL_RX_ERETRY_Pos)

SC_T::CTL: RX_ERETRY Mask

Definition at line 8193 of file Nano1X2Series.h.

## ◆ SC_CTL_RX_ERETRY_Pos

#define SC_CTL_RX_ERETRY_Pos (16)

SC_T::CTL: RX_ERETRY Position

Definition at line 8192 of file Nano1X2Series.h.

## ◆ SC_CTL_RX_FTRI_LEV_Msk

#define SC_CTL_RX_FTRI_LEV_Msk (0x3ul << SC_CTL_RX_FTRI_LEV_Pos)

SC_T::CTL: RX_FTRI_LEV Mask

Definition at line 8181 of file Nano1X2Series.h.

## ◆ SC_CTL_RX_FTRI_LEV_Pos

#define SC_CTL_RX_FTRI_LEV_Pos (6)

SC_T::CTL: RX_FTRI_LEV Position

Definition at line 8180 of file Nano1X2Series.h.

## ◆ SC_CTL_SC_CEN_Msk

#define SC_CTL_SC_CEN_Msk (0x1ul << SC_CTL_SC_CEN_Pos)

SC_T::CTL: SC_CEN Mask

Definition at line 8166 of file Nano1X2Series.h.

## ◆ SC_CTL_SC_CEN_Pos

#define SC_CTL_SC_CEN_Pos (0)

SC_T::CTL: SC_CEN Position

Definition at line 8165 of file Nano1X2Series.h.

## ◆ SC_CTL_SLEN_Msk

#define SC_CTL_SLEN_Msk (0x1ul << SC_CTL_SLEN_Pos)

SC_T::CTL: SLEN Mask

Definition at line 8190 of file Nano1X2Series.h.

## ◆ SC_CTL_SLEN_Pos

#define SC_CTL_SLEN_Pos (15)

SC_T::CTL: SLEN Position

Definition at line 8189 of file Nano1X2Series.h.

## ◆ SC_CTL_TMR_SEL_Msk

#define SC_CTL_TMR_SEL_Msk (0x3ul << SC_CTL_TMR_SEL_Pos)

SC_T::CTL: TMR_SEL Mask

Definition at line 8187 of file Nano1X2Series.h.

## ◆ SC_CTL_TMR_SEL_Pos

#define SC_CTL_TMR_SEL_Pos (13)

SC_T::CTL: TMR_SEL Position

Definition at line 8186 of file Nano1X2Series.h.

## ◆ SC_CTL_TX_ERETRY_EN_Msk

#define SC_CTL_TX_ERETRY_EN_Msk (0x1ul << SC_CTL_TX_ERETRY_EN_Pos)

SC_T::CTL: TX_ERETRY_EN Mask

Definition at line 8202 of file Nano1X2Series.h.

## ◆ SC_CTL_TX_ERETRY_EN_Pos

#define SC_CTL_TX_ERETRY_EN_Pos (23)

SC_T::CTL: TX_ERETRY_EN Position

Definition at line 8201 of file Nano1X2Series.h.

## ◆ SC_CTL_TX_ERETRY_Msk

#define SC_CTL_TX_ERETRY_Msk (0x7ul << SC_CTL_TX_ERETRY_Pos)

SC_T::CTL: TX_ERETRY Mask

Definition at line 8199 of file Nano1X2Series.h.

## ◆ SC_CTL_TX_ERETRY_Pos

#define SC_CTL_TX_ERETRY_Pos (20)

SC_T::CTL: TX_ERETRY Position

Definition at line 8198 of file Nano1X2Series.h.

## ◆ SC_DAT_DAT_Msk

#define SC_DAT_DAT_Msk (0xfful << SC_DAT_DAT_Pos)

SC_T::DAT: DAT Mask

Definition at line 8163 of file Nano1X2Series.h.

## ◆ SC_DAT_DAT_Pos

#define SC_DAT_DAT_Pos (0)

    @addtogroup SC_CONST SC Bit Field Definition
    Constant Definitions for SC Controller

SC_T::DAT: DAT Position

Definition at line 8162 of file Nano1X2Series.h.

## ◆ SC_EGTR_EGT_Msk

#define SC_EGTR_EGT_Msk (0xfful << SC_EGTR_EGT_Pos)

SC_T::EGTR: EGT Mask

Definition at line 8247 of file Nano1X2Series.h.

## ◆ SC_EGTR_EGT_Pos

#define SC_EGTR_EGT_Pos (0)

SC_T::EGTR: EGT Position

Definition at line 8246 of file Nano1X2Series.h.

## ◆ SC_ETUCR_COMPEN_EN_Msk

#define SC_ETUCR_COMPEN_EN_Msk (0x1ul << SC_ETUCR_COMPEN_EN_Pos)

SC_T::ETUCR: COMPEN_EN Mask

Definition at line 8256 of file Nano1X2Series.h.

## ◆ SC_ETUCR_COMPEN_EN_Pos

#define SC_ETUCR_COMPEN_EN_Pos (15)

SC_T::ETUCR: COMPEN_EN Position

Definition at line 8255 of file Nano1X2Series.h.

## ◆ SC_ETUCR_ETU_RDIV_Msk

#define SC_ETUCR_ETU_RDIV_Msk (0xffful << SC_ETUCR_ETU_RDIV_Pos)

SC_T::ETUCR: ETU_RDIV Mask

Definition at line 8253 of file Nano1X2Series.h.

## ◆ SC_ETUCR_ETU_RDIV_Pos

#define SC_ETUCR_ETU_RDIV_Pos (0)

SC_T::ETUCR: ETU_RDIV Position

Definition at line 8252 of file Nano1X2Series.h.

## ◆ SC_IER_ACON_ERR_IE_Msk

#define SC_IER_ACON_ERR_IE_Msk (0x1ul << SC_IER_ACON_ERR_IE_Pos)

SC_T::IER: ACON_ERR_IE Mask

Definition at line 8289 of file Nano1X2Series.h.

## ◆ SC_IER_ACON_ERR_IE_Pos

#define SC_IER_ACON_ERR_IE_Pos (10)

SC_T::IER: ACON_ERR_IE Position

Definition at line 8288 of file Nano1X2Series.h.

## ◆ SC_IER_BGT_IE_Msk

#define SC_IER_BGT_IE_Msk (0x1ul << SC_IER_BGT_IE_Pos)

SC_T::IER: BGT_IE Mask

Definition at line 8277 of file Nano1X2Series.h.

## ◆ SC_IER_BGT_IE_Pos

#define SC_IER_BGT_IE_Pos (6)

SC_T::IER: BGT_IE Position

Definition at line 8276 of file Nano1X2Series.h.

## ◆ SC_IER_CD_IE_Msk

#define SC_IER_CD_IE_Msk (0x1ul << SC_IER_CD_IE_Pos)

SC_T::IER: CD_IE Mask

Definition at line 8280 of file Nano1X2Series.h.

## ◆ SC_IER_CD_IE_Pos

#define SC_IER_CD_IE_Pos (7)

SC_T::IER: CD_IE Position

Definition at line 8279 of file Nano1X2Series.h.

## ◆ SC_IER_INIT_IE_Msk

#define SC_IER_INIT_IE_Msk (0x1ul << SC_IER_INIT_IE_Pos)

SC_T::IER: INIT_IE Mask

Definition at line 8283 of file Nano1X2Series.h.

## ◆ SC_IER_INIT_IE_Pos

#define SC_IER_INIT_IE_Pos (8)

SC_T::IER: INIT_IE Position

Definition at line 8282 of file Nano1X2Series.h.

## ◆ SC_IER_RDA_IE_Msk

#define SC_IER_RDA_IE_Msk (0x1ul << SC_IER_RDA_IE_Pos)

SC_T::IER: RDA_IE Mask

Definition at line 8259 of file Nano1X2Series.h.

## ◆ SC_IER_RDA_IE_Pos

#define SC_IER_RDA_IE_Pos (0)

SC_T::IER: RDA_IE Position

Definition at line 8258 of file Nano1X2Series.h.

## ◆ SC_IER_RTMR_IE_Msk

#define SC_IER_RTMR_IE_Msk (0x1ul << SC_IER_RTMR_IE_Pos)

SC_T::IER: RTMR_IE Mask

Definition at line 8286 of file Nano1X2Series.h.

## ◆ SC_IER_RTMR_IE_Pos

#define SC_IER_RTMR_IE_Pos (9)

SC_T::IER: RTMR_IE Position

Definition at line 8285 of file Nano1X2Series.h.

## ◆ SC_IER_TBE_IE_Msk

#define SC_IER_TBE_IE_Msk (0x1ul << SC_IER_TBE_IE_Pos)

SC_T::IER: TBE_IE Mask

Definition at line 8262 of file Nano1X2Series.h.

## ◆ SC_IER_TBE_IE_Pos

#define SC_IER_TBE_IE_Pos (1)

SC_T::IER: TBE_IE Position

Definition at line 8261 of file Nano1X2Series.h.

## ◆ SC_IER_TERR_IE_Msk

#define SC_IER_TERR_IE_Msk (0x1ul << SC_IER_TERR_IE_Pos)

SC_T::IER: TERR_IE Mask

Definition at line 8265 of file Nano1X2Series.h.

## ◆ SC_IER_TERR_IE_Pos

#define SC_IER_TERR_IE_Pos (2)

SC_T::IER: TERR_IE Position

Definition at line 8264 of file Nano1X2Series.h.

## ◆ SC_IER_TMR0_IE_Msk

#define SC_IER_TMR0_IE_Msk (0x1ul << SC_IER_TMR0_IE_Pos)

SC_T::IER: TMR0_IE Mask

Definition at line 8268 of file Nano1X2Series.h.

## ◆ SC_IER_TMR0_IE_Pos

#define SC_IER_TMR0_IE_Pos (3)

SC_T::IER: TMR0_IE Position

Definition at line 8267 of file Nano1X2Series.h.

## ◆ SC_IER_TMR1_IE_Msk

#define SC_IER_TMR1_IE_Msk (0x1ul << SC_IER_TMR1_IE_Pos)

SC_T::IER: TMR1_IE Mask

Definition at line 8271 of file Nano1X2Series.h.

## ◆ SC_IER_TMR1_IE_Pos

#define SC_IER_TMR1_IE_Pos (4)

SC_T::IER: TMR1_IE Position

Definition at line 8270 of file Nano1X2Series.h.

## ◆ SC_IER_TMR2_IE_Msk

#define SC_IER_TMR2_IE_Msk (0x1ul << SC_IER_TMR2_IE_Pos)

SC_T::IER: TMR2_IE Mask

Definition at line 8274 of file Nano1X2Series.h.

## ◆ SC_IER_TMR2_IE_Pos

#define SC_IER_TMR2_IE_Pos (5)

SC_T::IER: TMR2_IE Position

Definition at line 8273 of file Nano1X2Series.h.

## ◆ SC_ISR_ACON_ERR_IS_Msk

#define SC_ISR_ACON_ERR_IS_Msk (0x1ul << SC_ISR_ACON_ERR_IS_Pos)

SC_T::ISR: ACON_ERR_IS Mask

Definition at line 8322 of file Nano1X2Series.h.

## ◆ SC_ISR_ACON_ERR_IS_Pos

#define SC_ISR_ACON_ERR_IS_Pos (10)

SC_T::ISR: ACON_ERR_IS Position

Definition at line 8321 of file Nano1X2Series.h.

## ◆ SC_ISR_BGT_IS_Msk

#define SC_ISR_BGT_IS_Msk (0x1ul << SC_ISR_BGT_IS_Pos)

SC_T::ISR: BGT_IS Mask

Definition at line 8310 of file Nano1X2Series.h.

## ◆ SC_ISR_BGT_IS_Pos

#define SC_ISR_BGT_IS_Pos (6)

SC_T::ISR: BGT_IS Position

Definition at line 8309 of file Nano1X2Series.h.

## ◆ SC_ISR_CD_IS_Msk

#define SC_ISR_CD_IS_Msk (0x1ul << SC_ISR_CD_IS_Pos)

SC_T::ISR: CD_IS Mask

Definition at line 8313 of file Nano1X2Series.h.

## ◆ SC_ISR_CD_IS_Pos

#define SC_ISR_CD_IS_Pos (7)

SC_T::ISR: CD_IS Position

Definition at line 8312 of file Nano1X2Series.h.

## ◆ SC_ISR_INIT_IS_Msk

#define SC_ISR_INIT_IS_Msk (0x1ul << SC_ISR_INIT_IS_Pos)

SC_T::ISR: INIT_IS Mask

Definition at line 8316 of file Nano1X2Series.h.

## ◆ SC_ISR_INIT_IS_Pos

#define SC_ISR_INIT_IS_Pos (8)

SC_T::ISR: INIT_IS Position

Definition at line 8315 of file Nano1X2Series.h.

## ◆ SC_ISR_RDA_IS_Msk

#define SC_ISR_RDA_IS_Msk (0x1ul << SC_ISR_RDA_IS_Pos)

SC_T::ISR: RDA_IS Mask

Definition at line 8292 of file Nano1X2Series.h.

## ◆ SC_ISR_RDA_IS_Pos

#define SC_ISR_RDA_IS_Pos (0)

SC_T::ISR: RDA_IS Position

Definition at line 8291 of file Nano1X2Series.h.

## ◆ SC_ISR_RTMR_IS_Msk

#define SC_ISR_RTMR_IS_Msk (0x1ul << SC_ISR_RTMR_IS_Pos)

SC_T::ISR: RTMR_IS Mask

Definition at line 8319 of file Nano1X2Series.h.

## ◆ SC_ISR_RTMR_IS_Pos

#define SC_ISR_RTMR_IS_Pos (9)

SC_T::ISR: RTMR_IS Position

Definition at line 8318 of file Nano1X2Series.h.

## ◆ SC_ISR_TBE_IS_Msk

#define SC_ISR_TBE_IS_Msk (0x1ul << SC_ISR_TBE_IS_Pos)

SC_T::ISR: TBE_IS Mask

Definition at line 8295 of file Nano1X2Series.h.

## ◆ SC_ISR_TBE_IS_Pos

#define SC_ISR_TBE_IS_Pos (1)

SC_T::ISR: TBE_IS Position

Definition at line 8294 of file Nano1X2Series.h.

## ◆ SC_ISR_TERR_IS_Msk

#define SC_ISR_TERR_IS_Msk (0x1ul << SC_ISR_TERR_IS_Pos)

SC_T::ISR: TERR_IS Mask

Definition at line 8298 of file Nano1X2Series.h.

## ◆ SC_ISR_TERR_IS_Pos

#define SC_ISR_TERR_IS_Pos (2)

SC_T::ISR: TERR_IS Position

Definition at line 8297 of file Nano1X2Series.h.

## ◆ SC_ISR_TMR0_IS_Msk

#define SC_ISR_TMR0_IS_Msk (0x1ul << SC_ISR_TMR0_IS_Pos)

SC_T::ISR: TMR0_IS Mask

Definition at line 8301 of file Nano1X2Series.h.

## ◆ SC_ISR_TMR0_IS_Pos

#define SC_ISR_TMR0_IS_Pos (3)

SC_T::ISR: TMR0_IS Position

Definition at line 8300 of file Nano1X2Series.h.

## ◆ SC_ISR_TMR1_IS_Msk

#define SC_ISR_TMR1_IS_Msk (0x1ul << SC_ISR_TMR1_IS_Pos)

SC_T::ISR: TMR1_IS Mask

Definition at line 8304 of file Nano1X2Series.h.

## ◆ SC_ISR_TMR1_IS_Pos

#define SC_ISR_TMR1_IS_Pos (4)

SC_T::ISR: TMR1_IS Position

Definition at line 8303 of file Nano1X2Series.h.

## ◆ SC_ISR_TMR2_IS_Msk

#define SC_ISR_TMR2_IS_Msk (0x1ul << SC_ISR_TMR2_IS_Pos)

SC_T::ISR: TMR2_IS Mask

Definition at line 8307 of file Nano1X2Series.h.

## ◆ SC_ISR_TMR2_IS_Pos

#define SC_ISR_TMR2_IS_Pos (5)

SC_T::ISR: TMR2_IS Position

Definition at line 8306 of file Nano1X2Series.h.

## ◆ SC_PINCSR_ADAC_CD_EN_Msk

#define SC_PINCSR_ADAC_CD_EN_Msk (0x1ul << SC_PINCSR_ADAC_CD_EN_Pos)

SC_T::PINCSR: ADAC_CD_EN Mask

Definition at line 8394 of file Nano1X2Series.h.

## ◆ SC_PINCSR_ADAC_CD_EN_Pos

#define SC_PINCSR_ADAC_CD_EN_Pos (7)

SC_T::PINCSR: ADAC_CD_EN Position

Definition at line 8393 of file Nano1X2Series.h.

## ◆ SC_PINCSR_CD_INS_F_Msk

#define SC_PINCSR_CD_INS_F_Msk (0x1ul << SC_PINCSR_CD_INS_F_Pos)

SC_T::PINCSR: CD_INS_F Mask

Definition at line 8385 of file Nano1X2Series.h.

## ◆ SC_PINCSR_CD_INS_F_Pos

#define SC_PINCSR_CD_INS_F_Pos (3)

SC_T::PINCSR: CD_INS_F Position

Definition at line 8384 of file Nano1X2Series.h.

## ◆ SC_PINCSR_CD_LEV_Msk

#define SC_PINCSR_CD_LEV_Msk (0x1ul << SC_PINCSR_CD_LEV_Pos)

SC_T::PINCSR: CD_LEV Mask

Definition at line 8403 of file Nano1X2Series.h.

## ◆ SC_PINCSR_CD_LEV_Pos

#define SC_PINCSR_CD_LEV_Pos (10)

SC_T::PINCSR: CD_LEV Position

Definition at line 8402 of file Nano1X2Series.h.

## ◆ SC_PINCSR_CD_PIN_ST_Msk

#define SC_PINCSR_CD_PIN_ST_Msk (0x1ul << SC_PINCSR_CD_PIN_ST_Pos)

SC_T::PINCSR: CD_PIN_ST Mask

Definition at line 8388 of file Nano1X2Series.h.

## ◆ SC_PINCSR_CD_PIN_ST_Pos

#define SC_PINCSR_CD_PIN_ST_Pos (4)

SC_T::PINCSR: CD_PIN_ST Position

Definition at line 8387 of file Nano1X2Series.h.

## ◆ SC_PINCSR_CD_REM_F_Msk

#define SC_PINCSR_CD_REM_F_Msk (0x1ul << SC_PINCSR_CD_REM_F_Pos)

SC_T::PINCSR: CD_REM_F Mask

Definition at line 8382 of file Nano1X2Series.h.

## ◆ SC_PINCSR_CD_REM_F_Pos

#define SC_PINCSR_CD_REM_F_Pos (2)

SC_T::PINCSR: CD_REM_F Position

Definition at line 8381 of file Nano1X2Series.h.

## ◆ SC_PINCSR_CLK_KEEP_Msk

#define SC_PINCSR_CLK_KEEP_Msk (0x1ul << SC_PINCSR_CLK_KEEP_Pos)

SC_T::PINCSR: CLK_KEEP Mask

Definition at line 8391 of file Nano1X2Series.h.

## ◆ SC_PINCSR_CLK_KEEP_Pos

#define SC_PINCSR_CLK_KEEP_Pos (6)

SC_T::PINCSR: CLK_KEEP Position

Definition at line 8390 of file Nano1X2Series.h.

## ◆ SC_PINCSR_POW_EN_Msk

#define SC_PINCSR_POW_EN_Msk (0x1ul << SC_PINCSR_POW_EN_Pos)

SC_T::PINCSR: POW_EN Mask

Definition at line 8376 of file Nano1X2Series.h.

## ◆ SC_PINCSR_POW_EN_Pos

#define SC_PINCSR_POW_EN_Pos (0)

SC_T::PINCSR: POW_EN Position

Definition at line 8375 of file Nano1X2Series.h.

## ◆ SC_PINCSR_POW_INV_Msk

#define SC_PINCSR_POW_INV_Msk (0x1ul << SC_PINCSR_POW_INV_Pos)

SC_T::PINCSR: POW_INV Mask

Definition at line 8406 of file Nano1X2Series.h.

## ◆ SC_PINCSR_POW_INV_Pos

#define SC_PINCSR_POW_INV_Pos (11)

SC_T::PINCSR: POW_INV Position

Definition at line 8405 of file Nano1X2Series.h.

## ◆ SC_PINCSR_SC_DATA_I_ST_Msk

#define SC_PINCSR_SC_DATA_I_ST_Msk (0x1ul << SC_PINCSR_SC_DATA_I_ST_Pos)

SC_T::PINCSR: SC_DATA_I_ST Mask

Definition at line 8409 of file Nano1X2Series.h.

## ◆ SC_PINCSR_SC_DATA_I_ST_Pos

#define SC_PINCSR_SC_DATA_I_ST_Pos (16)

SC_T::PINCSR: SC_DATA_I_ST Position

Definition at line 8408 of file Nano1X2Series.h.

## ◆ SC_PINCSR_SC_DATA_O_Msk

#define SC_PINCSR_SC_DATA_O_Msk (0x1ul << SC_PINCSR_SC_DATA_O_Pos)

SC_T::PINCSR: SC_DATA_O Mask

Definition at line 8400 of file Nano1X2Series.h.

## ◆ SC_PINCSR_SC_DATA_O_Pos

#define SC_PINCSR_SC_DATA_O_Pos (9)

SC_T::PINCSR: SC_DATA_O Position

Definition at line 8399 of file Nano1X2Series.h.

## ◆ SC_PINCSR_SC_OEN_ST_Msk

#define SC_PINCSR_SC_OEN_ST_Msk (0x1ul << SC_PINCSR_SC_OEN_ST_Pos)

SC_T::PINCSR: SC_OEN_ST Mask

Definition at line 8397 of file Nano1X2Series.h.

## ◆ SC_PINCSR_SC_OEN_ST_Pos

#define SC_PINCSR_SC_OEN_ST_Pos (8)

SC_T::PINCSR: SC_OEN_ST Position

Definition at line 8396 of file Nano1X2Series.h.

## ◆ SC_PINCSR_SC_RST_Msk

#define SC_PINCSR_SC_RST_Msk (0x1ul << SC_PINCSR_SC_RST_Pos)

SC_T::PINCSR: SC_RST Mask

Definition at line 8379 of file Nano1X2Series.h.

## ◆ SC_PINCSR_SC_RST_Pos

#define SC_PINCSR_SC_RST_Pos (1)

SC_T::PINCSR: SC_RST Position

Definition at line 8378 of file Nano1X2Series.h.

## ◆ SC_RFTMR_RFTM_Msk

#define SC_RFTMR_RFTM_Msk (0x1fful << SC_RFTMR_RFTM_Pos)

SC_T::RFTMR: RFTM Mask

Definition at line 8250 of file Nano1X2Series.h.

## ◆ SC_RFTMR_RFTM_Pos

#define SC_RFTMR_RFTM_Pos (0)

SC_T::RFTMR: RFTM Position

Definition at line 8249 of file Nano1X2Series.h.

## ◆ SC_TDRA_TDR0_Msk

#define SC_TDRA_TDR0_Msk (0xfffffful << SC_TDRA_TDR0_Pos)

SC_T::TDRA: TDR0 Mask

Definition at line 8442 of file Nano1X2Series.h.

## ◆ SC_TDRA_TDR0_Pos

#define SC_TDRA_TDR0_Pos (0)

SC_T::TDRA: TDR0 Position

Definition at line 8441 of file Nano1X2Series.h.

## ◆ SC_TDRB_TDR1_Msk

#define SC_TDRB_TDR1_Msk (0xfful << SC_TDRB_TDR1_Pos)

SC_T::TDRB: TDR1 Mask

Definition at line 8445 of file Nano1X2Series.h.

## ◆ SC_TDRB_TDR1_Pos

#define SC_TDRB_TDR1_Pos (0)

SC_T::TDRB: TDR1 Position

Definition at line 8444 of file Nano1X2Series.h.

## ◆ SC_TDRB_TDR2_Msk

#define SC_TDRB_TDR2_Msk (0xfful << SC_TDRB_TDR2_Pos)

SC_T::TDRB: TDR2 Mask

Definition at line 8448 of file Nano1X2Series.h.

## ◆ SC_TDRB_TDR2_Pos

#define SC_TDRB_TDR2_Pos (8)

SC_T::TDRB: TDR2 Position

Definition at line 8447 of file Nano1X2Series.h.

## ◆ SC_TMR0_CNT_Msk

#define SC_TMR0_CNT_Msk (0xfffffful << SC_TMR0_CNT_Pos)

SC_T::TMR0: CNT Mask

Definition at line 8412 of file Nano1X2Series.h.

## ◆ SC_TMR0_CNT_Pos

#define SC_TMR0_CNT_Pos (0)

SC_T::TMR0: CNT Position

Definition at line 8411 of file Nano1X2Series.h.

## ◆ SC_TMR0_MODE_Msk

#define SC_TMR0_MODE_Msk (0xful << SC_TMR0_MODE_Pos)

SC_T::TMR0: MODE Mask

Definition at line 8415 of file Nano1X2Series.h.

## ◆ SC_TMR0_MODE_Pos

#define SC_TMR0_MODE_Pos (24)

SC_T::TMR0: MODE Position

Definition at line 8414 of file Nano1X2Series.h.

## ◆ SC_TMR1_CNT_Msk

#define SC_TMR1_CNT_Msk (0xfful << SC_TMR1_CNT_Pos)

SC_T::TMR1: CNT Mask

Definition at line 8418 of file Nano1X2Series.h.

## ◆ SC_TMR1_CNT_Pos

#define SC_TMR1_CNT_Pos (0)

SC_T::TMR1: CNT Position

Definition at line 8417 of file Nano1X2Series.h.

## ◆ SC_TMR1_MODE_Msk

#define SC_TMR1_MODE_Msk (0xful << SC_TMR1_MODE_Pos)

SC_T::TMR1: MODE Mask

Definition at line 8421 of file Nano1X2Series.h.

## ◆ SC_TMR1_MODE_Pos

#define SC_TMR1_MODE_Pos (24)

SC_T::TMR1: MODE Position

Definition at line 8420 of file Nano1X2Series.h.

## ◆ SC_TMR2_CNT_Msk

#define SC_TMR2_CNT_Msk (0xfful << SC_TMR2_CNT_Pos)

SC_T::TMR2: CNT Mask

Definition at line 8424 of file Nano1X2Series.h.

## ◆ SC_TMR2_CNT_Pos

#define SC_TMR2_CNT_Pos (0)

SC_T::TMR2: CNT Position

Definition at line 8423 of file Nano1X2Series.h.

## ◆ SC_TMR2_MODE_Msk

#define SC_TMR2_MODE_Msk (0xful << SC_TMR2_MODE_Pos)

SC_T::TMR2: MODE Mask

Definition at line 8427 of file Nano1X2Series.h.

## ◆ SC_TMR2_MODE_Pos

#define SC_TMR2_MODE_Pos (24)

SC_T::TMR2: MODE Position

Definition at line 8426 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_ATV_Msk

#define SC_TRSR_RX_ATV_Msk (0x1ul << SC_TRSR_RX_ATV_Pos)

SC_T::TRSR: RX_ATV Mask

Definition at line 8361 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_ATV_Pos

#define SC_TRSR_RX_ATV_Pos (23)

SC_T::TRSR: RX_ATV Position

Definition at line 8360 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_EBR_F_Msk

#define SC_TRSR_RX_EBR_F_Msk (0x1ul << SC_TRSR_RX_EBR_F_Pos)

SC_T::TRSR: RX_EBR_F Mask

Definition at line 8340 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_EBR_F_Pos

#define SC_TRSR_RX_EBR_F_Pos (6)

SC_T::TRSR: RX_EBR_F Position

Definition at line 8339 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_EFR_F_Msk

#define SC_TRSR_RX_EFR_F_Msk (0x1ul << SC_TRSR_RX_EFR_F_Pos)

SC_T::TRSR: RX_EFR_F Mask

Definition at line 8337 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_EFR_F_Pos

#define SC_TRSR_RX_EFR_F_Pos (5)

SC_T::TRSR: RX_EFR_F Position

Definition at line 8336 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_EMPTY_F_Msk

#define SC_TRSR_RX_EMPTY_F_Msk (0x1ul << SC_TRSR_RX_EMPTY_F_Pos)

SC_T::TRSR: RX_EMPTY_F Mask

Definition at line 8328 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_EMPTY_F_Pos

#define SC_TRSR_RX_EMPTY_F_Pos (1)

SC_T::TRSR: RX_EMPTY_F Position

Definition at line 8327 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_EPA_F_Msk

#define SC_TRSR_RX_EPA_F_Msk (0x1ul << SC_TRSR_RX_EPA_F_Pos)

SC_T::TRSR: RX_EPA_F Mask

Definition at line 8334 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_EPA_F_Pos

#define SC_TRSR_RX_EPA_F_Pos (4)

SC_T::TRSR: RX_EPA_F Position

Definition at line 8333 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_FULL_F_Msk

#define SC_TRSR_RX_FULL_F_Msk (0x1ul << SC_TRSR_RX_FULL_F_Pos)

SC_T::TRSR: RX_FULL_F Mask

Definition at line 8331 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_FULL_F_Pos

#define SC_TRSR_RX_FULL_F_Pos (2)

SC_T::TRSR: RX_FULL_F Position

Definition at line 8330 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_OVER_ERETRY_Msk

#define SC_TRSR_RX_OVER_ERETRY_Msk (0x1ul << SC_TRSR_RX_OVER_ERETRY_Pos)

SC_T::TRSR: RX_OVER_ERETRY Mask

Definition at line 8358 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_OVER_ERETRY_Pos

#define SC_TRSR_RX_OVER_ERETRY_Pos (22)

SC_T::TRSR: RX_OVER_ERETRY Position

Definition at line 8357 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_OVER_F_Msk

#define SC_TRSR_RX_OVER_F_Msk (0x1ul << SC_TRSR_RX_OVER_F_Pos)

SC_T::TRSR: RX_OVER_F Mask

Definition at line 8325 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_OVER_F_Pos

#define SC_TRSR_RX_OVER_F_Pos (0)

SC_T::TRSR: RX_OVER_F Position

Definition at line 8324 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_POINT_F_Msk

#define SC_TRSR_RX_POINT_F_Msk (0x7ul << SC_TRSR_RX_POINT_F_Pos)

SC_T::TRSR: RX_POINT_F Mask

Definition at line 8352 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_POINT_F_Pos

#define SC_TRSR_RX_POINT_F_Pos (16)

SC_T::TRSR: RX_POINT_F Position

Definition at line 8351 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_REERR_Msk

#define SC_TRSR_RX_REERR_Msk (0x1ul << SC_TRSR_RX_REERR_Pos)

SC_T::TRSR: RX_REERR Mask

Definition at line 8355 of file Nano1X2Series.h.

## ◆ SC_TRSR_RX_REERR_Pos

#define SC_TRSR_RX_REERR_Pos (21)

SC_T::TRSR: RX_REERR Position

Definition at line 8354 of file Nano1X2Series.h.

## ◆ SC_TRSR_TX_ATV_Msk

#define SC_TRSR_TX_ATV_Msk (0x1ul << SC_TRSR_TX_ATV_Pos)

SC_T::TRSR: TX_ATV Mask

Definition at line 8373 of file Nano1X2Series.h.

## ◆ SC_TRSR_TX_ATV_Pos

#define SC_TRSR_TX_ATV_Pos (31)

SC_T::TRSR: TX_ATV Position

Definition at line 8372 of file Nano1X2Series.h.

## ◆ SC_TRSR_TX_EMPTY_F_Msk

#define SC_TRSR_TX_EMPTY_F_Msk (0x1ul << SC_TRSR_TX_EMPTY_F_Pos)

SC_T::TRSR: TX_EMPTY_F Mask

Definition at line 8346 of file Nano1X2Series.h.

## ◆ SC_TRSR_TX_EMPTY_F_Pos

#define SC_TRSR_TX_EMPTY_F_Pos (9)

SC_T::TRSR: TX_EMPTY_F Position

Definition at line 8345 of file Nano1X2Series.h.

## ◆ SC_TRSR_TX_FULL_F_Msk

#define SC_TRSR_TX_FULL_F_Msk (0x1ul << SC_TRSR_TX_FULL_F_Pos)

SC_T::TRSR: TX_FULL_F Mask

Definition at line 8349 of file Nano1X2Series.h.

## ◆ SC_TRSR_TX_FULL_F_Pos

#define SC_TRSR_TX_FULL_F_Pos (10)

SC_T::TRSR: TX_FULL_F Position

Definition at line 8348 of file Nano1X2Series.h.

## ◆ SC_TRSR_TX_OVER_ERETRY_Msk

#define SC_TRSR_TX_OVER_ERETRY_Msk (0x1ul << SC_TRSR_TX_OVER_ERETRY_Pos)

SC_T::TRSR: TX_OVER_ERETRY Mask

Definition at line 8370 of file Nano1X2Series.h.

## ◆ SC_TRSR_TX_OVER_ERETRY_Pos

#define SC_TRSR_TX_OVER_ERETRY_Pos (30)

SC_T::TRSR: TX_OVER_ERETRY Position

Definition at line 8369 of file Nano1X2Series.h.

## ◆ SC_TRSR_TX_OVER_F_Msk

#define SC_TRSR_TX_OVER_F_Msk (0x1ul << SC_TRSR_TX_OVER_F_Pos)

SC_T::TRSR: TX_OVER_F Mask

Definition at line 8343 of file Nano1X2Series.h.

## ◆ SC_TRSR_TX_OVER_F_Pos

#define SC_TRSR_TX_OVER_F_Pos (8)

SC_T::TRSR: TX_OVER_F Position

Definition at line 8342 of file Nano1X2Series.h.

## ◆ SC_TRSR_TX_POINT_F_Msk

#define SC_TRSR_TX_POINT_F_Msk (0x7ul << SC_TRSR_TX_POINT_F_Pos)

SC_T::TRSR: TX_POINT_F Mask

Definition at line 8364 of file Nano1X2Series.h.

## ◆ SC_TRSR_TX_POINT_F_Pos

#define SC_TRSR_TX_POINT_F_Pos (24)

SC_T::TRSR: TX_POINT_F Position

Definition at line 8363 of file Nano1X2Series.h.

## ◆ SC_TRSR_TX_REERR_Msk

#define SC_TRSR_TX_REERR_Msk (0x1ul << SC_TRSR_TX_REERR_Pos)

SC_T::TRSR: TX_REERR Mask

Definition at line 8367 of file Nano1X2Series.h.

## ◆ SC_TRSR_TX_REERR_Pos

#define SC_TRSR_TX_REERR_Pos (29)

SC_T::TRSR: TX_REERR Position

Definition at line 8366 of file Nano1X2Series.h.

## ◆ SC_UACTL_DATA_LEN_Msk

#define SC_UACTL_DATA_LEN_Msk (0x3ul << SC_UACTL_DATA_LEN_Pos)

SC_T::UACTL: DATA_LEN Mask

Definition at line 8433 of file Nano1X2Series.h.

## ◆ SC_UACTL_DATA_LEN_Pos

#define SC_UACTL_DATA_LEN_Pos (4)

SC_T::UACTL: DATA_LEN Position

Definition at line 8432 of file Nano1X2Series.h.

## ◆ SC_UACTL_OPE_Msk

#define SC_UACTL_OPE_Msk (0x1ul << SC_UACTL_OPE_Pos)

SC_T::UACTL: OPE Mask

Definition at line 8439 of file Nano1X2Series.h.

## ◆ SC_UACTL_OPE_Pos

#define SC_UACTL_OPE_Pos (7)

SC_T::UACTL: OPE Position

Definition at line 8438 of file Nano1X2Series.h.

## ◆ SC_UACTL_PBDIS_Msk

#define SC_UACTL_PBDIS_Msk (0x1ul << SC_UACTL_PBDIS_Pos)

SC_T::UACTL: PBDIS Mask

Definition at line 8436 of file Nano1X2Series.h.

## ◆ SC_UACTL_PBDIS_Pos

#define SC_UACTL_PBDIS_Pos (6)

SC_T::UACTL: PBDIS Position

Definition at line 8435 of file Nano1X2Series.h.

## ◆ SC_UACTL_UA_MODE_EN_Msk

#define SC_UACTL_UA_MODE_EN_Msk (0x1ul << SC_UACTL_UA_MODE_EN_Pos)

SC_T::UACTL: UA_MODE_EN Mask

Definition at line 8430 of file Nano1X2Series.h.

## ◆ SC_UACTL_UA_MODE_EN_Pos

#define SC_UACTL_UA_MODE_EN_Pos (0)

SC_T::UACTL: UA_MODE_EN Position

Definition at line 8429 of file Nano1X2Series.h.

## ◆ SPI_CLKDIV_DIVIDER1_Msk

#define SPI_CLKDIV_DIVIDER1_Msk (0xfful << SPI_CLKDIV_DIVIDER1_Pos)

SPI_T::CLKDIV: DIVIDER1 Mask

Definition at line 8940 of file Nano1X2Series.h.

## ◆ SPI_CLKDIV_DIVIDER1_Pos

#define SPI_CLKDIV_DIVIDER1_Pos (0)

SPI_T::CLKDIV: DIVIDER1 Position

Definition at line 8939 of file Nano1X2Series.h.

## ◆ SPI_CLKDIV_DIVIDER2_Msk

#define SPI_CLKDIV_DIVIDER2_Msk (0xfful << SPI_CLKDIV_DIVIDER2_Pos)

SPI_T::CLKDIV: DIVIDER2 Mask

Definition at line 8943 of file Nano1X2Series.h.

## ◆ SPI_CLKDIV_DIVIDER2_Pos

#define SPI_CLKDIV_DIVIDER2_Pos (16)

SPI_T::CLKDIV: DIVIDER2 Position

Definition at line 8942 of file Nano1X2Series.h.

## ◆ SPI_CTL_CLKP_Msk

#define SPI_CTL_CLKP_Msk (0x1ul << SPI_CTL_CLKP_Pos)

SPI_T::CTL: CLKP Mask

Definition at line 8868 of file Nano1X2Series.h.

## ◆ SPI_CTL_CLKP_Pos

#define SPI_CTL_CLKP_Pos (11)

SPI_T::CTL: CLKP Position

Definition at line 8867 of file Nano1X2Series.h.

## ◆ SPI_CTL_DUAL_IO_DIR_Msk

#define SPI_CTL_DUAL_IO_DIR_Msk (0x1ul << SPI_CTL_DUAL_IO_DIR_Pos)

SPI_T::CTL: DUAL_IO_DIR Mask

Definition at line 8892 of file Nano1X2Series.h.

## ◆ SPI_CTL_DUAL_IO_DIR_Pos

#define SPI_CTL_DUAL_IO_DIR_Pos (28)

SPI_T::CTL: DUAL_IO_DIR Position

Definition at line 8891 of file Nano1X2Series.h.

## ◆ SPI_CTL_DUAL_IO_EN_Msk

#define SPI_CTL_DUAL_IO_EN_Msk (0x1ul << SPI_CTL_DUAL_IO_EN_Pos)

SPI_T::CTL: DUAL_IO_EN Mask

Definition at line 8895 of file Nano1X2Series.h.

## ◆ SPI_CTL_DUAL_IO_EN_Pos

#define SPI_CTL_DUAL_IO_EN_Pos (29)

SPI_T::CTL: DUAL_IO_EN Position

Definition at line 8894 of file Nano1X2Series.h.

## ◆ SPI_CTL_FIFOM_Msk

#define SPI_CTL_FIFOM_Msk (0x1ul << SPI_CTL_FIFOM_Pos)

SPI_T::CTL: FIFOM Mask

Definition at line 8883 of file Nano1X2Series.h.

## ◆ SPI_CTL_FIFOM_Pos

#define SPI_CTL_FIFOM_Pos (21)

SPI_T::CTL: FIFOM Position

Definition at line 8882 of file Nano1X2Series.h.

## ◆ SPI_CTL_GO_BUSY_Msk

#define SPI_CTL_GO_BUSY_Msk (0x1ul << SPI_CTL_GO_BUSY_Pos)

SPI_T::CTL: GO_BUSY Mask

Definition at line 8853 of file Nano1X2Series.h.

## ◆ SPI_CTL_GO_BUSY_Pos

#define SPI_CTL_GO_BUSY_Pos (0)

    @addtogroup SPI_CONST SPI Bit Field Definition
    Constant Definitions for SPI Controller

SPI_T::CTL: GO_BUSY Position

Definition at line 8852 of file Nano1X2Series.h.

## ◆ SPI_CTL_INTEN_Msk

#define SPI_CTL_INTEN_Msk (0x1ul << SPI_CTL_INTEN_Pos)

SPI_T::CTL: INTEN Mask

Definition at line 8874 of file Nano1X2Series.h.

## ◆ SPI_CTL_INTEN_Pos

#define SPI_CTL_INTEN_Pos (17)

SPI_T::CTL: INTEN Position

Definition at line 8873 of file Nano1X2Series.h.

## ◆ SPI_CTL_LSB_Msk

#define SPI_CTL_LSB_Msk (0x1ul << SPI_CTL_LSB_Pos)

SPI_T::CTL: LSB Mask

Definition at line 8865 of file Nano1X2Series.h.

## ◆ SPI_CTL_LSB_Pos

#define SPI_CTL_LSB_Pos (10)

SPI_T::CTL: LSB Position

Definition at line 8864 of file Nano1X2Series.h.

## ◆ SPI_CTL_REORDER_Msk

#define SPI_CTL_REORDER_Msk (0x1ul << SPI_CTL_REORDER_Pos)

SPI_T::CTL: REORDER Mask

Definition at line 8880 of file Nano1X2Series.h.

## ◆ SPI_CTL_REORDER_Pos

#define SPI_CTL_REORDER_Pos (19)

SPI_T::CTL: REORDER Position

Definition at line 8879 of file Nano1X2Series.h.

## ◆ SPI_CTL_RX_NEG_Msk

#define SPI_CTL_RX_NEG_Msk (0x1ul << SPI_CTL_RX_NEG_Pos)

SPI_T::CTL: RX_NEG Mask

Definition at line 8856 of file Nano1X2Series.h.

## ◆ SPI_CTL_RX_NEG_Pos

#define SPI_CTL_RX_NEG_Pos (1)

SPI_T::CTL: RX_NEG Position

Definition at line 8855 of file Nano1X2Series.h.

## ◆ SPI_CTL_SLAVE_Msk

#define SPI_CTL_SLAVE_Msk (0x1ul << SPI_CTL_SLAVE_Pos)

SPI_T::CTL: SLAVE Mask

Definition at line 8877 of file Nano1X2Series.h.

## ◆ SPI_CTL_SLAVE_Pos

#define SPI_CTL_SLAVE_Pos (18)

SPI_T::CTL: SLAVE Position

Definition at line 8876 of file Nano1X2Series.h.

## ◆ SPI_CTL_SP_CYCLE_Msk

#define SPI_CTL_SP_CYCLE_Msk (0xful << SPI_CTL_SP_CYCLE_Pos)

SPI_T::CTL: SP_CYCLE Mask

Definition at line 8871 of file Nano1X2Series.h.

## ◆ SPI_CTL_SP_CYCLE_Pos

#define SPI_CTL_SP_CYCLE_Pos (12)

SPI_T::CTL: SP_CYCLE Position

Definition at line 8870 of file Nano1X2Series.h.

## ◆ SPI_CTL_TWOB_Msk

#define SPI_CTL_TWOB_Msk (0x1ul << SPI_CTL_TWOB_Pos)

SPI_T::CTL: TWOB Mask

Definition at line 8886 of file Nano1X2Series.h.

## ◆ SPI_CTL_TWOB_Pos

#define SPI_CTL_TWOB_Pos (22)

SPI_T::CTL: TWOB Position

Definition at line 8885 of file Nano1X2Series.h.

## ◆ SPI_CTL_TX_BIT_LEN_Msk

#define SPI_CTL_TX_BIT_LEN_Msk (0x1ful << SPI_CTL_TX_BIT_LEN_Pos)

SPI_T::CTL: TX_BIT_LEN Mask

Definition at line 8862 of file Nano1X2Series.h.

## ◆ SPI_CTL_TX_BIT_LEN_Pos

#define SPI_CTL_TX_BIT_LEN_Pos (3)

SPI_T::CTL: TX_BIT_LEN Position

Definition at line 8861 of file Nano1X2Series.h.

## ◆ SPI_CTL_TX_NEG_Msk

#define SPI_CTL_TX_NEG_Msk (0x1ul << SPI_CTL_TX_NEG_Pos)

SPI_T::CTL: TX_NEG Mask

Definition at line 8859 of file Nano1X2Series.h.

## ◆ SPI_CTL_TX_NEG_Pos

#define SPI_CTL_TX_NEG_Pos (2)

SPI_T::CTL: TX_NEG Position

Definition at line 8858 of file Nano1X2Series.h.

## ◆ SPI_CTL_VARCLK_EN_Msk

#define SPI_CTL_VARCLK_EN_Msk (0x1ul << SPI_CTL_VARCLK_EN_Pos)

SPI_T::CTL: VARCLK_EN Mask

Definition at line 8889 of file Nano1X2Series.h.

## ◆ SPI_CTL_VARCLK_EN_Pos

#define SPI_CTL_VARCLK_EN_Pos (23)

SPI_T::CTL: VARCLK_EN Position

Definition at line 8888 of file Nano1X2Series.h.

## ◆ SPI_CTL_WKEUP_EN_Msk

#define SPI_CTL_WKEUP_EN_Msk (0x1ul << SPI_CTL_WKEUP_EN_Pos)

SPI_T::CTL: WKEUP_EN Mask

Definition at line 8898 of file Nano1X2Series.h.

## ◆ SPI_CTL_WKEUP_EN_Pos

#define SPI_CTL_WKEUP_EN_Pos (31)

SPI_T::CTL: WKEUP_EN Position

Definition at line 8897 of file Nano1X2Series.h.

## ◆ SPI_DMA_PDMA_RST_Msk

#define SPI_DMA_PDMA_RST_Msk (0x1ul << SPI_DMA_PDMA_RST_Pos)

SPI_T::DMA: PDMA_RST Mask

Definition at line 8991 of file Nano1X2Series.h.

## ◆ SPI_DMA_PDMA_RST_Pos

#define SPI_DMA_PDMA_RST_Pos (2)

SPI_T::DMA: PDMA_RST Position

Definition at line 8990 of file Nano1X2Series.h.

## ◆ SPI_DMA_RX_DMA_EN_Msk

#define SPI_DMA_RX_DMA_EN_Msk (0x1ul << SPI_DMA_RX_DMA_EN_Pos)

SPI_T::DMA: RX_DMA_EN Mask

Definition at line 8988 of file Nano1X2Series.h.

## ◆ SPI_DMA_RX_DMA_EN_Pos

#define SPI_DMA_RX_DMA_EN_Pos (1)

SPI_T::DMA: RX_DMA_EN Position

Definition at line 8987 of file Nano1X2Series.h.

## ◆ SPI_DMA_TX_DMA_EN_Msk

#define SPI_DMA_TX_DMA_EN_Msk (0x1ul << SPI_DMA_TX_DMA_EN_Pos)

SPI_T::DMA: TX_DMA_EN Mask

Definition at line 8985 of file Nano1X2Series.h.

## ◆ SPI_DMA_TX_DMA_EN_Pos

#define SPI_DMA_TX_DMA_EN_Pos (0)

SPI_T::DMA: TX_DMA_EN Position

Definition at line 8984 of file Nano1X2Series.h.

## ◆ SPI_FFCTL_RX_CLR_Msk

#define SPI_FFCTL_RX_CLR_Msk (0x1ul << SPI_FFCTL_RX_CLR_Pos)

SPI_T::FFCTL: RX_CLR Mask

Definition at line 8994 of file Nano1X2Series.h.

## ◆ SPI_FFCTL_RX_CLR_Pos

#define SPI_FFCTL_RX_CLR_Pos (0)

SPI_T::FFCTL: RX_CLR Position

Definition at line 8993 of file Nano1X2Series.h.

## ◆ SPI_FFCTL_RX_INTEN_Msk

#define SPI_FFCTL_RX_INTEN_Msk (0x1ul << SPI_FFCTL_RX_INTEN_Pos)

SPI_T::FFCTL: RX_INTEN Mask

Definition at line 9000 of file Nano1X2Series.h.

## ◆ SPI_FFCTL_RX_INTEN_Pos

#define SPI_FFCTL_RX_INTEN_Pos (2)

SPI_T::FFCTL: RX_INTEN Position

Definition at line 8999 of file Nano1X2Series.h.

## ◆ SPI_FFCTL_RX_THRESHOLD_Msk

#define SPI_FFCTL_RX_THRESHOLD_Msk (0x7ul << SPI_FFCTL_RX_THRESHOLD_Pos)

SPI_T::FFCTL: RX_THRESHOLD Mask

Definition at line 9012 of file Nano1X2Series.h.

## ◆ SPI_FFCTL_RX_THRESHOLD_Pos

#define SPI_FFCTL_RX_THRESHOLD_Pos (24)

SPI_T::FFCTL: RX_THRESHOLD Position

Definition at line 9011 of file Nano1X2Series.h.

## ◆ SPI_FFCTL_RXOVR_INTEN_Msk

#define SPI_FFCTL_RXOVR_INTEN_Msk (0x1ul << SPI_FFCTL_RXOVR_INTEN_Pos)

SPI_T::FFCTL: RXOVR_INTEN Mask

Definition at line 9006 of file Nano1X2Series.h.

## ◆ SPI_FFCTL_RXOVR_INTEN_Pos

#define SPI_FFCTL_RXOVR_INTEN_Pos (4)

SPI_T::FFCTL: RXOVR_INTEN Position

Definition at line 9005 of file Nano1X2Series.h.

## ◆ SPI_FFCTL_TIMEOUT_EN_Msk

#define SPI_FFCTL_TIMEOUT_EN_Msk (0x1ul << SPI_FFCTL_TIMEOUT_EN_Pos)

SPI_T::FFCTL: TIMEOUT_EN Mask

Definition at line 9009 of file Nano1X2Series.h.

## ◆ SPI_FFCTL_TIMEOUT_EN_Pos

#define SPI_FFCTL_TIMEOUT_EN_Pos (7)

SPI_T::FFCTL: TIMEOUT_EN Position

Definition at line 9008 of file Nano1X2Series.h.

## ◆ SPI_FFCTL_TX_CLR_Msk

#define SPI_FFCTL_TX_CLR_Msk (0x1ul << SPI_FFCTL_TX_CLR_Pos)

SPI_T::FFCTL: TX_CLR Mask

Definition at line 8997 of file Nano1X2Series.h.

## ◆ SPI_FFCTL_TX_CLR_Pos

#define SPI_FFCTL_TX_CLR_Pos (1)

SPI_T::FFCTL: TX_CLR Position

Definition at line 8996 of file Nano1X2Series.h.

## ◆ SPI_FFCTL_TX_INTEN_Msk

#define SPI_FFCTL_TX_INTEN_Msk (0x1ul << SPI_FFCTL_TX_INTEN_Pos)

SPI_T::FFCTL: TX_INTEN Mask

Definition at line 9003 of file Nano1X2Series.h.

## ◆ SPI_FFCTL_TX_INTEN_Pos

#define SPI_FFCTL_TX_INTEN_Pos (3)

SPI_T::FFCTL: TX_INTEN Position

Definition at line 9002 of file Nano1X2Series.h.

## ◆ SPI_FFCTL_TX_THRESHOLD_Msk

#define SPI_FFCTL_TX_THRESHOLD_Msk (0x7ul << SPI_FFCTL_TX_THRESHOLD_Pos)

SPI_T::FFCTL: TX_THRESHOLD Mask

Definition at line 9015 of file Nano1X2Series.h.

## ◆ SPI_FFCTL_TX_THRESHOLD_Pos

#define SPI_FFCTL_TX_THRESHOLD_Pos (28)

SPI_T::FFCTL: TX_THRESHOLD Position

Definition at line 9014 of file Nano1X2Series.h.

## ◆ SPI_RX0_RDATA_Msk

#define SPI_RX0_RDATA_Msk (0xfffffffful << SPI_RX0_RDATA_Pos)

SPI_T::RX0: RDATA Mask

Definition at line 8970 of file Nano1X2Series.h.

## ◆ SPI_RX0_RDATA_Pos

#define SPI_RX0_RDATA_Pos (0)

SPI_T::RX0: RDATA Position

Definition at line 8969 of file Nano1X2Series.h.

## ◆ SPI_RX1_RDATA_Msk

#define SPI_RX1_RDATA_Msk (0xfffffffful << SPI_RX1_RDATA_Pos)

SPI_T::RX1: RDATA Mask

Definition at line 8973 of file Nano1X2Series.h.

## ◆ SPI_RX1_RDATA_Pos

#define SPI_RX1_RDATA_Pos (0)

SPI_T::RX1: RDATA Position

Definition at line 8972 of file Nano1X2Series.h.

## ◆ SPI_SSR_AUTOSS_Msk

#define SPI_SSR_AUTOSS_Msk (0x1ul << SPI_SSR_AUTOSS_Pos)

SPI_T::SSR: AUTOSS Mask

Definition at line 8952 of file Nano1X2Series.h.

## ◆ SPI_SSR_AUTOSS_Pos

#define SPI_SSR_AUTOSS_Pos (3)

SPI_T::SSR: AUTOSS Position

Definition at line 8951 of file Nano1X2Series.h.

## ◆ SPI_SSR_NOSLVSEL_Msk

#define SPI_SSR_NOSLVSEL_Msk (0x1ul << SPI_SSR_NOSLVSEL_Pos)

SPI_T::SSR: NOSLVSEL Mask

Definition at line 8958 of file Nano1X2Series.h.

## ◆ SPI_SSR_NOSLVSEL_Pos

#define SPI_SSR_NOSLVSEL_Pos (5)

SPI_T::SSR: NOSLVSEL Position

Definition at line 8957 of file Nano1X2Series.h.

## ◆ SPI_SSR_SLV_ABORT_Msk

#define SPI_SSR_SLV_ABORT_Msk (0x1ul << SPI_SSR_SLV_ABORT_Pos)

SPI_T::SSR: SLV_ABORT Mask

Definition at line 8961 of file Nano1X2Series.h.

## ◆ SPI_SSR_SLV_ABORT_Pos

#define SPI_SSR_SLV_ABORT_Pos (8)

SPI_T::SSR: SLV_ABORT Position

Definition at line 8960 of file Nano1X2Series.h.

## ◆ SPI_SSR_SS_INT_OPT_Msk

#define SPI_SSR_SS_INT_OPT_Msk (0x1ul << SPI_SSR_SS_INT_OPT_Pos)

SPI_T::SSR: SS_INT_OPT Mask

Definition at line 8967 of file Nano1X2Series.h.

## ◆ SPI_SSR_SS_INT_OPT_Pos

#define SPI_SSR_SS_INT_OPT_Pos (16)

SPI_T::SSR: SS_INT_OPT Position

Definition at line 8966 of file Nano1X2Series.h.

## ◆ SPI_SSR_SS_LTRIG_Msk

#define SPI_SSR_SS_LTRIG_Msk (0x1ul << SPI_SSR_SS_LTRIG_Pos)

SPI_T::SSR: SS_LTRIG Mask

Definition at line 8955 of file Nano1X2Series.h.

## ◆ SPI_SSR_SS_LTRIG_Pos

#define SPI_SSR_SS_LTRIG_Pos (4)

SPI_T::SSR: SS_LTRIG Position

Definition at line 8954 of file Nano1X2Series.h.

## ◆ SPI_SSR_SS_LVL_Msk

#define SPI_SSR_SS_LVL_Msk (0x1ul << SPI_SSR_SS_LVL_Pos)

SPI_T::SSR: SS_LVL Mask

Definition at line 8949 of file Nano1X2Series.h.

## ◆ SPI_SSR_SS_LVL_Pos

#define SPI_SSR_SS_LVL_Pos (2)

SPI_T::SSR: SS_LVL Position

Definition at line 8948 of file Nano1X2Series.h.

## ◆ SPI_SSR_SSR_Msk

#define SPI_SSR_SSR_Msk (0x3ul << SPI_SSR_SSR_Pos)

SPI_T::SSR: SSR Mask

Definition at line 8946 of file Nano1X2Series.h.

## ◆ SPI_SSR_SSR_Pos

#define SPI_SSR_SSR_Pos (0)

SPI_T::SSR: SSR Position

Definition at line 8945 of file Nano1X2Series.h.

## ◆ SPI_SSR_SSTA_INTEN_Msk

#define SPI_SSR_SSTA_INTEN_Msk (0x1ul << SPI_SSR_SSTA_INTEN_Pos)

SPI_T::SSR: SSTA_INTEN Mask

Definition at line 8964 of file Nano1X2Series.h.

## ◆ SPI_SSR_SSTA_INTEN_Pos

#define SPI_SSR_SSTA_INTEN_Pos (9)

SPI_T::SSR: SSTA_INTEN Position

Definition at line 8963 of file Nano1X2Series.h.

## ◆ SPI_STATUS_INTSTS_Msk

#define SPI_STATUS_INTSTS_Msk (0x1ul << SPI_STATUS_INTSTS_Pos)

SPI_T::STATUS: INTSTS Mask

Definition at line 8919 of file Nano1X2Series.h.

## ◆ SPI_STATUS_INTSTS_Pos

#define SPI_STATUS_INTSTS_Pos (7)

SPI_T::STATUS: INTSTS Position

Definition at line 8918 of file Nano1X2Series.h.

## ◆ SPI_STATUS_LTRIG_FLAG_Msk

#define SPI_STATUS_LTRIG_FLAG_Msk (0x1ul << SPI_STATUS_LTRIG_FLAG_Pos)

SPI_T::STATUS: LTRIG_FLAG Mask

Definition at line 8913 of file Nano1X2Series.h.

## ◆ SPI_STATUS_LTRIG_FLAG_Pos

#define SPI_STATUS_LTRIG_FLAG_Pos (4)

SPI_T::STATUS: LTRIG_FLAG Position

Definition at line 8912 of file Nano1X2Series.h.

## ◆ SPI_STATUS_RX_EMPTY_Msk

#define SPI_STATUS_RX_EMPTY_Msk (0x1ul << SPI_STATUS_RX_EMPTY_Pos)

SPI_T::STATUS: RX_EMPTY Mask

Definition at line 8901 of file Nano1X2Series.h.

## ◆ SPI_STATUS_RX_EMPTY_Pos

#define SPI_STATUS_RX_EMPTY_Pos (0)

SPI_T::STATUS: RX_EMPTY Position

Definition at line 8900 of file Nano1X2Series.h.

## ◆ SPI_STATUS_RX_FIFO_CNT_Msk

#define SPI_STATUS_RX_FIFO_CNT_Msk (0xful << SPI_STATUS_RX_FIFO_CNT_Pos)

SPI_T::STATUS: RX_FIFO_CNT Mask

Definition at line 8934 of file Nano1X2Series.h.

## ◆ SPI_STATUS_RX_FIFO_CNT_Pos

#define SPI_STATUS_RX_FIFO_CNT_Pos (16)

SPI_T::STATUS: RX_FIFO_CNT Position

Definition at line 8933 of file Nano1X2Series.h.

## ◆ SPI_STATUS_RX_FULL_Msk

#define SPI_STATUS_RX_FULL_Msk (0x1ul << SPI_STATUS_RX_FULL_Pos)

SPI_T::STATUS: RX_FULL Mask

Definition at line 8904 of file Nano1X2Series.h.

## ◆ SPI_STATUS_RX_FULL_Pos

#define SPI_STATUS_RX_FULL_Pos (1)

SPI_T::STATUS: RX_FULL Position

Definition at line 8903 of file Nano1X2Series.h.

## ◆ SPI_STATUS_RX_OVER_RUN_Msk

#define SPI_STATUS_RX_OVER_RUN_Msk (0x1ul << SPI_STATUS_RX_OVER_RUN_Pos)

SPI_T::STATUS: RX_OVER_RUN Mask

Definition at line 8925 of file Nano1X2Series.h.

## ◆ SPI_STATUS_RX_OVER_RUN_Pos

#define SPI_STATUS_RX_OVER_RUN_Pos (9)

SPI_T::STATUS: RX_OVER_RUN Position

Definition at line 8924 of file Nano1X2Series.h.

## ◆ SPI_STATUS_RXINT_STS_Msk

#define SPI_STATUS_RXINT_STS_Msk (0x1ul << SPI_STATUS_RXINT_STS_Pos)

SPI_T::STATUS: RXINT_STS Mask

Definition at line 8922 of file Nano1X2Series.h.

## ◆ SPI_STATUS_RXINT_STS_Pos

#define SPI_STATUS_RXINT_STS_Pos (8)

SPI_T::STATUS: RXINT_STS Position

Definition at line 8921 of file Nano1X2Series.h.

## ◆ SPI_STATUS_SLV_START_INTSTS_Msk

#define SPI_STATUS_SLV_START_INTSTS_Msk (0x1ul << SPI_STATUS_SLV_START_INTSTS_Pos)

SPI_T::STATUS: SLV_START_INTSTS Mask

Definition at line 8916 of file Nano1X2Series.h.

## ◆ SPI_STATUS_SLV_START_INTSTS_Pos

#define SPI_STATUS_SLV_START_INTSTS_Pos (6)

SPI_T::STATUS: SLV_START_INTSTS Position

Definition at line 8915 of file Nano1X2Series.h.

## ◆ SPI_STATUS_TIME_OUT_STS_Msk

#define SPI_STATUS_TIME_OUT_STS_Msk (0x1ul << SPI_STATUS_TIME_OUT_STS_Pos)

SPI_T::STATUS: TIME_OUT_STS Mask

Definition at line 8931 of file Nano1X2Series.h.

## ◆ SPI_STATUS_TIME_OUT_STS_Pos

#define SPI_STATUS_TIME_OUT_STS_Pos (12)

SPI_T::STATUS: TIME_OUT_STS Position

Definition at line 8930 of file Nano1X2Series.h.

## ◆ SPI_STATUS_TX_EMPTY_Msk

#define SPI_STATUS_TX_EMPTY_Msk (0x1ul << SPI_STATUS_TX_EMPTY_Pos)

SPI_T::STATUS: TX_EMPTY Mask

Definition at line 8907 of file Nano1X2Series.h.

## ◆ SPI_STATUS_TX_EMPTY_Pos

#define SPI_STATUS_TX_EMPTY_Pos (2)

SPI_T::STATUS: TX_EMPTY Position

Definition at line 8906 of file Nano1X2Series.h.

## ◆ SPI_STATUS_TX_FIFO_CNT_Msk

#define SPI_STATUS_TX_FIFO_CNT_Msk (0xful << SPI_STATUS_TX_FIFO_CNT_Pos)

SPI_T::STATUS: TX_FIFO_CNT Mask

Definition at line 8937 of file Nano1X2Series.h.

## ◆ SPI_STATUS_TX_FIFO_CNT_Pos

#define SPI_STATUS_TX_FIFO_CNT_Pos (20)

SPI_T::STATUS: TX_FIFO_CNT Position

Definition at line 8936 of file Nano1X2Series.h.

## ◆ SPI_STATUS_TX_FULL_Msk

#define SPI_STATUS_TX_FULL_Msk (0x1ul << SPI_STATUS_TX_FULL_Pos)

SPI_T::STATUS: TX_FULL Mask

Definition at line 8910 of file Nano1X2Series.h.

## ◆ SPI_STATUS_TX_FULL_Pos

#define SPI_STATUS_TX_FULL_Pos (3)

SPI_T::STATUS: TX_FULL Position

Definition at line 8909 of file Nano1X2Series.h.

## ◆ SPI_STATUS_TXINT_STS_Msk

#define SPI_STATUS_TXINT_STS_Msk (0x1ul << SPI_STATUS_TXINT_STS_Pos)

SPI_T::STATUS: TXINT_STS Mask

Definition at line 8928 of file Nano1X2Series.h.

## ◆ SPI_STATUS_TXINT_STS_Pos

#define SPI_STATUS_TXINT_STS_Pos (10)

SPI_T::STATUS: TXINT_STS Position

Definition at line 8927 of file Nano1X2Series.h.

## ◆ SPI_TX0_TDATA_Msk

#define SPI_TX0_TDATA_Msk (0xfffffffful << SPI_TX0_TDATA_Pos)

SPI_T::TX0: TDATA Mask

Definition at line 8976 of file Nano1X2Series.h.

## ◆ SPI_TX0_TDATA_Pos

#define SPI_TX0_TDATA_Pos (0)

SPI_T::TX0: TDATA Position

Definition at line 8975 of file Nano1X2Series.h.

## ◆ SPI_TX1_TDATA_Msk

#define SPI_TX1_TDATA_Msk (0xfffffffful << SPI_TX1_TDATA_Pos)

SPI_T::TX1: TDATA Mask

Definition at line 8979 of file Nano1X2Series.h.

## ◆ SPI_TX1_TDATA_Pos

#define SPI_TX1_TDATA_Pos (0)

SPI_T::TX1: TDATA Position

Definition at line 8978 of file Nano1X2Series.h.

## ◆ SPI_VARCLK_VARCLK_Msk

#define SPI_VARCLK_VARCLK_Msk (0xfffffffful << SPI_VARCLK_VARCLK_Pos)

SPI_T::VARCLK: VARCLK Mask

Definition at line 8982 of file Nano1X2Series.h.

## ◆ SPI_VARCLK_VARCLK_Pos

#define SPI_VARCLK_VARCLK_Pos (0)

SPI_T::VARCLK: VARCLK Position

Definition at line 8981 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD17_EN_Msk

#define SYS_BODCTL_BOD17_EN_Msk (0x1ul << SYS_BODCTL_BOD17_EN_Pos)

SYS_T::BODCTL: BOD17_EN Mask

Definition at line 3948 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD17_EN_Pos

#define SYS_BODCTL_BOD17_EN_Pos (0)

SYS_T::BODCTL: BOD17_EN Position

Definition at line 3947 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD17_INT_EN_Msk

#define SYS_BODCTL_BOD17_INT_EN_Msk (0x1ul << SYS_BODCTL_BOD17_INT_EN_Pos)

SYS_T::BODCTL: BOD17_INT_EN Mask

Definition at line 3966 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD17_INT_EN_Pos

#define SYS_BODCTL_BOD17_INT_EN_Pos (8)

SYS_T::BODCTL: BOD17_INT_EN Position

Definition at line 3965 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD17_RST_EN_Msk

#define SYS_BODCTL_BOD17_RST_EN_Msk (0x1ul << SYS_BODCTL_BOD17_RST_EN_Pos)

SYS_T::BODCTL: BOD17_RST_EN Mask

Definition at line 3957 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD17_RST_EN_Pos

#define SYS_BODCTL_BOD17_RST_EN_Pos (4)

SYS_T::BODCTL: BOD17_RST_EN Position

Definition at line 3956 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD17_TRIM_Msk

#define SYS_BODCTL_BOD17_TRIM_Msk (0xful << SYS_BODCTL_BOD17_TRIM_Pos)

SYS_T::BODCTL: BOD17_TRIM Mask

Definition at line 3975 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD17_TRIM_Pos

#define SYS_BODCTL_BOD17_TRIM_Pos (12)

SYS_T::BODCTL: BOD17_TRIM Position

Definition at line 3974 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD20_EN_Msk

#define SYS_BODCTL_BOD20_EN_Msk (0x1ul << SYS_BODCTL_BOD20_EN_Pos)

SYS_T::BODCTL: BOD20_EN Mask

Definition at line 3951 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD20_EN_Pos

#define SYS_BODCTL_BOD20_EN_Pos (1)

SYS_T::BODCTL: BOD20_EN Position

Definition at line 3950 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD20_INT_EN_Msk

#define SYS_BODCTL_BOD20_INT_EN_Msk (0x1ul << SYS_BODCTL_BOD20_INT_EN_Pos)

SYS_T::BODCTL: BOD20_INT_EN Mask

Definition at line 3969 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD20_INT_EN_Pos

#define SYS_BODCTL_BOD20_INT_EN_Pos (9)

SYS_T::BODCTL: BOD20_INT_EN Position

Definition at line 3968 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD20_RST_EN_Msk

#define SYS_BODCTL_BOD20_RST_EN_Msk (0x1ul << SYS_BODCTL_BOD20_RST_EN_Pos)

SYS_T::BODCTL: BOD20_RST_EN Mask

Definition at line 3960 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD20_RST_EN_Pos

#define SYS_BODCTL_BOD20_RST_EN_Pos (5)

SYS_T::BODCTL: BOD20_RST_EN Position

Definition at line 3959 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD20_TRIM_Msk

#define SYS_BODCTL_BOD20_TRIM_Msk (0xful << SYS_BODCTL_BOD20_TRIM_Pos)

SYS_T::BODCTL: BOD20_TRIM Mask

Definition at line 3978 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD20_TRIM_Pos

#define SYS_BODCTL_BOD20_TRIM_Pos (16)

SYS_T::BODCTL: BOD20_TRIM Position

Definition at line 3977 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD25_EN_Msk

#define SYS_BODCTL_BOD25_EN_Msk (0x1ul << SYS_BODCTL_BOD25_EN_Pos)

SYS_T::BODCTL: BOD25_EN Mask

Definition at line 3954 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD25_EN_Pos

#define SYS_BODCTL_BOD25_EN_Pos (2)

SYS_T::BODCTL: BOD25_EN Position

Definition at line 3953 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD25_INT_EN_Msk

#define SYS_BODCTL_BOD25_INT_EN_Msk (0x1ul << SYS_BODCTL_BOD25_INT_EN_Pos)

SYS_T::BODCTL: BOD25_INT_EN Mask

Definition at line 3972 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD25_INT_EN_Pos

#define SYS_BODCTL_BOD25_INT_EN_Pos (10)

SYS_T::BODCTL: BOD25_INT_EN Position

Definition at line 3971 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD25_RST_EN_Msk

#define SYS_BODCTL_BOD25_RST_EN_Msk (0x1ul << SYS_BODCTL_BOD25_RST_EN_Pos)

SYS_T::BODCTL: BOD25_RST_EN Mask

Definition at line 3963 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD25_RST_EN_Pos

#define SYS_BODCTL_BOD25_RST_EN_Pos (6)

SYS_T::BODCTL: BOD25_RST_EN Position

Definition at line 3962 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD25_TRIM_Msk

#define SYS_BODCTL_BOD25_TRIM_Msk (0xful << SYS_BODCTL_BOD25_TRIM_Pos)

SYS_T::BODCTL: BOD25_TRIM Mask

Definition at line 3981 of file Nano1X2Series.h.

## ◆ SYS_BODCTL_BOD25_TRIM_Pos

#define SYS_BODCTL_BOD25_TRIM_Pos (20)

SYS_T::BODCTL: BOD25_TRIM Position

Definition at line 3980 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD17_drop_Msk

#define SYS_BODSTS_BOD17_drop_Msk (0x1ul << SYS_BODSTS_BOD17_drop_Pos)

SYS_T::BODSTS: BOD17_drop Mask

Definition at line 3987 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD17_drop_Pos

#define SYS_BODSTS_BOD17_drop_Pos (1)

SYS_T::BODSTS: BOD17_drop Position

Definition at line 3986 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD17_Msk

#define SYS_BODSTS_BOD17_Msk (0x1ul << SYS_BODSTS_BOD17_Pos)

SYS_T::BODSTS: BOD17 Mask

Definition at line 4005 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD17_Pos

#define SYS_BODSTS_BOD17_Pos (8)

SYS_T::BODSTS: BOD17 Position

Definition at line 4004 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD17_rise_Msk

#define SYS_BODSTS_BOD17_rise_Msk (0x1ul << SYS_BODSTS_BOD17_rise_Pos)

SYS_T::BODSTS: BOD17_rise Mask

Definition at line 3996 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD17_rise_Pos

#define SYS_BODSTS_BOD17_rise_Pos (4)

SYS_T::BODSTS: BOD17_rise Position

Definition at line 3995 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD20_drop_Msk

#define SYS_BODSTS_BOD20_drop_Msk (0x1ul << SYS_BODSTS_BOD20_drop_Pos)

SYS_T::BODSTS: BOD20_drop Mask

Definition at line 3990 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD20_drop_Pos

#define SYS_BODSTS_BOD20_drop_Pos (2)

SYS_T::BODSTS: BOD20_drop Position

Definition at line 3989 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD20_Msk

#define SYS_BODSTS_BOD20_Msk (0x1ul << SYS_BODSTS_BOD20_Pos)

SYS_T::BODSTS: BOD20 Mask

Definition at line 4008 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD20_Pos

#define SYS_BODSTS_BOD20_Pos (9)

SYS_T::BODSTS: BOD20 Position

Definition at line 4007 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD20_rise_Msk

#define SYS_BODSTS_BOD20_rise_Msk (0x1ul << SYS_BODSTS_BOD20_rise_Pos)

SYS_T::BODSTS: BOD20_rise Mask

Definition at line 3999 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD20_rise_Pos

#define SYS_BODSTS_BOD20_rise_Pos (5)

SYS_T::BODSTS: BOD20_rise Position

Definition at line 3998 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD25_drop_Msk

#define SYS_BODSTS_BOD25_drop_Msk (0x1ul << SYS_BODSTS_BOD25_drop_Pos)

SYS_T::BODSTS: BOD25_drop Mask

Definition at line 3993 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD25_drop_Pos

#define SYS_BODSTS_BOD25_drop_Pos (3)

SYS_T::BODSTS: BOD25_drop Position

Definition at line 3992 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD25_Msk

#define SYS_BODSTS_BOD25_Msk (0x1ul << SYS_BODSTS_BOD25_Pos)

SYS_T::BODSTS: BOD25 Mask

Definition at line 4011 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD25_Pos

#define SYS_BODSTS_BOD25_Pos (10)

SYS_T::BODSTS: BOD25 Position

Definition at line 4010 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD25_rise_Msk

#define SYS_BODSTS_BOD25_rise_Msk (0x1ul << SYS_BODSTS_BOD25_rise_Pos)

SYS_T::BODSTS: BOD25_rise Mask

Definition at line 4002 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD25_rise_Pos

#define SYS_BODSTS_BOD25_rise_Pos (6)

SYS_T::BODSTS: BOD25_rise Position

Definition at line 4001 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD_INT_Msk

#define SYS_BODSTS_BOD_INT_Msk (0x1ul << SYS_BODSTS_BOD_INT_Pos)

SYS_T::BODSTS: BOD_INT Mask

Definition at line 3984 of file Nano1X2Series.h.

## ◆ SYS_BODSTS_BOD_INT_Pos

#define SYS_BODSTS_BOD_INT_Pos (0)

SYS_T::BODSTS: BOD_INT Position

Definition at line 3983 of file Nano1X2Series.h.

## ◆ SYS_CTL_LDO_LEVEL_Msk

#define SYS_CTL_LDO_LEVEL_Msk (0x3ul << SYS_CTL_LDO_LEVEL_Pos)

SYS_T::CTL: LDO_LEVEL Mask

Definition at line 4032 of file Nano1X2Series.h.

## ◆ SYS_CTL_LDO_LEVEL_Pos

#define SYS_CTL_LDO_LEVEL_Pos (2)

SYS_T::CTL: LDO_LEVEL Position

Definition at line 4031 of file Nano1X2Series.h.

## ◆ SYS_CTL_LDO_PD_Msk

#define SYS_CTL_LDO_PD_Msk (0x1ul << SYS_CTL_LDO_PD_Pos)

SYS_T::CTL: LDO_PD Mask

Definition at line 4029 of file Nano1X2Series.h.

## ◆ SYS_CTL_LDO_PD_Pos

#define SYS_CTL_LDO_PD_Pos (0)

SYS_T::CTL: LDO_PD Position

Definition at line 4028 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL1_CHIP_RST_Msk

#define SYS_IPRST_CTL1_CHIP_RST_Msk (0x1ul << SYS_IPRST_CTL1_CHIP_RST_Pos)

SYS_T::IPRST_CTL1: CHIP_RST Mask

Definition at line 3642 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL1_CHIP_RST_Pos

#define SYS_IPRST_CTL1_CHIP_RST_Pos (0)

SYS_T::IPRST_CTL1: CHIP_RST Position

Definition at line 3641 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL1_CPU_RST_Msk

#define SYS_IPRST_CTL1_CPU_RST_Msk (0x1ul << SYS_IPRST_CTL1_CPU_RST_Pos)

SYS_T::IPRST_CTL1: CPU_RST Mask

Definition at line 3645 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL1_CPU_RST_Pos

#define SYS_IPRST_CTL1_CPU_RST_Pos (1)

SYS_T::IPRST_CTL1: CPU_RST Position

Definition at line 3644 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL1_DMA_RST_Msk

#define SYS_IPRST_CTL1_DMA_RST_Msk (0x1ul << SYS_IPRST_CTL1_DMA_RST_Pos)

SYS_T::IPRST_CTL1: DMA_RST Mask

Definition at line 3648 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL1_DMA_RST_Pos

#define SYS_IPRST_CTL1_DMA_RST_Pos (2)

SYS_T::IPRST_CTL1: DMA_RST Position

Definition at line 3647 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_ACMP01_RST_Msk

#define SYS_IPRST_CTL2_ACMP01_RST_Msk (0x1ul << SYS_IPRST_CTL2_ACMP01_RST_Pos)

SYS_T::IPRST_CTL2: ACMP01_RST Mask

Definition at line 3687 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_ACMP01_RST_Pos

#define SYS_IPRST_CTL2_ACMP01_RST_Pos (22)

SYS_T::IPRST_CTL2: ACMP01_RST Position

Definition at line 3686 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_ADC_RST_Msk

#define SYS_IPRST_CTL2_ADC_RST_Msk (0x1ul << SYS_IPRST_CTL2_ADC_RST_Pos)

SYS_T::IPRST_CTL2: ADC_RST Mask

Definition at line 3693 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_ADC_RST_Pos

#define SYS_IPRST_CTL2_ADC_RST_Pos (28)

SYS_T::IPRST_CTL2: ADC_RST Position

Definition at line 3692 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_GPIO_RST_Msk

#define SYS_IPRST_CTL2_GPIO_RST_Msk (0x1ul << SYS_IPRST_CTL2_GPIO_RST_Pos)

SYS_T::IPRST_CTL2: GPIO_RST Mask

Definition at line 3651 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_GPIO_RST_Pos

#define SYS_IPRST_CTL2_GPIO_RST_Pos (1)

SYS_T::IPRST_CTL2: GPIO_RST Position

Definition at line 3650 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_I2C0_RST_Msk

#define SYS_IPRST_CTL2_I2C0_RST_Msk (0x1ul << SYS_IPRST_CTL2_I2C0_RST_Pos)

SYS_T::IPRST_CTL2: I2C0_RST Mask

Definition at line 3666 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_I2C0_RST_Pos

#define SYS_IPRST_CTL2_I2C0_RST_Pos (8)

SYS_T::IPRST_CTL2: I2C0_RST Position

Definition at line 3665 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_I2C1_RST_Msk

#define SYS_IPRST_CTL2_I2C1_RST_Msk (0x1ul << SYS_IPRST_CTL2_I2C1_RST_Pos)

SYS_T::IPRST_CTL2: I2C1_RST Mask

Definition at line 3669 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_I2C1_RST_Pos

#define SYS_IPRST_CTL2_I2C1_RST_Pos (9)

SYS_T::IPRST_CTL2: I2C1_RST Position

Definition at line 3668 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_LCD_RST_Msk

#define SYS_IPRST_CTL2_LCD_RST_Msk (0x1ul << SYS_IPRST_CTL2_LCD_RST_Pos)

SYS_T::IPRST_CTL2: LCD_RST Mask

Definition at line 3690 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_LCD_RST_Pos

#define SYS_IPRST_CTL2_LCD_RST_Pos (26)

SYS_T::IPRST_CTL2: LCD_RST Position

Definition at line 3689 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_PWM0_RST_Msk

#define SYS_IPRST_CTL2_PWM0_RST_Msk (0x1ul << SYS_IPRST_CTL2_PWM0_RST_Pos)

SYS_T::IPRST_CTL2: PWM0_RST Mask

Definition at line 3684 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_PWM0_RST_Pos

#define SYS_IPRST_CTL2_PWM0_RST_Pos (20)

SYS_T::IPRST_CTL2: PWM0_RST Position

Definition at line 3683 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_SC0_RST_Msk

#define SYS_IPRST_CTL2_SC0_RST_Msk (0x1ul << SYS_IPRST_CTL2_SC0_RST_Pos)

SYS_T::IPRST_CTL2: SC0_RST Mask

Definition at line 3696 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_SC0_RST_Pos

#define SYS_IPRST_CTL2_SC0_RST_Pos (30)

SYS_T::IPRST_CTL2: SC0_RST Position

Definition at line 3695 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_SC1_RST_Msk

#define SYS_IPRST_CTL2_SC1_RST_Msk (0x1ul << SYS_IPRST_CTL2_SC1_RST_Pos)

SYS_T::IPRST_CTL2: SC1_RST Mask

Definition at line 3699 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_SC1_RST_Pos

#define SYS_IPRST_CTL2_SC1_RST_Pos (31)

SYS_T::IPRST_CTL2: SC1_RST Position

Definition at line 3698 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_SPI0_RST_Msk

#define SYS_IPRST_CTL2_SPI0_RST_Msk (0x1ul << SYS_IPRST_CTL2_SPI0_RST_Pos)

SYS_T::IPRST_CTL2: SPI0_RST Mask

Definition at line 3672 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_SPI0_RST_Pos

#define SYS_IPRST_CTL2_SPI0_RST_Pos (12)

SYS_T::IPRST_CTL2: SPI0_RST Position

Definition at line 3671 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_SPI1_RST_Msk

#define SYS_IPRST_CTL2_SPI1_RST_Msk (0x1ul << SYS_IPRST_CTL2_SPI1_RST_Pos)

SYS_T::IPRST_CTL2: SPI1_RST Mask

Definition at line 3675 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_SPI1_RST_Pos

#define SYS_IPRST_CTL2_SPI1_RST_Pos (13)

SYS_T::IPRST_CTL2: SPI1_RST Position

Definition at line 3674 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_TMR0_RST_Msk

#define SYS_IPRST_CTL2_TMR0_RST_Msk (0x1ul << SYS_IPRST_CTL2_TMR0_RST_Pos)

SYS_T::IPRST_CTL2: TMR0_RST Mask

Definition at line 3654 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_TMR0_RST_Pos

#define SYS_IPRST_CTL2_TMR0_RST_Pos (2)

SYS_T::IPRST_CTL2: TMR0_RST Position

Definition at line 3653 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_TMR1_RST_Msk

#define SYS_IPRST_CTL2_TMR1_RST_Msk (0x1ul << SYS_IPRST_CTL2_TMR1_RST_Pos)

SYS_T::IPRST_CTL2: TMR1_RST Mask

Definition at line 3657 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_TMR1_RST_Pos

#define SYS_IPRST_CTL2_TMR1_RST_Pos (3)

SYS_T::IPRST_CTL2: TMR1_RST Position

Definition at line 3656 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_TMR2_RST_Msk

#define SYS_IPRST_CTL2_TMR2_RST_Msk (0x1ul << SYS_IPRST_CTL2_TMR2_RST_Pos)

SYS_T::IPRST_CTL2: TMR2_RST Mask

Definition at line 3660 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_TMR2_RST_Pos

#define SYS_IPRST_CTL2_TMR2_RST_Pos (4)

SYS_T::IPRST_CTL2: TMR2_RST Position

Definition at line 3659 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_TMR3_RST_Msk

#define SYS_IPRST_CTL2_TMR3_RST_Msk (0x1ul << SYS_IPRST_CTL2_TMR3_RST_Pos)

SYS_T::IPRST_CTL2: TMR3_RST Mask

Definition at line 3663 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_TMR3_RST_Pos

#define SYS_IPRST_CTL2_TMR3_RST_Pos (5)

SYS_T::IPRST_CTL2: TMR3_RST Position

Definition at line 3662 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_UART0_RST_Msk

#define SYS_IPRST_CTL2_UART0_RST_Msk (0x1ul << SYS_IPRST_CTL2_UART0_RST_Pos)

SYS_T::IPRST_CTL2: UART0_RST Mask

Definition at line 3678 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_UART0_RST_Pos

#define SYS_IPRST_CTL2_UART0_RST_Pos (16)

SYS_T::IPRST_CTL2: UART0_RST Position

Definition at line 3677 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_UART1_RST_Msk

#define SYS_IPRST_CTL2_UART1_RST_Msk (0x1ul << SYS_IPRST_CTL2_UART1_RST_Pos)

SYS_T::IPRST_CTL2: UART1_RST Mask

Definition at line 3681 of file Nano1X2Series.h.

## ◆ SYS_IPRST_CTL2_UART1_RST_Pos

#define SYS_IPRST_CTL2_UART1_RST_Pos (17)

SYS_T::IPRST_CTL2: UART1_RST Position

Definition at line 3680 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMCTL_ERR_STOP_Msk

#define SYS_IRCTRIMCTL_ERR_STOP_Msk (0x1ul << SYS_IRCTRIMCTL_ERR_STOP_Pos)

SYS_T::IRCTRIMCTL: ERR_STOP Mask

Definition at line 4044 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMCTL_ERR_STOP_Pos

#define SYS_IRCTRIMCTL_ERR_STOP_Pos (8)

SYS_T::IRCTRIMCTL: ERR_STOP Position

Definition at line 4043 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMCTL_TRIM_LOOP_Msk

#define SYS_IRCTRIMCTL_TRIM_LOOP_Msk (0x3ul << SYS_IRCTRIMCTL_TRIM_LOOP_Pos)

SYS_T::IRCTRIMCTL: TRIM_LOOP Mask

Definition at line 4038 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMCTL_TRIM_LOOP_Pos

#define SYS_IRCTRIMCTL_TRIM_LOOP_Pos (4)

SYS_T::IRCTRIMCTL: TRIM_LOOP Position

Definition at line 4037 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMCTL_TRIM_RETRY_CNT_Msk

#define SYS_IRCTRIMCTL_TRIM_RETRY_CNT_Msk (0x3ul << SYS_IRCTRIMCTL_TRIM_RETRY_CNT_Pos)

SYS_T::IRCTRIMCTL: TRIM_RETRY_CNT Mask

Definition at line 4041 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMCTL_TRIM_RETRY_CNT_Pos

#define SYS_IRCTRIMCTL_TRIM_RETRY_CNT_Pos (6)

SYS_T::IRCTRIMCTL: TRIM_RETRY_CNT Position

Definition at line 4040 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMCTL_TRIM_SEL_Msk

#define SYS_IRCTRIMCTL_TRIM_SEL_Msk (0x3ul << SYS_IRCTRIMCTL_TRIM_SEL_Pos)

SYS_T::IRCTRIMCTL: TRIM_SEL Mask

Definition at line 4035 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMCTL_TRIM_SEL_Pos

#define SYS_IRCTRIMCTL_TRIM_SEL_Pos (0)

SYS_T::IRCTRIMCTL: TRIM_SEL Position

Definition at line 4034 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMIEN_32K_ERR_IEN_Msk

#define SYS_IRCTRIMIEN_32K_ERR_IEN_Msk (0x1ul << SYS_IRCTRIMIEN_32K_ERR_IEN_Pos)

SYS_T::IRCTRIMIEN: 32K_ERR_IEN Mask

Definition at line 4050 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMIEN_32K_ERR_IEN_Pos

#define SYS_IRCTRIMIEN_32K_ERR_IEN_Pos (2)

SYS_T::IRCTRIMIEN: 32K_ERR_IEN Position

Definition at line 4049 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMIEN_TRIM_FAIL_IEN_Msk

#define SYS_IRCTRIMIEN_TRIM_FAIL_IEN_Msk (0x1ul << SYS_IRCTRIMIEN_TRIM_FAIL_IEN_Pos)

SYS_T::IRCTRIMIEN: TRIM_FAIL_IEN Mask

Definition at line 4047 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMIEN_TRIM_FAIL_IEN_Pos

#define SYS_IRCTRIMIEN_TRIM_FAIL_IEN_Pos (1)

SYS_T::IRCTRIMIEN: TRIM_FAIL_IEN Position

Definition at line 4046 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMINT_32K_ERR_INT_Msk

#define SYS_IRCTRIMINT_32K_ERR_INT_Msk (0x1ul << SYS_IRCTRIMINT_32K_ERR_INT_Pos)

SYS_T::IRCTRIMINT: 32K_ERR_INT Mask

Definition at line 4059 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMINT_32K_ERR_INT_Pos

#define SYS_IRCTRIMINT_32K_ERR_INT_Pos (2)

SYS_T::IRCTRIMINT: 32K_ERR_INT Position

Definition at line 4058 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMINT_FREQ_LOCK_Msk

#define SYS_IRCTRIMINT_FREQ_LOCK_Msk (0x1ul << SYS_IRCTRIMINT_FREQ_LOCK_Pos)

SYS_T::IRCTRIMINT: FREQ_LOCK Mask

Definition at line 4053 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMINT_FREQ_LOCK_Pos

#define SYS_IRCTRIMINT_FREQ_LOCK_Pos (0)

SYS_T::IRCTRIMINT: FREQ_LOCK Position

Definition at line 4052 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMINT_TRIM_FAIL_INT_Msk

#define SYS_IRCTRIMINT_TRIM_FAIL_INT_Msk (0x1ul << SYS_IRCTRIMINT_TRIM_FAIL_INT_Pos)

SYS_T::IRCTRIMINT: TRIM_FAIL_INT Mask

Definition at line 4056 of file Nano1X2Series.h.

## ◆ SYS_IRCTRIMINT_TRIM_FAIL_INT_Pos

#define SYS_IRCTRIMINT_TRIM_FAIL_INT_Pos (1)

SYS_T::IRCTRIMINT: TRIM_FAIL_INT Position

Definition at line 4055 of file Nano1X2Series.h.

## ◆ SYS_PA_H_MFP_PA10_MFP_Msk

#define SYS_PA_H_MFP_PA10_MFP_Msk (0xful << SYS_PA_H_MFP_PA10_MFP_Pos)

SYS_T::PA_H_MFP: PA10_MFP Mask

Definition at line 3735 of file Nano1X2Series.h.

## ◆ SYS_PA_H_MFP_PA10_MFP_Pos

#define SYS_PA_H_MFP_PA10_MFP_Pos (8)

SYS_T::PA_H_MFP: PA10_MFP Position

Definition at line 3734 of file Nano1X2Series.h.

## ◆ SYS_PA_H_MFP_PA11_MFP_Msk

#define SYS_PA_H_MFP_PA11_MFP_Msk (0xful << SYS_PA_H_MFP_PA11_MFP_Pos)

SYS_T::PA_H_MFP: PA11_MFP Mask

Definition at line 3738 of file Nano1X2Series.h.

## ◆ SYS_PA_H_MFP_PA11_MFP_Pos

#define SYS_PA_H_MFP_PA11_MFP_Pos (12)

SYS_T::PA_H_MFP: PA11_MFP Position

Definition at line 3737 of file Nano1X2Series.h.

## ◆ SYS_PA_H_MFP_PA12_MFP_Msk

#define SYS_PA_H_MFP_PA12_MFP_Msk (0xful << SYS_PA_H_MFP_PA12_MFP_Pos)

SYS_T::PA_H_MFP: PA12_MFP Mask

Definition at line 3741 of file Nano1X2Series.h.

## ◆ SYS_PA_H_MFP_PA12_MFP_Pos

#define SYS_PA_H_MFP_PA12_MFP_Pos (16)

SYS_T::PA_H_MFP: PA12_MFP Position

Definition at line 3740 of file Nano1X2Series.h.

## ◆ SYS_PA_H_MFP_PA13_MFP_Msk

#define SYS_PA_H_MFP_PA13_MFP_Msk (0xful << SYS_PA_H_MFP_PA13_MFP_Pos)

SYS_T::PA_H_MFP: PA13_MFP Mask

Definition at line 3744 of file Nano1X2Series.h.

## ◆ SYS_PA_H_MFP_PA13_MFP_Pos

#define SYS_PA_H_MFP_PA13_MFP_Pos (20)

SYS_T::PA_H_MFP: PA13_MFP Position

Definition at line 3743 of file Nano1X2Series.h.

## ◆ SYS_PA_H_MFP_PA14_MFP_Msk

#define SYS_PA_H_MFP_PA14_MFP_Msk (0xful << SYS_PA_H_MFP_PA14_MFP_Pos)

SYS_T::PA_H_MFP: PA14_MFP Mask

Definition at line 3747 of file Nano1X2Series.h.

## ◆ SYS_PA_H_MFP_PA14_MFP_Pos

#define SYS_PA_H_MFP_PA14_MFP_Pos (24)

SYS_T::PA_H_MFP: PA14_MFP Position

Definition at line 3746 of file Nano1X2Series.h.

## ◆ SYS_PA_H_MFP_PA15_MFP_Msk

#define SYS_PA_H_MFP_PA15_MFP_Msk (0xful << SYS_PA_H_MFP_PA15_MFP_Pos)

SYS_T::PA_H_MFP: PA15_MFP Mask

Definition at line 3750 of file Nano1X2Series.h.

## ◆ SYS_PA_H_MFP_PA15_MFP_Pos

#define SYS_PA_H_MFP_PA15_MFP_Pos (28)

SYS_T::PA_H_MFP: PA15_MFP Position

Definition at line 3749 of file Nano1X2Series.h.

## ◆ SYS_PA_H_MFP_PA8_MFP_Msk

#define SYS_PA_H_MFP_PA8_MFP_Msk (0xful << SYS_PA_H_MFP_PA8_MFP_Pos)

SYS_T::PA_H_MFP: PA8_MFP Mask

Definition at line 3729 of file Nano1X2Series.h.

## ◆ SYS_PA_H_MFP_PA8_MFP_Pos

#define SYS_PA_H_MFP_PA8_MFP_Pos (0)

SYS_T::PA_H_MFP: PA8_MFP Position

Definition at line 3728 of file Nano1X2Series.h.

## ◆ SYS_PA_H_MFP_PA9_MFP_Msk

#define SYS_PA_H_MFP_PA9_MFP_Msk (0xful << SYS_PA_H_MFP_PA9_MFP_Pos)

SYS_T::PA_H_MFP: PA9_MFP Mask

Definition at line 3732 of file Nano1X2Series.h.

## ◆ SYS_PA_H_MFP_PA9_MFP_Pos

#define SYS_PA_H_MFP_PA9_MFP_Pos (4)

SYS_T::PA_H_MFP: PA9_MFP Position

Definition at line 3731 of file Nano1X2Series.h.

## ◆ SYS_PA_L_MFP_PA0_MFP_Msk

#define SYS_PA_L_MFP_PA0_MFP_Msk (0xful << SYS_PA_L_MFP_PA0_MFP_Pos)

SYS_T::PA_L_MFP: PA0_MFP Mask

Definition at line 3705 of file Nano1X2Series.h.

## ◆ SYS_PA_L_MFP_PA0_MFP_Pos

#define SYS_PA_L_MFP_PA0_MFP_Pos (0)

SYS_T::PA_L_MFP: PA0_MFP Position

Definition at line 3704 of file Nano1X2Series.h.

## ◆ SYS_PA_L_MFP_PA1_MFP_Msk

#define SYS_PA_L_MFP_PA1_MFP_Msk (0xful << SYS_PA_L_MFP_PA1_MFP_Pos)

SYS_T::PA_L_MFP: PA1_MFP Mask

Definition at line 3708 of file Nano1X2Series.h.

## ◆ SYS_PA_L_MFP_PA1_MFP_Pos

#define SYS_PA_L_MFP_PA1_MFP_Pos (4)

SYS_T::PA_L_MFP: PA1_MFP Position

Definition at line 3707 of file Nano1X2Series.h.

## ◆ SYS_PA_L_MFP_PA2_MFP_Msk

#define SYS_PA_L_MFP_PA2_MFP_Msk (0xful << SYS_PA_L_MFP_PA2_MFP_Pos)

SYS_T::PA_L_MFP: PA2_MFP Mask

Definition at line 3711 of file Nano1X2Series.h.

## ◆ SYS_PA_L_MFP_PA2_MFP_Pos

#define SYS_PA_L_MFP_PA2_MFP_Pos (8)

SYS_T::PA_L_MFP: PA2_MFP Position

Definition at line 3710 of file Nano1X2Series.h.

## ◆ SYS_PA_L_MFP_PA3_MFP_Msk

#define SYS_PA_L_MFP_PA3_MFP_Msk (0xful << SYS_PA_L_MFP_PA3_MFP_Pos)

SYS_T::PA_L_MFP: PA3_MFP Mask

Definition at line 3714 of file Nano1X2Series.h.

## ◆ SYS_PA_L_MFP_PA3_MFP_Pos

#define SYS_PA_L_MFP_PA3_MFP_Pos (12)

SYS_T::PA_L_MFP: PA3_MFP Position

Definition at line 3713 of file Nano1X2Series.h.

## ◆ SYS_PA_L_MFP_PA4_MFP_Msk

#define SYS_PA_L_MFP_PA4_MFP_Msk (0xful << SYS_PA_L_MFP_PA4_MFP_Pos)

SYS_T::PA_L_MFP: PA4_MFP Mask

Definition at line 3717 of file Nano1X2Series.h.

## ◆ SYS_PA_L_MFP_PA4_MFP_Pos

#define SYS_PA_L_MFP_PA4_MFP_Pos (16)

SYS_T::PA_L_MFP: PA4_MFP Position

Definition at line 3716 of file Nano1X2Series.h.

## ◆ SYS_PA_L_MFP_PA5_MFP_Msk

#define SYS_PA_L_MFP_PA5_MFP_Msk (0xful << SYS_PA_L_MFP_PA5_MFP_Pos)

SYS_T::PA_L_MFP: PA5_MFP Mask

Definition at line 3720 of file Nano1X2Series.h.

## ◆ SYS_PA_L_MFP_PA5_MFP_Pos

#define SYS_PA_L_MFP_PA5_MFP_Pos (20)

SYS_T::PA_L_MFP: PA5_MFP Position

Definition at line 3719 of file Nano1X2Series.h.

## ◆ SYS_PA_L_MFP_PA6_MFP_Msk

#define SYS_PA_L_MFP_PA6_MFP_Msk (0xful << SYS_PA_L_MFP_PA6_MFP_Pos)

SYS_T::PA_L_MFP: PA6_MFP Mask

Definition at line 3723 of file Nano1X2Series.h.

## ◆ SYS_PA_L_MFP_PA6_MFP_Pos

#define SYS_PA_L_MFP_PA6_MFP_Pos (24)

SYS_T::PA_L_MFP: PA6_MFP Position

Definition at line 3722 of file Nano1X2Series.h.

## ◆ SYS_PA_L_MFP_PA7_MFP_Msk

#define SYS_PA_L_MFP_PA7_MFP_Msk (0xful << SYS_PA_L_MFP_PA7_MFP_Pos)

SYS_T::PA_L_MFP: PA7_MFP Mask

Definition at line 3726 of file Nano1X2Series.h.

## ◆ SYS_PA_L_MFP_PA7_MFP_Pos

#define SYS_PA_L_MFP_PA7_MFP_Pos (28)

SYS_T::PA_L_MFP: PA7_MFP Position

Definition at line 3725 of file Nano1X2Series.h.

## ◆ SYS_PB_H_MFP_PB10_MFP_Msk

#define SYS_PB_H_MFP_PB10_MFP_Msk (0xful << SYS_PB_H_MFP_PB10_MFP_Pos)

SYS_T::PB_H_MFP: PB10_MFP Mask

Definition at line 3783 of file Nano1X2Series.h.

## ◆ SYS_PB_H_MFP_PB10_MFP_Pos

#define SYS_PB_H_MFP_PB10_MFP_Pos (8)

SYS_T::PB_H_MFP: PB10_MFP Position

Definition at line 3782 of file Nano1X2Series.h.

## ◆ SYS_PB_H_MFP_PB11_MFP_Msk

#define SYS_PB_H_MFP_PB11_MFP_Msk (0xful << SYS_PB_H_MFP_PB11_MFP_Pos)

SYS_T::PB_H_MFP: PB11_MFP Mask

Definition at line 3786 of file Nano1X2Series.h.

## ◆ SYS_PB_H_MFP_PB11_MFP_Pos

#define SYS_PB_H_MFP_PB11_MFP_Pos (12)

SYS_T::PB_H_MFP: PB11_MFP Position

Definition at line 3785 of file Nano1X2Series.h.

## ◆ SYS_PB_H_MFP_PB12_MFP_Msk

#define SYS_PB_H_MFP_PB12_MFP_Msk (0xful << SYS_PB_H_MFP_PB12_MFP_Pos)

SYS_T::PB_H_MFP: PB12_MFP Mask

Definition at line 3789 of file Nano1X2Series.h.

## ◆ SYS_PB_H_MFP_PB12_MFP_Pos

#define SYS_PB_H_MFP_PB12_MFP_Pos (16)

SYS_T::PB_H_MFP: PB12_MFP Position

Definition at line 3788 of file Nano1X2Series.h.

## ◆ SYS_PB_H_MFP_PB13_MFP_Msk

#define SYS_PB_H_MFP_PB13_MFP_Msk (0xful << SYS_PB_H_MFP_PB13_MFP_Pos)

SYS_T::PB_H_MFP: PB13_MFP Mask

Definition at line 3792 of file Nano1X2Series.h.

## ◆ SYS_PB_H_MFP_PB13_MFP_Pos

#define SYS_PB_H_MFP_PB13_MFP_Pos (20)

SYS_T::PB_H_MFP: PB13_MFP Position

Definition at line 3791 of file Nano1X2Series.h.

## ◆ SYS_PB_H_MFP_PB14_MFP_Msk

#define SYS_PB_H_MFP_PB14_MFP_Msk (0xful << SYS_PB_H_MFP_PB14_MFP_Pos)

SYS_T::PB_H_MFP: PB14_MFP Mask

Definition at line 3795 of file Nano1X2Series.h.

## ◆ SYS_PB_H_MFP_PB14_MFP_Pos

#define SYS_PB_H_MFP_PB14_MFP_Pos (24)

SYS_T::PB_H_MFP: PB14_MFP Position

Definition at line 3794 of file Nano1X2Series.h.

## ◆ SYS_PB_H_MFP_PB15_MFP_Msk

#define SYS_PB_H_MFP_PB15_MFP_Msk (0xful << SYS_PB_H_MFP_PB15_MFP_Pos)

SYS_T::PB_H_MFP: PB15_MFP Mask

Definition at line 3798 of file Nano1X2Series.h.

## ◆ SYS_PB_H_MFP_PB15_MFP_Pos

#define SYS_PB_H_MFP_PB15_MFP_Pos (28)

SYS_T::PB_H_MFP: PB15_MFP Position

Definition at line 3797 of file Nano1X2Series.h.

## ◆ SYS_PB_H_MFP_PB8_MFP_Msk

#define SYS_PB_H_MFP_PB8_MFP_Msk (0xful << SYS_PB_H_MFP_PB8_MFP_Pos)

SYS_T::PB_H_MFP: PB8_MFP Mask

Definition at line 3777 of file Nano1X2Series.h.

## ◆ SYS_PB_H_MFP_PB8_MFP_Pos

#define SYS_PB_H_MFP_PB8_MFP_Pos (0)

SYS_T::PB_H_MFP: PB8_MFP Position

Definition at line 3776 of file Nano1X2Series.h.

## ◆ SYS_PB_H_MFP_PB9_MFP_Msk

#define SYS_PB_H_MFP_PB9_MFP_Msk (0xful << SYS_PB_H_MFP_PB9_MFP_Pos)

SYS_T::PB_H_MFP: PB9_MFP Mask

Definition at line 3780 of file Nano1X2Series.h.

## ◆ SYS_PB_H_MFP_PB9_MFP_Pos

#define SYS_PB_H_MFP_PB9_MFP_Pos (4)

SYS_T::PB_H_MFP: PB9_MFP Position

Definition at line 3779 of file Nano1X2Series.h.

## ◆ SYS_PB_L_MFP_PB0_MFP_Msk

#define SYS_PB_L_MFP_PB0_MFP_Msk (0xful << SYS_PB_L_MFP_PB0_MFP_Pos)

SYS_T::PB_L_MFP: PB0_MFP Mask

Definition at line 3753 of file Nano1X2Series.h.

## ◆ SYS_PB_L_MFP_PB0_MFP_Pos

#define SYS_PB_L_MFP_PB0_MFP_Pos (0)

SYS_T::PB_L_MFP: PB0_MFP Position

Definition at line 3752 of file Nano1X2Series.h.

## ◆ SYS_PB_L_MFP_PB1_MFP_Msk

#define SYS_PB_L_MFP_PB1_MFP_Msk (0xful << SYS_PB_L_MFP_PB1_MFP_Pos)

SYS_T::PB_L_MFP: PB1_MFP Mask

Definition at line 3756 of file Nano1X2Series.h.

## ◆ SYS_PB_L_MFP_PB1_MFP_Pos

#define SYS_PB_L_MFP_PB1_MFP_Pos (4)

SYS_T::PB_L_MFP: PB1_MFP Position

Definition at line 3755 of file Nano1X2Series.h.

## ◆ SYS_PB_L_MFP_PB2_MFP_Msk

#define SYS_PB_L_MFP_PB2_MFP_Msk (0xful << SYS_PB_L_MFP_PB2_MFP_Pos)

SYS_T::PB_L_MFP: PB2_MFP Mask

Definition at line 3759 of file Nano1X2Series.h.

## ◆ SYS_PB_L_MFP_PB2_MFP_Pos

#define SYS_PB_L_MFP_PB2_MFP_Pos (8)

SYS_T::PB_L_MFP: PB2_MFP Position

Definition at line 3758 of file Nano1X2Series.h.

## ◆ SYS_PB_L_MFP_PB3_MFP_Msk

#define SYS_PB_L_MFP_PB3_MFP_Msk (0xful << SYS_PB_L_MFP_PB3_MFP_Pos)

SYS_T::PB_L_MFP: PB3_MFP Mask

Definition at line 3762 of file Nano1X2Series.h.

## ◆ SYS_PB_L_MFP_PB3_MFP_Pos

#define SYS_PB_L_MFP_PB3_MFP_Pos (12)

SYS_T::PB_L_MFP: PB3_MFP Position

Definition at line 3761 of file Nano1X2Series.h.

## ◆ SYS_PB_L_MFP_PB4_MFP_Msk

#define SYS_PB_L_MFP_PB4_MFP_Msk (0xful << SYS_PB_L_MFP_PB4_MFP_Pos)

SYS_T::PB_L_MFP: PB4_MFP Mask

Definition at line 3765 of file Nano1X2Series.h.

## ◆ SYS_PB_L_MFP_PB4_MFP_Pos

#define SYS_PB_L_MFP_PB4_MFP_Pos (16)

SYS_T::PB_L_MFP: PB4_MFP Position

Definition at line 3764 of file Nano1X2Series.h.

## ◆ SYS_PB_L_MFP_PB5_MFP_Msk

#define SYS_PB_L_MFP_PB5_MFP_Msk (0xful << SYS_PB_L_MFP_PB5_MFP_Pos)

SYS_T::PB_L_MFP: PB5_MFP Mask

Definition at line 3768 of file Nano1X2Series.h.

## ◆ SYS_PB_L_MFP_PB5_MFP_Pos

#define SYS_PB_L_MFP_PB5_MFP_Pos (20)

SYS_T::PB_L_MFP: PB5_MFP Position

Definition at line 3767 of file Nano1X2Series.h.

## ◆ SYS_PB_L_MFP_PB6_MFP_Msk

#define SYS_PB_L_MFP_PB6_MFP_Msk (0xful << SYS_PB_L_MFP_PB6_MFP_Pos)

SYS_T::PB_L_MFP: PB6_MFP Mask

Definition at line 3771 of file Nano1X2Series.h.

## ◆ SYS_PB_L_MFP_PB6_MFP_Pos

#define SYS_PB_L_MFP_PB6_MFP_Pos (24)

SYS_T::PB_L_MFP: PB6_MFP Position

Definition at line 3770 of file Nano1X2Series.h.

## ◆ SYS_PB_L_MFP_PB7_MFP_Msk

#define SYS_PB_L_MFP_PB7_MFP_Msk (0xful << SYS_PB_L_MFP_PB7_MFP_Pos)

SYS_T::PB_L_MFP: PB7_MFP Mask

Definition at line 3774 of file Nano1X2Series.h.

## ◆ SYS_PB_L_MFP_PB7_MFP_Pos

#define SYS_PB_L_MFP_PB7_MFP_Pos (28)

SYS_T::PB_L_MFP: PB7_MFP Position

Definition at line 3773 of file Nano1X2Series.h.

## ◆ SYS_PC_H_MFP_PC10_MFP_Msk

#define SYS_PC_H_MFP_PC10_MFP_Msk (0xful << SYS_PC_H_MFP_PC10_MFP_Pos)

SYS_T::PC_H_MFP: PC10_MFP Mask

Definition at line 3831 of file Nano1X2Series.h.

## ◆ SYS_PC_H_MFP_PC10_MFP_Pos

#define SYS_PC_H_MFP_PC10_MFP_Pos (8)

SYS_T::PC_H_MFP: PC10_MFP Position

Definition at line 3830 of file Nano1X2Series.h.

## ◆ SYS_PC_H_MFP_PC11_MFP_Msk

#define SYS_PC_H_MFP_PC11_MFP_Msk (0xful << SYS_PC_H_MFP_PC11_MFP_Pos)

SYS_T::PC_H_MFP: PC11_MFP Mask

Definition at line 3834 of file Nano1X2Series.h.

## ◆ SYS_PC_H_MFP_PC11_MFP_Pos

#define SYS_PC_H_MFP_PC11_MFP_Pos (12)

SYS_T::PC_H_MFP: PC11_MFP Position

Definition at line 3833 of file Nano1X2Series.h.

## ◆ SYS_PC_H_MFP_PC12_MFP_Msk

#define SYS_PC_H_MFP_PC12_MFP_Msk (0xful << SYS_PC_H_MFP_PC12_MFP_Pos)

SYS_T::PC_H_MFP: PC12_MFP Mask

Definition at line 3837 of file Nano1X2Series.h.

## ◆ SYS_PC_H_MFP_PC12_MFP_Pos

#define SYS_PC_H_MFP_PC12_MFP_Pos (16)

SYS_T::PC_H_MFP: PC12_MFP Position

Definition at line 3836 of file Nano1X2Series.h.

## ◆ SYS_PC_H_MFP_PC13_MFP_Msk

#define SYS_PC_H_MFP_PC13_MFP_Msk (0xful << SYS_PC_H_MFP_PC13_MFP_Pos)

SYS_T::PC_H_MFP: PC13_MFP Mask

Definition at line 3840 of file Nano1X2Series.h.

## ◆ SYS_PC_H_MFP_PC13_MFP_Pos

#define SYS_PC_H_MFP_PC13_MFP_Pos (20)

SYS_T::PC_H_MFP: PC13_MFP Position

Definition at line 3839 of file Nano1X2Series.h.

## ◆ SYS_PC_H_MFP_PC14_MFP_Msk

#define SYS_PC_H_MFP_PC14_MFP_Msk (0xful << SYS_PC_H_MFP_PC14_MFP_Pos)

SYS_T::PC_H_MFP: PC14_MFP Mask

Definition at line 3843 of file Nano1X2Series.h.

## ◆ SYS_PC_H_MFP_PC14_MFP_Pos

#define SYS_PC_H_MFP_PC14_MFP_Pos (24)

SYS_T::PC_H_MFP: PC14_MFP Position

Definition at line 3842 of file Nano1X2Series.h.

## ◆ SYS_PC_H_MFP_PC15_MFP_Msk

#define SYS_PC_H_MFP_PC15_MFP_Msk (0xful << SYS_PC_H_MFP_PC15_MFP_Pos)

SYS_T::PC_H_MFP: PC15_MFP Mask

Definition at line 3846 of file Nano1X2Series.h.

## ◆ SYS_PC_H_MFP_PC15_MFP_Pos

#define SYS_PC_H_MFP_PC15_MFP_Pos (28)

SYS_T::PC_H_MFP: PC15_MFP Position

Definition at line 3845 of file Nano1X2Series.h.

## ◆ SYS_PC_H_MFP_PC8_MFP_Msk

#define SYS_PC_H_MFP_PC8_MFP_Msk (0xful << SYS_PC_H_MFP_PC8_MFP_Pos)

SYS_T::PC_H_MFP: PC8_MFP Mask

Definition at line 3825 of file Nano1X2Series.h.

## ◆ SYS_PC_H_MFP_PC8_MFP_Pos

#define SYS_PC_H_MFP_PC8_MFP_Pos (0)

SYS_T::PC_H_MFP: PC8_MFP Position

Definition at line 3824 of file Nano1X2Series.h.

## ◆ SYS_PC_H_MFP_PC9_MFP_Msk

#define SYS_PC_H_MFP_PC9_MFP_Msk (0xful << SYS_PC_H_MFP_PC9_MFP_Pos)

SYS_T::PC_H_MFP: PC9_MFP Mask

Definition at line 3828 of file Nano1X2Series.h.

## ◆ SYS_PC_H_MFP_PC9_MFP_Pos

#define SYS_PC_H_MFP_PC9_MFP_Pos (4)

SYS_T::PC_H_MFP: PC9_MFP Position

Definition at line 3827 of file Nano1X2Series.h.

## ◆ SYS_PC_L_MFP_PC0_MFP_Msk

#define SYS_PC_L_MFP_PC0_MFP_Msk (0xful << SYS_PC_L_MFP_PC0_MFP_Pos)

SYS_T::PC_L_MFP: PC0_MFP Mask

Definition at line 3801 of file Nano1X2Series.h.

## ◆ SYS_PC_L_MFP_PC0_MFP_Pos

#define SYS_PC_L_MFP_PC0_MFP_Pos (0)

SYS_T::PC_L_MFP: PC0_MFP Position

Definition at line 3800 of file Nano1X2Series.h.

## ◆ SYS_PC_L_MFP_PC1_MFP_Msk

#define SYS_PC_L_MFP_PC1_MFP_Msk (0xful << SYS_PC_L_MFP_PC1_MFP_Pos)

SYS_T::PC_L_MFP: PC1_MFP Mask

Definition at line 3804 of file Nano1X2Series.h.

## ◆ SYS_PC_L_MFP_PC1_MFP_Pos

#define SYS_PC_L_MFP_PC1_MFP_Pos (4)

SYS_T::PC_L_MFP: PC1_MFP Position

Definition at line 3803 of file Nano1X2Series.h.

## ◆ SYS_PC_L_MFP_PC2_MFP_Msk

#define SYS_PC_L_MFP_PC2_MFP_Msk (0xful << SYS_PC_L_MFP_PC2_MFP_Pos)

SYS_T::PC_L_MFP: PC2_MFP Mask

Definition at line 3807 of file Nano1X2Series.h.

## ◆ SYS_PC_L_MFP_PC2_MFP_Pos

#define SYS_PC_L_MFP_PC2_MFP_Pos (8)

SYS_T::PC_L_MFP: PC2_MFP Position

Definition at line 3806 of file Nano1X2Series.h.

## ◆ SYS_PC_L_MFP_PC3_MFP_Msk

#define SYS_PC_L_MFP_PC3_MFP_Msk (0xful << SYS_PC_L_MFP_PC3_MFP_Pos)

SYS_T::PC_L_MFP: PC3_MFP Mask

Definition at line 3810 of file Nano1X2Series.h.

## ◆ SYS_PC_L_MFP_PC3_MFP_Pos

#define SYS_PC_L_MFP_PC3_MFP_Pos (12)

SYS_T::PC_L_MFP: PC3_MFP Position

Definition at line 3809 of file Nano1X2Series.h.

## ◆ SYS_PC_L_MFP_PC4_MFP_Msk

#define SYS_PC_L_MFP_PC4_MFP_Msk (0xful << SYS_PC_L_MFP_PC4_MFP_Pos)

SYS_T::PC_L_MFP: PC4_MFP Mask

Definition at line 3813 of file Nano1X2Series.h.

## ◆ SYS_PC_L_MFP_PC4_MFP_Pos

#define SYS_PC_L_MFP_PC4_MFP_Pos (16)

SYS_T::PC_L_MFP: PC4_MFP Position

Definition at line 3812 of file Nano1X2Series.h.

## ◆ SYS_PC_L_MFP_PC5_MFP_Msk

#define SYS_PC_L_MFP_PC5_MFP_Msk (0xful << SYS_PC_L_MFP_PC5_MFP_Pos)

SYS_T::PC_L_MFP: PC5_MFP Mask

Definition at line 3816 of file Nano1X2Series.h.

## ◆ SYS_PC_L_MFP_PC5_MFP_Pos

#define SYS_PC_L_MFP_PC5_MFP_Pos (20)

SYS_T::PC_L_MFP: PC5_MFP Position

Definition at line 3815 of file Nano1X2Series.h.

## ◆ SYS_PC_L_MFP_PC6_MFP_Msk

#define SYS_PC_L_MFP_PC6_MFP_Msk (0xful << SYS_PC_L_MFP_PC6_MFP_Pos)

SYS_T::PC_L_MFP: PC6_MFP Mask

Definition at line 3819 of file Nano1X2Series.h.

## ◆ SYS_PC_L_MFP_PC6_MFP_Pos

#define SYS_PC_L_MFP_PC6_MFP_Pos (24)

SYS_T::PC_L_MFP: PC6_MFP Position

Definition at line 3818 of file Nano1X2Series.h.

## ◆ SYS_PC_L_MFP_PC7_MFP_Msk

#define SYS_PC_L_MFP_PC7_MFP_Msk (0xful << SYS_PC_L_MFP_PC7_MFP_Pos)

SYS_T::PC_L_MFP: PC7_MFP Mask

Definition at line 3822 of file Nano1X2Series.h.

## ◆ SYS_PC_L_MFP_PC7_MFP_Pos

#define SYS_PC_L_MFP_PC7_MFP_Pos (28)

SYS_T::PC_L_MFP: PC7_MFP Position

Definition at line 3821 of file Nano1X2Series.h.

## ◆ SYS_PD_H_MFP_PD10_MFP_Msk

#define SYS_PD_H_MFP_PD10_MFP_Msk (0xful << SYS_PD_H_MFP_PD10_MFP_Pos)

SYS_T::PD_H_MFP: PD10_MFP Mask

Definition at line 3879 of file Nano1X2Series.h.

## ◆ SYS_PD_H_MFP_PD10_MFP_Pos

#define SYS_PD_H_MFP_PD10_MFP_Pos (8)

SYS_T::PD_H_MFP: PD10_MFP Position

Definition at line 3878 of file Nano1X2Series.h.

## ◆ SYS_PD_H_MFP_PD11_MFP_Msk

#define SYS_PD_H_MFP_PD11_MFP_Msk (0xful << SYS_PD_H_MFP_PD11_MFP_Pos)

SYS_T::PD_H_MFP: PD11_MFP Mask

Definition at line 3882 of file Nano1X2Series.h.

## ◆ SYS_PD_H_MFP_PD11_MFP_Pos

#define SYS_PD_H_MFP_PD11_MFP_Pos (12)

SYS_T::PD_H_MFP: PD11_MFP Position

Definition at line 3881 of file Nano1X2Series.h.

## ◆ SYS_PD_H_MFP_PD12_MFP_Msk

#define SYS_PD_H_MFP_PD12_MFP_Msk (0xful << SYS_PD_H_MFP_PD12_MFP_Pos)

SYS_T::PD_H_MFP: PD12_MFP Mask

Definition at line 3885 of file Nano1X2Series.h.

## ◆ SYS_PD_H_MFP_PD12_MFP_Pos

#define SYS_PD_H_MFP_PD12_MFP_Pos (16)

SYS_T::PD_H_MFP: PD12_MFP Position

Definition at line 3884 of file Nano1X2Series.h.

## ◆ SYS_PD_H_MFP_PD13_MFP_Msk

#define SYS_PD_H_MFP_PD13_MFP_Msk (0xful << SYS_PD_H_MFP_PD13_MFP_Pos)

SYS_T::PD_H_MFP: PD13_MFP Mask

Definition at line 3888 of file Nano1X2Series.h.

## ◆ SYS_PD_H_MFP_PD13_MFP_Pos

#define SYS_PD_H_MFP_PD13_MFP_Pos (20)

SYS_T::PD_H_MFP: PD13_MFP Position

Definition at line 3887 of file Nano1X2Series.h.

## ◆ SYS_PD_H_MFP_PD14_MFP_Msk

#define SYS_PD_H_MFP_PD14_MFP_Msk (0xful << SYS_PD_H_MFP_PD14_MFP_Pos)

SYS_T::PD_H_MFP: PD14_MFP Mask

Definition at line 3891 of file Nano1X2Series.h.

## ◆ SYS_PD_H_MFP_PD14_MFP_Pos

#define SYS_PD_H_MFP_PD14_MFP_Pos (24)

SYS_T::PD_H_MFP: PD14_MFP Position

Definition at line 3890 of file Nano1X2Series.h.

## ◆ SYS_PD_H_MFP_PD15_MFP_Msk

#define SYS_PD_H_MFP_PD15_MFP_Msk (0xful << SYS_PD_H_MFP_PD15_MFP_Pos)

SYS_T::PD_H_MFP: PD15_MFP Mask

Definition at line 3894 of file Nano1X2Series.h.

## ◆ SYS_PD_H_MFP_PD15_MFP_Pos

#define SYS_PD_H_MFP_PD15_MFP_Pos (28)

SYS_T::PD_H_MFP: PD15_MFP Position

Definition at line 3893 of file Nano1X2Series.h.

## ◆ SYS_PD_H_MFP_PD8_MFP_Msk

#define SYS_PD_H_MFP_PD8_MFP_Msk (0xful << SYS_PD_H_MFP_PD8_MFP_Pos)

SYS_T::PD_H_MFP: PD8_MFP Mask

Definition at line 3873 of file Nano1X2Series.h.

## ◆ SYS_PD_H_MFP_PD8_MFP_Pos

#define SYS_PD_H_MFP_PD8_MFP_Pos (0)

SYS_T::PD_H_MFP: PD8_MFP Position

Definition at line 3872 of file Nano1X2Series.h.

## ◆ SYS_PD_H_MFP_PD9_MFP_Msk

#define SYS_PD_H_MFP_PD9_MFP_Msk (0xful << SYS_PD_H_MFP_PD9_MFP_Pos)

SYS_T::PD_H_MFP: PD9_MFP Mask

Definition at line 3876 of file Nano1X2Series.h.

## ◆ SYS_PD_H_MFP_PD9_MFP_Pos

#define SYS_PD_H_MFP_PD9_MFP_Pos (4)

SYS_T::PD_H_MFP: PD9_MFP Position

Definition at line 3875 of file Nano1X2Series.h.

## ◆ SYS_PD_L_MFP_PD0_MFP_Msk

#define SYS_PD_L_MFP_PD0_MFP_Msk (0xful << SYS_PD_L_MFP_PD0_MFP_Pos)

SYS_T::PD_L_MFP: PD0_MFP Mask

Definition at line 3849 of file Nano1X2Series.h.

## ◆ SYS_PD_L_MFP_PD0_MFP_Pos

#define SYS_PD_L_MFP_PD0_MFP_Pos (0)

SYS_T::PD_L_MFP: PD0_MFP Position

Definition at line 3848 of file Nano1X2Series.h.

## ◆ SYS_PD_L_MFP_PD1_MFP_Msk

#define SYS_PD_L_MFP_PD1_MFP_Msk (0xful << SYS_PD_L_MFP_PD1_MFP_Pos)

SYS_T::PD_L_MFP: PD1_MFP Mask

Definition at line 3852 of file Nano1X2Series.h.

## ◆ SYS_PD_L_MFP_PD1_MFP_Pos

#define SYS_PD_L_MFP_PD1_MFP_Pos (4)

SYS_T::PD_L_MFP: PD1_MFP Position

Definition at line 3851 of file Nano1X2Series.h.

## ◆ SYS_PD_L_MFP_PD2_MFP_Msk

#define SYS_PD_L_MFP_PD2_MFP_Msk (0xful << SYS_PD_L_MFP_PD2_MFP_Pos)

SYS_T::PD_L_MFP: PD2_MFP Mask

Definition at line 3855 of file Nano1X2Series.h.

## ◆ SYS_PD_L_MFP_PD2_MFP_Pos

#define SYS_PD_L_MFP_PD2_MFP_Pos (8)

SYS_T::PD_L_MFP: PD2_MFP Position

Definition at line 3854 of file Nano1X2Series.h.

## ◆ SYS_PD_L_MFP_PD3_MFP_Msk

#define SYS_PD_L_MFP_PD3_MFP_Msk (0xful << SYS_PD_L_MFP_PD3_MFP_Pos)

SYS_T::PD_L_MFP: PD3_MFP Mask

Definition at line 3858 of file Nano1X2Series.h.

## ◆ SYS_PD_L_MFP_PD3_MFP_Pos

#define SYS_PD_L_MFP_PD3_MFP_Pos (12)

SYS_T::PD_L_MFP: PD3_MFP Position

Definition at line 3857 of file Nano1X2Series.h.

## ◆ SYS_PD_L_MFP_PD4_MFP_Msk

#define SYS_PD_L_MFP_PD4_MFP_Msk (0xful << SYS_PD_L_MFP_PD4_MFP_Pos)

SYS_T::PD_L_MFP: PD4_MFP Mask

Definition at line 3861 of file Nano1X2Series.h.

## ◆ SYS_PD_L_MFP_PD4_MFP_Pos

#define SYS_PD_L_MFP_PD4_MFP_Pos (16)

SYS_T::PD_L_MFP: PD4_MFP Position

Definition at line 3860 of file Nano1X2Series.h.

## ◆ SYS_PD_L_MFP_PD5_MFP_Msk

#define SYS_PD_L_MFP_PD5_MFP_Msk (0xful << SYS_PD_L_MFP_PD5_MFP_Pos)

SYS_T::PD_L_MFP: PD5_MFP Mask

Definition at line 3864 of file Nano1X2Series.h.

## ◆ SYS_PD_L_MFP_PD5_MFP_Pos

#define SYS_PD_L_MFP_PD5_MFP_Pos (20)

SYS_T::PD_L_MFP: PD5_MFP Position

Definition at line 3863 of file Nano1X2Series.h.

## ◆ SYS_PD_L_MFP_PD6_MFP_Msk

#define SYS_PD_L_MFP_PD6_MFP_Msk (0xful << SYS_PD_L_MFP_PD6_MFP_Pos)

SYS_T::PD_L_MFP: PD6_MFP Mask

Definition at line 3867 of file Nano1X2Series.h.

## ◆ SYS_PD_L_MFP_PD6_MFP_Pos

#define SYS_PD_L_MFP_PD6_MFP_Pos (24)

SYS_T::PD_L_MFP: PD6_MFP Position

Definition at line 3866 of file Nano1X2Series.h.

## ◆ SYS_PD_L_MFP_PD7_MFP_Msk

#define SYS_PD_L_MFP_PD7_MFP_Msk (0xful << SYS_PD_L_MFP_PD7_MFP_Pos)

SYS_T::PD_L_MFP: PD7_MFP Mask

Definition at line 3870 of file Nano1X2Series.h.

## ◆ SYS_PD_L_MFP_PD7_MFP_Pos

#define SYS_PD_L_MFP_PD7_MFP_Pos (28)

SYS_T::PD_L_MFP: PD7_MFP Position

Definition at line 3869 of file Nano1X2Series.h.

## ◆ SYS_PDID_PDID_Msk

#define SYS_PDID_PDID_Msk (0xfffffffful << SYS_PDID_PDID_Pos)

SYS_T::PDID: PDID Mask

Definition at line 3621 of file Nano1X2Series.h.

## ◆ SYS_PDID_PDID_Pos

#define SYS_PDID_PDID_Pos (0)

    @addtogroup SYS_CONST SYS Bit Field Definition
    Constant Definitions for SYS Controller

SYS_T::PDID: PDID Position

Definition at line 3620 of file Nano1X2Series.h.

## ◆ SYS_PE_H_MFP_PE8_MFP_Msk

#define SYS_PE_H_MFP_PE8_MFP_Msk (0xful << SYS_PE_H_MFP_PE8_MFP_Pos)

SYS_T::PE_H_MFP: PE8_MFP Mask

Definition at line 3921 of file Nano1X2Series.h.

## ◆ SYS_PE_H_MFP_PE8_MFP_Pos

#define SYS_PE_H_MFP_PE8_MFP_Pos (0)

SYS_T::PE_H_MFP: PE8_MFP Position

Definition at line 3920 of file Nano1X2Series.h.

## ◆ SYS_PE_H_MFP_PE9_MFP_Msk

#define SYS_PE_H_MFP_PE9_MFP_Msk (0xful << SYS_PE_H_MFP_PE9_MFP_Pos)

SYS_T::PE_H_MFP: PE9_MFP Mask

Definition at line 3924 of file Nano1X2Series.h.

## ◆ SYS_PE_H_MFP_PE9_MFP_Pos

#define SYS_PE_H_MFP_PE9_MFP_Pos (4)

SYS_T::PE_H_MFP: PE9_MFP Position

Definition at line 3923 of file Nano1X2Series.h.

## ◆ SYS_PE_L_MFP_PE0_MFP_Msk

#define SYS_PE_L_MFP_PE0_MFP_Msk (0xful << SYS_PE_L_MFP_PE0_MFP_Pos)

SYS_T::PE_L_MFP: PE0_MFP Mask

Definition at line 3897 of file Nano1X2Series.h.

## ◆ SYS_PE_L_MFP_PE0_MFP_Pos

#define SYS_PE_L_MFP_PE0_MFP_Pos (0)

SYS_T::PE_L_MFP: PE0_MFP Position

Definition at line 3896 of file Nano1X2Series.h.

## ◆ SYS_PE_L_MFP_PE1_MFP_Msk

#define SYS_PE_L_MFP_PE1_MFP_Msk (0xful << SYS_PE_L_MFP_PE1_MFP_Pos)

SYS_T::PE_L_MFP: PE1_MFP Mask

Definition at line 3900 of file Nano1X2Series.h.

## ◆ SYS_PE_L_MFP_PE1_MFP_Pos

#define SYS_PE_L_MFP_PE1_MFP_Pos (4)

SYS_T::PE_L_MFP: PE1_MFP Position

Definition at line 3899 of file Nano1X2Series.h.

## ◆ SYS_PE_L_MFP_PE2_MFP_Msk

#define SYS_PE_L_MFP_PE2_MFP_Msk (0xful << SYS_PE_L_MFP_PE2_MFP_Pos)

SYS_T::PE_L_MFP: PE2_MFP Mask

Definition at line 3903 of file Nano1X2Series.h.

## ◆ SYS_PE_L_MFP_PE2_MFP_Pos

#define SYS_PE_L_MFP_PE2_MFP_Pos (8)

SYS_T::PE_L_MFP: PE2_MFP Position

Definition at line 3902 of file Nano1X2Series.h.

## ◆ SYS_PE_L_MFP_PE3_MFP_Msk

#define SYS_PE_L_MFP_PE3_MFP_Msk (0xful << SYS_PE_L_MFP_PE3_MFP_Pos)

SYS_T::PE_L_MFP: PE3_MFP Mask

Definition at line 3906 of file Nano1X2Series.h.

## ◆ SYS_PE_L_MFP_PE3_MFP_Pos

#define SYS_PE_L_MFP_PE3_MFP_Pos (12)

SYS_T::PE_L_MFP: PE3_MFP Position

Definition at line 3905 of file Nano1X2Series.h.

## ◆ SYS_PE_L_MFP_PE4_MFP_Msk

#define SYS_PE_L_MFP_PE4_MFP_Msk (0xful << SYS_PE_L_MFP_PE4_MFP_Pos)

SYS_T::PE_L_MFP: PE4_MFP Mask

Definition at line 3909 of file Nano1X2Series.h.

## ◆ SYS_PE_L_MFP_PE4_MFP_Pos

#define SYS_PE_L_MFP_PE4_MFP_Pos (16)

SYS_T::PE_L_MFP: PE4_MFP Position

Definition at line 3908 of file Nano1X2Series.h.

## ◆ SYS_PE_L_MFP_PE5_MFP_Msk

#define SYS_PE_L_MFP_PE5_MFP_Msk (0xful << SYS_PE_L_MFP_PE5_MFP_Pos)

SYS_T::PE_L_MFP: PE5_MFP Mask

Definition at line 3912 of file Nano1X2Series.h.

## ◆ SYS_PE_L_MFP_PE5_MFP_Pos

#define SYS_PE_L_MFP_PE5_MFP_Pos (20)

SYS_T::PE_L_MFP: PE5_MFP Position

Definition at line 3911 of file Nano1X2Series.h.

## ◆ SYS_PE_L_MFP_PE6_MFP_Msk

#define SYS_PE_L_MFP_PE6_MFP_Msk (0xful << SYS_PE_L_MFP_PE6_MFP_Pos)

SYS_T::PE_L_MFP: PE6_MFP Mask

Definition at line 3915 of file Nano1X2Series.h.

## ◆ SYS_PE_L_MFP_PE6_MFP_Pos

#define SYS_PE_L_MFP_PE6_MFP_Pos (24)

SYS_T::PE_L_MFP: PE6_MFP Position

Definition at line 3914 of file Nano1X2Series.h.

## ◆ SYS_PE_L_MFP_PE7_MFP_Msk

#define SYS_PE_L_MFP_PE7_MFP_Msk (0xful << SYS_PE_L_MFP_PE7_MFP_Pos)

SYS_T::PE_L_MFP: PE7_MFP Mask

Definition at line 3918 of file Nano1X2Series.h.

## ◆ SYS_PE_L_MFP_PE7_MFP_Pos

#define SYS_PE_L_MFP_PE7_MFP_Pos (28)

SYS_T::PE_L_MFP: PE7_MFP Position

Definition at line 3917 of file Nano1X2Series.h.

## ◆ SYS_PF_L_MFP_PF0_MFP_Msk

#define SYS_PF_L_MFP_PF0_MFP_Msk (0xful << SYS_PF_L_MFP_PF0_MFP_Pos)

SYS_T::PF_L_MFP: PF0_MFP Mask

Definition at line 3927 of file Nano1X2Series.h.

## ◆ SYS_PF_L_MFP_PF0_MFP_Pos

#define SYS_PF_L_MFP_PF0_MFP_Pos (0)

SYS_T::PF_L_MFP: PF0_MFP Position

Definition at line 3926 of file Nano1X2Series.h.

## ◆ SYS_PF_L_MFP_PF1_MFP_Msk

#define SYS_PF_L_MFP_PF1_MFP_Msk (0xful << SYS_PF_L_MFP_PF1_MFP_Pos)

SYS_T::PF_L_MFP: PF1_MFP Mask

Definition at line 3930 of file Nano1X2Series.h.

## ◆ SYS_PF_L_MFP_PF1_MFP_Pos

#define SYS_PF_L_MFP_PF1_MFP_Pos (4)

SYS_T::PF_L_MFP: PF1_MFP Position

Definition at line 3929 of file Nano1X2Series.h.

## ◆ SYS_PF_L_MFP_PF2_MFP_Msk

#define SYS_PF_L_MFP_PF2_MFP_Msk (0xful << SYS_PF_L_MFP_PF2_MFP_Pos)

SYS_T::PF_L_MFP: PF2_MFP Mask

Definition at line 3933 of file Nano1X2Series.h.

## ◆ SYS_PF_L_MFP_PF2_MFP_Pos

#define SYS_PF_L_MFP_PF2_MFP_Pos (8)

SYS_T::PF_L_MFP: PF2_MFP Position

Definition at line 3932 of file Nano1X2Series.h.

## ◆ SYS_PF_L_MFP_PF3_MFP_Msk

#define SYS_PF_L_MFP_PF3_MFP_Msk (0xful << SYS_PF_L_MFP_PF3_MFP_Pos)

SYS_T::PF_L_MFP: PF3_MFP Mask

Definition at line 3936 of file Nano1X2Series.h.

## ◆ SYS_PF_L_MFP_PF3_MFP_Pos

#define SYS_PF_L_MFP_PF3_MFP_Pos (12)

SYS_T::PF_L_MFP: PF3_MFP Position

Definition at line 3935 of file Nano1X2Series.h.

## ◆ SYS_PF_L_MFP_PF4_MFP_Msk

#define SYS_PF_L_MFP_PF4_MFP_Msk (0xful << SYS_PF_L_MFP_PF4_MFP_Pos)

SYS_T::PF_L_MFP: PF4_MFP Mask

Definition at line 3939 of file Nano1X2Series.h.

## ◆ SYS_PF_L_MFP_PF4_MFP_Pos

#define SYS_PF_L_MFP_PF4_MFP_Pos (16)

SYS_T::PF_L_MFP: PF4_MFP Position

Definition at line 3938 of file Nano1X2Series.h.

## ◆ SYS_PF_L_MFP_PF5_MFP_Msk

#define SYS_PF_L_MFP_PF5_MFP_Msk (0xful << SYS_PF_L_MFP_PF5_MFP_Pos)

SYS_T::PF_L_MFP: PF5_MFP Mask

Definition at line 3942 of file Nano1X2Series.h.

## ◆ SYS_PF_L_MFP_PF5_MFP_Pos

#define SYS_PF_L_MFP_PF5_MFP_Pos (20)

SYS_T::PF_L_MFP: PF5_MFP Position

Definition at line 3941 of file Nano1X2Series.h.

## ◆ SYS_PORCTL_POR_DIS_CODE_Msk

#define SYS_PORCTL_POR_DIS_CODE_Msk (0xfffful << SYS_PORCTL_POR_DIS_CODE_Pos)

SYS_T::PORCTL: POR_DIS_CODE Mask

Definition at line 3945 of file Nano1X2Series.h.

## ◆ SYS_PORCTL_POR_DIS_CODE_Pos

#define SYS_PORCTL_POR_DIS_CODE_Pos (0)

SYS_T::PORCTL: POR_DIS_CODE Position

Definition at line 3944 of file Nano1X2Series.h.

## ◆ SYS_RegLockAddr_RegUnLock_Msk

#define SYS_RegLockAddr_RegUnLock_Msk (0x1ul << SYS_RegLockAddr_RegUnLock_Pos)

SYS_T::RegLockAddr: RegUnLock Mask

Definition at line 4062 of file Nano1X2Series.h.

## ◆ SYS_RegLockAddr_RegUnLock_Pos

#define SYS_RegLockAddr_RegUnLock_Pos (0)

SYS_T::RegLockAddr: RegUnLock Position

Definition at line 4061 of file Nano1X2Series.h.

## ◆ SYS_RST_SRC_RSTS_BOD_Msk

#define SYS_RST_SRC_RSTS_BOD_Msk (0x1ul << SYS_RST_SRC_RSTS_BOD_Pos)

SYS_T::SRC: RSTS_BOD Mask

Definition at line 3633 of file Nano1X2Series.h.

## ◆ SYS_RST_SRC_RSTS_BOD_Pos

#define SYS_RST_SRC_RSTS_BOD_Pos (4)

SYS_T::SRC: RSTS_BOD Position

Definition at line 3632 of file Nano1X2Series.h.

## ◆ SYS_RST_SRC_RSTS_CPU_Msk

#define SYS_RST_SRC_RSTS_CPU_Msk (0x1ul << SYS_RST_SRC_RSTS_CPU_Pos)

SYS_T::SRC: RSTS_CPU Mask

Definition at line 3639 of file Nano1X2Series.h.

## ◆ SYS_RST_SRC_RSTS_CPU_Pos

#define SYS_RST_SRC_RSTS_CPU_Pos (7)

SYS_T::SRC: RSTS_CPU Position

Definition at line 3638 of file Nano1X2Series.h.

## ◆ SYS_RST_SRC_RSTS_PAD_Msk

#define SYS_RST_SRC_RSTS_PAD_Msk (0x1ul << SYS_RST_SRC_RSTS_PAD_Pos)

SYS_T::SRC: RSTS_PAD Mask

Definition at line 3627 of file Nano1X2Series.h.

## ◆ SYS_RST_SRC_RSTS_PAD_Pos

#define SYS_RST_SRC_RSTS_PAD_Pos (1)

SYS_T::SRC: RSTS_PAD Position

Definition at line 3626 of file Nano1X2Series.h.

## ◆ SYS_RST_SRC_RSTS_POR_Msk

#define SYS_RST_SRC_RSTS_POR_Msk (0x1ul << SYS_RST_SRC_RSTS_POR_Pos)

SYS_T::SRC: RSTS_POR Mask

Definition at line 3624 of file Nano1X2Series.h.

## ◆ SYS_RST_SRC_RSTS_POR_Pos

#define SYS_RST_SRC_RSTS_POR_Pos (0)

SYS_T::SRC: RSTS_POR Position

Definition at line 3623 of file Nano1X2Series.h.

## ◆ SYS_RST_SRC_RSTS_SYS_Msk

#define SYS_RST_SRC_RSTS_SYS_Msk (0x1ul << SYS_RST_SRC_RSTS_SYS_Pos)

SYS_T::SRC: RSTS_SYS Mask

Definition at line 3636 of file Nano1X2Series.h.

## ◆ SYS_RST_SRC_RSTS_SYS_Pos

#define SYS_RST_SRC_RSTS_SYS_Pos (5)

SYS_T::SRC: RSTS_SYS Position

Definition at line 3635 of file Nano1X2Series.h.

## ◆ SYS_RST_SRC_RSTS_WDT_Msk

#define SYS_RST_SRC_RSTS_WDT_Msk (0x1ul << SYS_RST_SRC_RSTS_WDT_Pos)

SYS_T::SRC: RSTS_WDT Mask

Definition at line 3630 of file Nano1X2Series.h.

## ◆ SYS_RST_SRC_RSTS_WDT_Pos

#define SYS_RST_SRC_RSTS_WDT_Pos (2)

SYS_T::SRC: RSTS_WDT Position

Definition at line 3629 of file Nano1X2Series.h.

## ◆ SYS_TEMPCTL_VTEMP_EN_Msk

#define SYS_TEMPCTL_VTEMP_EN_Msk (0x1ul << SYS_TEMPCTL_VTEMP_EN_Pos)

SYS_T::TEMPCTL: VTEMP_EN Mask

Definition at line 3702 of file Nano1X2Series.h.

## ◆ SYS_TEMPCTL_VTEMP_EN_Pos

#define SYS_TEMPCTL_VTEMP_EN_Pos (0)

SYS_T::TEMPCTL: VTEMP_EN Position

Definition at line 3701 of file Nano1X2Series.h.

## ◆ SYS_VREFCTL_BGP_EN_Msk

#define SYS_VREFCTL_BGP_EN_Msk (0x1ul << SYS_VREFCTL_BGP_EN_Pos)

SYS_T::VREFCTL: BGP_EN Mask

Definition at line 4014 of file Nano1X2Series.h.

## ◆ SYS_VREFCTL_BGP_EN_Pos

#define SYS_VREFCTL_BGP_EN_Pos (0)

SYS_T::VREFCTL: BGP_EN Position

Definition at line 4013 of file Nano1X2Series.h.

## ◆ SYS_VREFCTL_EXT_MODE_Msk

#define SYS_VREFCTL_EXT_MODE_Msk (0x1ul << SYS_VREFCTL_EXT_MODE_Pos)

SYS_T::VREFCTL: EXT_MODE Mask

Definition at line 4023 of file Nano1X2Series.h.

## ◆ SYS_VREFCTL_EXT_MODE_Pos

#define SYS_VREFCTL_EXT_MODE_Pos (4)

SYS_T::VREFCTL: EXT_MODE Position

Definition at line 4022 of file Nano1X2Series.h.

## ◆ SYS_VREFCTL_REG_EN_Msk

#define SYS_VREFCTL_REG_EN_Msk (0x1ul << SYS_VREFCTL_REG_EN_Pos)

SYS_T::VREFCTL: REG_EN Mask

Definition at line 4017 of file Nano1X2Series.h.

## ◆ SYS_VREFCTL_REG_EN_Pos

#define SYS_VREFCTL_REG_EN_Pos (1)

SYS_T::VREFCTL: REG_EN Position

Definition at line 4016 of file Nano1X2Series.h.

## ◆ SYS_VREFCTL_SEL25_Msk

#define SYS_VREFCTL_SEL25_Msk (0x3ul << SYS_VREFCTL_SEL25_Pos)

SYS_T::VREFCTL: SEL25 Mask

Definition at line 4020 of file Nano1X2Series.h.

## ◆ SYS_VREFCTL_SEL25_Pos

#define SYS_VREFCTL_SEL25_Pos (2)

SYS_T::VREFCTL: SEL25 Position

Definition at line 4019 of file Nano1X2Series.h.

## ◆ SYS_VREFCTL_VREF_TRIM_Msk

#define SYS_VREFCTL_VREF_TRIM_Msk (0xful << SYS_VREFCTL_VREF_TRIM_Pos)

SYS_T::VREFCTL: VREF_TRIM Mask

Definition at line 4026 of file Nano1X2Series.h.

## ◆ SYS_VREFCTL_VREF_TRIM_Pos

#define SYS_VREFCTL_VREF_TRIM_Pos (8)

SYS_T::VREFCTL: VREF_TRIM Position

Definition at line 4025 of file Nano1X2Series.h.

## ◆ TIMER_CMPR_TMR_CMP_Msk

#define TIMER_CMPR_TMR_CMP_Msk (0xfffffful << TIMER_CMPR_TMR_CMP_Pos)

TIMER_T::CMPR: TMR_CMP Mask

Definition at line 9419 of file Nano1X2Series.h.

## ◆ TIMER_CMPR_TMR_CMP_Pos

#define TIMER_CMPR_TMR_CMP_Pos (0)

TIMER_T::CMPR: TMR_CMP Position

Definition at line 9418 of file Nano1X2Series.h.

## ◆ TIMER_CTL_ACMP_EN_TMR_Msk

#define TIMER_CTL_ACMP_EN_TMR_Msk (0x1ul << TIMER_CTL_ACMP_EN_TMR_Pos)

TIMER_T::CTL: ACMP_EN_TMR Mask

Definition at line 9368 of file Nano1X2Series.h.

## ◆ TIMER_CTL_ACMP_EN_TMR_Pos

#define TIMER_CTL_ACMP_EN_TMR_Pos (6)

TIMER_T::CTL: ACMP_EN_TMR Position

Definition at line 9367 of file Nano1X2Series.h.

## ◆ TIMER_CTL_ADC_TEEN_Msk

#define TIMER_CTL_ADC_TEEN_Msk (0x1ul << TIMER_CTL_ADC_TEEN_Pos)

TIMER_T::CTL: ADC_TEEN Mask

Definition at line 9374 of file Nano1X2Series.h.

## ◆ TIMER_CTL_ADC_TEEN_Pos

#define TIMER_CTL_ADC_TEEN_Pos (8)

TIMER_T::CTL: ADC_TEEN Position

Definition at line 9373 of file Nano1X2Series.h.

## ◆ TIMER_CTL_CAP_TRG_EN_Msk

#define TIMER_CTL_CAP_TRG_EN_Msk (0x1ul << TIMER_CTL_CAP_TRG_EN_Pos)

TIMER_T::CTL: CAP_TRG_EN Mask

Definition at line 9383 of file Nano1X2Series.h.

## ◆ TIMER_CTL_CAP_TRG_EN_Pos

#define TIMER_CTL_CAP_TRG_EN_Pos (11)

TIMER_T::CTL: CAP_TRG_EN Position

Definition at line 9382 of file Nano1X2Series.h.

## ◆ TIMER_CTL_DAC_TEEN_Msk

#define TIMER_CTL_DAC_TEEN_Msk (0x1ul << TIMER_CTL_DAC_TEEN_Pos)

TIMER_T::CTL: DAC_TEEN Mask

Definition at line 9377 of file Nano1X2Series.h.

## ◆ TIMER_CTL_DAC_TEEN_Pos

#define TIMER_CTL_DAC_TEEN_Pos (9)

TIMER_T::CTL: DAC_TEEN Position

Definition at line 9376 of file Nano1X2Series.h.

## ◆ TIMER_CTL_DBGACK_EN_Msk

#define TIMER_CTL_DBGACK_EN_Msk (0x1ul << TIMER_CTL_DBGACK_EN_Pos)

TIMER_T::CTL: DBGACK_EN Mask

Definition at line 9362 of file Nano1X2Series.h.

## ◆ TIMER_CTL_DBGACK_EN_Pos

#define TIMER_CTL_DBGACK_EN_Pos (3)

TIMER_T::CTL: DBGACK_EN Position

Definition at line 9361 of file Nano1X2Series.h.

## ◆ TIMER_CTL_EVENT_EDGE_Msk

#define TIMER_CTL_EVENT_EDGE_Msk (0x1ul << TIMER_CTL_EVENT_EDGE_Pos)

TIMER_T::CTL: EVENT_EDGE Mask

Definition at line 9389 of file Nano1X2Series.h.

## ◆ TIMER_CTL_EVENT_EDGE_Pos

#define TIMER_CTL_EVENT_EDGE_Pos (13)

TIMER_T::CTL: EVENT_EDGE Position

Definition at line 9388 of file Nano1X2Series.h.

## ◆ TIMER_CTL_EVENT_EN_Msk

#define TIMER_CTL_EVENT_EN_Msk (0x1ul << TIMER_CTL_EVENT_EN_Pos)

TIMER_T::CTL: EVENT_EN Mask

Definition at line 9386 of file Nano1X2Series.h.

## ◆ TIMER_CTL_EVENT_EN_Pos

#define TIMER_CTL_EVENT_EN_Pos (12)

TIMER_T::CTL: EVENT_EN Position

Definition at line 9385 of file Nano1X2Series.h.

## ◆ TIMER_CTL_EVNT_DEB_EN_Msk

#define TIMER_CTL_EVNT_DEB_EN_Msk (0x1ul << TIMER_CTL_EVNT_DEB_EN_Pos)

TIMER_T::CTL: EVNT_DEB_EN Mask

Definition at line 9392 of file Nano1X2Series.h.

## ◆ TIMER_CTL_EVNT_DEB_EN_Pos

#define TIMER_CTL_EVNT_DEB_EN_Pos (14)

TIMER_T::CTL: EVNT_DEB_EN Position

Definition at line 9391 of file Nano1X2Series.h.

## ◆ TIMER_CTL_INTR_TRG_EN_Msk

#define TIMER_CTL_INTR_TRG_EN_Msk (0x1ul << TIMER_CTL_INTR_TRG_EN_Pos)

TIMER_T::CTL: INTR_TRG_EN Mask

Definition at line 9410 of file Nano1X2Series.h.

## ◆ TIMER_CTL_INTR_TRG_EN_Pos

#define TIMER_CTL_INTR_TRG_EN_Pos (24)

TIMER_T::CTL: INTR_TRG_EN Position

Definition at line 9409 of file Nano1X2Series.h.

## ◆ TIMER_CTL_INTR_TRG_MODE_Msk

#define TIMER_CTL_INTR_TRG_MODE_Msk (0x1ul << TIMER_CTL_INTR_TRG_MODE_Pos)

TIMER_T::CTL: INTR_TRG_MODE Mask

Definition at line 9413 of file Nano1X2Series.h.

## ◆ TIMER_CTL_INTR_TRG_MODE_Pos

#define TIMER_CTL_INTR_TRG_MODE_Pos (25)

TIMER_T::CTL: INTR_TRG_MODE Position

Definition at line 9412 of file Nano1X2Series.h.

## ◆ TIMER_CTL_MODE_SEL_Msk

#define TIMER_CTL_MODE_SEL_Msk (0x3ul << TIMER_CTL_MODE_SEL_Pos)

TIMER_T::CTL: MODE_SEL Mask

Definition at line 9365 of file Nano1X2Series.h.

## ◆ TIMER_CTL_MODE_SEL_Pos

#define TIMER_CTL_MODE_SEL_Pos (4)

TIMER_T::CTL: MODE_SEL Position

Definition at line 9364 of file Nano1X2Series.h.

## ◆ TIMER_CTL_PDMA_TEEN_Msk

#define TIMER_CTL_PDMA_TEEN_Msk (0x1ul << TIMER_CTL_PDMA_TEEN_Pos)

TIMER_T::CTL: PDMA_TEEN Mask

Definition at line 9380 of file Nano1X2Series.h.

## ◆ TIMER_CTL_PDMA_TEEN_Pos

#define TIMER_CTL_PDMA_TEEN_Pos (10)

TIMER_T::CTL: PDMA_TEEN Position

Definition at line 9379 of file Nano1X2Series.h.

## ◆ TIMER_CTL_SW_RST_Msk

#define TIMER_CTL_SW_RST_Msk (0x1ul << TIMER_CTL_SW_RST_Pos)

TIMER_T::CTL: SW_RST Mask

Definition at line 9356 of file Nano1X2Series.h.

## ◆ TIMER_CTL_SW_RST_Pos

#define TIMER_CTL_SW_RST_Pos (1)

TIMER_T::CTL: SW_RST Position

Definition at line 9355 of file Nano1X2Series.h.

## ◆ TIMER_CTL_TCAP_CNT_MODE_Msk

#define TIMER_CTL_TCAP_CNT_MODE_Msk (0x1ul << TIMER_CTL_TCAP_CNT_MODE_Pos)

TIMER_T::CTL: TCAP_CNT_MODE Mask

Definition at line 9404 of file Nano1X2Series.h.

## ◆ TIMER_CTL_TCAP_CNT_MODE_Pos

#define TIMER_CTL_TCAP_CNT_MODE_Pos (20)

TIMER_T::CTL: TCAP_CNT_MODE Position

Definition at line 9403 of file Nano1X2Series.h.

## ◆ TIMER_CTL_TCAP_DEB_EN_Msk

#define TIMER_CTL_TCAP_DEB_EN_Msk (0x1ul << TIMER_CTL_TCAP_DEB_EN_Pos)

TIMER_T::CTL: TCAP_DEB_EN Mask

Definition at line 9407 of file Nano1X2Series.h.

## ◆ TIMER_CTL_TCAP_DEB_EN_Pos

#define TIMER_CTL_TCAP_DEB_EN_Pos (22)

TIMER_T::CTL: TCAP_DEB_EN Position

Definition at line 9406 of file Nano1X2Series.h.

## ◆ TIMER_CTL_TCAP_EDGE_Msk

#define TIMER_CTL_TCAP_EDGE_Msk (0x3ul << TIMER_CTL_TCAP_EDGE_Pos)

TIMER_T::CTL: TCAP_EDGE Mask

Definition at line 9401 of file Nano1X2Series.h.

## ◆ TIMER_CTL_TCAP_EDGE_Pos

#define TIMER_CTL_TCAP_EDGE_Pos (18)

TIMER_T::CTL: TCAP_EDGE Position

Definition at line 9400 of file Nano1X2Series.h.

## ◆ TIMER_CTL_TCAP_EN_Msk

#define TIMER_CTL_TCAP_EN_Msk (0x1ul << TIMER_CTL_TCAP_EN_Pos)

TIMER_T::CTL: TCAP_EN Mask

Definition at line 9395 of file Nano1X2Series.h.

## ◆ TIMER_CTL_TCAP_EN_Pos

#define TIMER_CTL_TCAP_EN_Pos (16)

TIMER_T::CTL: TCAP_EN Position

Definition at line 9394 of file Nano1X2Series.h.

## ◆ TIMER_CTL_TCAP_MODE_Msk

#define TIMER_CTL_TCAP_MODE_Msk (0x1ul << TIMER_CTL_TCAP_MODE_Pos)

TIMER_T::CTL: TCAP_MODE Mask

Definition at line 9398 of file Nano1X2Series.h.

## ◆ TIMER_CTL_TCAP_MODE_Pos

#define TIMER_CTL_TCAP_MODE_Pos (17)

TIMER_T::CTL: TCAP_MODE Position

Definition at line 9397 of file Nano1X2Series.h.

## ◆ TIMER_CTL_TMR_ACT_Msk

#define TIMER_CTL_TMR_ACT_Msk (0x1ul << TIMER_CTL_TMR_ACT_Pos)

TIMER_T::CTL: TMR_ACT Mask

Definition at line 9371 of file Nano1X2Series.h.

## ◆ TIMER_CTL_TMR_ACT_Pos

#define TIMER_CTL_TMR_ACT_Pos (7)

TIMER_T::CTL: TMR_ACT Position

Definition at line 9370 of file Nano1X2Series.h.

## ◆ TIMER_CTL_TMR_EN_Msk

#define TIMER_CTL_TMR_EN_Msk (0x1ul << TIMER_CTL_TMR_EN_Pos)

TIMER_T::CTL: TMR_EN Mask

Definition at line 9353 of file Nano1X2Series.h.

## ◆ TIMER_CTL_TMR_EN_Pos

#define TIMER_CTL_TMR_EN_Pos (0)

    @addtogroup TMR_CONST TIMER Bit Field Definition
    Constant Definitions for TIMER Controller

TIMER_T::CTL: TMR_EN Position

Definition at line 9352 of file Nano1X2Series.h.

## ◆ TIMER_CTL_WAKE_EN_Msk

#define TIMER_CTL_WAKE_EN_Msk (0x1ul << TIMER_CTL_WAKE_EN_Pos)

TIMER_T::CTL: WAKE_EN Mask

Definition at line 9359 of file Nano1X2Series.h.

## ◆ TIMER_CTL_WAKE_EN_Pos

#define TIMER_CTL_WAKE_EN_Pos (2)

TIMER_T::CTL: WAKE_EN Position

Definition at line 9358 of file Nano1X2Series.h.

## ◆ TIMER_DR_RSTACT_Msk

#define TIMER_DR_RSTACT_Msk (0x1ul << TIMER_DR_RSTACT_Pos)

TIMER_T::DR: RSTACT Mask

Definition at line 9446 of file Nano1X2Series.h.

## ◆ TIMER_DR_RSTACT_Pos

#define TIMER_DR_RSTACT_Pos (31)

TIMER_T::DR: RSTACT Position

Definition at line 9445 of file Nano1X2Series.h.

## ◆ TIMER_DR_TDR_Msk

#define TIMER_DR_TDR_Msk (0xfffffful << TIMER_DR_TDR_Pos)

TIMER_T::DR: TDR Mask

Definition at line 9443 of file Nano1X2Series.h.

## ◆ TIMER_DR_TDR_Pos

#define TIMER_DR_TDR_Pos (0)

TIMER_T::DR: TDR Position

Definition at line 9442 of file Nano1X2Series.h.

## ◆ TIMER_ECTL_CAP_SRC_Msk

#define TIMER_ECTL_CAP_SRC_Msk (0x1ul << TIMER_ECTL_CAP_SRC_Pos)

TIMER_T::ECTL: CAP_SRC Mask

Definition at line 9464 of file Nano1X2Series.h.

## ◆ TIMER_ECTL_CAP_SRC_Pos

#define TIMER_ECTL_CAP_SRC_Pos (16)

TIMER_T::ECTL: CAP_SRC Position

Definition at line 9463 of file Nano1X2Series.h.

## ◆ TIMER_ECTL_EVNT_CNT_SRC_Msk

#define TIMER_ECTL_EVNT_CNT_SRC_Msk (0x1ul << TIMER_ECTL_EVNT_CNT_SRC_Pos)

TIMER_T::ECTL: EVNT_CNT_SRC Mask

Definition at line 9458 of file Nano1X2Series.h.

## ◆ TIMER_ECTL_EVNT_CNT_SRC_Pos

#define TIMER_ECTL_EVNT_CNT_SRC_Pos (8)

TIMER_T::ECTL: EVNT_CNT_SRC Position

Definition at line 9457 of file Nano1X2Series.h.

## ◆ TIMER_ECTL_EVNT_DROP_CNT_Msk

#define TIMER_ECTL_EVNT_DROP_CNT_Msk (0xfful << TIMER_ECTL_EVNT_DROP_CNT_Pos)

TIMER_T::ECTL: EVNT_DROP_CNT Mask

Definition at line 9467 of file Nano1X2Series.h.

## ◆ TIMER_ECTL_EVNT_DROP_CNT_Pos

#define TIMER_ECTL_EVNT_DROP_CNT_Pos (24)

TIMER_T::ECTL: EVNT_DROP_CNT Position

Definition at line 9466 of file Nano1X2Series.h.

## ◆ TIMER_ECTL_EVNT_GEN_EN_Msk

#define TIMER_ECTL_EVNT_GEN_EN_Msk (0x1ul << TIMER_ECTL_EVNT_GEN_EN_Pos)

TIMER_T::ECTL: EVNT_GEN_EN Mask

Definition at line 9452 of file Nano1X2Series.h.

## ◆ TIMER_ECTL_EVNT_GEN_EN_Pos

#define TIMER_ECTL_EVNT_GEN_EN_Pos (0)

TIMER_T::ECTL: EVNT_GEN_EN Position

Definition at line 9451 of file Nano1X2Series.h.

## ◆ TIMER_ECTL_EVNT_GEN_POL_Msk

#define TIMER_ECTL_EVNT_GEN_POL_Msk (0x1ul << TIMER_ECTL_EVNT_GEN_POL_Pos)

TIMER_T::ECTL: EVNT_GEN_POL Mask

Definition at line 9455 of file Nano1X2Series.h.

## ◆ TIMER_ECTL_EVNT_GEN_POL_Pos

#define TIMER_ECTL_EVNT_GEN_POL_Pos (1)

TIMER_T::ECTL: EVNT_GEN_POL Position

Definition at line 9454 of file Nano1X2Series.h.

## ◆ TIMER_ECTL_EVNT_GEN_SRC_Msk

#define TIMER_ECTL_EVNT_GEN_SRC_Msk (0x1ul << TIMER_ECTL_EVNT_GEN_SRC_Pos)

TIMER_T::ECTL: EVNT_GEN_SRC Mask

Definition at line 9461 of file Nano1X2Series.h.

## ◆ TIMER_ECTL_EVNT_GEN_SRC_Pos

#define TIMER_ECTL_EVNT_GEN_SRC_Pos (12)

TIMER_T::ECTL: EVNT_GEN_SRC Position

Definition at line 9460 of file Nano1X2Series.h.

## ◆ TIMER_IER_TCAP_IE_Msk

#define TIMER_IER_TCAP_IE_Msk (0x1ul << TIMER_IER_TCAP_IE_Pos)

TIMER_T::IER: TCAP_IE Mask

Definition at line 9425 of file Nano1X2Series.h.

## ◆ TIMER_IER_TCAP_IE_Pos

#define TIMER_IER_TCAP_IE_Pos (1)

TIMER_T::IER: TCAP_IE Position

Definition at line 9424 of file Nano1X2Series.h.

## ◆ TIMER_IER_TMR_IE_Msk

#define TIMER_IER_TMR_IE_Msk (0x1ul << TIMER_IER_TMR_IE_Pos)

TIMER_T::IER: TMR_IE Mask

Definition at line 9422 of file Nano1X2Series.h.

## ◆ TIMER_IER_TMR_IE_Pos

#define TIMER_IER_TMR_IE_Pos (0)

TIMER_T::IER: TMR_IE Position

Definition at line 9421 of file Nano1X2Series.h.

## ◆ TIMER_ISR_NCAP_DET_STS_Msk

#define TIMER_ISR_NCAP_DET_STS_Msk (0x1ul << TIMER_ISR_NCAP_DET_STS_Pos)

TIMER_T::ISR: NCAP_DET_STS Mask

Definition at line 9437 of file Nano1X2Series.h.

## ◆ TIMER_ISR_NCAP_DET_STS_Pos

#define TIMER_ISR_NCAP_DET_STS_Pos (5)

TIMER_T::ISR: NCAP_DET_STS Position

Definition at line 9436 of file Nano1X2Series.h.

## ◆ TIMER_ISR_TCAP_IS_FEDGE_Msk

#define TIMER_ISR_TCAP_IS_FEDGE_Msk (0x1ul << TIMER_ISR_TCAP_IS_FEDGE_Pos)

TIMER_T::ISR: TCAP_IS_FEDGE Mask

Definition at line 9440 of file Nano1X2Series.h.

## ◆ TIMER_ISR_TCAP_IS_FEDGE_Pos

#define TIMER_ISR_TCAP_IS_FEDGE_Pos (6)

TIMER_T::ISR: TCAP_IS_FEDGE Position

Definition at line 9439 of file Nano1X2Series.h.

## ◆ TIMER_ISR_TCAP_IS_Msk

#define TIMER_ISR_TCAP_IS_Msk (0x1ul << TIMER_ISR_TCAP_IS_Pos)

TIMER_T::ISR: TCAP_IS Mask

Definition at line 9431 of file Nano1X2Series.h.

## ◆ TIMER_ISR_TCAP_IS_Pos

#define TIMER_ISR_TCAP_IS_Pos (1)

TIMER_T::ISR: TCAP_IS Position

Definition at line 9430 of file Nano1X2Series.h.

## ◆ TIMER_ISR_TMR_IS_Msk

#define TIMER_ISR_TMR_IS_Msk (0x1ul << TIMER_ISR_TMR_IS_Pos)

TIMER_T::ISR: TMR_IS Mask

Definition at line 9428 of file Nano1X2Series.h.

## ◆ TIMER_ISR_TMR_IS_Pos

#define TIMER_ISR_TMR_IS_Pos (0)

TIMER_T::ISR: TMR_IS Position

Definition at line 9427 of file Nano1X2Series.h.

## ◆ TIMER_ISR_TMR_WAKE_STS_Msk

#define TIMER_ISR_TMR_WAKE_STS_Msk (0x1ul << TIMER_ISR_TMR_WAKE_STS_Pos)

TIMER_T::ISR: TMR_WAKE_STS Mask

Definition at line 9434 of file Nano1X2Series.h.

## ◆ TIMER_ISR_TMR_WAKE_STS_Pos

#define TIMER_ISR_TMR_WAKE_STS_Pos (4)

TIMER_T::ISR: TMR_WAKE_STS Position

Definition at line 9433 of file Nano1X2Series.h.

## ◆ TIMER_PRECNT_PRESCALE_CNT_Msk

#define TIMER_PRECNT_PRESCALE_CNT_Msk (0xfful << TIMER_PRECNT_PRESCALE_CNT_Pos)

TIMER_T::PRECNT: PRESCALE_CNT Mask

Definition at line 9416 of file Nano1X2Series.h.

## ◆ TIMER_PRECNT_PRESCALE_CNT_Pos

#define TIMER_PRECNT_PRESCALE_CNT_Pos (0)

TIMER_T::PRECNT: PRESCALE_CNT Position

Definition at line 9415 of file Nano1X2Series.h.

## ◆ TIMER_TCAP_CAP_Msk

#define TIMER_TCAP_CAP_Msk (0xfffffful << TIMER_TCAP_CAP_Pos)

TIMER_T::TCAP: CAP Mask

Definition at line 9449 of file Nano1X2Series.h.

## ◆ TIMER_TCAP_CAP_Pos

#define TIMER_TCAP_CAP_Pos (0)

TIMER_T::TCAP: CAP Position

Definition at line 9448 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_ADDR_PID_MATCH_Msk

#define UART_ALT_CTL_ADDR_PID_MATCH_Msk (0xfful << UART_ALT_CTL_ADDR_PID_MATCH_Pos)

UART_T::ALT_CTL: ADDR_PID_MATCH Mask

Definition at line 10284 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_ADDR_PID_MATCH_Pos

#define UART_ALT_CTL_ADDR_PID_MATCH_Pos (24)

UART_T::ALT_CTL: ADDR_PID_MATCH Position

Definition at line 10283 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_Bit_ERR_EN_Msk

#define UART_ALT_CTL_Bit_ERR_EN_Msk (0x1ul << UART_ALT_CTL_Bit_ERR_EN_Pos)

UART_T::ALT_CTL: Bit_ERR_EN Mask

Definition at line 10269 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_Bit_ERR_EN_Pos

#define UART_ALT_CTL_Bit_ERR_EN_Pos (8)

UART_T::ALT_CTL: Bit_ERR_EN Position

Definition at line 10268 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_LIN_HEAD_SEL_Msk

#define UART_ALT_CTL_LIN_HEAD_SEL_Msk (0x3ul << UART_ALT_CTL_LIN_HEAD_SEL_Pos)

UART_T::ALT_CTL: LIN_HEAD_SEL Mask

Definition at line 10260 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_LIN_HEAD_SEL_Pos

#define UART_ALT_CTL_LIN_HEAD_SEL_Pos (4)

UART_T::ALT_CTL: LIN_HEAD_SEL Position

Definition at line 10259 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_LIN_RX_EN_Msk

#define UART_ALT_CTL_LIN_RX_EN_Msk (0x1ul << UART_ALT_CTL_LIN_RX_EN_Pos)

UART_T::ALT_CTL: LIN_RX_EN Mask

Definition at line 10263 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_LIN_RX_EN_Pos

#define UART_ALT_CTL_LIN_RX_EN_Pos (6)

UART_T::ALT_CTL: LIN_RX_EN Position

Definition at line 10262 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_LIN_TX_BCNT_Msk

#define UART_ALT_CTL_LIN_TX_BCNT_Msk (0x7ul << UART_ALT_CTL_LIN_TX_BCNT_Pos)

UART_T::ALT_CTL: LIN_TX_BCNT Mask

Definition at line 10257 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_LIN_TX_BCNT_Pos

#define UART_ALT_CTL_LIN_TX_BCNT_Pos (0)

UART_T::ALT_CTL: LIN_TX_BCNT Position

Definition at line 10256 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_LIN_TX_EN_Msk

#define UART_ALT_CTL_LIN_TX_EN_Msk (0x1ul << UART_ALT_CTL_LIN_TX_EN_Pos)

UART_T::ALT_CTL: LIN_TX_EN Mask

Definition at line 10266 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_LIN_TX_EN_Pos

#define UART_ALT_CTL_LIN_TX_EN_Pos (7)

UART_T::ALT_CTL: LIN_TX_EN Position

Definition at line 10265 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_RS485_AAD_Msk

#define UART_ALT_CTL_RS485_AAD_Msk (0x1ul << UART_ALT_CTL_RS485_AAD_Pos)

UART_T::ALT_CTL: RS485_AAD Mask

Definition at line 10275 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_RS485_AAD_Pos

#define UART_ALT_CTL_RS485_AAD_Pos (17)

UART_T::ALT_CTL: RS485_AAD Position

Definition at line 10274 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_RS485_ADD_EN_Msk

#define UART_ALT_CTL_RS485_ADD_EN_Msk (0x1ul << UART_ALT_CTL_RS485_ADD_EN_Pos)

UART_T::ALT_CTL: RS485_ADD_EN Mask

Definition at line 10281 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_RS485_ADD_EN_Pos

#define UART_ALT_CTL_RS485_ADD_EN_Pos (19)

UART_T::ALT_CTL: RS485_ADD_EN Position

Definition at line 10280 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_RS485_AUD_Msk

#define UART_ALT_CTL_RS485_AUD_Msk (0x1ul << UART_ALT_CTL_RS485_AUD_Pos)

UART_T::ALT_CTL: RS485_AUD Mask

Definition at line 10278 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_RS485_AUD_Pos

#define UART_ALT_CTL_RS485_AUD_Pos (18)

UART_T::ALT_CTL: RS485_AUD Position

Definition at line 10277 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_RS485_NMM_Msk

#define UART_ALT_CTL_RS485_NMM_Msk (0x1ul << UART_ALT_CTL_RS485_NMM_Pos)

UART_T::ALT_CTL: RS485_NMM Mask

Definition at line 10272 of file Nano1X2Series.h.

## ◆ UART_ALT_CTL_RS485_NMM_Pos

#define UART_ALT_CTL_RS485_NMM_Pos (16)

UART_T::ALT_CTL: RS485_NMM Position

Definition at line 10271 of file Nano1X2Series.h.

## ◆ UART_BAUD_BRD_Msk

#define UART_BAUD_BRD_Msk (0xfffful << UART_BAUD_BRD_Pos)

UART_T::BAUD: BRD Mask

Definition at line 10242 of file Nano1X2Series.h.

## ◆ UART_BAUD_BRD_Pos

#define UART_BAUD_BRD_Pos (0)

UART_T::BAUD: BRD Position

Definition at line 10241 of file Nano1X2Series.h.

## ◆ UART_BAUD_DIV_16_EN_Msk

#define UART_BAUD_DIV_16_EN_Msk (0x1ul << UART_BAUD_DIV_16_EN_Pos)

UART_T::BAUD: DIV_16_EN Mask

Definition at line 10245 of file Nano1X2Series.h.

## ◆ UART_BAUD_DIV_16_EN_Pos

#define UART_BAUD_DIV_16_EN_Pos (31)

UART_T::BAUD: DIV_16_EN Position

Definition at line 10244 of file Nano1X2Series.h.

## ◆ UART_BR_COMP_BR_COMP_DEC_Msk

#define UART_BR_COMP_BR_COMP_DEC_Msk (0x1ul << UART_BR_COMP_BR_COMP_DEC_Pos)

UART_T::BR_COMP: BR_COMP_DEC Mask

Definition at line 10293 of file Nano1X2Series.h.

## ◆ UART_BR_COMP_BR_COMP_DEC_Pos

#define UART_BR_COMP_BR_COMP_DEC_Pos (31)

UART_T::BR_COMP: BR_COMP_DEC Position

Definition at line 10292 of file Nano1X2Series.h.

## ◆ UART_BR_COMP_BR_COMP_Msk

#define UART_BR_COMP_BR_COMP_Msk (0x1fful << UART_BR_COMP_BR_COMP_Pos)

UART_T::BR_COMP: BR_COMP Mask

Definition at line 10290 of file Nano1X2Series.h.

## ◆ UART_BR_COMP_BR_COMP_Pos

#define UART_BR_COMP_BR_COMP_Pos (0)

UART_T::BR_COMP: BR_COMP Position

Definition at line 10289 of file Nano1X2Series.h.

## ◆ UART_CTL_ABAUD_EN_Msk

#define UART_CTL_ABAUD_EN_Msk (0x1ul << UART_CTL_ABAUD_EN_Pos)

UART_T::CTL: ABAUD_EN Mask

Definition at line 10074 of file Nano1X2Series.h.

## ◆ UART_CTL_ABAUD_EN_Pos

#define UART_CTL_ABAUD_EN_Pos (12)

UART_T::CTL: ABAUD_EN Position

Definition at line 10073 of file Nano1X2Series.h.

## ◆ UART_CTL_AUTO_CTS_EN_Msk

#define UART_CTL_AUTO_CTS_EN_Msk (0x1ul << UART_CTL_AUTO_CTS_EN_Pos)

UART_T::CTL: AUTO_CTS_EN Mask

Definition at line 10059 of file Nano1X2Series.h.

## ◆ UART_CTL_AUTO_CTS_EN_Pos

#define UART_CTL_AUTO_CTS_EN_Pos (5)

UART_T::CTL: AUTO_CTS_EN Position

Definition at line 10058 of file Nano1X2Series.h.

## ◆ UART_CTL_AUTO_RTS_EN_Msk

#define UART_CTL_AUTO_RTS_EN_Msk (0x1ul << UART_CTL_AUTO_RTS_EN_Pos)

UART_T::CTL: AUTO_RTS_EN Mask

Definition at line 10056 of file Nano1X2Series.h.

## ◆ UART_CTL_AUTO_RTS_EN_Pos

#define UART_CTL_AUTO_RTS_EN_Pos (4)

UART_T::CTL: AUTO_RTS_EN Position

Definition at line 10055 of file Nano1X2Series.h.

## ◆ UART_CTL_DMA_RX_EN_Msk

#define UART_CTL_DMA_RX_EN_Msk (0x1ul << UART_CTL_DMA_RX_EN_Pos)

UART_T::CTL: DMA_RX_EN Mask

Definition at line 10062 of file Nano1X2Series.h.

## ◆ UART_CTL_DMA_RX_EN_Pos

#define UART_CTL_DMA_RX_EN_Pos (6)

UART_T::CTL: DMA_RX_EN Position

Definition at line 10061 of file Nano1X2Series.h.

## ◆ UART_CTL_DMA_TX_EN_Msk

#define UART_CTL_DMA_TX_EN_Msk (0x1ul << UART_CTL_DMA_TX_EN_Pos)

UART_T::CTL: DMA_TX_EN Mask

Definition at line 10065 of file Nano1X2Series.h.

## ◆ UART_CTL_DMA_TX_EN_Pos

#define UART_CTL_DMA_TX_EN_Pos (7)

UART_T::CTL: DMA_TX_EN Position

Definition at line 10064 of file Nano1X2Series.h.

## ◆ UART_CTL_PWM_SEL_Msk

#define UART_CTL_PWM_SEL_Msk (0x7ul << UART_CTL_PWM_SEL_Pos)

UART_T::CTL: PWM_SEL Mask

Definition at line 10083 of file Nano1X2Series.h.

## ◆ UART_CTL_PWM_SEL_Pos

#define UART_CTL_PWM_SEL_Pos (24)

UART_T::CTL: PWM_SEL Position

Definition at line 10082 of file Nano1X2Series.h.

## ◆ UART_CTL_RX_DIS_Msk

#define UART_CTL_RX_DIS_Msk (0x1ul << UART_CTL_RX_DIS_Pos)

UART_T::CTL: RX_DIS Mask

Definition at line 10050 of file Nano1X2Series.h.

## ◆ UART_CTL_RX_DIS_Pos

#define UART_CTL_RX_DIS_Pos (2)

UART_T::CTL: RX_DIS Position

Definition at line 10049 of file Nano1X2Series.h.

## ◆ UART_CTL_RX_RST_Msk

#define UART_CTL_RX_RST_Msk (0x1ul << UART_CTL_RX_RST_Pos)

UART_T::CTL: RX_RST Mask

Definition at line 10044 of file Nano1X2Series.h.

## ◆ UART_CTL_RX_RST_Pos

#define UART_CTL_RX_RST_Pos (0)

UART_T::CTL: RX_RST Position

Definition at line 10043 of file Nano1X2Series.h.

## ◆ UART_CTL_TX_DIS_Msk

#define UART_CTL_TX_DIS_Msk (0x1ul << UART_CTL_TX_DIS_Pos)

UART_T::CTL: TX_DIS Mask

Definition at line 10053 of file Nano1X2Series.h.

## ◆ UART_CTL_TX_DIS_Pos

#define UART_CTL_TX_DIS_Pos (3)

UART_T::CTL: TX_DIS Position

Definition at line 10052 of file Nano1X2Series.h.

## ◆ UART_CTL_TX_RST_Msk

#define UART_CTL_TX_RST_Msk (0x1ul << UART_CTL_TX_RST_Pos)

UART_T::CTL: TX_RST Mask

Definition at line 10047 of file Nano1X2Series.h.

## ◆ UART_CTL_TX_RST_Pos

#define UART_CTL_TX_RST_Pos (1)

UART_T::CTL: TX_RST Position

Definition at line 10046 of file Nano1X2Series.h.

## ◆ UART_CTL_WAKE_CTS_EN_Msk

#define UART_CTL_WAKE_CTS_EN_Msk (0x1ul << UART_CTL_WAKE_CTS_EN_Pos)

UART_T::CTL: WAKE_CTS_EN Mask

Definition at line 10068 of file Nano1X2Series.h.

## ◆ UART_CTL_WAKE_CTS_EN_Pos

#define UART_CTL_WAKE_CTS_EN_Pos (8)

UART_T::CTL: WAKE_CTS_EN Position

Definition at line 10067 of file Nano1X2Series.h.

## ◆ UART_CTL_WAKE_DATA_EN_Msk

#define UART_CTL_WAKE_DATA_EN_Msk (0x1ul << UART_CTL_WAKE_DATA_EN_Pos)

UART_T::CTL: WAKE_DATA_EN Mask

Definition at line 10071 of file Nano1X2Series.h.

## ◆ UART_CTL_WAKE_DATA_EN_Pos

#define UART_CTL_WAKE_DATA_EN_Pos (9)

UART_T::CTL: WAKE_DATA_EN Position

Definition at line 10070 of file Nano1X2Series.h.

## ◆ UART_CTL_WAKE_RS485_AAD_EN_Msk

#define UART_CTL_WAKE_RS485_AAD_EN_Msk (0x1ul << UART_CTL_WAKE_RS485_AAD_EN_Pos)

UART_T::CTL: WAKE_RS485_AAD_EN Mask

Definition at line 10080 of file Nano1X2Series.h.

## ◆ UART_CTL_WAKE_RS485_AAD_EN_Pos

#define UART_CTL_WAKE_RS485_AAD_EN_Pos (18)

UART_T::CTL: WAKE_RS485_AAD_EN Position

Definition at line 10079 of file Nano1X2Series.h.

## ◆ UART_CTL_WAKE_THRESH_EN_Msk

#define UART_CTL_WAKE_THRESH_EN_Msk (0x1ul << UART_CTL_WAKE_THRESH_EN_Pos)

UART_T::CTL: WAKE_THRESH_EN Mask

Definition at line 10077 of file Nano1X2Series.h.

## ◆ UART_CTL_WAKE_THRESH_EN_Pos

#define UART_CTL_WAKE_THRESH_EN_Pos (17)

UART_T::CTL: WAKE_THRESH_EN Position

Definition at line 10076 of file Nano1X2Series.h.

## ◆ UART_DAT_DAT_Msk

#define UART_DAT_DAT_Msk (0xfful << UART_DAT_DAT_Pos)

UART_T::DAT: DAT Mask

Definition at line 10041 of file Nano1X2Series.h.

## ◆ UART_DAT_DAT_Pos

#define UART_DAT_DAT_Pos (0)

    @addtogroup UART_CONST UART Bit Field Definition
    Constant Definitions for UART Controller

UART_T::DAT: DAT Position

Definition at line 10040 of file Nano1X2Series.h.

## ◆ UART_FSR_BI_F_Msk

#define UART_FSR_BI_F_Msk (0x1ul << UART_FSR_BI_F_Pos)

UART_T::FSR: BI_F Mask

Definition at line 10200 of file Nano1X2Series.h.

## ◆ UART_FSR_BI_F_Pos

#define UART_FSR_BI_F_Pos (6)

UART_T::FSR: BI_F Position

Definition at line 10199 of file Nano1X2Series.h.

## ◆ UART_FSR_FE_F_Msk

#define UART_FSR_FE_F_Msk (0x1ul << UART_FSR_FE_F_Pos)

UART_T::FSR: FE_F Mask

Definition at line 10197 of file Nano1X2Series.h.

## ◆ UART_FSR_FE_F_Pos

#define UART_FSR_FE_F_Pos (5)

UART_T::FSR: FE_F Position

Definition at line 10196 of file Nano1X2Series.h.

## ◆ UART_FSR_PE_F_Msk

#define UART_FSR_PE_F_Msk (0x1ul << UART_FSR_PE_F_Pos)

UART_T::FSR: PE_F Mask

Definition at line 10194 of file Nano1X2Series.h.

## ◆ UART_FSR_PE_F_Pos

#define UART_FSR_PE_F_Pos (4)

UART_T::FSR: PE_F Position

Definition at line 10193 of file Nano1X2Series.h.

## ◆ UART_FSR_RX_EMPTY_F_Msk

#define UART_FSR_RX_EMPTY_F_Msk (0x1ul << UART_FSR_RX_EMPTY_F_Pos)

UART_T::FSR: RX_EMPTY_F Mask

Definition at line 10188 of file Nano1X2Series.h.

## ◆ UART_FSR_RX_EMPTY_F_Pos

#define UART_FSR_RX_EMPTY_F_Pos (1)

UART_T::FSR: RX_EMPTY_F Position

Definition at line 10187 of file Nano1X2Series.h.

## ◆ UART_FSR_RX_FULL_F_Msk

#define UART_FSR_RX_FULL_F_Msk (0x1ul << UART_FSR_RX_FULL_F_Pos)

UART_T::FSR: RX_FULL_F Mask

Definition at line 10191 of file Nano1X2Series.h.

## ◆ UART_FSR_RX_FULL_F_Pos

#define UART_FSR_RX_FULL_F_Pos (2)

UART_T::FSR: RX_FULL_F Position

Definition at line 10190 of file Nano1X2Series.h.

## ◆ UART_FSR_RX_OVER_F_Msk

#define UART_FSR_RX_OVER_F_Msk (0x1ul << UART_FSR_RX_OVER_F_Pos)

UART_T::FSR: RX_OVER_F Mask

Definition at line 10185 of file Nano1X2Series.h.

## ◆ UART_FSR_RX_OVER_F_Pos

#define UART_FSR_RX_OVER_F_Pos (0)

UART_T::FSR: RX_OVER_F Position

Definition at line 10184 of file Nano1X2Series.h.

## ◆ UART_FSR_RX_POINTER_F_Msk

#define UART_FSR_RX_POINTER_F_Msk (0x1ful << UART_FSR_RX_POINTER_F_Pos)

UART_T::FSR: RX_POINTER_F Mask

Definition at line 10215 of file Nano1X2Series.h.

## ◆ UART_FSR_RX_POINTER_F_Pos

#define UART_FSR_RX_POINTER_F_Pos (16)

UART_T::FSR: RX_POINTER_F Position

Definition at line 10214 of file Nano1X2Series.h.

## ◆ UART_FSR_TE_F_Msk

#define UART_FSR_TE_F_Msk (0x1ul << UART_FSR_TE_F_Pos)

UART_T::FSR: TE_F Mask

Definition at line 10212 of file Nano1X2Series.h.

## ◆ UART_FSR_TE_F_Pos

#define UART_FSR_TE_F_Pos (11)

UART_T::FSR: TE_F Position

Definition at line 10211 of file Nano1X2Series.h.

## ◆ UART_FSR_TX_EMPTY_F_Msk

#define UART_FSR_TX_EMPTY_F_Msk (0x1ul << UART_FSR_TX_EMPTY_F_Pos)

UART_T::FSR: TX_EMPTY_F Mask

Definition at line 10206 of file Nano1X2Series.h.

## ◆ UART_FSR_TX_EMPTY_F_Pos

#define UART_FSR_TX_EMPTY_F_Pos (9)

UART_T::FSR: TX_EMPTY_F Position

Definition at line 10205 of file Nano1X2Series.h.

## ◆ UART_FSR_TX_FULL_F_Msk

#define UART_FSR_TX_FULL_F_Msk (0x1ul << UART_FSR_TX_FULL_F_Pos)

UART_T::FSR: TX_FULL_F Mask

Definition at line 10209 of file Nano1X2Series.h.

## ◆ UART_FSR_TX_FULL_F_Pos

#define UART_FSR_TX_FULL_F_Pos (10)

UART_T::FSR: TX_FULL_F Position

Definition at line 10208 of file Nano1X2Series.h.

## ◆ UART_FSR_TX_OVER_F_Msk

#define UART_FSR_TX_OVER_F_Msk (0x1ul << UART_FSR_TX_OVER_F_Pos)

UART_T::FSR: TX_OVER_F Mask

Definition at line 10203 of file Nano1X2Series.h.

## ◆ UART_FSR_TX_OVER_F_Pos

#define UART_FSR_TX_OVER_F_Pos (8)

UART_T::FSR: TX_OVER_F Position

Definition at line 10202 of file Nano1X2Series.h.

## ◆ UART_FSR_TX_POINTER_F_Msk

#define UART_FSR_TX_POINTER_F_Msk (0x1ful << UART_FSR_TX_POINTER_F_Pos)

UART_T::FSR: TX_POINTER_F Mask

Definition at line 10218 of file Nano1X2Series.h.

## ◆ UART_FSR_TX_POINTER_F_Pos

#define UART_FSR_TX_POINTER_F_Pos (24)

UART_T::FSR: TX_POINTER_F Position

Definition at line 10217 of file Nano1X2Series.h.

## ◆ UART_FUN_SEL_FUN_SEL_Msk

#define UART_FUN_SEL_FUN_SEL_Msk (0x3ul << UART_FUN_SEL_FUN_SEL_Pos)

UART_T::FUN_SEL: FUN_SEL Mask

Definition at line 10287 of file Nano1X2Series.h.

## ◆ UART_FUN_SEL_FUN_SEL_Pos

#define UART_FUN_SEL_FUN_SEL_Pos (0)

UART_T::FUN_SEL: FUN_SEL Position

Definition at line 10286 of file Nano1X2Series.h.

## ◆ UART_IER_ABAUD_IE_Msk

#define UART_IER_ABAUD_IE_Msk (0x1ul << UART_IER_ABAUD_IE_Pos)

UART_T::IER: ABAUD_IE Mask

Definition at line 10131 of file Nano1X2Series.h.

## ◆ UART_IER_ABAUD_IE_Pos

#define UART_IER_ABAUD_IE_Pos (7)

UART_T::IER: ABAUD_IE Position

Definition at line 10130 of file Nano1X2Series.h.

## ◆ UART_IER_BUF_ERR_IE_Msk

#define UART_IER_BUF_ERR_IE_Msk (0x1ul << UART_IER_BUF_ERR_IE_Pos)

UART_T::IER: BUF_ERR_IE Mask

Definition at line 10125 of file Nano1X2Series.h.

## ◆ UART_IER_BUF_ERR_IE_Pos

#define UART_IER_BUF_ERR_IE_Pos (5)

UART_T::IER: BUF_ERR_IE Position

Definition at line 10124 of file Nano1X2Series.h.

## ◆ UART_IER_LIN_IE_Msk

#define UART_IER_LIN_IE_Msk (0x1ul << UART_IER_LIN_IE_Pos)

UART_T::IER: LIN_IE Mask

Definition at line 10134 of file Nano1X2Series.h.

## ◆ UART_IER_LIN_IE_Pos

#define UART_IER_LIN_IE_Pos (8)

UART_T::IER: LIN_IE Position

Definition at line 10133 of file Nano1X2Series.h.

## ◆ UART_IER_MODEM_IE_Msk

#define UART_IER_MODEM_IE_Msk (0x1ul << UART_IER_MODEM_IE_Pos)

UART_T::IER: MODEM_IE Mask

Definition at line 10119 of file Nano1X2Series.h.

## ◆ UART_IER_MODEM_IE_Pos

#define UART_IER_MODEM_IE_Pos (3)

UART_T::IER: MODEM_IE Position

Definition at line 10118 of file Nano1X2Series.h.

## ◆ UART_IER_RDA_IE_Msk

#define UART_IER_RDA_IE_Msk (0x1ul << UART_IER_RDA_IE_Pos)

UART_T::IER: RDA_IE Mask

Definition at line 10110 of file Nano1X2Series.h.

## ◆ UART_IER_RDA_IE_Pos

#define UART_IER_RDA_IE_Pos (0)

UART_T::IER: RDA_IE Position

Definition at line 10109 of file Nano1X2Series.h.

## ◆ UART_IER_RLS_IE_Msk

#define UART_IER_RLS_IE_Msk (0x1ul << UART_IER_RLS_IE_Pos)

UART_T::IER: RLS_IE Mask

Definition at line 10116 of file Nano1X2Series.h.

## ◆ UART_IER_RLS_IE_Pos

#define UART_IER_RLS_IE_Pos (2)

UART_T::IER: RLS_IE Position

Definition at line 10115 of file Nano1X2Series.h.

## ◆ UART_IER_RTO_IE_Msk

#define UART_IER_RTO_IE_Msk (0x1ul << UART_IER_RTO_IE_Pos)

UART_T::IER: RTO_IE Mask

Definition at line 10122 of file Nano1X2Series.h.

## ◆ UART_IER_RTO_IE_Pos

#define UART_IER_RTO_IE_Pos (4)

UART_T::IER: RTO_IE Position

Definition at line 10121 of file Nano1X2Series.h.

## ◆ UART_IER_THRE_IE_Msk

#define UART_IER_THRE_IE_Msk (0x1ul << UART_IER_THRE_IE_Pos)

UART_T::IER: THRE_IE Mask

Definition at line 10113 of file Nano1X2Series.h.

## ◆ UART_IER_THRE_IE_Pos

#define UART_IER_THRE_IE_Pos (1)

UART_T::IER: THRE_IE Position

Definition at line 10112 of file Nano1X2Series.h.

## ◆ UART_IER_WAKE_IE_Msk

#define UART_IER_WAKE_IE_Msk (0x1ul << UART_IER_WAKE_IE_Pos)

UART_T::IER: WAKE_IE Mask

Definition at line 10128 of file Nano1X2Series.h.

## ◆ UART_IER_WAKE_IE_Pos

#define UART_IER_WAKE_IE_Pos (6)

UART_T::IER: WAKE_IE Position

Definition at line 10127 of file Nano1X2Series.h.

## ◆ UART_IRCR_INV_RX_Msk

#define UART_IRCR_INV_RX_Msk (0x1ul << UART_IRCR_INV_RX_Pos)

UART_T::IRCR: INV_RX Mask

Definition at line 10254 of file Nano1X2Series.h.

## ◆ UART_IRCR_INV_RX_Pos

#define UART_IRCR_INV_RX_Pos (6)

UART_T::IRCR: INV_RX Position

Definition at line 10253 of file Nano1X2Series.h.

## ◆ UART_IRCR_INV_TX_Msk

#define UART_IRCR_INV_TX_Msk (0x1ul << UART_IRCR_INV_TX_Pos)

UART_T::IRCR: INV_TX Mask

Definition at line 10251 of file Nano1X2Series.h.

## ◆ UART_IRCR_INV_TX_Pos

#define UART_IRCR_INV_TX_Pos (5)

UART_T::IRCR: INV_TX Position

Definition at line 10250 of file Nano1X2Series.h.

## ◆ UART_IRCR_TX_SELECT_Msk

#define UART_IRCR_TX_SELECT_Msk (0x1ul << UART_IRCR_TX_SELECT_Pos)

UART_T::IRCR: TX_SELECT Mask

Definition at line 10248 of file Nano1X2Series.h.

## ◆ UART_IRCR_TX_SELECT_Pos

#define UART_IRCR_TX_SELECT_Pos (1)

UART_T::IRCR: TX_SELECT Position

Definition at line 10247 of file Nano1X2Series.h.

## ◆ UART_ISR_ABAUD_IS_Msk

#define UART_ISR_ABAUD_IS_Msk (0x1ul << UART_ISR_ABAUD_IS_Pos)

UART_T::ISR: ABAUD_IS Mask

Definition at line 10158 of file Nano1X2Series.h.

## ◆ UART_ISR_ABAUD_IS_Pos

#define UART_ISR_ABAUD_IS_Pos (7)

UART_T::ISR: ABAUD_IS Position

Definition at line 10157 of file Nano1X2Series.h.

## ◆ UART_ISR_BUF_ERR_IS_Msk

#define UART_ISR_BUF_ERR_IS_Msk (0x1ul << UART_ISR_BUF_ERR_IS_Pos)

UART_T::ISR: BUF_ERR_IS Mask

Definition at line 10152 of file Nano1X2Series.h.

## ◆ UART_ISR_BUF_ERR_IS_Pos

#define UART_ISR_BUF_ERR_IS_Pos (5)

UART_T::ISR: BUF_ERR_IS Position

Definition at line 10151 of file Nano1X2Series.h.

## ◆ UART_ISR_LIN_IS_Msk

#define UART_ISR_LIN_IS_Msk (0x1ul << UART_ISR_LIN_IS_Pos)

UART_T::ISR: LIN_IS Mask

Definition at line 10161 of file Nano1X2Series.h.

## ◆ UART_ISR_LIN_IS_Pos

#define UART_ISR_LIN_IS_Pos (8)

UART_T::ISR: LIN_IS Position

Definition at line 10160 of file Nano1X2Series.h.

## ◆ UART_ISR_MODEM_IS_Msk

#define UART_ISR_MODEM_IS_Msk (0x1ul << UART_ISR_MODEM_IS_Pos)

UART_T::ISR: MODEM_IS Mask

Definition at line 10146 of file Nano1X2Series.h.

## ◆ UART_ISR_MODEM_IS_Pos

#define UART_ISR_MODEM_IS_Pos (3)

UART_T::ISR: MODEM_IS Position

Definition at line 10145 of file Nano1X2Series.h.

## ◆ UART_ISR_RDA_IS_Msk

#define UART_ISR_RDA_IS_Msk (0x1ul << UART_ISR_RDA_IS_Pos)

UART_T::ISR: RDA_IS Mask

Definition at line 10137 of file Nano1X2Series.h.

## ◆ UART_ISR_RDA_IS_Pos

#define UART_ISR_RDA_IS_Pos (0)

UART_T::ISR: RDA_IS Position

Definition at line 10136 of file Nano1X2Series.h.

## ◆ UART_ISR_RLS_IS_Msk

#define UART_ISR_RLS_IS_Msk (0x1ul << UART_ISR_RLS_IS_Pos)

UART_T::ISR: RLS_IS Mask

Definition at line 10143 of file Nano1X2Series.h.

## ◆ UART_ISR_RLS_IS_Pos

#define UART_ISR_RLS_IS_Pos (2)

UART_T::ISR: RLS_IS Position

Definition at line 10142 of file Nano1X2Series.h.

## ◆ UART_ISR_RTO_IS_Msk

#define UART_ISR_RTO_IS_Msk (0x1ul << UART_ISR_RTO_IS_Pos)

UART_T::ISR: RTO_IS Mask

Definition at line 10149 of file Nano1X2Series.h.

## ◆ UART_ISR_RTO_IS_Pos

#define UART_ISR_RTO_IS_Pos (4)

UART_T::ISR: RTO_IS Position

Definition at line 10148 of file Nano1X2Series.h.

## ◆ UART_ISR_THRE_IS_Msk

#define UART_ISR_THRE_IS_Msk (0x1ul << UART_ISR_THRE_IS_Pos)

UART_T::ISR: THRE_IS Mask

Definition at line 10140 of file Nano1X2Series.h.

## ◆ UART_ISR_THRE_IS_Pos

#define UART_ISR_THRE_IS_Pos (1)

UART_T::ISR: THRE_IS Position

Definition at line 10139 of file Nano1X2Series.h.

## ◆ UART_ISR_WAKE_IS_Msk

#define UART_ISR_WAKE_IS_Msk (0x1ul << UART_ISR_WAKE_IS_Pos)

UART_T::ISR: WAKE_IS Mask

Definition at line 10155 of file Nano1X2Series.h.

## ◆ UART_ISR_WAKE_IS_Pos

#define UART_ISR_WAKE_IS_Pos (6)

UART_T::ISR: WAKE_IS Position

Definition at line 10154 of file Nano1X2Series.h.

## ◆ UART_MCSR_CTS_ST_Msk

#define UART_MCSR_CTS_ST_Msk (0x1ul << UART_MCSR_CTS_ST_Pos)

UART_T::MCSR: CTS_ST Mask

Definition at line 10230 of file Nano1X2Series.h.

## ◆ UART_MCSR_CTS_ST_Pos

#define UART_MCSR_CTS_ST_Pos (17)

UART_T::MCSR: CTS_ST Position

Definition at line 10229 of file Nano1X2Series.h.

## ◆ UART_MCSR_DCT_F_Msk

#define UART_MCSR_DCT_F_Msk (0x1ul << UART_MCSR_DCT_F_Pos)

UART_T::MCSR: DCT_F Mask

Definition at line 10233 of file Nano1X2Series.h.

## ◆ UART_MCSR_DCT_F_Pos

#define UART_MCSR_DCT_F_Pos (18)

UART_T::MCSR: DCT_F Position

Definition at line 10232 of file Nano1X2Series.h.

## ◆ UART_MCSR_LEV_CTS_Msk

#define UART_MCSR_LEV_CTS_Msk (0x1ul << UART_MCSR_LEV_CTS_Pos)

UART_T::MCSR: LEV_CTS Mask

Definition at line 10227 of file Nano1X2Series.h.

## ◆ UART_MCSR_LEV_CTS_Pos

#define UART_MCSR_LEV_CTS_Pos (16)

UART_T::MCSR: LEV_CTS Position

Definition at line 10226 of file Nano1X2Series.h.

## ◆ UART_MCSR_LEV_RTS_Msk

#define UART_MCSR_LEV_RTS_Msk (0x1ul << UART_MCSR_LEV_RTS_Pos)

UART_T::MCSR: LEV_RTS Mask

Definition at line 10221 of file Nano1X2Series.h.

## ◆ UART_MCSR_LEV_RTS_Pos

#define UART_MCSR_LEV_RTS_Pos (0)

UART_T::MCSR: LEV_RTS Position

Definition at line 10220 of file Nano1X2Series.h.

## ◆ UART_MCSR_RTS_ST_Msk

#define UART_MCSR_RTS_ST_Msk (0x1ul << UART_MCSR_RTS_ST_Pos)

UART_T::MCSR: RTS_ST Mask

Definition at line 10224 of file Nano1X2Series.h.

## ◆ UART_MCSR_RTS_ST_Pos

#define UART_MCSR_RTS_ST_Pos (1)

UART_T::MCSR: RTS_ST Position

Definition at line 10223 of file Nano1X2Series.h.

## ◆ UART_TLCTL_BCB_Msk

#define UART_TLCTL_BCB_Msk (0x1ul << UART_TLCTL_BCB_Pos)

UART_T::TLCTL: BCB Mask

Definition at line 10101 of file Nano1X2Series.h.

## ◆ UART_TLCTL_BCB_Pos

#define UART_TLCTL_BCB_Pos (6)

UART_T::TLCTL: BCB Position

Definition at line 10100 of file Nano1X2Series.h.

## ◆ UART_TLCTL_DATA_LEN_Msk

#define UART_TLCTL_DATA_LEN_Msk (0x3ul << UART_TLCTL_DATA_LEN_Pos)

UART_T::TLCTL: DATA_LEN Mask

Definition at line 10086 of file Nano1X2Series.h.

## ◆ UART_TLCTL_DATA_LEN_Pos

#define UART_TLCTL_DATA_LEN_Pos (0)

UART_T::TLCTL: DATA_LEN Position

Definition at line 10085 of file Nano1X2Series.h.

## ◆ UART_TLCTL_EPE_Msk

#define UART_TLCTL_EPE_Msk (0x1ul << UART_TLCTL_EPE_Pos)

UART_T::TLCTL: EPE Mask

Definition at line 10095 of file Nano1X2Series.h.

## ◆ UART_TLCTL_EPE_Pos

#define UART_TLCTL_EPE_Pos (4)

UART_T::TLCTL: EPE Position

Definition at line 10094 of file Nano1X2Series.h.

## ◆ UART_TLCTL_NSB_Msk

#define UART_TLCTL_NSB_Msk (0x1ul << UART_TLCTL_NSB_Pos)

UART_T::TLCTL: NSB Mask

Definition at line 10089 of file Nano1X2Series.h.

## ◆ UART_TLCTL_NSB_Pos

#define UART_TLCTL_NSB_Pos (2)

UART_T::TLCTL: NSB Position

Definition at line 10088 of file Nano1X2Series.h.

## ◆ UART_TLCTL_PBE_Msk

#define UART_TLCTL_PBE_Msk (0x1ul << UART_TLCTL_PBE_Pos)

UART_T::TLCTL: PBE Mask

Definition at line 10092 of file Nano1X2Series.h.

## ◆ UART_TLCTL_PBE_Pos

#define UART_TLCTL_PBE_Pos (3)

UART_T::TLCTL: PBE Position

Definition at line 10091 of file Nano1X2Series.h.

## ◆ UART_TLCTL_RFITL_Msk

#define UART_TLCTL_RFITL_Msk (0x3ul << UART_TLCTL_RFITL_Pos)

UART_T::TLCTL: RFITL Mask

Definition at line 10104 of file Nano1X2Series.h.

## ◆ UART_TLCTL_RFITL_Pos

#define UART_TLCTL_RFITL_Pos (8)

UART_T::TLCTL: RFITL Position

Definition at line 10103 of file Nano1X2Series.h.

## ◆ UART_TLCTL_RTS_TRI_LEV_Msk

#define UART_TLCTL_RTS_TRI_LEV_Msk (0x3ul << UART_TLCTL_RTS_TRI_LEV_Pos)

UART_T::TLCTL: RTS_TRI_LEV Mask

Definition at line 10107 of file Nano1X2Series.h.

## ◆ UART_TLCTL_RTS_TRI_LEV_Pos

#define UART_TLCTL_RTS_TRI_LEV_Pos (12)

UART_T::TLCTL: RTS_TRI_LEV Position

Definition at line 10106 of file Nano1X2Series.h.

## ◆ UART_TLCTL_SPE_Msk

#define UART_TLCTL_SPE_Msk (0x1ul << UART_TLCTL_SPE_Pos)

UART_T::TLCTL: SPE Mask

Definition at line 10098 of file Nano1X2Series.h.

## ◆ UART_TLCTL_SPE_Pos

#define UART_TLCTL_SPE_Pos (5)

UART_T::TLCTL: SPE Position

Definition at line 10097 of file Nano1X2Series.h.

## ◆ UART_TMCTL_DLY_Msk

#define UART_TMCTL_DLY_Msk (0xfful << UART_TMCTL_DLY_Pos)

UART_T::TMCTL: DLY Mask

Definition at line 10239 of file Nano1X2Series.h.

## ◆ UART_TMCTL_DLY_Pos

#define UART_TMCTL_DLY_Pos (16)

UART_T::TMCTL: DLY Position

Definition at line 10238 of file Nano1X2Series.h.

## ◆ UART_TMCTL_TOIC_Msk

#define UART_TMCTL_TOIC_Msk (0x1fful << UART_TMCTL_TOIC_Pos)

UART_T::TMCTL: TOIC Mask

Definition at line 10236 of file Nano1X2Series.h.

## ◆ UART_TMCTL_TOIC_Pos

#define UART_TMCTL_TOIC_Pos (0)

UART_T::TMCTL: TOIC Position

Definition at line 10235 of file Nano1X2Series.h.

## ◆ UART_TRSR_ABAUD_F_Msk

#define UART_TRSR_ABAUD_F_Msk (0x1ul << UART_TRSR_ABAUD_F_Pos)

UART_T::TRSR: ABAUD_F Mask

Definition at line 10167 of file Nano1X2Series.h.

## ◆ UART_TRSR_ABAUD_F_Pos

#define UART_TRSR_ABAUD_F_Pos (1)

UART_T::TRSR: ABAUD_F Position

Definition at line 10166 of file Nano1X2Series.h.

## ◆ UART_TRSR_ABAUD_TOUT_F_Msk

#define UART_TRSR_ABAUD_TOUT_F_Msk (0x1ul << UART_TRSR_ABAUD_TOUT_F_Pos)

UART_T::TRSR: ABAUD_TOUT_F Mask

Definition at line 10170 of file Nano1X2Series.h.

## ◆ UART_TRSR_ABAUD_TOUT_F_Pos

#define UART_TRSR_ABAUD_TOUT_F_Pos (2)

UART_T::TRSR: ABAUD_TOUT_F Position

Definition at line 10169 of file Nano1X2Series.h.

## ◆ UART_TRSR_BIT_ERR_F_Msk

#define UART_TRSR_BIT_ERR_F_Msk (0x1ul << UART_TRSR_BIT_ERR_F_Pos)

UART_T::TRSR: BIT_ERR_F Mask

Definition at line 10179 of file Nano1X2Series.h.

## ◆ UART_TRSR_BIT_ERR_F_Pos

#define UART_TRSR_BIT_ERR_F_Pos (5)

UART_T::TRSR: BIT_ERR_F Position

Definition at line 10178 of file Nano1X2Series.h.

## ◆ UART_TRSR_LIN_RX_F_Msk

#define UART_TRSR_LIN_RX_F_Msk (0x1ul << UART_TRSR_LIN_RX_F_Pos)

UART_T::TRSR: LIN_RX_F Mask

Definition at line 10176 of file Nano1X2Series.h.

## ◆ UART_TRSR_LIN_RX_F_Pos

#define UART_TRSR_LIN_RX_F_Pos (4)

UART_T::TRSR: LIN_RX_F Position

Definition at line 10175 of file Nano1X2Series.h.

## ◆ UART_TRSR_LIN_RX_SYNC_ERR_F_Msk

#define UART_TRSR_LIN_RX_SYNC_ERR_F_Msk (0x1ul << UART_TRSR_LIN_RX_SYNC_ERR_F_Pos)

UART_T::TRSR: LIN_RX_SYNC_ERR_F Mask

Definition at line 10182 of file Nano1X2Series.h.

## ◆ UART_TRSR_LIN_RX_SYNC_ERR_F_Pos

#define UART_TRSR_LIN_RX_SYNC_ERR_F_Pos (8)

UART_T::TRSR: LIN_RX_SYNC_ERR_F Position

Definition at line 10181 of file Nano1X2Series.h.

## ◆ UART_TRSR_LIN_TX_F_Msk

#define UART_TRSR_LIN_TX_F_Msk (0x1ul << UART_TRSR_LIN_TX_F_Pos)

UART_T::TRSR: LIN_TX_F Mask

Definition at line 10173 of file Nano1X2Series.h.

## ◆ UART_TRSR_LIN_TX_F_Pos

#define UART_TRSR_LIN_TX_F_Pos (3)

UART_T::TRSR: LIN_TX_F Position

Definition at line 10172 of file Nano1X2Series.h.

## ◆ UART_TRSR_RS485_ADDET_F_Msk

#define UART_TRSR_RS485_ADDET_F_Msk (0x1ul << UART_TRSR_RS485_ADDET_F_Pos)

UART_T::TRSR: RS485_ADDET_F Mask

Definition at line 10164 of file Nano1X2Series.h.

## ◆ UART_TRSR_RS485_ADDET_F_Pos

#define UART_TRSR_RS485_ADDET_F_Pos (0)

UART_T::TRSR: RS485_ADDET_F Position

Definition at line 10163 of file Nano1X2Series.h.

## ◆ WDT_CTL_WTE_Msk

#define WDT_CTL_WTE_Msk (0x1ul << WDT_CTL_WTE_Pos)

WDT_T::CTL: WTE Mask

Definition at line 10411 of file Nano1X2Series.h.

## ◆ WDT_CTL_WTE_Pos

#define WDT_CTL_WTE_Pos (3)

WDT_T::CTL: WTE Position

Definition at line 10410 of file Nano1X2Series.h.

## ◆ WDT_CTL_WTIS_Msk

#define WDT_CTL_WTIS_Msk (0x7ul << WDT_CTL_WTIS_Pos)

WDT_T::CTL: WTIS Mask

Definition at line 10414 of file Nano1X2Series.h.

## ◆ WDT_CTL_WTIS_Pos

#define WDT_CTL_WTIS_Pos (4)

WDT_T::CTL: WTIS Position

Definition at line 10413 of file Nano1X2Series.h.

## ◆ WDT_CTL_WTR_Msk

#define WDT_CTL_WTR_Msk (0x1ul << WDT_CTL_WTR_Pos)

WDT_T::CTL: WTR Mask

Definition at line 10402 of file Nano1X2Series.h.

## ◆ WDT_CTL_WTR_Pos

#define WDT_CTL_WTR_Pos (0)

    @addtogroup WDT_CONST WDT Bit Field Definition
    Constant Definitions for WDT Controller

WDT_T::CTL: WTR Position

Definition at line 10401 of file Nano1X2Series.h.

## ◆ WDT_CTL_WTRDSEL_Msk

#define WDT_CTL_WTRDSEL_Msk (0x3ul << WDT_CTL_WTRDSEL_Pos)

WDT_T::CTL: WTRDSEL Mask

Definition at line 10417 of file Nano1X2Series.h.

## ◆ WDT_CTL_WTRDSEL_Pos

#define WDT_CTL_WTRDSEL_Pos (8)

WDT_T::CTL: WTRDSEL Position

Definition at line 10416 of file Nano1X2Series.h.

## ◆ WDT_CTL_WTRE_Msk

#define WDT_CTL_WTRE_Msk (0x1ul << WDT_CTL_WTRE_Pos)

WDT_T::CTL: WTRE Mask

Definition at line 10405 of file Nano1X2Series.h.

## ◆ WDT_CTL_WTRE_Pos

#define WDT_CTL_WTRE_Pos (1)

WDT_T::CTL: WTRE Position

Definition at line 10404 of file Nano1X2Series.h.

## ◆ WDT_CTL_WTWKE_Msk

#define WDT_CTL_WTWKE_Msk (0x1ul << WDT_CTL_WTWKE_Pos)

WDT_T::CTL: WTWKE Mask

Definition at line 10408 of file Nano1X2Series.h.

## ◆ WDT_CTL_WTWKE_Pos

#define WDT_CTL_WTWKE_Pos (2)

WDT_T::CTL: WTWKE Position

Definition at line 10407 of file Nano1X2Series.h.

## ◆ WDT_IER_IE_Msk

#define WDT_IER_IE_Msk (0x1ul << WDT_IER_IE_Pos)

WDT_T::IER: IE Mask

Definition at line 10420 of file Nano1X2Series.h.

## ◆ WDT_IER_IE_Pos

#define WDT_IER_IE_Pos (0)

WDT_T::IER: IE Position

Definition at line 10419 of file Nano1X2Series.h.

## ◆ WDT_ISR_IS_Msk

#define WDT_ISR_IS_Msk (0x1ul << WDT_ISR_IS_Pos)

WDT_T::ISR: IS Mask

Definition at line 10423 of file Nano1X2Series.h.

## ◆ WDT_ISR_IS_Pos

#define WDT_ISR_IS_Pos (0)

WDT_T::ISR: IS Position

Definition at line 10422 of file Nano1X2Series.h.

## ◆ WDT_ISR_RST_IS_Msk

#define WDT_ISR_RST_IS_Msk (0x1ul << WDT_ISR_RST_IS_Pos)

WDT_T::ISR: RST_IS Mask

Definition at line 10426 of file Nano1X2Series.h.

## ◆ WDT_ISR_RST_IS_Pos

#define WDT_ISR_RST_IS_Pos (1)

WDT_T::ISR: RST_IS Position

Definition at line 10425 of file Nano1X2Series.h.

## ◆ WDT_ISR_WAKE_IS_Msk

#define WDT_ISR_WAKE_IS_Msk (0x1ul << WDT_ISR_WAKE_IS_Pos)

WDT_T::ISR: WAKE_IS Mask

Definition at line 10429 of file Nano1X2Series.h.

## ◆ WDT_ISR_WAKE_IS_Pos

#define WDT_ISR_WAKE_IS_Pos (2)

WDT_T::ISR: WAKE_IS Position

Definition at line 10428 of file Nano1X2Series.h.

## ◆ WWDT_CR_DBGEN_Msk

#define WWDT_CR_DBGEN_Msk (0x1ul << WWDT_CR_DBGEN_Pos)

WWDT_T::CR: DBGEN Mask

Definition at line 10545 of file Nano1X2Series.h.

## ◆ WWDT_CR_DBGEN_Pos

#define WWDT_CR_DBGEN_Pos (31)

WWDT_T::CR: DBGEN Position

Definition at line 10544 of file Nano1X2Series.h.

## ◆ WWDT_CR_PERIODSEL_Msk

#define WWDT_CR_PERIODSEL_Msk (0xful << WWDT_CR_PERIODSEL_Pos)

WWDT_T::CR: PERIODSEL Mask

Definition at line 10539 of file Nano1X2Series.h.

## ◆ WWDT_CR_PERIODSEL_Pos

#define WWDT_CR_PERIODSEL_Pos (8)

WWDT_T::CR: PERIODSEL Position

Definition at line 10538 of file Nano1X2Series.h.

## ◆ WWDT_CR_WINCMP_Msk

#define WWDT_CR_WINCMP_Msk (0x3ful << WWDT_CR_WINCMP_Pos)

WWDT_T::CR: WINCMP Mask

Definition at line 10542 of file Nano1X2Series.h.

## ◆ WWDT_CR_WINCMP_Pos

#define WWDT_CR_WINCMP_Pos (16)

WWDT_T::CR: WINCMP Position

Definition at line 10541 of file Nano1X2Series.h.

## ◆ WWDT_CR_WWDTEN_Msk

#define WWDT_CR_WWDTEN_Msk (0x1ul << WWDT_CR_WWDTEN_Pos)

WWDT_T::CR: WWDTEN Mask

Definition at line 10536 of file Nano1X2Series.h.

## ◆ WWDT_CR_WWDTEN_Pos

#define WWDT_CR_WWDTEN_Pos (0)

WWDT_T::CR: WWDTEN Position

Definition at line 10535 of file Nano1X2Series.h.

## ◆ WWDT_IER_WWDTIE_Msk

#define WWDT_IER_WWDTIE_Msk (0x1ul << WWDT_IER_WWDTIE_Pos)

WWDT_T::IER: WWDTIE Mask

Definition at line 10548 of file Nano1X2Series.h.

## ◆ WWDT_IER_WWDTIE_Pos

#define WWDT_IER_WWDTIE_Pos (0)

WWDT_T::IER: WWDTIE Position

Definition at line 10547 of file Nano1X2Series.h.

## ◆ WWDT_RLD_WWDTRLD_Msk

#define WWDT_RLD_WWDTRLD_Msk (0xfffffffful << WWDT_RLD_RLD_Pos)

WWDT_T::RLD: RLD Mask

Definition at line 10533 of file Nano1X2Series.h.

## ◆ WWDT_RLD_WWDTRLD_Pos

#define WWDT_RLD_WWDTRLD_Pos (0)

    @addtogroup WWDT_CONST WWDT Bit Field Definition
    Constant Definitions for WWDT Controller

WWDT_T::RLD: RLD Position

Definition at line 10532 of file Nano1X2Series.h.

## ◆ WWDT_STS_IF_Msk

#define WWDT_STS_IF_Msk (0x1ul << WWDT_STS_IF_Pos)

WWDT_T::STS: IF Mask

Definition at line 10551 of file Nano1X2Series.h.

## ◆ WWDT_STS_IF_Pos

#define WWDT_STS_IF_Pos (0)

WWDT_T::STS: IF Position

Definition at line 10550 of file Nano1X2Series.h.

## ◆ WWDT_STS_RF_Msk

#define WWDT_STS_RF_Msk (0x1ul << WWDT_STS_RF_Pos)

WWDT_T::STS: RF Mask

Definition at line 10554 of file Nano1X2Series.h.

## ◆ WWDT_STS_RF_Pos

#define WWDT_STS_RF_Pos (1)

WWDT_T::STS: RF Position

Definition at line 10553 of file Nano1X2Series.h.

## ◆ WWDT_VAL_WWDTVAL_Msk

#define WWDT_VAL_WWDTVAL_Msk (0x3ful << WWDT_VAL_WWDTVAL_Pos)

WWDT_T::VAL: WWDTVAL Mask

Definition at line 10557 of file Nano1X2Series.h.

## ◆ WWDT_VAL_WWDTVAL_Pos

#define WWDT_VAL_WWDTVAL_Pos (0)

WWDT_T::VAL: WWDTVAL Position

Definition at line 10556 of file Nano1X2Series.h.