| NANO100_BSP V3.05.000 The Board Support Package for Nano100BN Series

Modules | Macros
SPI Exported Constants
NANO100 Device Driver » SPI Driver
Collaboration diagram for SPI Exported Constants:

## Modules
| SPI Exported Functions

## Macros
#define | SPI_MODE_0 (SPI_CTL_TX_NEG_Msk)
#define | SPI_MODE_1 (SPI_CTL_RX_NEG_Msk)
#define | SPI_MODE_2 (SPI_CTL_CLKP_Msk | SPI_CTL_RX_NEG_Msk)
#define | SPI_MODE_3 (SPI_CTL_CLKP_Msk | SPI_CTL_TX_NEG_Msk)
#define | SPI_SLAVE (SPI_CTL_SLAVE_Msk)
#define | SPI_MASTER (0x0)
#define | SPI_SS0 (0x1)
#define | SPI_SS0_ACTIVE_HIGH (SPI_SSR_SS_LVL_Msk)
#define | SPI_SS0_ACTIVE_LOW (0x0)
#define | SPI_SS1 (0x2)
#define | SPI_SS1_ACTIVE_HIGH (SPI_SSR_SS_LVL_Msk)
#define | SPI_SS1_ACTIVE_LOW (0x0)
#define | SPI_IE_MASK (0x01)
#define | SPI_SSTA_INTEN_MASK (0x04)
#define | SPI_FIFO_TX_INTEN_MASK (0x08)
#define | SPI_FIFO_RX_INTEN_MASK (0x10)
#define | SPI_FIFO_RXOVR_INTEN_MASK (0x20)
#define | SPI_FIFO_TIMEOUT_INTEN_MASK (0x40)

## Detailed Description

## Macro Definition Documentation

## ◆ SPI_FIFO_RX_INTEN_MASK

#define SPI_FIFO_RX_INTEN_MASK (0x10)

FIFO RX interrupt mask

Definition at line 53 of file spi.h.

## ◆ SPI_FIFO_RXOVR_INTEN_MASK

#define SPI_FIFO_RXOVR_INTEN_MASK (0x20)

FIFO RX overrun interrupt mask

Definition at line 54 of file spi.h.

## ◆ SPI_FIFO_TIMEOUT_INTEN_MASK

#define SPI_FIFO_TIMEOUT_INTEN_MASK (0x40)

FIFO timeout interrupt mask

Definition at line 55 of file spi.h.

## ◆ SPI_FIFO_TX_INTEN_MASK

#define SPI_FIFO_TX_INTEN_MASK (0x08)

FIFO TX interrupt mask

Definition at line 52 of file spi.h.

## ◆ SPI_IE_MASK

#define SPI_IE_MASK (0x01)

Interrupt enable mask

Definition at line 50 of file spi.h.

## ◆ SPI_MASTER

#define SPI_MASTER (0x0)

Set as master

Definition at line 40 of file spi.h.

## ◆ SPI_MODE_0

#define SPI_MODE_0 (SPI_CTL_TX_NEG_Msk)

CLKP=0; RX_NEG=0; TX_NEG=1

Definition at line 34 of file spi.h.

## ◆ SPI_MODE_1

#define SPI_MODE_1 (SPI_CTL_RX_NEG_Msk)

CLKP=0; RX_NEG=1; TX_NEG=0

Definition at line 35 of file spi.h.

## ◆ SPI_MODE_2

#define SPI_MODE_2 (SPI_CTL_CLKP_Msk | SPI_CTL_RX_NEG_Msk)

CLKP=1; RX_NEG=1; TX_NEG=0

Definition at line 36 of file spi.h.

## ◆ SPI_MODE_3

#define SPI_MODE_3 (SPI_CTL_CLKP_Msk | SPI_CTL_TX_NEG_Msk)

CLKP=1; RX_NEG=0; TX_NEG=1

Definition at line 37 of file spi.h.

## ◆ SPI_SLAVE

#define SPI_SLAVE (SPI_CTL_SLAVE_Msk)

Set as slave

Definition at line 39 of file spi.h.

## ◆ SPI_SS0

#define SPI_SS0 (0x1)

Set SS0

Definition at line 42 of file spi.h.

## ◆ SPI_SS0_ACTIVE_HIGH

#define SPI_SS0_ACTIVE_HIGH (SPI_SSR_SS_LVL_Msk)

SS0 active high

Definition at line 43 of file spi.h.

## ◆ SPI_SS0_ACTIVE_LOW

#define SPI_SS0_ACTIVE_LOW (0x0)

SS0 active low

Definition at line 44 of file spi.h.

## ◆ SPI_SS1

#define SPI_SS1 (0x2)

Set SS1

Definition at line 46 of file spi.h.

## ◆ SPI_SS1_ACTIVE_HIGH

#define SPI_SS1_ACTIVE_HIGH (SPI_SSR_SS_LVL_Msk)

SS1 active high

Definition at line 47 of file spi.h.

## ◆ SPI_SS1_ACTIVE_LOW

#define SPI_SS1_ACTIVE_LOW (0x0)

SS1 active low

Definition at line 48 of file spi.h.

## ◆ SPI_SSTA_INTEN_MASK

#define SPI_SSTA_INTEN_MASK (0x04)

Slave 3-Wire mode start interrupt enable mask

Definition at line 51 of file spi.h.