| NANO100_BSP V3.05.000 The Board Support Package for Nano100BN Series

Modules | Data Structures | Macros | Typedefs | Enumerations
Device CMSIS Definitions
NANO100 Definitions
Collaboration diagram for Device CMSIS Definitions:

## Modules
| NANO100 Peripherals

## Data Structures
struct | CLK_T

## Macros
#define | __CM0_REV 0x0201
#define | __NVIC_PRIO_BITS 2
#define | __Vendor_SysTickConfig 0
#define | __MPU_PRESENT 0
#define | __FPU_PRESENT 0

## Typedefs
typedef enum IRQn | IRQn_Type

## Enumerations
enum | IRQn { NonMaskableInt_IRQn = -14 , HardFault_IRQn = -13 , SVCall_IRQn = -5 , PendSV_IRQn = -2 , SysTick_IRQn = -1 , BOD_IRQn = 0 , WDT_IRQn = 1 , EINT0_IRQn = 2 , EINT1_IRQn = 3 , GPABC_IRQn = 4 , GPDEF_IRQn = 5 , PWM0_IRQn = 6 , PWM1_IRQn = 7 , TMR0_IRQn = 8 , TMR1_IRQn = 9 , TMR2_IRQn = 10 , TMR3_IRQn = 11 , UART0_IRQn = 12 , UART1_IRQn = 13 , SPI0_IRQn = 14 , SPI1_IRQn = 15 , SPI2_IRQn = 16 , HIRC_IRQn = 17 , I2C0_IRQn = 18 , I2C1_IRQn = 19 , SC2_IRQn = 20 , SC0_IRQn = 21 , SC1_IRQn = 22 , USBD_IRQn = 23 , LCD_IRQn = 25 , PDMA_IRQn = 26 , I2S_IRQn = 27 , PDWU_IRQn = 28 , ADC_IRQn = 29 , DAC_IRQn = 30 , RTC_IRQn = 31 }
#define | CLK_PWRCTL_HXT_EN_Pos (0)
#define | CLK_PWRCTL_HXT_EN_Msk (0x1ul << CLK_PWRCTL_HXT_EN_Pos)
#define | CLK_PWRCTL_LXT_EN_Pos (1)
#define | CLK_PWRCTL_LXT_EN_Msk (0x1ul << CLK_PWRCTL_LXT_EN_Pos)
#define | CLK_PWRCTL_HIRC_EN_Pos (2)
#define | CLK_PWRCTL_HIRC_EN_Msk (0x1ul << CLK_PWRCTL_HIRC_EN_Pos)
#define | CLK_PWRCTL_LIRC_EN_Pos (3)
#define | CLK_PWRCTL_LIRC_EN_Msk (0x1ul << CLK_PWRCTL_LIRC_EN_Pos)
#define | CLK_PWRCTL_WK_DLY_Pos (4)
#define | CLK_PWRCTL_WK_DLY_Msk (0x1ul << CLK_PWRCTL_WK_DLY_Pos)
#define | CLK_PWRCTL_PD_WK_IE_Pos (5)
#define | CLK_PWRCTL_PD_WK_IE_Msk (0x1ul << CLK_PWRCTL_PD_WK_IE_Pos)
#define | CLK_PWRCTL_PD_EN_Pos (6)
#define | CLK_PWRCTL_PD_EN_Msk (0x1ul << CLK_PWRCTL_PD_EN_Pos)
#define | CLK_PWRCTL_HXT_SELXT_Pos (8)
#define | CLK_PWRCTL_HXT_SELXT_Msk (0x1ul << CLK_PWRCTL_HXT_SELXT_Pos)
#define | CLK_PWRCTL_HXT_GAIN_Pos (9)
#define | CLK_PWRCTL_HXT_GAIN_Msk (0x1ul << CLK_PWRCTL_HXT_GAIN_Pos)
#define | CLK_PWRCTL_LXT_SCNT_Pos (10)
#define | CLK_PWRCTL_LXT_SCNT_Msk (0x1ul << CLK_PWRCTL_LXT_SCNT_Pos)
#define | CLK_PWRCTL_HXT_HF_ST_Pos (11)
#define | CLK_PWRCTL_HXT_HF_ST_Msk (0x3ul << CLK_PWRCTL_HXT_HF_ST_Pos)
#define | CLK_AHBCLK_GPIO_EN_Pos (0)
#define | CLK_AHBCLK_GPIO_EN_Msk (0x1ul << CLK_AHBCLK_GPIO_EN_Pos)
#define | CLK_AHBCLK_DMA_EN_Pos (1)
#define | CLK_AHBCLK_DMA_EN_Msk (0x1ul << CLK_AHBCLK_DMA_EN_Pos)
#define | CLK_AHBCLK_ISP_EN_Pos (2)
#define | CLK_AHBCLK_ISP_EN_Msk (0x1ul << CLK_AHBCLK_ISP_EN_Pos)
#define | CLK_AHBCLK_EBI_EN_Pos (3)
#define | CLK_AHBCLK_EBI_EN_Msk (0x1ul << CLK_AHBCLK_EBI_EN_Pos)
#define | CLK_AHBCLK_SRAM_EN_Pos (4)
#define | CLK_AHBCLK_SRAM_EN_Msk (0x1ul << CLK_AHBCLK_SRAM_EN_Pos)
#define | CLK_AHBCLK_TICK_EN_Pos (5)
#define | CLK_AHBCLK_TICK_EN_Msk (0x1ul << CLK_AHBCLK_TICK_EN_Pos)
#define | CLK_APBCLK_WDT_EN_Pos (0)
#define | CLK_APBCLK_WDT_EN_Msk (0x1ul << CLK_APBCLK_WDT_EN_Pos)
#define | CLK_APBCLK_RTC_EN_Pos (1)
#define | CLK_APBCLK_RTC_EN_Msk (0x1ul << CLK_APBCLK_RTC_EN_Pos)
#define | CLK_APBCLK_TMR0_EN_Pos (2)
#define | CLK_APBCLK_TMR0_EN_Msk (0x1ul << CLK_APBCLK_TMR0_EN_Pos)
#define | CLK_APBCLK_TMR1_EN_Pos (3)
#define | CLK_APBCLK_TMR1_EN_Msk (0x1ul << CLK_APBCLK_TMR1_EN_Pos)
#define | CLK_APBCLK_TMR2_EN_Pos (4)
#define | CLK_APBCLK_TMR2_EN_Msk (0x1ul << CLK_APBCLK_TMR2_EN_Pos)
#define | CLK_APBCLK_TMR3_EN_Pos (5)
#define | CLK_APBCLK_TMR3_EN_Msk (0x1ul << CLK_APBCLK_TMR3_EN_Pos)
#define | CLK_APBCLK_FDIV_EN_Pos (6)
#define | CLK_APBCLK_FDIV_EN_Msk (0x1ul << CLK_APBCLK_FDIV_EN_Pos)
#define | CLK_APBCLK_SC2_EN_Pos (7)
#define | CLK_APBCLK_SC2_EN_Msk (0x1ul << CLK_APBCLK_SC2_EN_Pos)
#define | CLK_APBCLK_I2C0_EN_Pos (8)
#define | CLK_APBCLK_I2C0_EN_Msk (0x1ul << CLK_APBCLK_I2C0_EN_Pos)
#define | CLK_APBCLK_I2C1_EN_Pos (9)
#define | CLK_APBCLK_I2C1_EN_Msk (0x1ul << CLK_APBCLK_I2C1_EN_Pos)
#define | CLK_APBCLK_SPI0_EN_Pos (12)
#define | CLK_APBCLK_SPI0_EN_Msk (0x1ul << CLK_APBCLK_SPI0_EN_Pos)
#define | CLK_APBCLK_SPI1_EN_Pos (13)
#define | CLK_APBCLK_SPI1_EN_Msk (0x1ul << CLK_APBCLK_SPI1_EN_Pos)
#define | CLK_APBCLK_SPI2_EN_Pos (14)
#define | CLK_APBCLK_SPI2_EN_Msk (0x1ul << CLK_APBCLK_SPI2_EN_Pos)
#define | CLK_APBCLK_UART0_EN_Pos (16)
#define | CLK_APBCLK_UART0_EN_Msk (0x1ul << CLK_APBCLK_UART0_EN_Pos)
#define | CLK_APBCLK_UART1_EN_Pos (17)
#define | CLK_APBCLK_UART1_EN_Msk (0x1ul << CLK_APBCLK_UART1_EN_Pos)
#define | CLK_APBCLK_PWM0_CH01_EN_Pos (20)
#define | CLK_APBCLK_PWM0_CH01_EN_Msk (0x1ul << CLK_APBCLK_PWM0_CH01_EN_Pos)
#define | CLK_APBCLK_PWM0_CH23_EN_Pos (21)
#define | CLK_APBCLK_PWM0_CH23_EN_Msk (0x1ul << CLK_APBCLK_PWM0_CH23_EN_Pos)
#define | CLK_APBCLK_PWM1_CH01_EN_Pos (22)
#define | CLK_APBCLK_PWM1_CH01_EN_Msk (0x1ul << CLK_APBCLK_PWM1_CH01_EN_Pos)
#define | CLK_APBCLK_PWM1_CH23_EN_Pos (23)
#define | CLK_APBCLK_PWM1_CH23_EN_Msk (0x1ul << CLK_APBCLK_PWM1_CH23_EN_Pos)
#define | CLK_APBCLK_DAC_EN_Pos (25)
#define | CLK_APBCLK_DAC_EN_Msk (0x1ul << CLK_APBCLK_DAC_EN_Pos)
#define | CLK_APBCLK_LCD_EN_Pos (26)
#define | CLK_APBCLK_LCD_EN_Msk (0x1ul << CLK_APBCLK_LCD_EN_Pos)
#define | CLK_APBCLK_USBD_EN_Pos (27)
#define | CLK_APBCLK_USBD_EN_Msk (0x1ul << CLK_APBCLK_USBD_EN_Pos)
#define | CLK_APBCLK_ADC_EN_Pos (28)
#define | CLK_APBCLK_ADC_EN_Msk (0x1ul << CLK_APBCLK_ADC_EN_Pos)
#define | CLK_APBCLK_I2S_EN_Pos (29)
#define | CLK_APBCLK_I2S_EN_Msk (0x1ul << CLK_APBCLK_I2S_EN_Pos)
#define | CLK_APBCLK_SC0_EN_Pos (30)
#define | CLK_APBCLK_SC0_EN_Msk (0x1ul << CLK_APBCLK_SC0_EN_Pos)
#define | CLK_APBCLK_SC1_EN_Pos (31)
#define | CLK_APBCLK_SC1_EN_Msk (0x1ul << CLK_APBCLK_SC1_EN_Pos)
#define | CLK_CLKSTATUS_HXT_STB_Pos (0)
#define | CLK_CLKSTATUS_HXT_STB_Msk (0x1ul << CLK_CLKSTATUS_HXT_STB_Pos)
#define | CLK_CLKSTATUS_LXT_STB_Pos (1)
#define | CLK_CLKSTATUS_LXT_STB_Msk (0x1ul << CLK_CLKSTATUS_LXT_STB_Pos)
#define | CLK_CLKSTATUS_PLL_STB_Pos (2)
#define | CLK_CLKSTATUS_PLL_STB_Msk (0x1ul << CLK_CLKSTATUS_PLL_STB_Pos)
#define | CLK_CLKSTATUS_LIRC_STB_Pos (3)
#define | CLK_CLKSTATUS_LIRC_STB_Msk (0x1ul << CLK_CLKSTATUS_LIRC_STB_Pos)
#define | CLK_CLKSTATUS_HIRC_STB_Pos (4)
#define | CLK_CLKSTATUS_HIRC_STB_Msk (0x1ul << CLK_CLKSTATUS_HIRC_STB_Pos)
#define | CLK_CLKSTATUS_CLK_SW_FAIL_Pos (7)
#define | CLK_CLKSTATUS_CLK_SW_FAIL_Msk (0x1ul << CLK_CLKSTATUS_CLK_SW_FAIL_Pos)
#define | CLK_CLKSEL0_HCLK_S_Pos (0)
#define | CLK_CLKSEL0_HCLK_S_Msk (0x7ul << CLK_CLKSEL0_HCLK_S_Pos)
#define | CLK_CLKSEL1_UART_S_Pos (0)
#define | CLK_CLKSEL1_UART_S_Msk (0x3ul << CLK_CLKSEL1_UART_S_Pos)
#define | CLK_CLKSEL1_ADC_S_Pos (2)
#define | CLK_CLKSEL1_ADC_S_Msk (0x3ul << CLK_CLKSEL1_ADC_S_Pos)
#define | CLK_CLKSEL1_PWM0_CH01_S_Pos (4)
#define | CLK_CLKSEL1_PWM0_CH01_S_Msk (0x3ul << CLK_CLKSEL1_PWM0_CH01_S_Pos)
#define | CLK_CLKSEL1_PWM0_CH23_S_Pos (6)
#define | CLK_CLKSEL1_PWM0_CH23_S_Msk (0x3ul << CLK_CLKSEL1_PWM0_CH23_S_Pos)
#define | CLK_CLKSEL1_TMR0_S_Pos (8)
#define | CLK_CLKSEL1_TMR0_S_Msk (0x7ul << CLK_CLKSEL1_TMR0_S_Pos)
#define | CLK_CLKSEL1_TMR1_S_Pos (12)
#define | CLK_CLKSEL1_TMR1_S_Msk (0x7ul << CLK_CLKSEL1_TMR1_S_Pos)
#define | CLK_CLKSEL1_LCD_S_Pos (18)
#define | CLK_CLKSEL1_LCD_S_Msk (0x1ul << CLK_CLKSEL1_LCD_S_Pos)
#define | CLK_CLKSEL2_FRQDIV_S_Pos (2)
#define | CLK_CLKSEL2_FRQDIV_S_Msk (0x3ul << CLK_CLKSEL2_FRQDIV_S_Pos)
#define | CLK_CLKSEL2_PWM1_CH01_S_Pos (4)
#define | CLK_CLKSEL2_PWM1_CH01_S_Msk (0x3ul << CLK_CLKSEL2_PWM1_CH01_S_Pos)
#define | CLK_CLKSEL2_PWM1_CH23_S_Pos (6)
#define | CLK_CLKSEL2_PWM1_CH23_S_Msk (0x3ul << CLK_CLKSEL2_PWM1_CH23_S_Pos)
#define | CLK_CLKSEL2_TMR2_S_Pos (8)
#define | CLK_CLKSEL2_TMR2_S_Msk (0x7ul << CLK_CLKSEL2_TMR2_S_Pos)
#define | CLK_CLKSEL2_TMR3_S_Pos (12)
#define | CLK_CLKSEL2_TMR3_S_Msk (0x7ul << CLK_CLKSEL2_TMR3_S_Pos)
#define | CLK_CLKSEL2_I2S_S_Pos (16)
#define | CLK_CLKSEL2_I2S_S_Msk (0x3ul << CLK_CLKSEL2_I2S_S_Pos)
#define | CLK_CLKSEL2_SC_S_Pos (18)
#define | CLK_CLKSEL2_SC_S_Msk (0x3ul << CLK_CLKSEL2_SC_S_Pos)
#define | CLK_CLKSEL2_SPI0_S_Pos (20)
#define | CLK_CLKSEL2_SPI0_S_Msk (0x1ul << CLK_CLKSEL2_SPI0_S_Pos)
#define | CLK_CLKSEL2_SPI1_S_Pos (21)
#define | CLK_CLKSEL2_SPI1_S_Msk (0x1ul << CLK_CLKSEL2_SPI1_S_Pos)
#define | CLK_CLKSEL2_SPI2_S_Pos (22)
#define | CLK_CLKSEL2_SPI2_S_Msk (0x1ul << CLK_CLKSEL2_SPI2_S_Pos)
#define | CLK_CLKDIV0_HCLK_N_Pos (0)
#define | CLK_CLKDIV0_HCLK_N_Msk (0xful << CLK_CLKDIV0_HCLK_N_Pos)
#define | CLK_CLKDIV0_USB_N_Pos (4)
#define | CLK_CLKDIV0_USB_N_Msk (0xful << CLK_CLKDIV0_USB_N_Pos)
#define | CLK_CLKDIV0_UART_N_Pos (8)
#define | CLK_CLKDIV0_UART_N_Msk (0xful << CLK_CLKDIV0_UART_N_Pos)
#define | CLK_CLKDIV0_I2S_N_Pos (12)
#define | CLK_CLKDIV0_I2S_N_Msk (0xful << CLK_CLKDIV0_I2S_N_Pos)
#define | CLK_CLKDIV0_ADC_N_Pos (16)
#define | CLK_CLKDIV0_ADC_N_Msk (0xfful << CLK_CLKDIV0_ADC_N_Pos)
#define | CLK_CLKDIV0_SC0_N_Pos (28)
#define | CLK_CLKDIV0_SC0_N_Msk (0xful << CLK_CLKDIV0_SC0_N_Pos)
#define | CLK_CLKDIV1_SC1_N_Pos (0)
#define | CLK_CLKDIV1_SC1_N_Msk (0xful << CLK_CLKDIV1_SC1_N_Pos)
#define | CLK_CLKDIV1_SC2_N_Pos (4)
#define | CLK_CLKDIV1_SC2_N_Msk (0xful << CLK_CLKDIV1_SC2_N_Pos)
#define | CLK_PLLCTL_FB_DV_Pos (0)
#define | CLK_PLLCTL_FB_DV_Msk (0x3ful << CLK_PLLCTL_FB_DV_Pos)
#define | CLK_PLLCTL_IN_DV_Pos (8)
#define | CLK_PLLCTL_IN_DV_Msk (0x3ul << CLK_PLLCTL_IN_DV_Pos)
#define | CLK_PLLCTL_OUT_DV_Pos (12)
#define | CLK_PLLCTL_OUT_DV_Msk (0x1ul << CLK_PLLCTL_OUT_DV_Pos)
#define | CLK_PLLCTL_PD_Pos (16)
#define | CLK_PLLCTL_PD_Msk (0x1ul << CLK_PLLCTL_PD_Pos)
#define | CLK_PLLCTL_PLL_SRC_Pos (17)
#define | CLK_PLLCTL_PLL_SRC_Msk (0x1ul << CLK_PLLCTL_PLL_SRC_Pos)
#define | CLK_FRQDIV_FSEL_Pos (0)
#define | CLK_FRQDIV_FSEL_Msk (0xful << CLK_FRQDIV_FSEL_Pos)
#define | CLK_FRQDIV_FDIV_EN_Pos (4)
#define | CLK_FRQDIV_FDIV_EN_Msk (0x1ul << CLK_FRQDIV_FDIV_EN_Pos)
#define | CLK_MCLKO_MCLK_SEL_Pos (0)
#define | CLK_MCLKO_MCLK_SEL_Msk (0x3ful << CLK_MCLKO_MCLK_SEL_Pos)
#define | CLK_MCLKO_MCLK_EN_Pos (7)
#define | CLK_MCLKO_MCLK_EN_Msk (0x1ul << CLK_MCLKO_MCLK_EN_Pos)
#define | CLK_WK_INTSTS_PD_WK_IS_Pos (0)
#define | CLK_WK_INTSTS_PD_WK_IS_Msk (0x1ul << CLK_WK_INTSTS_PD_WK_IS_Pos)

## Detailed Description

Configuration of the Cortex-M0 Processor and Core Peripherals

## Macro Definition Documentation

## ◆ __CM0_REV

#define __CM0_REV 0x0201

Core Revision r2p1

Definition at line 131 of file Nano100Series.h.

## ◆ __FPU_PRESENT

#define __FPU_PRESENT 0

FPU present or not

Definition at line 135 of file Nano100Series.h.

## ◆ __MPU_PRESENT

#define __MPU_PRESENT 0

MPU present or not

Definition at line 134 of file Nano100Series.h.

## ◆ __NVIC_PRIO_BITS

#define __NVIC_PRIO_BITS 2

Number of Bits used for Priority Levels

Definition at line 132 of file Nano100Series.h.

## ◆ __Vendor_SysTickConfig

#define __Vendor_SysTickConfig 0

Set to 1 if different SysTick Config is used

Definition at line 133 of file Nano100Series.h.

## ◆ CLK_AHBCLK_DMA_EN_Msk

#define CLK_AHBCLK_DMA_EN_Msk (0x1ul << CLK_AHBCLK_DMA_EN_Pos)

CLK_T::AHBCLK: DMA_EN Mask

Definition at line 1249 of file Nano100Series.h.

## ◆ CLK_AHBCLK_DMA_EN_Pos

#define CLK_AHBCLK_DMA_EN_Pos (1)

CLK_T::AHBCLK: DMA_EN Position

Definition at line 1248 of file Nano100Series.h.

## ◆ CLK_AHBCLK_EBI_EN_Msk

#define CLK_AHBCLK_EBI_EN_Msk (0x1ul << CLK_AHBCLK_EBI_EN_Pos)

CLK_T::AHBCLK: EBI_EN Mask

Definition at line 1255 of file Nano100Series.h.

## ◆ CLK_AHBCLK_EBI_EN_Pos

#define CLK_AHBCLK_EBI_EN_Pos (3)

CLK_T::AHBCLK: EBI_EN Position

Definition at line 1254 of file Nano100Series.h.

## ◆ CLK_AHBCLK_GPIO_EN_Msk

#define CLK_AHBCLK_GPIO_EN_Msk (0x1ul << CLK_AHBCLK_GPIO_EN_Pos)

CLK_T::AHBCLK: GPIO_EN Mask

Definition at line 1246 of file Nano100Series.h.

## ◆ CLK_AHBCLK_GPIO_EN_Pos

#define CLK_AHBCLK_GPIO_EN_Pos (0)

CLK_T::AHBCLK: GPIO_EN Position

Definition at line 1245 of file Nano100Series.h.

## ◆ CLK_AHBCLK_ISP_EN_Msk

#define CLK_AHBCLK_ISP_EN_Msk (0x1ul << CLK_AHBCLK_ISP_EN_Pos)

CLK_T::AHBCLK: ISP_EN Mask

Definition at line 1252 of file Nano100Series.h.

## ◆ CLK_AHBCLK_ISP_EN_Pos

#define CLK_AHBCLK_ISP_EN_Pos (2)

CLK_T::AHBCLK: ISP_EN Position

Definition at line 1251 of file Nano100Series.h.

## ◆ CLK_AHBCLK_SRAM_EN_Msk

#define CLK_AHBCLK_SRAM_EN_Msk (0x1ul << CLK_AHBCLK_SRAM_EN_Pos)

CLK_T::AHBCLK: SRAM_EN Mask

Definition at line 1258 of file Nano100Series.h.

## ◆ CLK_AHBCLK_SRAM_EN_Pos

#define CLK_AHBCLK_SRAM_EN_Pos (4)

CLK_T::AHBCLK: SRAM_EN Position

Definition at line 1257 of file Nano100Series.h.

## ◆ CLK_AHBCLK_TICK_EN_Msk

#define CLK_AHBCLK_TICK_EN_Msk (0x1ul << CLK_AHBCLK_TICK_EN_Pos)

CLK_T::AHBCLK: TICK_EN Mask

Definition at line 1261 of file Nano100Series.h.

## ◆ CLK_AHBCLK_TICK_EN_Pos

#define CLK_AHBCLK_TICK_EN_Pos (5)

CLK_T::AHBCLK: TICK_EN Position

Definition at line 1260 of file Nano100Series.h.

## ◆ CLK_APBCLK_ADC_EN_Msk

#define CLK_APBCLK_ADC_EN_Msk (0x1ul << CLK_APBCLK_ADC_EN_Pos)

CLK_T::APBCLK: ADC_EN Mask

Definition at line 1330 of file Nano100Series.h.

## ◆ CLK_APBCLK_ADC_EN_Pos

#define CLK_APBCLK_ADC_EN_Pos (28)

CLK_T::APBCLK: ADC_EN Position

Definition at line 1329 of file Nano100Series.h.

## ◆ CLK_APBCLK_DAC_EN_Msk

#define CLK_APBCLK_DAC_EN_Msk (0x1ul << CLK_APBCLK_DAC_EN_Pos)

CLK_T::APBCLK: DAC_EN Mask

Definition at line 1321 of file Nano100Series.h.

## ◆ CLK_APBCLK_DAC_EN_Pos

#define CLK_APBCLK_DAC_EN_Pos (25)

CLK_T::APBCLK: DAC_EN Position

Definition at line 1320 of file Nano100Series.h.

## ◆ CLK_APBCLK_FDIV_EN_Msk

#define CLK_APBCLK_FDIV_EN_Msk (0x1ul << CLK_APBCLK_FDIV_EN_Pos)

CLK_T::APBCLK: FDIV_EN Mask

Definition at line 1282 of file Nano100Series.h.

## ◆ CLK_APBCLK_FDIV_EN_Pos

#define CLK_APBCLK_FDIV_EN_Pos (6)

CLK_T::APBCLK: FDIV_EN Position

Definition at line 1281 of file Nano100Series.h.

## ◆ CLK_APBCLK_I2C0_EN_Msk

#define CLK_APBCLK_I2C0_EN_Msk (0x1ul << CLK_APBCLK_I2C0_EN_Pos)

CLK_T::APBCLK: I2C0_EN Mask

Definition at line 1288 of file Nano100Series.h.

## ◆ CLK_APBCLK_I2C0_EN_Pos

#define CLK_APBCLK_I2C0_EN_Pos (8)

CLK_T::APBCLK: I2C0_EN Position

Definition at line 1287 of file Nano100Series.h.

## ◆ CLK_APBCLK_I2C1_EN_Msk

#define CLK_APBCLK_I2C1_EN_Msk (0x1ul << CLK_APBCLK_I2C1_EN_Pos)

CLK_T::APBCLK: I2C1_EN Mask

Definition at line 1291 of file Nano100Series.h.

## ◆ CLK_APBCLK_I2C1_EN_Pos

#define CLK_APBCLK_I2C1_EN_Pos (9)

CLK_T::APBCLK: I2C1_EN Position

Definition at line 1290 of file Nano100Series.h.

## ◆ CLK_APBCLK_I2S_EN_Msk

#define CLK_APBCLK_I2S_EN_Msk (0x1ul << CLK_APBCLK_I2S_EN_Pos)

CLK_T::APBCLK: I2S_EN Mask

Definition at line 1333 of file Nano100Series.h.

## ◆ CLK_APBCLK_I2S_EN_Pos

#define CLK_APBCLK_I2S_EN_Pos (29)

CLK_T::APBCLK: I2S_EN Position

Definition at line 1332 of file Nano100Series.h.

## ◆ CLK_APBCLK_LCD_EN_Msk

#define CLK_APBCLK_LCD_EN_Msk (0x1ul << CLK_APBCLK_LCD_EN_Pos)

CLK_T::APBCLK: LCD_EN Mask

Definition at line 1324 of file Nano100Series.h.

## ◆ CLK_APBCLK_LCD_EN_Pos

#define CLK_APBCLK_LCD_EN_Pos (26)

CLK_T::APBCLK: LCD_EN Position

Definition at line 1323 of file Nano100Series.h.

## ◆ CLK_APBCLK_PWM0_CH01_EN_Msk

#define CLK_APBCLK_PWM0_CH01_EN_Msk (0x1ul << CLK_APBCLK_PWM0_CH01_EN_Pos)

CLK_T::APBCLK: PWM0_CH01_EN Mask

Definition at line 1309 of file Nano100Series.h.

## ◆ CLK_APBCLK_PWM0_CH01_EN_Pos

#define CLK_APBCLK_PWM0_CH01_EN_Pos (20)

CLK_T::APBCLK: PWM0_CH01_EN Position

Definition at line 1308 of file Nano100Series.h.

## ◆ CLK_APBCLK_PWM0_CH23_EN_Msk

#define CLK_APBCLK_PWM0_CH23_EN_Msk (0x1ul << CLK_APBCLK_PWM0_CH23_EN_Pos)

CLK_T::APBCLK: PWM0_CH23_EN Mask

Definition at line 1312 of file Nano100Series.h.

## ◆ CLK_APBCLK_PWM0_CH23_EN_Pos

#define CLK_APBCLK_PWM0_CH23_EN_Pos (21)

CLK_T::APBCLK: PWM0_CH23_EN Position

Definition at line 1311 of file Nano100Series.h.

## ◆ CLK_APBCLK_PWM1_CH01_EN_Msk

#define CLK_APBCLK_PWM1_CH01_EN_Msk (0x1ul << CLK_APBCLK_PWM1_CH01_EN_Pos)

CLK_T::APBCLK: PWM1_CH01_EN Mask

Definition at line 1315 of file Nano100Series.h.

## ◆ CLK_APBCLK_PWM1_CH01_EN_Pos

#define CLK_APBCLK_PWM1_CH01_EN_Pos (22)

CLK_T::APBCLK: PWM1_CH01_EN Position

Definition at line 1314 of file Nano100Series.h.

## ◆ CLK_APBCLK_PWM1_CH23_EN_Msk

#define CLK_APBCLK_PWM1_CH23_EN_Msk (0x1ul << CLK_APBCLK_PWM1_CH23_EN_Pos)

CLK_T::APBCLK: PWM1_CH23_EN Mask

Definition at line 1318 of file Nano100Series.h.

## ◆ CLK_APBCLK_PWM1_CH23_EN_Pos

#define CLK_APBCLK_PWM1_CH23_EN_Pos (23)

CLK_T::APBCLK: PWM1_CH23_EN Position

Definition at line 1317 of file Nano100Series.h.

## ◆ CLK_APBCLK_RTC_EN_Msk

#define CLK_APBCLK_RTC_EN_Msk (0x1ul << CLK_APBCLK_RTC_EN_Pos)

CLK_T::APBCLK: RTC_EN Mask

Definition at line 1267 of file Nano100Series.h.

## ◆ CLK_APBCLK_RTC_EN_Pos

#define CLK_APBCLK_RTC_EN_Pos (1)

CLK_T::APBCLK: RTC_EN Position

Definition at line 1266 of file Nano100Series.h.

## ◆ CLK_APBCLK_SC0_EN_Msk

#define CLK_APBCLK_SC0_EN_Msk (0x1ul << CLK_APBCLK_SC0_EN_Pos)

CLK_T::APBCLK: SC0_EN Mask

Definition at line 1336 of file Nano100Series.h.

## ◆ CLK_APBCLK_SC0_EN_Pos

#define CLK_APBCLK_SC0_EN_Pos (30)

CLK_T::APBCLK: SC0_EN Position

Definition at line 1335 of file Nano100Series.h.

## ◆ CLK_APBCLK_SC1_EN_Msk

#define CLK_APBCLK_SC1_EN_Msk (0x1ul << CLK_APBCLK_SC1_EN_Pos)

CLK_T::APBCLK: SC1_EN Mask

Definition at line 1339 of file Nano100Series.h.

## ◆ CLK_APBCLK_SC1_EN_Pos

#define CLK_APBCLK_SC1_EN_Pos (31)

CLK_T::APBCLK: SC1_EN Position

Definition at line 1338 of file Nano100Series.h.

## ◆ CLK_APBCLK_SC2_EN_Msk

#define CLK_APBCLK_SC2_EN_Msk (0x1ul << CLK_APBCLK_SC2_EN_Pos)

CLK_T::APBCLK: SC2_EN Mask

Definition at line 1285 of file Nano100Series.h.

## ◆ CLK_APBCLK_SC2_EN_Pos

#define CLK_APBCLK_SC2_EN_Pos (7)

CLK_T::APBCLK: SC2_EN Position

Definition at line 1284 of file Nano100Series.h.

## ◆ CLK_APBCLK_SPI0_EN_Msk

#define CLK_APBCLK_SPI0_EN_Msk (0x1ul << CLK_APBCLK_SPI0_EN_Pos)

CLK_T::APBCLK: SPI0_EN Mask

Definition at line 1294 of file Nano100Series.h.

## ◆ CLK_APBCLK_SPI0_EN_Pos

#define CLK_APBCLK_SPI0_EN_Pos (12)

CLK_T::APBCLK: SPI0_EN Position

Definition at line 1293 of file Nano100Series.h.

## ◆ CLK_APBCLK_SPI1_EN_Msk

#define CLK_APBCLK_SPI1_EN_Msk (0x1ul << CLK_APBCLK_SPI1_EN_Pos)

CLK_T::APBCLK: SPI1_EN Mask

Definition at line 1297 of file Nano100Series.h.

## ◆ CLK_APBCLK_SPI1_EN_Pos

#define CLK_APBCLK_SPI1_EN_Pos (13)

CLK_T::APBCLK: SPI1_EN Position

Definition at line 1296 of file Nano100Series.h.

## ◆ CLK_APBCLK_SPI2_EN_Msk

#define CLK_APBCLK_SPI2_EN_Msk (0x1ul << CLK_APBCLK_SPI2_EN_Pos)

CLK_T::APBCLK: SPI2_EN Mask

Definition at line 1300 of file Nano100Series.h.

## ◆ CLK_APBCLK_SPI2_EN_Pos

#define CLK_APBCLK_SPI2_EN_Pos (14)

CLK_T::APBCLK: SPI2_EN Position

Definition at line 1299 of file Nano100Series.h.

## ◆ CLK_APBCLK_TMR0_EN_Msk

#define CLK_APBCLK_TMR0_EN_Msk (0x1ul << CLK_APBCLK_TMR0_EN_Pos)

CLK_T::APBCLK: TMR0_EN Mask

Definition at line 1270 of file Nano100Series.h.

## ◆ CLK_APBCLK_TMR0_EN_Pos

#define CLK_APBCLK_TMR0_EN_Pos (2)

CLK_T::APBCLK: TMR0_EN Position

Definition at line 1269 of file Nano100Series.h.

## ◆ CLK_APBCLK_TMR1_EN_Msk

#define CLK_APBCLK_TMR1_EN_Msk (0x1ul << CLK_APBCLK_TMR1_EN_Pos)

CLK_T::APBCLK: TMR1_EN Mask

Definition at line 1273 of file Nano100Series.h.

## ◆ CLK_APBCLK_TMR1_EN_Pos

#define CLK_APBCLK_TMR1_EN_Pos (3)

CLK_T::APBCLK: TMR1_EN Position

Definition at line 1272 of file Nano100Series.h.

## ◆ CLK_APBCLK_TMR2_EN_Msk

#define CLK_APBCLK_TMR2_EN_Msk (0x1ul << CLK_APBCLK_TMR2_EN_Pos)

CLK_T::APBCLK: TMR2_EN Mask

Definition at line 1276 of file Nano100Series.h.

## ◆ CLK_APBCLK_TMR2_EN_Pos

#define CLK_APBCLK_TMR2_EN_Pos (4)

CLK_T::APBCLK: TMR2_EN Position

Definition at line 1275 of file Nano100Series.h.

## ◆ CLK_APBCLK_TMR3_EN_Msk

#define CLK_APBCLK_TMR3_EN_Msk (0x1ul << CLK_APBCLK_TMR3_EN_Pos)

CLK_T::APBCLK: TMR3_EN Mask

Definition at line 1279 of file Nano100Series.h.

## ◆ CLK_APBCLK_TMR3_EN_Pos

#define CLK_APBCLK_TMR3_EN_Pos (5)

CLK_T::APBCLK: TMR3_EN Position

Definition at line 1278 of file Nano100Series.h.

## ◆ CLK_APBCLK_UART0_EN_Msk

#define CLK_APBCLK_UART0_EN_Msk (0x1ul << CLK_APBCLK_UART0_EN_Pos)

CLK_T::APBCLK: UART0_EN Mask

Definition at line 1303 of file Nano100Series.h.

## ◆ CLK_APBCLK_UART0_EN_Pos

#define CLK_APBCLK_UART0_EN_Pos (16)

CLK_T::APBCLK: UART0_EN Position

Definition at line 1302 of file Nano100Series.h.

## ◆ CLK_APBCLK_UART1_EN_Msk

#define CLK_APBCLK_UART1_EN_Msk (0x1ul << CLK_APBCLK_UART1_EN_Pos)

CLK_T::APBCLK: UART1_EN Mask

Definition at line 1306 of file Nano100Series.h.

## ◆ CLK_APBCLK_UART1_EN_Pos

#define CLK_APBCLK_UART1_EN_Pos (17)

CLK_T::APBCLK: UART1_EN Position

Definition at line 1305 of file Nano100Series.h.

## ◆ CLK_APBCLK_USBD_EN_Msk

#define CLK_APBCLK_USBD_EN_Msk (0x1ul << CLK_APBCLK_USBD_EN_Pos)

CLK_T::APBCLK: USBD_EN Mask

Definition at line 1327 of file Nano100Series.h.

## ◆ CLK_APBCLK_USBD_EN_Pos

#define CLK_APBCLK_USBD_EN_Pos (27)

CLK_T::APBCLK: USBD_EN Position

Definition at line 1326 of file Nano100Series.h.

## ◆ CLK_APBCLK_WDT_EN_Msk

#define CLK_APBCLK_WDT_EN_Msk (0x1ul << CLK_APBCLK_WDT_EN_Pos)

CLK_T::APBCLK: WDT_EN Mask

Definition at line 1264 of file Nano100Series.h.

## ◆ CLK_APBCLK_WDT_EN_Pos

#define CLK_APBCLK_WDT_EN_Pos (0)

CLK_T::APBCLK: WDT_EN Position

Definition at line 1263 of file Nano100Series.h.

## ◆ CLK_CLKDIV0_ADC_N_Msk

#define CLK_CLKDIV0_ADC_N_Msk (0xfful << CLK_CLKDIV0_ADC_N_Pos)

CLK_T::CLKDIV0: ADC_N Mask

Definition at line 1426 of file Nano100Series.h.

## ◆ CLK_CLKDIV0_ADC_N_Pos

#define CLK_CLKDIV0_ADC_N_Pos (16)

CLK_T::CLKDIV0: ADC_N Position

Definition at line 1425 of file Nano100Series.h.

## ◆ CLK_CLKDIV0_HCLK_N_Msk

#define CLK_CLKDIV0_HCLK_N_Msk (0xful << CLK_CLKDIV0_HCLK_N_Pos)

CLK_T::CLKDIV0: HCLK_N Mask

Definition at line 1414 of file Nano100Series.h.

## ◆ CLK_CLKDIV0_HCLK_N_Pos

#define CLK_CLKDIV0_HCLK_N_Pos (0)

CLK_T::CLKDIV0: HCLK_N Position

Definition at line 1413 of file Nano100Series.h.

## ◆ CLK_CLKDIV0_I2S_N_Msk

#define CLK_CLKDIV0_I2S_N_Msk (0xful << CLK_CLKDIV0_I2S_N_Pos)

CLK_T::CLKDIV0: I2S_N Mask

Definition at line 1423 of file Nano100Series.h.

## ◆ CLK_CLKDIV0_I2S_N_Pos

#define CLK_CLKDIV0_I2S_N_Pos (12)

CLK_T::CLKDIV0: I2S_N Position

Definition at line 1422 of file Nano100Series.h.

## ◆ CLK_CLKDIV0_SC0_N_Msk

#define CLK_CLKDIV0_SC0_N_Msk (0xful << CLK_CLKDIV0_SC0_N_Pos)

CLK_T::CLKDIV0: SC0_N Mask

Definition at line 1429 of file Nano100Series.h.

## ◆ CLK_CLKDIV0_SC0_N_Pos

#define CLK_CLKDIV0_SC0_N_Pos (28)

CLK_T::CLKDIV0: SC0_N Position

Definition at line 1428 of file Nano100Series.h.

## ◆ CLK_CLKDIV0_UART_N_Msk

#define CLK_CLKDIV0_UART_N_Msk (0xful << CLK_CLKDIV0_UART_N_Pos)

CLK_T::CLKDIV0: UART_N Mask

Definition at line 1420 of file Nano100Series.h.

## ◆ CLK_CLKDIV0_UART_N_Pos

#define CLK_CLKDIV0_UART_N_Pos (8)

CLK_T::CLKDIV0: UART_N Position

Definition at line 1419 of file Nano100Series.h.

## ◆ CLK_CLKDIV0_USB_N_Msk

#define CLK_CLKDIV0_USB_N_Msk (0xful << CLK_CLKDIV0_USB_N_Pos)

CLK_T::CLKDIV0: USB_N Mask

Definition at line 1417 of file Nano100Series.h.

## ◆ CLK_CLKDIV0_USB_N_Pos

#define CLK_CLKDIV0_USB_N_Pos (4)

CLK_T::CLKDIV0: USB_N Position

Definition at line 1416 of file Nano100Series.h.

## ◆ CLK_CLKDIV1_SC1_N_Msk

#define CLK_CLKDIV1_SC1_N_Msk (0xful << CLK_CLKDIV1_SC1_N_Pos)

CLK_T::CLKDIV1: SC1_N Mask

Definition at line 1432 of file Nano100Series.h.

## ◆ CLK_CLKDIV1_SC1_N_Pos

#define CLK_CLKDIV1_SC1_N_Pos (0)

CLK_T::CLKDIV1: SC1_N Position

Definition at line 1431 of file Nano100Series.h.

## ◆ CLK_CLKDIV1_SC2_N_Msk

#define CLK_CLKDIV1_SC2_N_Msk (0xful << CLK_CLKDIV1_SC2_N_Pos)

CLK_T::CLKDIV1: SC2_N Mask

Definition at line 1435 of file Nano100Series.h.

## ◆ CLK_CLKDIV1_SC2_N_Pos

#define CLK_CLKDIV1_SC2_N_Pos (4)

CLK_T::CLKDIV1: SC2_N Position

Definition at line 1434 of file Nano100Series.h.

## ◆ CLK_CLKSEL0_HCLK_S_Msk

#define CLK_CLKSEL0_HCLK_S_Msk (0x7ul << CLK_CLKSEL0_HCLK_S_Pos)

CLK_T::CLKSEL0: HCLK_S Mask

Definition at line 1360 of file Nano100Series.h.

## ◆ CLK_CLKSEL0_HCLK_S_Pos

#define CLK_CLKSEL0_HCLK_S_Pos (0)

CLK_T::CLKSEL0: HCLK_S Position

Definition at line 1359 of file Nano100Series.h.

## ◆ CLK_CLKSEL1_ADC_S_Msk

#define CLK_CLKSEL1_ADC_S_Msk (0x3ul << CLK_CLKSEL1_ADC_S_Pos)

CLK_T::CLKSEL1: ADC_S Mask

Definition at line 1366 of file Nano100Series.h.

## ◆ CLK_CLKSEL1_ADC_S_Pos

#define CLK_CLKSEL1_ADC_S_Pos (2)

CLK_T::CLKSEL1: ADC_S Position

Definition at line 1365 of file Nano100Series.h.

## ◆ CLK_CLKSEL1_LCD_S_Msk

#define CLK_CLKSEL1_LCD_S_Msk (0x1ul << CLK_CLKSEL1_LCD_S_Pos)

CLK_T::CLKSEL1: LCD_S Mask

Definition at line 1381 of file Nano100Series.h.

## ◆ CLK_CLKSEL1_LCD_S_Pos

#define CLK_CLKSEL1_LCD_S_Pos (18)

CLK_T::CLKSEL1: LCD_S Position

Definition at line 1380 of file Nano100Series.h.

## ◆ CLK_CLKSEL1_PWM0_CH01_S_Msk

#define CLK_CLKSEL1_PWM0_CH01_S_Msk (0x3ul << CLK_CLKSEL1_PWM0_CH01_S_Pos)

CLK_T::CLKSEL1: PWM0_CH01_S Mask

Definition at line 1369 of file Nano100Series.h.

## ◆ CLK_CLKSEL1_PWM0_CH01_S_Pos

#define CLK_CLKSEL1_PWM0_CH01_S_Pos (4)

CLK_T::CLKSEL1: PWM0_CH01_S Position

Definition at line 1368 of file Nano100Series.h.

## ◆ CLK_CLKSEL1_PWM0_CH23_S_Msk

#define CLK_CLKSEL1_PWM0_CH23_S_Msk (0x3ul << CLK_CLKSEL1_PWM0_CH23_S_Pos)

CLK_T::CLKSEL1: PWM0_CH23_S Mask

Definition at line 1372 of file Nano100Series.h.

## ◆ CLK_CLKSEL1_PWM0_CH23_S_Pos

#define CLK_CLKSEL1_PWM0_CH23_S_Pos (6)

CLK_T::CLKSEL1: PWM0_CH23_S Position

Definition at line 1371 of file Nano100Series.h.

## ◆ CLK_CLKSEL1_TMR0_S_Msk

#define CLK_CLKSEL1_TMR0_S_Msk (0x7ul << CLK_CLKSEL1_TMR0_S_Pos)

CLK_T::CLKSEL1: TMR0_S Mask

Definition at line 1375 of file Nano100Series.h.

## ◆ CLK_CLKSEL1_TMR0_S_Pos

#define CLK_CLKSEL1_TMR0_S_Pos (8)

CLK_T::CLKSEL1: TMR0_S Position

Definition at line 1374 of file Nano100Series.h.

## ◆ CLK_CLKSEL1_TMR1_S_Msk

#define CLK_CLKSEL1_TMR1_S_Msk (0x7ul << CLK_CLKSEL1_TMR1_S_Pos)

CLK_T::CLKSEL1: TMR1_S Mask

Definition at line 1378 of file Nano100Series.h.

## ◆ CLK_CLKSEL1_TMR1_S_Pos

#define CLK_CLKSEL1_TMR1_S_Pos (12)

CLK_T::CLKSEL1: TMR1_S Position

Definition at line 1377 of file Nano100Series.h.

## ◆ CLK_CLKSEL1_UART_S_Msk

#define CLK_CLKSEL1_UART_S_Msk (0x3ul << CLK_CLKSEL1_UART_S_Pos)

CLK_T::CLKSEL1: UART_S Mask

Definition at line 1363 of file Nano100Series.h.

## ◆ CLK_CLKSEL1_UART_S_Pos

#define CLK_CLKSEL1_UART_S_Pos (0)

CLK_T::CLKSEL1: UART_S Position

Definition at line 1362 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_FRQDIV_S_Msk

#define CLK_CLKSEL2_FRQDIV_S_Msk (0x3ul << CLK_CLKSEL2_FRQDIV_S_Pos)

CLK_T::CLKSEL2: FRQDIV_S Mask

Definition at line 1384 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_FRQDIV_S_Pos

#define CLK_CLKSEL2_FRQDIV_S_Pos (2)

CLK_T::CLKSEL2: FRQDIV_S Position

Definition at line 1383 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_I2S_S_Msk

#define CLK_CLKSEL2_I2S_S_Msk (0x3ul << CLK_CLKSEL2_I2S_S_Pos)

CLK_T::CLKSEL2: I2S_S Mask

Definition at line 1399 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_I2S_S_Pos

#define CLK_CLKSEL2_I2S_S_Pos (16)

CLK_T::CLKSEL2: I2S_S Position

Definition at line 1398 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_PWM1_CH01_S_Msk

#define CLK_CLKSEL2_PWM1_CH01_S_Msk (0x3ul << CLK_CLKSEL2_PWM1_CH01_S_Pos)

CLK_T::CLKSEL2: PWM1_CH01_S Mask

Definition at line 1387 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_PWM1_CH01_S_Pos

#define CLK_CLKSEL2_PWM1_CH01_S_Pos (4)

CLK_T::CLKSEL2: PWM1_CH01_S Position

Definition at line 1386 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_PWM1_CH23_S_Msk

#define CLK_CLKSEL2_PWM1_CH23_S_Msk (0x3ul << CLK_CLKSEL2_PWM1_CH23_S_Pos)

CLK_T::CLKSEL2: PWM1_CH23_S Mask

Definition at line 1390 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_PWM1_CH23_S_Pos

#define CLK_CLKSEL2_PWM1_CH23_S_Pos (6)

CLK_T::CLKSEL2: PWM1_CH23_S Position

Definition at line 1389 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_SC_S_Msk

#define CLK_CLKSEL2_SC_S_Msk (0x3ul << CLK_CLKSEL2_SC_S_Pos)

CLK_T::CLKSEL2: SC_S Mask

Definition at line 1402 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_SC_S_Pos

#define CLK_CLKSEL2_SC_S_Pos (18)

CLK_T::CLKSEL2: SC_S Position

Definition at line 1401 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_SPI0_S_Msk

#define CLK_CLKSEL2_SPI0_S_Msk (0x1ul << CLK_CLKSEL2_SPI0_S_Pos)

CLK_T::CLKSEL2: SPI0_S Mask

Definition at line 1405 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_SPI0_S_Pos

#define CLK_CLKSEL2_SPI0_S_Pos (20)

CLK_T::CLKSEL2: SPI0_S Position

Definition at line 1404 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_SPI1_S_Msk

#define CLK_CLKSEL2_SPI1_S_Msk (0x1ul << CLK_CLKSEL2_SPI1_S_Pos)

CLK_T::CLKSEL2: SPI1_S Mask

Definition at line 1408 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_SPI1_S_Pos

#define CLK_CLKSEL2_SPI1_S_Pos (21)

CLK_T::CLKSEL2: SPI1_S Position

Definition at line 1407 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_SPI2_S_Msk

#define CLK_CLKSEL2_SPI2_S_Msk (0x1ul << CLK_CLKSEL2_SPI2_S_Pos)

CLK_T::CLKSEL2: SPI2_S Mask

Definition at line 1411 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_SPI2_S_Pos

#define CLK_CLKSEL2_SPI2_S_Pos (22)

CLK_T::CLKSEL2: SPI2_S Position

Definition at line 1410 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_TMR2_S_Msk

#define CLK_CLKSEL2_TMR2_S_Msk (0x7ul << CLK_CLKSEL2_TMR2_S_Pos)

CLK_T::CLKSEL2: TMR2_S Mask

Definition at line 1393 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_TMR2_S_Pos

#define CLK_CLKSEL2_TMR2_S_Pos (8)

CLK_T::CLKSEL2: TMR2_S Position

Definition at line 1392 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_TMR3_S_Msk

#define CLK_CLKSEL2_TMR3_S_Msk (0x7ul << CLK_CLKSEL2_TMR3_S_Pos)

CLK_T::CLKSEL2: TMR3_S Mask

Definition at line 1396 of file Nano100Series.h.

## ◆ CLK_CLKSEL2_TMR3_S_Pos

#define CLK_CLKSEL2_TMR3_S_Pos (12)

CLK_T::CLKSEL2: TMR3_S Position

Definition at line 1395 of file Nano100Series.h.

## ◆ CLK_CLKSTATUS_CLK_SW_FAIL_Msk

#define CLK_CLKSTATUS_CLK_SW_FAIL_Msk (0x1ul << CLK_CLKSTATUS_CLK_SW_FAIL_Pos)

CLK_T::CLKSTATUS: CLK_SW_FAIL Mask

Definition at line 1357 of file Nano100Series.h.

## ◆ CLK_CLKSTATUS_CLK_SW_FAIL_Pos

#define CLK_CLKSTATUS_CLK_SW_FAIL_Pos (7)

CLK_T::CLKSTATUS: CLK_SW_FAIL Position

Definition at line 1356 of file Nano100Series.h.

## ◆ CLK_CLKSTATUS_HIRC_STB_Msk

#define CLK_CLKSTATUS_HIRC_STB_Msk (0x1ul << CLK_CLKSTATUS_HIRC_STB_Pos)

CLK_T::CLKSTATUS: HIRC_STB Mask

Definition at line 1354 of file Nano100Series.h.

## ◆ CLK_CLKSTATUS_HIRC_STB_Pos

#define CLK_CLKSTATUS_HIRC_STB_Pos (4)

CLK_T::CLKSTATUS: HIRC_STB Position

Definition at line 1353 of file Nano100Series.h.

## ◆ CLK_CLKSTATUS_HXT_STB_Msk

#define CLK_CLKSTATUS_HXT_STB_Msk (0x1ul << CLK_CLKSTATUS_HXT_STB_Pos)

CLK_T::CLKSTATUS: HXT_STB Mask

Definition at line 1342 of file Nano100Series.h.

## ◆ CLK_CLKSTATUS_HXT_STB_Pos

#define CLK_CLKSTATUS_HXT_STB_Pos (0)

CLK_T::CLKSTATUS: HXT_STB Position

Definition at line 1341 of file Nano100Series.h.

## ◆ CLK_CLKSTATUS_LIRC_STB_Msk

#define CLK_CLKSTATUS_LIRC_STB_Msk (0x1ul << CLK_CLKSTATUS_LIRC_STB_Pos)

CLK_T::CLKSTATUS: LIRC_STB Mask

Definition at line 1351 of file Nano100Series.h.

## ◆ CLK_CLKSTATUS_LIRC_STB_Pos

#define CLK_CLKSTATUS_LIRC_STB_Pos (3)

CLK_T::CLKSTATUS: LIRC_STB Position

Definition at line 1350 of file Nano100Series.h.

## ◆ CLK_CLKSTATUS_LXT_STB_Msk

#define CLK_CLKSTATUS_LXT_STB_Msk (0x1ul << CLK_CLKSTATUS_LXT_STB_Pos)

CLK_T::CLKSTATUS: LXT_STB Mask

Definition at line 1345 of file Nano100Series.h.

## ◆ CLK_CLKSTATUS_LXT_STB_Pos

#define CLK_CLKSTATUS_LXT_STB_Pos (1)

CLK_T::CLKSTATUS: LXT_STB Position

Definition at line 1344 of file Nano100Series.h.

## ◆ CLK_CLKSTATUS_PLL_STB_Msk

#define CLK_CLKSTATUS_PLL_STB_Msk (0x1ul << CLK_CLKSTATUS_PLL_STB_Pos)

CLK_T::CLKSTATUS: PLL_STB Mask

Definition at line 1348 of file Nano100Series.h.

## ◆ CLK_CLKSTATUS_PLL_STB_Pos

#define CLK_CLKSTATUS_PLL_STB_Pos (2)

CLK_T::CLKSTATUS: PLL_STB Position

Definition at line 1347 of file Nano100Series.h.

## ◆ CLK_FRQDIV_FDIV_EN_Msk

#define CLK_FRQDIV_FDIV_EN_Msk (0x1ul << CLK_FRQDIV_FDIV_EN_Pos)

CLK_T::FRQDIV: FDIV_EN Mask

Definition at line 1456 of file Nano100Series.h.

## ◆ CLK_FRQDIV_FDIV_EN_Pos

#define CLK_FRQDIV_FDIV_EN_Pos (4)

CLK_T::FRQDIV: FDIV_EN Position

Definition at line 1455 of file Nano100Series.h.

## ◆ CLK_FRQDIV_FSEL_Msk

#define CLK_FRQDIV_FSEL_Msk (0xful << CLK_FRQDIV_FSEL_Pos)

CLK_T::FRQDIV: FSEL Mask

Definition at line 1453 of file Nano100Series.h.

## ◆ CLK_FRQDIV_FSEL_Pos

#define CLK_FRQDIV_FSEL_Pos (0)

CLK_T::FRQDIV: FSEL Position

Definition at line 1452 of file Nano100Series.h.

## ◆ CLK_MCLKO_MCLK_EN_Msk

#define CLK_MCLKO_MCLK_EN_Msk (0x1ul << CLK_MCLKO_MCLK_EN_Pos)

CLK_T::MCLKO: MCLK_EN Mask

Definition at line 1462 of file Nano100Series.h.

## ◆ CLK_MCLKO_MCLK_EN_Pos

#define CLK_MCLKO_MCLK_EN_Pos (7)

CLK_T::MCLKO: MCLK_EN Position

Definition at line 1461 of file Nano100Series.h.

## ◆ CLK_MCLKO_MCLK_SEL_Msk

#define CLK_MCLKO_MCLK_SEL_Msk (0x3ful << CLK_MCLKO_MCLK_SEL_Pos)

CLK_T::MCLKO: MCLK_SEL Mask

Definition at line 1459 of file Nano100Series.h.

## ◆ CLK_MCLKO_MCLK_SEL_Pos

#define CLK_MCLKO_MCLK_SEL_Pos (0)

CLK_T::MCLKO: MCLK_SEL Position

Definition at line 1458 of file Nano100Series.h.

## ◆ CLK_PLLCTL_FB_DV_Msk

#define CLK_PLLCTL_FB_DV_Msk (0x3ful << CLK_PLLCTL_FB_DV_Pos)

CLK_T::PLLCTL: FB_DV Mask

Definition at line 1438 of file Nano100Series.h.

## ◆ CLK_PLLCTL_FB_DV_Pos

#define CLK_PLLCTL_FB_DV_Pos (0)

CLK_T::PLLCTL: FB_DV Position

Definition at line 1437 of file Nano100Series.h.

## ◆ CLK_PLLCTL_IN_DV_Msk

#define CLK_PLLCTL_IN_DV_Msk (0x3ul << CLK_PLLCTL_IN_DV_Pos)

CLK_T::PLLCTL: IN_DV Mask

Definition at line 1441 of file Nano100Series.h.

## ◆ CLK_PLLCTL_IN_DV_Pos

#define CLK_PLLCTL_IN_DV_Pos (8)

CLK_T::PLLCTL: IN_DV Position

Definition at line 1440 of file Nano100Series.h.

## ◆ CLK_PLLCTL_OUT_DV_Msk

#define CLK_PLLCTL_OUT_DV_Msk (0x1ul << CLK_PLLCTL_OUT_DV_Pos)

CLK_T::PLLCTL: OUT_DV Mask

Definition at line 1444 of file Nano100Series.h.

## ◆ CLK_PLLCTL_OUT_DV_Pos

#define CLK_PLLCTL_OUT_DV_Pos (12)

CLK_T::PLLCTL: OUT_DV Position

Definition at line 1443 of file Nano100Series.h.

## ◆ CLK_PLLCTL_PD_Msk

#define CLK_PLLCTL_PD_Msk (0x1ul << CLK_PLLCTL_PD_Pos)

CLK_T::PLLCTL: PD Mask

Definition at line 1447 of file Nano100Series.h.

## ◆ CLK_PLLCTL_PD_Pos

#define CLK_PLLCTL_PD_Pos (16)

CLK_T::PLLCTL: PD Position

Definition at line 1446 of file Nano100Series.h.

## ◆ CLK_PLLCTL_PLL_SRC_Msk

#define CLK_PLLCTL_PLL_SRC_Msk (0x1ul << CLK_PLLCTL_PLL_SRC_Pos)

CLK_T::PLLCTL: PLL_SRC Mask

Definition at line 1450 of file Nano100Series.h.

## ◆ CLK_PLLCTL_PLL_SRC_Pos

#define CLK_PLLCTL_PLL_SRC_Pos (17)

CLK_T::PLLCTL: PLL_SRC Position

Definition at line 1449 of file Nano100Series.h.

## ◆ CLK_PWRCTL_HIRC_EN_Msk

#define CLK_PWRCTL_HIRC_EN_Msk (0x1ul << CLK_PWRCTL_HIRC_EN_Pos)

CLK_T::PWRCTL: HIRC_EN Mask

Definition at line 1219 of file Nano100Series.h.

## ◆ CLK_PWRCTL_HIRC_EN_Pos

#define CLK_PWRCTL_HIRC_EN_Pos (2)

CLK_T::PWRCTL: HIRC_EN Position

Definition at line 1218 of file Nano100Series.h.

## ◆ CLK_PWRCTL_HXT_EN_Msk

#define CLK_PWRCTL_HXT_EN_Msk (0x1ul << CLK_PWRCTL_HXT_EN_Pos)

CLK_T::PWRCTL: HXT_EN Mask

Definition at line 1213 of file Nano100Series.h.

## ◆ CLK_PWRCTL_HXT_EN_Pos

#define CLK_PWRCTL_HXT_EN_Pos (0)

    @addtogroup CLK_CONST CLK Bit Field Definition
    Constant Definitions for CLK Controller

CLK_T::PWRCTL: HXT_EN Position

Definition at line 1212 of file Nano100Series.h.

## ◆ CLK_PWRCTL_HXT_GAIN_Msk

#define CLK_PWRCTL_HXT_GAIN_Msk (0x1ul << CLK_PWRCTL_HXT_GAIN_Pos)

CLK_T::PWRCTL: HXT_GAIN Mask

Definition at line 1237 of file Nano100Series.h.

## ◆ CLK_PWRCTL_HXT_GAIN_Pos

#define CLK_PWRCTL_HXT_GAIN_Pos (9)

CLK_T::PWRCTL: HXT_GAIN Position

Definition at line 1236 of file Nano100Series.h.

## ◆ CLK_PWRCTL_HXT_HF_ST_Msk

#define CLK_PWRCTL_HXT_HF_ST_Msk (0x3ul << CLK_PWRCTL_HXT_HF_ST_Pos)

CLK_T::PWRCTL: HXT_HF_ST Mask

Definition at line 1243 of file Nano100Series.h.

## ◆ CLK_PWRCTL_HXT_HF_ST_Pos

#define CLK_PWRCTL_HXT_HF_ST_Pos (11)

CLK_T::PWRCTL: HXT_HF_ST Position

Definition at line 1242 of file Nano100Series.h.

## ◆ CLK_PWRCTL_HXT_SELXT_Msk

#define CLK_PWRCTL_HXT_SELXT_Msk (0x1ul << CLK_PWRCTL_HXT_SELXT_Pos)

CLK_T::PWRCTL: HXT_SELXT Mask

Definition at line 1234 of file Nano100Series.h.

## ◆ CLK_PWRCTL_HXT_SELXT_Pos

#define CLK_PWRCTL_HXT_SELXT_Pos (8)

CLK_T::PWRCTL: HXT_SELXT Position

Definition at line 1233 of file Nano100Series.h.

## ◆ CLK_PWRCTL_LIRC_EN_Msk

#define CLK_PWRCTL_LIRC_EN_Msk (0x1ul << CLK_PWRCTL_LIRC_EN_Pos)

CLK_T::PWRCTL: LIRC_EN Mask

Definition at line 1222 of file Nano100Series.h.

## ◆ CLK_PWRCTL_LIRC_EN_Pos

#define CLK_PWRCTL_LIRC_EN_Pos (3)

CLK_T::PWRCTL: LIRC_EN Position

Definition at line 1221 of file Nano100Series.h.

## ◆ CLK_PWRCTL_LXT_EN_Msk

#define CLK_PWRCTL_LXT_EN_Msk (0x1ul << CLK_PWRCTL_LXT_EN_Pos)

CLK_T::PWRCTL: LXT_EN Mask

Definition at line 1216 of file Nano100Series.h.

## ◆ CLK_PWRCTL_LXT_EN_Pos

#define CLK_PWRCTL_LXT_EN_Pos (1)

CLK_T::PWRCTL: LXT_EN Position

Definition at line 1215 of file Nano100Series.h.

## ◆ CLK_PWRCTL_LXT_SCNT_Msk

#define CLK_PWRCTL_LXT_SCNT_Msk (0x1ul << CLK_PWRCTL_LXT_SCNT_Pos)

CLK_T::PWRCTL: LXT_SCNT Mask

Definition at line 1240 of file Nano100Series.h.

## ◆ CLK_PWRCTL_LXT_SCNT_Pos

#define CLK_PWRCTL_LXT_SCNT_Pos (10)

CLK_T::PWRCTL: LXT_SCNT Position

Definition at line 1239 of file Nano100Series.h.

## ◆ CLK_PWRCTL_PD_EN_Msk

#define CLK_PWRCTL_PD_EN_Msk (0x1ul << CLK_PWRCTL_PD_EN_Pos)

CLK_T::PWRCTL: PD_EN Mask

Definition at line 1231 of file Nano100Series.h.

## ◆ CLK_PWRCTL_PD_EN_Pos

#define CLK_PWRCTL_PD_EN_Pos (6)

CLK_T::PWRCTL: PD_EN Position

Definition at line 1230 of file Nano100Series.h.

## ◆ CLK_PWRCTL_PD_WK_IE_Msk

#define CLK_PWRCTL_PD_WK_IE_Msk (0x1ul << CLK_PWRCTL_PD_WK_IE_Pos)

CLK_T::PWRCTL: PD_WK_IE Mask

Definition at line 1228 of file Nano100Series.h.

## ◆ CLK_PWRCTL_PD_WK_IE_Pos

#define CLK_PWRCTL_PD_WK_IE_Pos (5)

CLK_T::PWRCTL: PD_WK_IE Position

Definition at line 1227 of file Nano100Series.h.

## ◆ CLK_PWRCTL_WK_DLY_Msk

#define CLK_PWRCTL_WK_DLY_Msk (0x1ul << CLK_PWRCTL_WK_DLY_Pos)

CLK_T::PWRCTL: WK_DLY Mask

Definition at line 1225 of file Nano100Series.h.

## ◆ CLK_PWRCTL_WK_DLY_Pos

#define CLK_PWRCTL_WK_DLY_Pos (4)

CLK_T::PWRCTL: WK_DLY Position

Definition at line 1224 of file Nano100Series.h.

## ◆ CLK_WK_INTSTS_PD_WK_IS_Msk

#define CLK_WK_INTSTS_PD_WK_IS_Msk (0x1ul << CLK_WK_INTSTS_PD_WK_IS_Pos)

CLK_T::WK_INTSTS: PD_WK_IS Mask

Definition at line 1465 of file Nano100Series.h.

## ◆ CLK_WK_INTSTS_PD_WK_IS_Pos

#define CLK_WK_INTSTS_PD_WK_IS_Pos (0)

CLK_T::WK_INTSTS: PD_WK_IS Position

Definition at line 1464 of file Nano100Series.h.

## Typedef Documentation

## ◆ IRQn_Type

typedef enum IRQn IRQn_Type

Interrupt Number Definition. The maximum of 32 Specific Interrupts are possible.

## Enumeration Type Documentation

## ◆ IRQn

enum IRQn

Interrupt Number Definition. The maximum of 32 Specific Interrupts are possible.

Enumerator
NonMaskableInt_IRQn | 2 Non Maskable Interrupt
HardFault_IRQn | 3 Cortex-M0 Hard Fault Interrupt
SVCall_IRQn | 11 Cortex-M0 SV Call Interrupt
PendSV_IRQn | 14 Cortex-M0 Pend SV Interrupt
SysTick_IRQn | 15 Cortex-M0 System Tick Interrupt
BOD_IRQn | Brownout low voltage detected interrupt
WDT_IRQn | Watch Dog Timer interrupt
EINT0_IRQn | External signal interrupt from PB.14 pin
EINT1_IRQn | External signal interrupt from PB.15 pin
GPABC_IRQn | External signal interrupt from PA[15:0]/PB[13:0]/PC[15:0]
GPDEF_IRQn | External interrupt from PD[15:0]/PE[15:0]/PF[15:0]
PWM0_IRQn | PWM 0 interrupt
PWM1_IRQn | PWM 1 interrupt
TMR0_IRQn | Timer 0 interrupt
TMR1_IRQn | Timer 1 interrupt
TMR2_IRQn | Timer 2 interrupt
TMR3_IRQn | Timer 3 interrupt
UART0_IRQn | UART0 interrupt
UART1_IRQn | UART1 interrupt
SPI0_IRQn | SPI0 interrupt
SPI1_IRQn | SPI1 interrupt
SPI2_IRQn | SPI2 interrupt
HIRC_IRQn | HIRC interrupt
I2C0_IRQn | I2C0 interrupt
I2C1_IRQn | I2C1 interrupt
SC2_IRQn | Smart Card 2 interrupt
SC0_IRQn | Smart Card 0 interrupt
SC1_IRQn | Smart Card 1 interrupt
USBD_IRQn | USB FS Device interrupt
LCD_IRQn | LCD interrupt
PDMA_IRQn | PDMA interrupt
I2S_IRQn | I2S interrupt
PDWU_IRQn | Power Down Wake up interrupt
ADC_IRQn | ADC interrupt
DAC_IRQn | DAC interrupt
RTC_IRQn | Real time clock interrupt

Definition at line 79 of file Nano100Series.h.