| NANO100_BSP V3.05.000 The Board Support Package for Nano100BN Series

NuEdu-Basic01_UART.c
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1/**************************************************************************/
13#include <stdio.h>
14#include "Nano100Series.h"
15#include "NuEdu-Basic01_UART.h"
16
34 void UART0_Init(void)
35{
36 /* Enable IP clock */
37 CLK_EnableModuleClock(UART0_MODULE);
38
39 /* Select IP clock source */
40 CLK_SetModuleClock(UART0_MODULE,CLK_CLKSEL1_UART_S_HIRC,CLK_UART_CLK_DIVIDER(1));
41
42 /* Set PA multi-function pins for UART0 RXD and TXD */
43 SYS->PB_L_MFP &= ~( SYS_PB_L_MFP_PB0_MFP_Msk | SYS_PB_L_MFP_PB1_MFP_Msk);
44 SYS->PB_L_MFP |= (SYS_PB_L_MFP_PB0_MFP_UART0_RX | SYS_PB_L_MFP_PB1_MFP_UART0_TX );
45
46 SYS_ResetModule(UART0_RST);
47
48 /* Configure UART0 and set UART0 Baudrate */
49 //UART_Open(UART0, 115200);
50
51 CLK->CLKSEL1 = (CLK->CLKSEL1 & ~CLK_CLKSEL1_UART_S_Msk) | CLK_CLKSEL1_UART_S_HXT; /* Select 12 Mhz XTAL */
52
53 UART0->BAUD = 0x67; /* Baud Rate:115200 OSC:12MHz */
54 UART0->TLCTL = 0x03; /* Character len is 8 bits */
55
56}
57 /* end of group Nano130_Basic01_FUNCTIONS */
59 /* end of group NuEdu-SDK-Nano130_Basic01 */
61 /* end of group NANO100_Library */
63
64/*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/
Nano100Series.h
Nano100 series peripheral access layer header file. This file contains all the peripheral register's ...
SYS_PB_L_MFP_PB1_MFP_Msk
#define SYS_PB_L_MFP_PB1_MFP_Msk
Definition: Nano100Series.h:3104
SYS_PB_L_MFP_PB0_MFP_Msk
#define SYS_PB_L_MFP_PB0_MFP_Msk
Definition: Nano100Series.h:3101
NuEdu-Basic01_UART.h
NuEdu-Basic01 UART driver header file.
CLK_CLKSEL1_UART_S_HIRC
#define CLK_CLKSEL1_UART_S_HIRC
Definition: clk.h:140
UART0_MODULE
#define UART0_MODULE
Definition: clk.h:312
CLK_UART_CLK_DIVIDER
#define CLK_UART_CLK_DIVIDER(x)
Definition: clk.h:190
CLK_CLKSEL1_UART_S_HXT
#define CLK_CLKSEL1_UART_S_HXT
Definition: clk.h:137
CLK_EnableModuleClock
void CLK_EnableModuleClock(uint32_t u32ModuleIdx)
This function enable module clock.
Definition: clk.c:436
CLK_SetModuleClock
void CLK_SetModuleClock(uint32_t u32ModuleIdx, uint32_t u32ClkSrc, uint32_t u32ClkDiv)
This function set selected module clock source and module clock divider.
Definition: clk.c:339
UART0
#define UART0
Pointer to UART0 register structure.
Definition: Nano100Series.h:11681
CLK
#define CLK
Pointer to CLK register structure.
Definition: Nano100Series.h:11693
SYS
#define SYS
Pointer to SYS register structure.
Definition: Nano100Series.h:11692
SYS_PB_L_MFP_PB0_MFP_UART0_RX
#define SYS_PB_L_MFP_PB0_MFP_UART0_RX
Definition: sys.h:260
UART0_RST
#define UART0_RST
Definition: sys.h:48
SYS_PB_L_MFP_PB1_MFP_UART0_TX
#define SYS_PB_L_MFP_PB1_MFP_UART0_TX
Definition: sys.h:254
SYS_ResetModule
void SYS_ResetModule(uint32_t u32ModuleIndex)
This function reset selected modules.
Definition: sys.c:129
UART0_Init
void UART0_Init(void)
Initiate UART0 as 8-N-1 and 115200 BPS.
Definition: NuEdu-Basic01_UART.c:34