| NANO100_BSP V3.05.000 The Board Support Package for Nano100BN Series

sc.h
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1/**************************************************************************/
12#ifndef __SC_H__
13#define __SC_H__
14
15#ifdef __cplusplus
16 extern "C"
17{
18#endif
19
20
32#define SC_INTERFACE_NUM 3
33#define SC_PIN_STATE_HIGH 1
34#define SC_PIN_STATE_LOW 0
35#define SC_PIN_STATE_IGNORE 0xFFFFFFFF
36#define SC_CLK_ON 1
37#define SC_CLK_OFF 0
39#define SC_TMR_MODE_0 (0ul << SC_TMR0_MODE_Pos)
40#define SC_TMR_MODE_1 (1ul << SC_TMR0_MODE_Pos)
41#define SC_TMR_MODE_2 (2ul << SC_TMR0_MODE_Pos)
42#define SC_TMR_MODE_3 (3ul << SC_TMR0_MODE_Pos)
43#define SC_TMR_MODE_4 (4ul << SC_TMR0_MODE_Pos)
44#define SC_TMR_MODE_5 (5ul << SC_TMR0_MODE_Pos)
45#define SC_TMR_MODE_6 (6ul << SC_TMR0_MODE_Pos)
46#define SC_TMR_MODE_7 (7ul << SC_TMR0_MODE_Pos)
47#define SC_TMR_MODE_8 (8ul << SC_TMR0_MODE_Pos)
48#define SC_TMR_MODE_F (0xF << SC_TMR0_MODE_Pos) /* end of group NANO100_SC_EXPORTED_CONSTANTS */
52
53
76#define SC_ENABLE_INT(sc, u32Mask) ((sc)->IER |= (u32Mask))
77
96#define SC_DISABLE_INT(sc, u32Mask) ((sc)->IER &= ~(u32Mask))
97
105#define SC_SET_VCC_PIN(sc, u32State) \
106 do {\
107 uint32_t reg = (sc)->PINCSR;\
108 if(((reg & (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)) == 0) ||\
109 ((reg & (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)) == (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)))\
110 reg &= ~SC_PINCSR_POW_EN_Msk;\
111 else\
112 reg |= SC_PINCSR_POW_EN_Msk;\
113 if(u32State)\
114 (sc)->PINCSR = reg | SC_PINCSR_POW_EN_Msk;\
115 else\
116 (sc)->PINCSR = reg & ~SC_PINCSR_POW_EN_Msk;\
117 }while(0)
118
119
127#define SC_SET_CLK_PIN(sc, u32OnOff)\
128 do {\
129 uint32_t reg = (sc)->PINCSR;\
130 if(((reg & (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)) == 0) ||\
131 ((reg & (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)) == (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)))\
132 reg &= ~SC_PINCSR_POW_EN_Msk;\
133 else\
134 reg |= SC_PINCSR_POW_EN_Msk;\
135 if(u32OnOff)\
136 (sc)->PINCSR = reg | SC_PINCSR_CLK_KEEP_Msk;\
137 else\
138 (sc)->PINCSR = reg & ~SC_PINCSR_CLK_KEEP_Msk;\
139 }while(0)
140
148#define SC_SET_IO_PIN(sc, u32State)\
149 do {\
150 uint32_t reg = (sc)->PINCSR;\
151 if(((reg & (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)) == 0) ||\
152 ((reg & (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)) == (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)))\
153 reg &= ~SC_PINCSR_POW_EN_Msk;\
154 else\
155 reg |= SC_PINCSR_POW_EN_Msk;\
156 if(u32State)\
157 (sc)->PINCSR = reg | SC_PINCSR_SC_DATA_O_Msk;\
158 else\
159 (sc)->PINCSR = reg & ~SC_PINCSR_SC_DATA_O_Msk;\
160 }while(0)
161
169#define SC_SET_RST_PIN(sc, u32State)\
170 do {\
171 uint32_t reg = (sc)->PINCSR;\
172 if(((reg & (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)) == 0) ||\
173 ((reg & (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)) == (SC_PINCSR_POW_EN_Msk | SC_PINCSR_POW_INV_Msk)))\
174 reg &= ~SC_PINCSR_POW_EN_Msk;\
175 else\
176 reg |= SC_PINCSR_POW_EN_Msk;\
177 if(u32State)\
178 (sc)->PINCSR = reg | SC_PINCSR_SC_RST_Msk;\
179 else\
180 (sc)->PINCSR = reg & ~SC_PINCSR_SC_RST_Msk;\
181 }while(0)
182
189#define SC_READ(sc) ((char)((sc)->RBR))
190
198#define SC_WRITE(sc, u8Data) ((sc)->THR = (u8Data))
199
208#define SC_SET_STOP_BIT_LEN(sc, u32Len) ((sc)->CTL = ((sc)->CTL & ~SC_CTL_SLEN_Msk) | (u32Len == 1 ? SC_CTL_SLEN_Msk : 0))
209
216__STATIC_INLINE void SC_SetTxRetry(SC_T *sc, uint32_t u32Count)
217{
218 // Retry count must set while enable bit disabled, so disable it first
219 sc->CTL &= ~(SC_CTL_TX_ERETRY_Msk | SC_CTL_TX_ERETRY_EN_Msk);
220
221 if(u32Count != 0)
222 {
223 sc->CTL |= ((u32Count - 1) << SC_CTL_TX_ERETRY_Pos) | SC_CTL_TX_ERETRY_EN_Msk;
224 }
225}
226
233__STATIC_INLINE void SC_SetRxRetry(SC_T *sc, uint32_t u32Count)
234{
235 // Retry count must set while enable bit disabled, so disable it first
236 sc->CTL &= ~(SC_CTL_RX_ERETRY_Msk | SC_CTL_RX_ERETRY_EN_Msk);
237
238 if(u32Count != 0)
239 {
240 sc->CTL |= ((u32Count - 1) << SC_CTL_RX_ERETRY_Pos) | SC_CTL_RX_ERETRY_EN_Msk;
241 }
242}
243
244
245uint32_t SC_IsCardInserted(SC_T *sc);
246 void SC_ClearFIFO(SC_T *sc);
247 void SC_Close(SC_T *sc);
248 void SC_Open(SC_T *sc, uint32_t u32CardDet, uint32_t u32PWR);
249 void SC_ResetReader(SC_T *sc);
250 void SC_SetBlockGuardTime(SC_T *sc, uint32_t u32BGT);
251 void SC_SetCharGuardTime(SC_T *sc, uint32_t u32CGT);
252 void SC_StopAllTimer(SC_T *sc);
253 void SC_StartTimer(SC_T *sc, uint32_t u32TimerNum, uint32_t u32Mode, uint32_t u32ETUCount);
254 void SC_StopTimer(SC_T *sc, uint32_t u32TimerNum);
255
256 /* end of group NANO100_SC_EXPORTED_FUNCTIONS */
258 /* end of group NANO100_SC_Driver */
260 /* end of group NANO100_Device_Driver */
262
263#ifdef __cplusplus
264}
265#endif
266
267#endif //__SC_H__
268
269/*** (C) COPYRIGHT 2013~2014 Nuvoton Technology Corp. ***/
SC_CTL_TX_ERETRY_EN_Msk
#define SC_CTL_TX_ERETRY_EN_Msk
Definition: Nano100Series.h:8932
SC_CTL_RX_ERETRY_EN_Msk
#define SC_CTL_RX_ERETRY_EN_Msk
Definition: Nano100Series.h:8926
SC_CTL_TX_ERETRY_Pos
#define SC_CTL_TX_ERETRY_Pos
Definition: Nano100Series.h:8928
SC_CTL_TX_ERETRY_Msk
#define SC_CTL_TX_ERETRY_Msk
Definition: Nano100Series.h:8929
SC_CTL_RX_ERETRY_Pos
#define SC_CTL_RX_ERETRY_Pos
Definition: Nano100Series.h:8922
SC_CTL_RX_ERETRY_Msk
#define SC_CTL_RX_ERETRY_Msk
Definition: Nano100Series.h:8923
SC_SetBlockGuardTime
void SC_SetBlockGuardTime(SC_T *sc, uint32_t u32BGT)
This function block guard time (BGT) of specified smartcard module.
Definition: sc.c:180
SC_SetCharGuardTime
void SC_SetCharGuardTime(SC_T *sc, uint32_t u32CGT)
This function character guard time (CGT) of specified smartcard module.
Definition: sc.c:191
SC_ResetReader
void SC_ResetReader(SC_T *sc)
This function reset specified smartcard module to its default state for activate smartcard.
Definition: sc.c:123
SC_Open
void SC_Open(SC_T *sc, uint32_t u32CardDet, uint32_t u32PWR)
This function initialized smartcard module.
Definition: sc.c:93
SC_StopAllTimer
void SC_StopAllTimer(SC_T *sc)
This function stop all smartcard timer of specified smartcard module.
Definition: sc.c:203
SC_IsCardInserted
uint32_t SC_IsCardInserted(SC_T *sc)
This function indicates specified smartcard slot status.
Definition: sc.c:40
SC_StopTimer
void SC_StopTimer(SC_T *sc, uint32_t u32TimerNum)
This function stop a smartcard timer of specified smartcard module.
Definition: sc.c:257
SC_StartTimer
void SC_StartTimer(SC_T *sc, uint32_t u32TimerNum, uint32_t u32Mode, uint32_t u32ETUCount)
This function configure and start a smartcard timer of specified smartcard module.
Definition: sc.c:229
SC_SetRxRetry
__STATIC_INLINE void SC_SetRxRetry(SC_T *sc, uint32_t u32Count)
Enable/Disable Rx error retry, and set Rx error retry count.
Definition: sc.h:233
SC_ClearFIFO
void SC_ClearFIFO(SC_T *sc)
This function reset both transmit and receive FIFO of specified smartcard module.
Definition: sc.c:63
SC_SetTxRetry
__STATIC_INLINE void SC_SetTxRetry(SC_T *sc, uint32_t u32Count)
Enable/Disable Tx error retry, and set Tx error retry count.
Definition: sc.h:216
SC_Close
void SC_Close(SC_T *sc)
This function disable specified smartcard module.
Definition: sc.c:73
SC_T::CTL
__IO uint32_t CTL
Definition: Nano100Series.h:8388
SC_T
Definition: Nano100Series.h:8274