| NUC029FAE_BSP V3.02.000 The Board Support Package for NUC029FAE MCU

clk.h
Go to the documentation of this file.
1/**************************************************************************/
12#ifndef __CLK_H__
13#define __CLK_H__
14
15#ifdef __cplusplus
16 extern "C"
17{
18#endif
19
20
35/*---------------------------------------------------------------------------------------------------------*/
36/* PWRCON constant definitions. */
37/*---------------------------------------------------------------------------------------------------------*/
38#define CLK_PWRCON_XTL12M 0x01UL
39#define CLK_PWRCON_HXT 0x01UL
40#define CLK_PWRCON_XTL32K 0x02UL
41#define CLK_PWRCON_LXT 0x02UL
43/*---------------------------------------------------------------------------------------------------------*/
44/* CLKSEL0 constant definitions. */
45/*---------------------------------------------------------------------------------------------------------*/
46#define CLK_CLKSEL0_HCLK_S_XTAL 0x00UL
47#define CLK_CLKSEL0_HCLK_S_IRC10K 0x03UL
48#define CLK_CLKSEL0_HCLK_S_LIRC 0x03UL
49#define CLK_CLKSEL0_HCLK_S_IRC22M 0x07UL
50#define CLK_CLKSEL0_HCLK_S_HIRC 0x07UL
51#define CLK_CLKSEL0_STCLK_S_XTAL 0x00UL
52#define CLK_CLKSEL0_STCLK_S_XTAL_DIV2 0x10UL
53#define CLK_CLKSEL0_STCLK_S_HCLK_DIV2 0x18UL
54#define CLK_CLKSEL0_STCLK_S_IRC22M_DIV2 0x38UL
55#define CLK_CLKSEL0_STCLK_S_HIRC_DIV2 0x38UL
58/*---------------------------------------------------------------------------------------------------------*/
59/* CLKSEL1 constant definitions. */
60/*---------------------------------------------------------------------------------------------------------*/
61#define CLK_CLKSEL1_WDT_S_XTAL 0x00000000UL
62#define CLK_CLKSEL1_WDT_S_HCLK_DIV2048 0x00000002UL
63#define CLK_CLKSEL1_WDT_S_IRC10K 0x00000003UL
64#define CLK_CLKSEL1_WDT_S_LIRC 0x00000003UL
65#define CLK_CLKSEL1_ADC_S_XTAL 0x00000000UL
66#define CLK_CLKSEL1_ADC_S_HCLK 0x00000008UL
67#define CLK_CLKSEL1_ADC_S_IRC22M 0x0000000CUL
68#define CLK_CLKSEL1_ADC_S_HIRC 0x0000000CUL
69#define CLK_CLKSEL1_SPI_S_HXTorLXT 0x00000000UL
70#define CLK_CLKSEL1_SPI_S_HCLK 0x00000010UL
71#define CLK_CLKSEL1_TMR0_S_XTAL 0x00000000UL
72#define CLK_CLKSEL1_TMR0_S_IRC10K 0x00000100UL
73#define CLK_CLKSEL1_TMR0_S_LIRC 0x00000100UL
74#define CLK_CLKSEL1_TMR0_S_HCLK 0x00000200UL
75#define CLK_CLKSEL1_TMR0_S_IRC22M 0x00000700UL
76#define CLK_CLKSEL1_TMR0_S_HIRC 0x00000700UL
77#define CLK_CLKSEL1_TMR1_S_XTAL 0x00000000UL
78#define CLK_CLKSEL1_TMR1_S_IRC10K 0x00001000UL
79#define CLK_CLKSEL1_TMR1_S_LIRC 0x00001000UL
80#define CLK_CLKSEL1_TMR1_S_HCLK 0x00002000UL
81#define CLK_CLKSEL1_TMR1_S_IRC22M 0x00007000UL
82#define CLK_CLKSEL1_TMR1_S_HIRC 0x00007000UL
83#define CLK_CLKSEL1_UART_S_XTAL 0x00000000UL
84#define CLK_CLKSEL1_UART_S_IRC22M 0x02000000UL
85#define CLK_CLKSEL1_UART_S_HIRC 0x02000000UL
86#define CLK_CLKSEL1_PWM01_S_HCLK 0x20000000UL
87#define CLK_CLKSEL1_PWM23_S_HCLK 0x80000000UL
90/*---------------------------------------------------------------------------------------------------------*/
91/* CLKSEL2 constant definitions. */
92/*---------------------------------------------------------------------------------------------------------*/
93#define CLK_CLKSEL2_FRQDIV_XTAL 0x00000000UL
94#define CLK_CLKSEL2_FRQDIV_HXT 0x00000000UL
95#define CLK_CLKSEL2_FRQDIV_LXT 0x00000000UL
96#define CLK_CLKSEL2_FRQDIV_HCLK 0x00000008UL
97#define CLK_CLKSEL2_FRQDIV_IRC22M 0x0000000CUL
98#define CLK_CLKSEL2_FRQDIV_HIRC 0x0000000CUL
99#define CLK_CLKSEL2_PWM45_S_HCLK 0x00000020UL
102/*---------------------------------------------------------------------------------------------------------*/
103/* CLKDIV constant definitions. */
104/*---------------------------------------------------------------------------------------------------------*/
105#define CLK_CLKDIV_ADC(x) (((x)-1) << 16)
106#define CLK_CLKDIV_UART(x) (((x)-1) << 8)
107#define CLK_CLKDIV_HCLK(x) ((x)-1)
109/*---------------------------------------------------------------------------------------------------------*/
110/* MODULE constant definitions. */
111/*---------------------------------------------------------------------------------------------------------*/
112#define MODULE_APBCLK(x) ((x >>31) & 0x1)
113#define MODULE_CLKSEL(x) ((x >>29) & 0x3)
114#define MODULE_CLKSEL_Msk(x) ((x >>25) & 0xf)
115#define MODULE_CLKSEL_Pos(x) ((x >>20) & 0x1f)
116#define MODULE_CLKDIV(x) ((x >>18) & 0x3)
117#define MODULE_CLKDIV_Msk(x) ((x >>10) & 0xff)
118#define MODULE_CLKDIV_Pos(x) ((x >>5 ) & 0x1f)
119#define MODULE_IP_EN_Pos(x) ((x >>0 ) & 0x1f)
120#define MODULE_NoMsk 0x0
121/*-------------------------------------------------------------------------------------------------------------------------------*/
122/* APBCLK(1) | CLKSEL(2) | CLKSEL_Msk(4) | CLKSEL_Pos(5) | CLKDIV(2) | CLKDIV_Msk(8) | CLKDIV_Pos(5) | IP_EN_Pos(5) */
123/*-------------------------------------------------------------------------------------------------------------------------------*/
124#define WDT_MODULE ((0x0<<31)|(0x1<<29)|(0x3<<25)|( 0<<20)|(0x3<<18)|(MODULE_NoMsk<<10)|(31<<5)|CLK_APBCLK_WDT_EN_Pos )
125#define TMR0_MODULE ((0x0<<31)|(0x1<<29)|(0x7<<25)|( 8<<20)|(0x3<<18)|(MODULE_NoMsk<<10)|(31<<5)|CLK_APBCLK_TMR0_EN_Pos)
126#define TMR1_MODULE ((0x0<<31)|(0x1<<29)|(0x7<<25)|(12<<20)|(0x3<<18)|(MODULE_NoMsk<<10)|(31<<5)|CLK_APBCLK_TMR1_EN_Pos)
127#define FDIV_MODULE ((0x0<<31)|(0x3<<29)|(0x3<<25)|( 2<<20)|(0x3<<18)|(MODULE_NoMsk<<10)|(31<<5)|CLK_APBCLK_FDIV_EN_Pos)
128#define I2C_MODULE ((0x0<<31)|(0x3<<29)|(MODULE_NoMsk<<25)|(31<<20)|(0x3<<18)|(MODULE_NoMsk<<10)|(31<<5)|CLK_APBCLK_I2C_EN_Pos)
129#define SPI_MODULE ((0x0<<31)|(0x1<<29)|(0x1<<25)|( 4<<20)|(0x3<<18)|(MODULE_NoMsk<<10)|(31<<5)|CLK_APBCLK_SPI_EN_Pos)
130#define UART_MODULE ((0x0<<31)|(0x1<<29)|(0x3<<25)|(24<<20)|(0x0<<18)|(0x0F<<10)|( 8<<5)|CLK_APBCLK_UART_EN_Pos)
131#define PWM01_MODULE ((0x0<<31)|(0x1<<29)|(0x3<<25)|(28<<20)|(0x3<<18)|(MODULE_NoMsk<<10)|(31<<5)|CLK_APBCLK_PWM01_EN_Pos)
132#define PWM23_MODULE ((0x0<<31)|(0x1<<29)|(0x3<<25)|(30<<20)|(0x3<<18)|(MODULE_NoMsk<<10)|(31<<5)|CLK_APBCLK_PWM23_EN_Pos)
133#define PWM45_MODULE ((0x0<<31)|(0x3<<29)|(0x3<<25)|( 4<<20)|(0x3<<18)|(MODULE_NoMsk<<10)|(31<<5)|CLK_APBCLK_PWM45_EN_Pos)
134#define ADC_MODULE ((0x0<<31)|(0x1<<29)|(0x3<<25)|( 2<<20)|(0x0<<18)|(0xFF<<10)|(16<<5)|CLK_APBCLK_ADC_EN_Pos)
135#define ACMP_MODULE ((0x0<<31)|(0x3<<29)|(MODULE_NoMsk<<25)|(31<<20)|(0x3<<18)|(MODULE_NoMsk<<10)|(31<<5)|CLK_APBCLK_ACMP_EN_Pos) /* end of group NUC029FAE_CLK_EXPORTED_CONSTANTS */
138
139
144 void CLK_DisableCKO(void);
145 void CLK_EnableCKO(uint32_t u32ClkSrc, uint32_t u32ClkDiv, uint32_t u32ClkDivBy1En);
146 void CLK_PowerDown(void);
147 void CLK_Idle(void);
148uint32_t CLK_GetHXTFreq(void);
149uint32_t CLK_GetLXTFreq(void);
150uint32_t CLK_GetHCLKFreq(void);
151uint32_t CLK_GetPCLKFreq(void);
152uint32_t CLK_GetCPUFreq(void);
153uint32_t CLK_SetCoreClock(uint32_t u32Hclk);
154 void CLK_SetHCLK(uint32_t u32ClkSrc, uint32_t u32ClkDiv);
155 void CLK_SetModuleClock(uint32_t u32ModuleIdx, uint32_t u32ClkSrc, uint32_t u32ClkDiv);
156 void CLK_SetSysTickClockSrc(uint32_t u32ClkSrc);
157 void CLK_EnableXtalRC(uint32_t u32ClkMask);
158 void CLK_DisableXtalRC(uint32_t u32ClkMask);
159 void CLK_EnableModuleClock(uint32_t u32ModuleIdx);
160 void CLK_DisableModuleClock(uint32_t u32ModuleIdx);
161int32_t CLK_SysTickDelay(uint32_t us);
162uint32_t CLK_WaitClockReady(uint32_t u32ClkMask);
163
164
165 /* end of group NUC029FAE_CLK_EXPORTED_FUNCTIONS */
167 /* end of group NUC029FAE_CLK_Driver */
169 /* end of group NUC029FAE_Device_Driver */
171
172#ifdef __cplusplus
173}
174#endif
175
176#endif //__CLK_H__
177
178/*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/
CLK_Idle
void CLK_Idle(void)
This function let system enter to Idle mode.
Definition: clk.c:80
CLK_GetPCLKFreq
uint32_t CLK_GetPCLKFreq(void)
CLK_SetSysTickClockSrc
void CLK_SetSysTickClockSrc(uint32_t u32ClkSrc)
This function set SysTick clock source.
Definition: clk.c:215
CLK_GetHCLKFreq
uint32_t CLK_GetHCLKFreq(void)
This function get HCLK frequency. The frequency unit is Hz.
Definition: clk.c:114
CLK_DisableCKO
void CLK_DisableCKO(void)
This function disable frequency output function.
Definition: clk.c:30
CLK_EnableModuleClock
void CLK_EnableModuleClock(uint32_t u32ModuleIdx)
This function enable module clock.
Definition: clk.c:263
CLK_EnableCKO
void CLK_EnableCKO(uint32_t u32ClkSrc, uint32_t u32ClkDiv, uint32_t u32ClkDivBy1En)
This function enable frequency divider module clock, enable frequency divider clock function and conf...
Definition: clk.c:53
CLK_DisableModuleClock
void CLK_DisableModuleClock(uint32_t u32ModuleIdx)
This function disable module clock.
Definition: clk.c:285
CLK_WaitClockReady
uint32_t CLK_WaitClockReady(uint32_t u32ClkMask)
This function check selected clock source status.
Definition: clk.c:328
CLK_GetLXTFreq
uint32_t CLK_GetLXTFreq(void)
This function get external low frequency crystal frequency. The frequency unit is Hz.
Definition: clk.c:102
CLK_PowerDown
void CLK_PowerDown(void)
This function let system enter to Power-down mode.
Definition: clk.c:69
CLK_GetCPUFreq
uint32_t CLK_GetCPUFreq(void)
This function get CPU frequency. The frequency unit is Hz.
Definition: clk.c:125
CLK_SysTickDelay
int32_t CLK_SysTickDelay(uint32_t us)
This function execute delay function.
Definition: clk.c:298
CLK_SetHCLK
void CLK_SetHCLK(uint32_t u32ClkSrc, uint32_t u32ClkDiv)
This function set HCLK clock source and HCLK clock divider.
Definition: clk.c:141
CLK_DisableXtalRC
void CLK_DisableXtalRC(uint32_t u32ClkMask)
This function disable clock source.
Definition: clk.c:241
CLK_SetModuleClock
void CLK_SetModuleClock(uint32_t u32ModuleIdx, uint32_t u32ClkSrc, uint32_t u32ClkDiv)
This function set selected module clock source and module clock divider.
Definition: clk.c:185
CLK_EnableXtalRC
void CLK_EnableXtalRC(uint32_t u32ClkMask)
This function enable clock source.
Definition: clk.c:228
CLK_SetCoreClock
uint32_t CLK_SetCoreClock(uint32_t u32Hclk)
CLK_GetHXTFreq
uint32_t CLK_GetHXTFreq(void)
This function get external high frequency crystal frequency. The frequency unit is Hz.
Definition: clk.c:90