| NUC029FAE_BSP V3.02.000 The Board Support Package for NUC029FAE MCU

Modules | Macros
NUC029FAE Peripheral Memory Base
NUC029FAE Device CMSIS Definitions » NUC029FAE Control Register » Analog Comparator Controller(ACMP) » System Clock Controller(CLK) » Analog to Digital Converter(ADC) » Flash Memory Controller(FMC) » General Purpose Input/Output Controller(GPIO) » Inter-IC Bus Controller(I2C) » Interrupt Source Controller (INT) » Pulse Width Modulation Controller(PWM) » Serial Peripheral Interface Controller(SPI) » System Manger Controller(SYS) » Timer Controller(TIMER) » Universal Asynchronous Receiver/Transmitter Controller(UART) » Watchdog Timer Controller(WDT)
Collaboration diagram for NUC029FAE Peripheral Memory Base:

## Modules
| NUC029FAE Peripheral Pointer

## Macros
#define | FLASH_BASE ((uint32_t)0x00000000)
| Flash base address. More...
#define | SRAM_BASE ((uint32_t)0x20000000)
| SRAM base address. More...
#define | APB1PERIPH_BASE ((uint32_t)0x40000000)
| APB1 base address. More...
#define | APB2PERIPH_BASE ((uint32_t)0x40100000)
| APB2 base address. More...
#define | AHBPERIPH_BASE ((uint32_t)0x50000000)
| AHB base address. More...
#define | WDT_BASE (APB1PERIPH_BASE + 0x04000)
| WDT register base address. More...
#define | TIMER0_BASE (APB1PERIPH_BASE + 0x10000)
| TIMER0 register base address. More...
#define | TIMER1_BASE (APB1PERIPH_BASE + 0x10020)
| TIMER1 register base address. More...
#define | I2C_BASE (APB1PERIPH_BASE + 0x20000)
| I2C register base address. More...
#define | SPI_BASE (APB1PERIPH_BASE + 0x30000)
| SPI register base address. More...
#define | PWM_BASE (APB1PERIPH_BASE + 0x40000)
| PWM register base address. More...
#define | UART_BASE (APB1PERIPH_BASE + 0x50000)
| UART register base address. More...
#define | ACMP_BASE (APB1PERIPH_BASE + 0xD0000)
| ACMP register base address. More...
#define | ADC_BASE (APB1PERIPH_BASE + 0xE0000)
| ADC register base address. More...
#define | SYS_BASE (AHBPERIPH_BASE + 0x00000)
| GCR register base address. More...
#define | CLK_BASE (AHBPERIPH_BASE + 0x00200)
| CLK register base address. More...
#define | INT_BASE (AHBPERIPH_BASE + 0x00300)
| INT register base address. More...
#define | P0_BASE (AHBPERIPH_BASE + 0x04000)
| GPIO Port 0 register base address. More...
#define | P1_BASE (AHBPERIPH_BASE + 0x04040)
| GPIO Port 1 register base address. More...
#define | P2_BASE (AHBPERIPH_BASE + 0x04080)
| GPIO Port 2 register base address. More...
#define | P3_BASE (AHBPERIPH_BASE + 0x040C0)
| GPIO Port 3 register base address. More...
#define | P4_BASE (AHBPERIPH_BASE + 0x04100)
| GPIO Port 4 register base address. More...
#define | P5_BASE (AHBPERIPH_BASE + 0x04140)
| GPIO Port 5 register base address. More...
#define | GPIO_DBNCECON_BASE (AHBPERIPH_BASE + 0x04180)
| GPIO De-bounce register vase. More...
#define | GPIO_PIN_DATA_BASE (AHBPERIPH_BASE + 0x04200)
| GPIO pin data register base address. More...
#define | GPIOBIT0_BASE (AHBPERIPH_BASE + 0x04200)
| GPIO Port 0 bit access register base address. More...
#define | GPIOBIT1_BASE (AHBPERIPH_BASE + 0x04220)
| GPIO Port 1 bit access register base address. More...
#define | GPIOBIT2_BASE (AHBPERIPH_BASE + 0x04240)
| GPIO Port 2 bit access register base address. More...
#define | GPIOBIT3_BASE (AHBPERIPH_BASE + 0x04260)
| GPIO Port 3 bit access register base address. More...
#define | GPIOBIT4_BASE (AHBPERIPH_BASE + 0x04280)
| GPIO Port 4 bit access register base address. More...
#define | GPIOBIT5_BASE (AHBPERIPH_BASE + 0x042A0)
| GPIO Port 5 bit access register base address. More...
#define | FMC_BASE (AHBPERIPH_BASE + 0x0C000)
| FMC register base address. More...

## Detailed Description

Memory Mapped Structure for NUC029FAE Peripheral

## Macro Definition Documentation

## ◆ ACMP_BASE

#define ACMP_BASE (APB1PERIPH_BASE + 0xD0000)

ACMP register base address.

Definition at line 3188 of file NUC029FAE.h.

## ◆ ADC_BASE

#define ADC_BASE (APB1PERIPH_BASE + 0xE0000)

ADC register base address.

Definition at line 3189 of file NUC029FAE.h.

## ◆ AHBPERIPH_BASE

#define AHBPERIPH_BASE ((uint32_t)0x50000000)

AHB base address.

Definition at line 3178 of file NUC029FAE.h.

## ◆ APB1PERIPH_BASE

#define APB1PERIPH_BASE ((uint32_t)0x40000000)

APB1 base address.

Definition at line 3176 of file NUC029FAE.h.

## ◆ APB2PERIPH_BASE

#define APB2PERIPH_BASE ((uint32_t)0x40100000)

APB2 base address.

Definition at line 3177 of file NUC029FAE.h.

## ◆ CLK_BASE

#define CLK_BASE (AHBPERIPH_BASE + 0x00200)

CLK register base address.

Definition at line 3192 of file NUC029FAE.h.

## ◆ FLASH_BASE

#define FLASH_BASE ((uint32_t)0x00000000)

Flash base address.

Definition at line 3174 of file NUC029FAE.h.

## ◆ FMC_BASE

#define FMC_BASE (AHBPERIPH_BASE + 0x0C000)

FMC register base address.

Definition at line 3208 of file NUC029FAE.h.

## ◆ GPIO_DBNCECON_BASE

#define GPIO_DBNCECON_BASE (AHBPERIPH_BASE + 0x04180)

GPIO De-bounce register vase.

Definition at line 3200 of file NUC029FAE.h.

## ◆ GPIO_PIN_DATA_BASE

#define GPIO_PIN_DATA_BASE (AHBPERIPH_BASE + 0x04200)

GPIO pin data register base address.

Definition at line 3201 of file NUC029FAE.h.

## ◆ GPIOBIT0_BASE

#define GPIOBIT0_BASE (AHBPERIPH_BASE + 0x04200)

GPIO Port 0 bit access register base address.

Definition at line 3202 of file NUC029FAE.h.

## ◆ GPIOBIT1_BASE

#define GPIOBIT1_BASE (AHBPERIPH_BASE + 0x04220)

GPIO Port 1 bit access register base address.

Definition at line 3203 of file NUC029FAE.h.

## ◆ GPIOBIT2_BASE

#define GPIOBIT2_BASE (AHBPERIPH_BASE + 0x04240)

GPIO Port 2 bit access register base address.

Definition at line 3204 of file NUC029FAE.h.

## ◆ GPIOBIT3_BASE

#define GPIOBIT3_BASE (AHBPERIPH_BASE + 0x04260)

GPIO Port 3 bit access register base address.

Definition at line 3205 of file NUC029FAE.h.

## ◆ GPIOBIT4_BASE

#define GPIOBIT4_BASE (AHBPERIPH_BASE + 0x04280)

GPIO Port 4 bit access register base address.

Definition at line 3206 of file NUC029FAE.h.

## ◆ GPIOBIT5_BASE

#define GPIOBIT5_BASE (AHBPERIPH_BASE + 0x042A0)

GPIO Port 5 bit access register base address.

Definition at line 3207 of file NUC029FAE.h.

## ◆ I2C_BASE

#define I2C_BASE (APB1PERIPH_BASE + 0x20000)

I2C register base address.

Definition at line 3184 of file NUC029FAE.h.

## ◆ INT_BASE

#define INT_BASE (AHBPERIPH_BASE + 0x00300)

INT register base address.

Definition at line 3193 of file NUC029FAE.h.

## ◆ P0_BASE

#define P0_BASE (AHBPERIPH_BASE + 0x04000)

GPIO Port 0 register base address.

Definition at line 3194 of file NUC029FAE.h.

## ◆ P1_BASE

#define P1_BASE (AHBPERIPH_BASE + 0x04040)

GPIO Port 1 register base address.

Definition at line 3195 of file NUC029FAE.h.

## ◆ P2_BASE

#define P2_BASE (AHBPERIPH_BASE + 0x04080)

GPIO Port 2 register base address.

Definition at line 3196 of file NUC029FAE.h.

## ◆ P3_BASE

#define P3_BASE (AHBPERIPH_BASE + 0x040C0)

GPIO Port 3 register base address.

Definition at line 3197 of file NUC029FAE.h.

## ◆ P4_BASE

#define P4_BASE (AHBPERIPH_BASE + 0x04100)

GPIO Port 4 register base address.

Definition at line 3198 of file NUC029FAE.h.

## ◆ P5_BASE

#define P5_BASE (AHBPERIPH_BASE + 0x04140)

GPIO Port 5 register base address.

Definition at line 3199 of file NUC029FAE.h.

## ◆ PWM_BASE

#define PWM_BASE (APB1PERIPH_BASE + 0x40000)

PWM register base address.

Definition at line 3186 of file NUC029FAE.h.

## ◆ SPI_BASE

#define SPI_BASE (APB1PERIPH_BASE + 0x30000)

SPI register base address.

Definition at line 3185 of file NUC029FAE.h.

## ◆ SRAM_BASE

#define SRAM_BASE ((uint32_t)0x20000000)

SRAM base address.

Definition at line 3175 of file NUC029FAE.h.

## ◆ SYS_BASE

#define SYS_BASE (AHBPERIPH_BASE + 0x00000)

GCR register base address.

Definition at line 3191 of file NUC029FAE.h.

## ◆ TIMER0_BASE

#define TIMER0_BASE (APB1PERIPH_BASE + 0x10000)

TIMER0 register base address.

Definition at line 3182 of file NUC029FAE.h.

## ◆ TIMER1_BASE

#define TIMER1_BASE (APB1PERIPH_BASE + 0x10020)

TIMER1 register base address.

Definition at line 3183 of file NUC029FAE.h.

## ◆ UART_BASE

#define UART_BASE (APB1PERIPH_BASE + 0x50000)

UART register base address.

Definition at line 3187 of file NUC029FAE.h.

## ◆ WDT_BASE

#define WDT_BASE (APB1PERIPH_BASE + 0x04000)

WDT register base address.

Definition at line 3181 of file NUC029FAE.h.