| MINI55_BSP V3.03.000 The Board Support Package for Mini55 Series MCU

adc.h
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1/**************************************************************************/
12#ifndef __ADC_H__
13#define __ADC_H__
14
15#ifdef __cplusplus
16 extern "C"
17{
18#endif
19
20
33#define ADC_CH7_EXT (0UL)
34#define ADC_CH7_BGP (ADC_CHEN_CH7SEL_Msk)
35#define ADC_CMP_LESS_THAN (0UL)
36#define ADC_CMP_GREATER_OR_EQUAL_TO (ADC_CMP_CMPCOND_Msk)
37#define ADC_TRIGGER_BY_EXT_PIN (0UL)
38#define ADC_TRIGGER_BY_PWM (ADC_CTL_HWTRGSEL_Msk)
39#define ADC_FALLING_EDGE_TRIGGER (0UL)
40#define ADC_RISING_EDGE_TRIGGER (ADC_CTL_HWTRGCOND_Msk)
41#define ADC_ADIF_INT (ADC_STATUS_ADIF_Msk)
42#define ADC_CMP0_INT (ADC_STATUS_ADCMPF0_Msk)
43#define ADC_CMP1_INT (ADC_STATUS_ADCMPF1_Msk)
44#define ADC_SAMPLE_CLOCK_0 (0UL)
45#define ADC_SAMPLE_CLOCK_1 (1UL)
46#define ADC_SAMPLE_CLOCK_2 (2UL)
47#define ADC_SAMPLE_CLOCK_4 (3UL)
48#define ADC_SAMPLE_CLOCK_8 (4UL)
49#define ADC_SAMPLE_CLOCK_16 (5UL)
50#define ADC_SAMPLE_CLOCK_32 (6UL)
51#define ADC_SAMPLE_CLOCK_64 (7UL)
52#define ADC_SAMPLE_CLOCK_128 (8UL)
53#define ADC_SAMPLE_CLOCK_256 (9UL)
54#define ADC_SAMPLE_CLOCK_512 (10UL)
55#define ADC_SAMPLE_CLOCK_1024 (11UL)
56#define ADC_SEQMODE_TYPE_23SHUNT (0UL)
57#define ADC_SEQMODE_TYPE_1SHUNT (1UL)
58#define ADC_SEQMODE_MODESELECT_CH01 (0UL)
59#define ADC_SEQMODE_MODESELECT_CH12 (1UL)
60#define ADC_SEQMODE_MODESELECT_CH02 (2UL)
61#define ADC_SEQMODE_TRISRC_PWM0 (0UL)
62#define ADC_SEQMODE_TRISRC_PWM2 (1UL)
63#define ADC_SEQMODE_TRISRC_PWM4 (2UL)
64#define ADC_SEQMODE_PWM_RISING (0UL)
65#define ADC_SEQMODE_PWM_CENTER (1UL)
66#define ADC_SEQMODE_PWM_FALLING (2UL)
67#define ADC_SEQMODE_PWM_PERIOD (3UL) /* end of group MINI55_ADC_EXPORTED_CONSTANTS */
70
71
87#define ADC_CONFIG_CH7(adc, u32Source) (ADC->CHEN = (ADC->CHEN & ~ADC_CHEN_CH7SEL_Msk) | (u32Source))
88
96#define ADC_GET_CONVERSION_DATA(adc, u32ChNum) (ADC->DAT & ADC_DAT_RESULT_Msk)
97
108#define ADC_GET_INT_FLAG(adc, u32Mask) (ADC->STATUS & (u32Mask))
109
120#define ADC_CLR_INT_FLAG(adc, u32Mask) (ADC->STATUS = (ADC->STATUS & ~(ADC_STATUS_ADIF_Msk | \
121 ADC_STATUS_ADCMPF0_Msk | \
122 ADC_STATUS_ADCMPF1_Msk)) | (u32Mask))
123
132#define ADC_IS_BUSY(adc) (ADC->STATUS & ADC_STATUS_BUSY_Msk ? 1 : 0)
133
143#define ADC_IS_DATA_OVERRUN(adc, u32ChNum) (ADC->STATUS & ADC_STATUS_OV_Msk ? 1 : 0)
144
154#define ADC_IS_DATA_VALID(adc, u32ChNum) (ADC->STATUS & ADC_STATUS_VALID_Msk ? 1 : 0)
155
162#define ADC_POWER_DOWN(adc) (ADC->CTL &= ~ADC_CTL_ADCEN_Msk)
163
170#define ADC_POWER_ON(adc) (ADC->CTL |= ADC_CTL_ADCEN_Msk)
171
187#define ADC_ENABLE_CMP0(adc, \
188 u32ChNum, \
189 u32Condition, \
190 u32Data, \
191 u32MatchCount) (ADC->CMP[0] = ((u32ChNum) << ADC_CMP_CMPCH_Pos) | \
192 (u32Condition) | \
193 ((u32Data) << ADC_CMP_CMPDAT_Pos) | \
194 (((u32MatchCount) - 1) << ADC_CMP_CMPMCNT_Pos) |\
195 ADC_CMP_ADCMPEN_Msk)
196
202#define ADC_DISABLE_CMP0(adc) (ADC->CMP[0] = 0)
203
219#define ADC_ENABLE_CMP1(adc, \
220 u32ChNum, \
221 u32Condition, \
222 u32Data, \
223 u32MatchCount) (ADC->CMP[1] = ((u32ChNum) << ADC_CMP_CMPCH_Pos) | \
224 (u32Condition) | \
225 ((u32Data) << ADC_CMP_CMPDAT_Pos) | \
226 ((u32MatchCount - 1) << ADC_CMP_CMPMCNT_Pos) |\
227 ADC_CMP_ADCMPEN_Msk)
228
234#define ADC_DISABLE_CMP1(adc) (ADC->CMP[1] = 0)
235
245#define ADC_SET_INPUT_CHANNEL(adc, u32Mask) (ADC->CHEN = (ADC->CHEN & ~ADC_CHEN_CHEN0_Msk) | (u32Mask))
246
253#define ADC_START_CONV(adc) (ADC->CTL |= ADC_CTL_SWTRG_Msk)
254
261#define ADC_STOP_CONV(adc) (ADC->CTL &= ~ADC_CTL_SWTRG_Msk)
262
263 void ADC_Open(ADC_T *adc,
264 uint32_t u32InputMode,
265 uint32_t u32OpMode,
266 uint32_t u32ChMask);
267 void ADC_Close(ADC_T *adc);
268 void ADC_EnableHWTrigger(ADC_T *adc,
269 uint32_t u32Source,
270 uint32_t u32Param);
271 void ADC_DisableHWTrigger(ADC_T *adc);
272 void ADC_SetExtraSampleTime(ADC_T *adc,
273 uint32_t u32ChNum,
274 uint32_t u32SampleTime);
275 void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask);
276 void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask);
277
278 void ADC_SeqModeEnable(ADC_T *adc, uint32_t u32SeqTYPE, uint32_t u32ModeSel);
279 void ADC_SeqModeTriggerSrc(ADC_T *adc, uint32_t u32SeqModeTrgSrc1, uint32_t u32Trg1Type, uint32_t u32SeqModeTrgSrc2, uint32_t u32Trg2Type);
280
281 /* end of group MINI55_ADC_EXPORTED_FUNCTIONS */
283 /* end of group MINI55_ADC_Driver */
285 /* end of group MINI55_Device_Driver */
287
288#ifdef __cplusplus
289}
290#endif
291
292#endif //__ADC_H__
293
294/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
ADC_EnableHWTrigger
void ADC_EnableHWTrigger(ADC_T *adc, uint32_t u32Source, uint32_t u32Param)
Configure the hardware trigger condition and enable hardware trigger.
Definition: adc.c:83
ADC_Close
void ADC_Close(ADC_T *adc)
Disable ADC module.
Definition: adc.c:61
ADC_SeqModeEnable
void ADC_SeqModeEnable(ADC_T *adc, uint32_t u32SeqTYPE, uint32_t u32ModeSel)
ADC PWM Sequential Mode Control.
Definition: adc.c:195
ADC_SetExtraSampleTime
void ADC_SetExtraSampleTime(ADC_T *adc, uint32_t u32ChNum, uint32_t u32SampleTime)
Set ADC sample time for designated channel.
Definition: adc.c:130
ADC_Open
void ADC_Open(ADC_T *adc, uint32_t u32InputMode, uint32_t u32OpMode, uint32_t u32ChMask)
This API configures ADC module to be ready for convert the input from selected channel.
Definition: adc.c:38
ADC_DisableInt
void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask)
Disable the interrupt(s) selected by u32Mask parameter.
Definition: adc.c:171
ADC_DisableHWTrigger
void ADC_DisableHWTrigger(ADC_T *adc)
Disable hardware trigger ADC function.
Definition: adc.c:105
ADC_EnableInt
void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask)
Enable the interrupt(s) selected by u32Mask parameter.
Definition: adc.c:148
ADC_SeqModeTriggerSrc
void ADC_SeqModeTriggerSrc(ADC_T *adc, uint32_t u32SeqModeTrgSrc1, uint32_t u32Trg1Type, uint32_t u32SeqModeTrgSrc2, uint32_t u32Trg2Type)
ADC PWM Sequential Mode PWM Trigger Source and type.
Definition: adc.c:219
ADC_T
Definition: Mini55Series.h:314