| MINI55_BSP V3.03.000 The Board Support Package for Mini55 Series MCU

spi.h
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1/**************************************************************************/
12#ifndef __SPI_H__
13#define __SPI_H__
14
15#ifdef __cplusplus
16 extern "C"
17{
18#endif
19
20
33#define SPI_MODE_0 (SPI_CTL_TXNEG_Msk)
34#define SPI_MODE_1 (SPI_CTL_RXNEG_Msk)
35#define SPI_MODE_2 (SPI_CTL_CLKPOL_Msk | SPI_CTL_RXNEG_Msk)
36#define SPI_MODE_3 (SPI_CTL_CLKPOL_Msk | SPI_CTL_TXNEG_Msk)
38#define SPI_SLAVE (SPI_CTL_SLAVE_Msk)
39#define SPI_MASTER (0x0)
41#define SPI_SS (SPI_SSCTL_SS_Msk)
42#define SPI_SS_ACTIVE_HIGH (SPI_SSCTL_SSACTPOL_Msk)
43#define SPI_SS_ACTIVE_LOW (0x0)
45#define SPI_IE_MASK (0x01)
46#define SPI_SSTA_INTEN_MASK (0x04)
47#define SPI_FIFO_TX_INTEN_MASK (0x08)
48#define SPI_FIFO_RX_INTEN_MASK (0x10)
49#define SPI_FIFO_RXOV_INTEN_MASK (0x20)
50#define SPI_FIFO_TIMEOUT_INTEN_MASK (0x40) /* end of group MINI55_SPI_EXPORTED_CONSTANTS */
54
55
65#define SPI_ABORT_3WIRE_TRANSFER(spi) ( (spi)->SLVCTL |= SPI_SLVCTL_SLVABT_Msk )
66
72#define SPI_CLR_3WIRE_START_INT_FLAG(spi) ( (spi)->STATUS = SPI_STATUS_SLVSTIF_Msk )
73
79#define SPI_CLR_UNIT_TRANS_INT_FLAG(spi) ( (spi)->STATUS = SPI_STATUS_UNITIF_Msk )
80
86#define SPI_DISABLE_3WIRE_MODE(spi) ( (spi)->SLVCTL &= ~SPI_SLVCTL_SLV3WIRE_Msk )
87
93#define SPI_ENABLE_3WIRE_MODE(spi) ( (spi)->SLVCTL |= SPI_SLVCTL_SLV3WIRE_Msk )
94
100#define SPI_GET_RX_FIFO_COUNT(spi) ( (((spi)->STATUS & SPI_STATUS_RXCNT_Msk) >> SPI_STATUS_RXCNT_Pos) & 0xf )
101
109#define SPI_GET_RX_FIFO_EMPTY_FLAG(spi) ( ((spi)->STATUS & SPI_STATUS_RXEMPTY_Msk) == SPI_STATUS_RXEMPTY_Msk ? 1:0 )
110
118#define SPI_GET_TX_FIFO_EMPTY_FLAG(spi) ( ((spi)->STATUS & SPI_STATUS_TXEMPTY_Msk) == SPI_STATUS_TXEMPTY_Msk ? 1:0 )
119
127#define SPI_GET_TX_FIFO_FULL_FLAG(spi) ( ((spi)->STATUS & SPI_STATUS_TXFULL_Msk) == SPI_STATUS_TXFULL_Msk ? 1:0 )
128
134#define SPI_READ_RX(spi) ( (spi)->RX )
135
142#define SPI_WRITE_TX(spi, u32TxData) ( (spi)->TX = u32TxData )
143
149 static __INLINE void SPI_SET_SS_HIGH(SPI_T *spi)
150{
151 spi->SSCTL &= ~SPI_SSCTL_AUTOSS_Msk;
152 spi->SSCTL |= (SPI_SSCTL_LTF_Msk | SPI_SSCTL_SSACTPOL_Msk | SPI_SSCTL_SS_Msk);
153}
154
160 static __INLINE void SPI_SET_SS_LOW(SPI_T *spi)
161{
162 spi->SSCTL &= ~SPI_SSCTL_AUTOSS_Msk;
163 spi->SSCTL |= SPI_SSCTL_LTF_Msk;
164 spi->SSCTL &= ~SPI_SSCTL_SSACTPOL_Msk;
165 spi->SSCTL |= SPI_SSCTL_SS_Msk;
166}
167
173#define SPI_ENABLE_BYTE_REORDER(spi) ( (spi)->CTL |= SPI_CTL_REORDER_Msk )
174
180#define SPI_DISABLE_BYTE_REORDER(spi) ( (spi)->CTL &= ~SPI_CTL_REORDER_Msk )
181
188#define SPI_SET_SUSPEND_CYCLE(spi, u32SuspCycle) ( (spi)->CTL = ((spi)->CTL & ~SPI_CTL_SUSPITV_Msk) | (u32SuspCycle << SPI_CTL_SUSPITV_Pos) )
189
195#define SPI_SET_LSB_FIRST(spi) ( (spi)->CTL |= SPI_CTL_LSB_Msk )
196
202#define SPI_SET_MSB_FIRST(spi) ( (spi)->CTL &= ~SPI_CTL_LSB_Msk )
203
210 static __INLINE void SPI_SET_DATA_WIDTH(SPI_T *spi, uint32_t u32Width)
211{
212 if(u32Width == 32)
213 u32Width = 0;
214
215 spi->CTL = (spi->CTL & ~SPI_CTL_DWIDTH_Msk) | (u32Width << SPI_CTL_DWIDTH_Pos);
216}
217
225#define SPI_IS_BUSY(spi) ( ((spi)->CTL & SPI_CTL_SPIEN_Msk) == SPI_CTL_SPIEN_Msk ? 1:0 )
226
232#define SPI_TRIGGER(spi) ( (spi)->CTL |= SPI_CTL_SPIEN_Msk )
233
234uint32_t SPI_Open(SPI_T *spi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock);
235 void SPI_Close(SPI_T *spi);
236 void SPI_ClearRxFIFO(SPI_T *spi);
237 void SPI_ClearTxFIFO(SPI_T *spi);
238 void SPI_DisableAutoSS(SPI_T *spi);
239 void SPI_EnableAutoSS(SPI_T *spi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel);
240uint32_t SPI_SetBusClock(SPI_T *spi, uint32_t u32BusClock);
241 void SPI_EnableFIFO(SPI_T *spi, uint32_t u32TxThreshold, uint32_t u32RxThreshold);
242 void SPI_DisableFIFO(SPI_T *spi);
243uint32_t SPI_GetBusClock(SPI_T *spi);
244 void SPI_EnableInt(SPI_T *spi, uint32_t u32Mask);
245 void SPI_DisableInt(SPI_T *spi, uint32_t u32Mask);
246 /* end of group MINI55_SPI_EXPORTED_FUNCTIONS */
248 /* end of group MINI55_SPI_Driver */
250 /* end of group MINI55_Device_Driver */
252
253#ifdef __cplusplus
254}
255#endif
256
257#endif //__SPI_H__
258
259/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
SPI_SSCTL_SSACTPOL_Msk
#define SPI_SSCTL_SSACTPOL_Msk
Definition: Mini55Series.h:4953
SPI_SSCTL_SS_Msk
#define SPI_SSCTL_SS_Msk
Definition: Mini55Series.h:4950
SPI_CTL_DWIDTH_Pos
#define SPI_CTL_DWIDTH_Pos
Definition: Mini55Series.h:4907
SPI_SSCTL_LTF_Msk
#define SPI_SSCTL_LTF_Msk
Definition: Mini55Series.h:4962
SPI_DisableInt
void SPI_DisableInt(SPI_T *spi, uint32_t u32Mask)
Disable FIFO related interrupts specified by u32Mask parameter.
Definition: spi.c:231
SPI_SET_DATA_WIDTH
static __INLINE void SPI_SET_DATA_WIDTH(SPI_T *spi, uint32_t u32Width)
Set the data width of a SPI transaction.
Definition: spi.h:210
SPI_DisableFIFO
void SPI_DisableFIFO(SPI_T *spi)
Disable FIFO mode.
Definition: spi.c:163
SPI_EnableInt
void SPI_EnableInt(SPI_T *spi, uint32_t u32Mask)
Enable FIFO related interrupts specified by u32Mask parameter.
Definition: spi.c:200
SPI_SET_SS_LOW
static __INLINE void SPI_SET_SS_LOW(SPI_T *spi)
Disable automatic slave select function and set SPI_SS pin to low state.
Definition: spi.h:160
SPI_EnableAutoSS
void SPI_EnableAutoSS(SPI_T *spi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel)
Enable the automatic slave select function. Only available in Master mode.
Definition: spi.c:102
SPI_EnableFIFO
void SPI_EnableFIFO(SPI_T *spi, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
Enable FIFO mode with user-specified Tx FIFO threshold and Rx FIFO threshold configurations.
Definition: spi.c:149
SPI_DisableAutoSS
void SPI_DisableAutoSS(SPI_T *spi)
Disable the automatic slave select function.
Definition: spi.c:90
SPI_SetBusClock
uint32_t SPI_SetBusClock(SPI_T *spi, uint32_t u32BusClock)
Set the SPI bus clock. Only available in Master mode.
Definition: spi.c:113
SPI_Close
void SPI_Close(SPI_T *spi)
Reset SPI module and disable SPI peripheral clock.
Definition: spi.c:58
SPI_SET_SS_HIGH
static __INLINE void SPI_SET_SS_HIGH(SPI_T *spi)
Disable automatic slave select function and set SPI_SS pin to high state.
Definition: spi.h:149
SPI_ClearTxFIFO
void SPI_ClearTxFIFO(SPI_T *spi)
Clear Tx FIFO buffer.
Definition: spi.c:80
SPI_Open
uint32_t SPI_Open(SPI_T *spi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock)
This function make SPI module be ready to transfer. By default, the SPI transfer sequence is MSB firs...
Definition: spi.c:39
SPI_GetBusClock
uint32_t SPI_GetBusClock(SPI_T *spi)
Get the actual frequency of SPI bus clock. Only available in Master mode.
Definition: spi.c:173
SPI_ClearRxFIFO
void SPI_ClearRxFIFO(SPI_T *spi)
Clear Rx FIFO buffer.
Definition: spi.c:70
SPI_T::CTL
__IO uint32_t CTL
Definition: Mini55Series.h:4658
SPI_T::SSCTL
__IO uint32_t SSCTL
Definition: Mini55Series.h:4711
SPI_T
Definition: Mini55Series.h:4570