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CMSIS-Core (Cortex-M)
Version 5.0.2
CMSIS-Core support for Cortex-M processor-based devices
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| Version #define symbols for CMSIS release specific C/C++ source code | |
| Version #define symbols for CMSIS release specific C/C++ source code | |
| Compiler agnostic #define symbols for generic C/C++ source code | |
| Naming conventions and optional features for accessing peripherals | |
| Functions for system and clock setup available in system_device.c | |
| Functions to access the Nested Vector Interrupt Controller (NVIC) | |
| Functions to access the Cortex-M core registers | |
| Functions that generate specific Cortex-M CPU Instructions | |
| Access to dedicated SIMD instructions | |
| Functions that relate to the Floating-Point Arithmetic Unit | |
| Functions that relate to the Memory Protection Unit | |
| Define values for MPU region setup | |
| Initialize and start the SysTick timer | |
| Debug Access to the Instrumented Trace Macrocell (ITM) | |
| Functions that related to optional ARMv8-M security extension | |
| Core register Access functions related to TrustZone for ARMv8-M | |
| Nested Vector Interrupt Controller (NVIC) functions related to TrustZone for ARMv8-M | |
| SysTick functions related to TrustZone for ARMv8-M | |
| Secure Attribution Unit (SAU) functions related to TrustZone for ARMv8-M | |
| RTOS Thread Context Management for ARMv8-M TrustZone | |
| Functions for Instruction and Data Cache | |
| Functions for the instruction cache | |
| Functions for the data cache |