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CMSIS-Core (Cortex-A)
Version 1.0.0
CMSIS-Core support for Cortex-A processor-based devices
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CMSIS compiler specific macros, functions, instructions. More...
Macros | |
#define | __ARM_ARCH_7A__ 1 |
Set to 1 when generating code for ARMv7-A (Cortex-A7) More... | |
#define | __ASM __asm |
Pass information from the compiler to the assembler. More... | |
#define | __INLINE __inline |
Recommend that function should be inlined by the compiler. More... | |
#define | __STATIC_INLINE static __inline |
Define a static function should be inlined by the compiler. More... | |
#define | __NO_RETURN __declspec(noreturn) |
Inform the compiler that a function does not return. More... | |
#define | __USED __attribute__((used)) |
Inform that a variable shall be retained in executable image. More... | |
#define | __WEAK __attribute__((weak)) |
Export a function or variable weakly to allow overwrites. More... | |
#define | __PACKED __attribute__((packed)) |
Request smallest possible alignment. More... | |
#define | __PACKED_STRUCT __packed struct |
#define | __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val)) |
#define | __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr))) |
#define | __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val)) |
#define | __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr))) |
#define | __ALIGNED(x) __attribute__((aligned(x))) |
Minimum alignment for a variable. More... | |
#define | __NOP __nop |
No Operation. More... | |
#define | __WFI __wfi |
Wait For Interrupt. More... | |
#define | __WFE __wfe |
Wait For Event. More... | |
#define | __SEV __sev |
Send Event. More... | |
#define | __ISB() |
Instruction Synchronization Barrier. More... | |
#define | __DSB() |
Data Synchronization Barrier. More... | |
#define | __DMB() |
Data Memory Barrier. More... | |
#define | __REV __rev |
Reverse byte order (32 bit) More... | |
#define | __ROR __ror |
Reverse byte order (16 bit) More... | |
#define | __BKPT(value) __breakpoint(value) |
Breakpoint. More... | |
#define | __RBIT __rbit |
Reverse bit order of value. More... | |
#define | __CLZ __clz |
Count leading zeros. More... | |
#define | __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop") |
LDR Exclusive (8 bit) More... | |
#define | __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop") |
LDR Exclusive (16 bit) More... | |
#define | __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop") |
LDR Exclusive (32 bit) More... | |
#define | __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") |
STR Exclusive (8 bit) More... | |
#define | __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") |
STR Exclusive (16 bit) More... | |
#define | __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") |
STR Exclusive (32 bit) More... | |
#define | __CLREX __clrex |
Remove the exclusive lock. More... | |
Functions | |
__STATIC_INLINE uint32_t | __get_FPSCR (void) |
Get FPSCR (Floating Point Status/Control) More... | |
__STATIC_INLINE void | __set_FPSCR (uint32_t fpscr) |
Set FPSCR (Floating Point Status/Control) More... | |
__STATIC_INLINE uint32_t | __get_CPSR (void) |
Get CPSR (Current Program Status Register) More... | |
__STATIC_INLINE void | __set_CPSR (uint32_t cpsr) |
Set CPSR (Current Program Status Register) More... | |
__STATIC_INLINE uint32_t | __get_mode (void) |
Get Mode. More... | |
__STATIC_INLINE __ASM void | __set_mode (uint32_t mode) |
Set Mode. More... | |
__STATIC_INLINE __ASM void | __set_SP (uint32_t stack) |
Set Stack Pointer. More... | |
__STATIC_INLINE __ASM void | __set_SP_usr (uint32_t topOfProcStack) |
Set USR/SYS Stack Pointer. More... | |
__STATIC_INLINE uint32_t | __get_FPEXC (void) |
Get FPEXC (Floating Point Exception Control Register) More... | |
__STATIC_INLINE void | __set_FPEXC (uint32_t fpexc) |
Set FPEXC (Floating Point Exception Control Register) More... | |
__STATIC_INLINE uint32_t | __get_ACTLR (void) |
Get ACTLR (Auxiliary Control Register) More... | |
__STATIC_INLINE void | __set_ACTLR (uint32_t actlr) |
Set ACTLR (Auxiliary Control Register) More... | |
__STATIC_INLINE uint32_t | __get_CPACR (void) |
Get CPACR (Coprocessor Access Control Register) More... | |
__STATIC_INLINE void | __set_CPACR (uint32_t cpacr) |
Set CPACR (Coprocessor Access Control Register) More... | |
__STATIC_INLINE uint32_t | __get_DFSR (void) |
Get DFSR (Data Fault Status Register) More... | |
__STATIC_INLINE void | __set_DFSR (uint32_t dfsr) |
Set DFSR (Data Fault Status Register) More... | |
__STATIC_INLINE uint32_t | __get_IFSR (void) |
Get IFSR (Instruction Fault Status Register) More... | |
__STATIC_INLINE void | __set_IFSR (uint32_t ifsr) |
Set IFSR (Instruction Fault Status Register) More... | |
__STATIC_INLINE uint32_t | __get_ISR (void) |
Get ISR (Interrupt Status Register) More... | |
__STATIC_INLINE uint32_t | __get_CBAR () |
Get CBAR (Configuration Base Address Register) More... | |
__STATIC_INLINE uint32_t | __get_TTBR0 () |
Get TTBR0 (Translation Table Base Register 0) More... | |
__STATIC_INLINE void | __set_TTBR0 (uint32_t ttbr0) |
Set TTBR0 Translation Table Base Register 0. More... | |
__STATIC_INLINE uint32_t | __get_DACR () |
Get DACR (Domain Access Control Register) More... | |
__STATIC_INLINE void | __set_DACR (uint32_t dacr) |
Set DACR (Domain Access Control Register) More... | |
__STATIC_INLINE void | __set_SCTLR (uint32_t sctlr) |
Set SCTLR (System Control Register). More... | |
__STATIC_INLINE uint32_t | __get_SCTLR () |
Get SCTLR (System Control Register). More... | |
__STATIC_INLINE void | __set_ACTRL (uint32_t actrl) |
Set ACTRL (Auxiliary Control Register) More... | |
__STATIC_INLINE uint32_t | __get_ACTRL (void) |
Get ACTRL (Auxiliary Control Register) More... | |
__STATIC_INLINE uint32_t | __get_MPIDR (void) |
Get MPIDR (Multiprocessor Affinity Register) More... | |
__STATIC_INLINE uint32_t | __get_VBAR (void) |
Get VBAR (Vector Base Address Register) More... | |
__STATIC_INLINE void | __set_VBAR (uint32_t vbar) |
Set VBAR (Vector Base Address Register) More... | |
__STATIC_INLINE void | __set_CNTFRQ (uint32_t value) |
Set CNTFRQ (Counter Frequency Register) More... | |
__STATIC_INLINE void | __set_CNTP_TVAL (uint32_t value) |
Set CNTP_TVAL (PL1 Physical TimerValue Register) More... | |
__STATIC_INLINE uint32_t | __get_CNTP_TVAL () |
Get CNTP_TVAL (PL1 Physical TimerValue Register) More... | |
__STATIC_INLINE void | __set_CNTP_CTL (uint32_t value) |
Set CNTP_CTL (PL1 Physical Timer Control Register) More... | |
__STATIC_INLINE uint32_t | __get_CNTP_CTL () |
Get CNTP_CTL register. More... | |
__STATIC_INLINE void | __set_TLBIALL (uint32_t value) |
Set TLBIALL (Invalidate Entire Unified TLB) More... | |
__STATIC_INLINE void | __set_BPIALL (uint32_t value) |
Set BPIALL (Branch Predictor Invalidate All) More... | |
__STATIC_INLINE void | __set_ICIALLU (uint32_t value) |
Set ICIALLU (Instruction Cache Invalidate All) More... | |
__STATIC_INLINE void | __set_DCCMVAC (uint32_t value) |
Set DCCMVAC (Clean data or unified cache line by MVA to PoC) More... | |
__STATIC_INLINE void | __set_DCIMVAC (uint32_t value) |
Set DCIMVAC (Invalidate data or unified cache line by MVA to PoC) More... | |
__STATIC_INLINE void | __set_DCCIMVAC (uint32_t value) |
Set DCCIMVAC (Clean and Invalidate data or unified cache line by MVA to PoC) More... | |
__STATIC_INLINE __ASM void | __L1C_CleanInvalidateCache (uint32_t op) |
Clean and Invalidate the entire data or unified cache. More... | |
__STATIC_INLINE __ASM void | __FPU_Enable (void) |
Enable Floating Point Unit. More... | |
#define __CLREX __clrex |
Removes the exclusive lock which is created by LDREX.
#define __LDREXB | ( | ptr | ) | _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop") |
Executes a exclusive LDR instruction for 8 bit value.
[in] | ptr | Pointer to data |
#define __LDREXH | ( | ptr | ) | _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop") |
Executes a exclusive LDR instruction for 16 bit values.
[in] | ptr | Pointer to data |
#define __LDREXW | ( | ptr | ) | _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop") |
Executes a exclusive LDR instruction for 32 bit values.
[in] | ptr | Pointer to data |
#define __PACKED_STRUCT __packed struct |
#define __RBIT __rbit |
[in] | value | Value to reverse |
#define __STREXB | ( | value, | |
ptr | |||
) | _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") |
Executes a exclusive STR instruction for 8 bit values.
[in] | value | Value to store |
[in] | ptr | Pointer to location |
#define __STREXH | ( | value, | |
ptr | |||
) | _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") |
Executes a exclusive STR instruction for 16 bit values.
[in] | value | Value to store |
[in] | ptr | Pointer to location |
#define __STREXW | ( | value, | |
ptr | |||
) | _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") |
Executes a exclusive STR instruction for 32 bit values.
[in] | value | Value to store |
[in] | ptr | Pointer to location |
#define __UNALIGNED_UINT16_READ | ( | addr | ) | (*((const __packed uint16_t *)(addr))) |
#define __UNALIGNED_UINT16_WRITE | ( | addr, | |
val | |||
) | ((*((__packed uint16_t *)(addr))) = (val)) |
#define __UNALIGNED_UINT32_READ | ( | addr | ) | (*((const __packed uint32_t *)(addr))) |
#define __UNALIGNED_UINT32_WRITE | ( | addr, | |
val | |||
) | ((*((__packed uint32_t *)(addr))) = (val)) |
__STATIC_INLINE uint32_t __get_ACTRL | ( | void | ) |
__STATIC_INLINE uint32_t __get_mode | ( | void | ) |
__STATIC_INLINE void __set_ACTLR | ( | uint32_t | actlr | ) |
[in] | actlr | Auxiliary Control value to set |
__STATIC_INLINE void __set_CNTFRQ | ( | uint32_t | value | ) |
[in] | value | CNTFRQ Register value to set |
__STATIC_INLINE __ASM void __set_mode | ( | uint32_t | mode | ) |
[in] | mode | Mode value to set |