usbh_reg.h

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/**************************************************************************/
#ifndef __USBH_REG_H__
#define __USBH_REG_H__

#if defined ( __CC_ARM   )
#pragma anon_unions
#endif

typedef struct
{

    __I  uint32_t HcRevision;            
    __IO uint32_t HcControl;             
    __IO uint32_t HcCommandStatus;       
    __IO uint32_t HcInterruptStatus;     
    __IO uint32_t HcInterruptEnable;     
    __IO uint32_t HcInterruptDisable;    
    __IO uint32_t HcHCCA;                
    __IO uint32_t HcPeriodCurrentED;     
    __IO uint32_t HcControlHeadED;       
    __IO uint32_t HcControlCurrentED;    
    __IO uint32_t HcBulkHeadED;          
    __IO uint32_t HcBulkCurrentED;       
    __IO uint32_t HcDoneHead;            
    __IO uint32_t HcFmInterval;          
    __I  uint32_t HcFmRemaining;         
    __I  uint32_t HcFmNumber;            
    __IO uint32_t HcPeriodicStart;       
    __IO uint32_t HcLSThreshold;         
    __IO uint32_t HcRhDescriptorA;       
    __IO uint32_t HcRhDescriptorB;       
    __IO uint32_t HcRhStatus;            
    __IO uint32_t HcRhPortStatus[2];     
    __I  uint32_t RESERVE0[105];
    __IO uint32_t HcPhyControl;          
    __IO uint32_t HcMiscControl;         
} USBH_T;

#define USBH_HcRevision_REV_Pos          (0)                                               
#define USBH_HcRevision_REV_Msk          (0xfful << USBH_HcRevision_REV_Pos)               
#define USBH_HcControl_CBSR_Pos          (0)                                               
#define USBH_HcControl_CBSR_Msk          (0x3ul << USBH_HcControl_CBSR_Pos)                
#define USBH_HcControl_PLE_Pos           (2)                                               
#define USBH_HcControl_PLE_Msk           (0x1ul << USBH_HcControl_PLE_Pos)                 
#define USBH_HcControl_IE_Pos            (3)                                               
#define USBH_HcControl_IE_Msk            (0x1ul << USBH_HcControl_IE_Pos)                  
#define USBH_HcControl_CLE_Pos           (4)                                               
#define USBH_HcControl_CLE_Msk           (0x1ul << USBH_HcControl_CLE_Pos)                 
#define USBH_HcControl_BLE_Pos           (5)                                               
#define USBH_HcControl_BLE_Msk           (0x1ul << USBH_HcControl_BLE_Pos)                 
#define USBH_HcControl_HCFS_Pos          (6)                                               
#define USBH_HcControl_HCFS_Msk          (0x3ul << USBH_HcControl_HCFS_Pos)                
#define USBH_HcCommandStatus_HCR_Pos     (0)                                               
#define USBH_HcCommandStatus_HCR_Msk     (0x1ul << USBH_HcCommandStatus_HCR_Pos)           
#define USBH_HcCommandStatus_CLF_Pos     (1)                                               
#define USBH_HcCommandStatus_CLF_Msk     (0x1ul << USBH_HcCommandStatus_CLF_Pos)           
#define USBH_HcCommandStatus_BLF_Pos     (2)                                               
#define USBH_HcCommandStatus_BLF_Msk     (0x1ul << USBH_HcCommandStatus_BLF_Pos)           
#define USBH_HcCommandStatus_SOC_Pos     (16)                                              
#define USBH_HcCommandStatus_SOC_Msk     (0x3ul << USBH_HcCommandStatus_SOC_Pos)           
#define USBH_HcInterruptStatus_SO_Pos    (0)                                               
#define USBH_HcInterruptStatus_SO_Msk    (0x1ul << USBH_HcInterruptStatus_SO_Pos)          
#define USBH_HcInterruptStatus_WDH_Pos   (1)                                               
#define USBH_HcInterruptStatus_WDH_Msk   (0x1ul << USBH_HcInterruptStatus_WDH_Pos)         
#define USBH_HcInterruptStatus_SF_Pos    (2)                                               
#define USBH_HcInterruptStatus_SF_Msk    (0x1ul << USBH_HcInterruptStatus_SF_Pos)          
#define USBH_HcInterruptStatus_RD_Pos    (3)                                               
#define USBH_HcInterruptStatus_RD_Msk    (0x1ul << USBH_HcInterruptStatus_RD_Pos)          
#define USBH_HcInterruptStatus_FNO_Pos   (5)                                               
#define USBH_HcInterruptStatus_FNO_Msk   (0x1ul << USBH_HcInterruptStatus_FNO_Pos)         
#define USBH_HcInterruptStatus_RHSC_Pos  (6)                                               
#define USBH_HcInterruptStatus_RHSC_Msk  (0x1ul << USBH_HcInterruptStatus_RHSC_Pos)        
#define USBH_HcInterruptEnable_SO_Pos    (0)                                               
#define USBH_HcInterruptEnable_SO_Msk    (0x1ul << USBH_HcInterruptEnable_SO_Pos)          
#define USBH_HcInterruptEnable_WDH_Pos   (1)                                               
#define USBH_HcInterruptEnable_WDH_Msk   (0x1ul << USBH_HcInterruptEnable_WDH_Pos)         
#define USBH_HcInterruptEnable_SF_Pos    (2)                                               
#define USBH_HcInterruptEnable_SF_Msk    (0x1ul << USBH_HcInterruptEnable_SF_Pos)          
#define USBH_HcInterruptEnable_RD_Pos    (3)                                               
#define USBH_HcInterruptEnable_RD_Msk    (0x1ul << USBH_HcInterruptEnable_RD_Pos)          
#define USBH_HcInterruptEnable_FNO_Pos   (5)                                               
#define USBH_HcInterruptEnable_FNO_Msk   (0x1ul << USBH_HcInterruptEnable_FNO_Pos)         
#define USBH_HcInterruptEnable_RHSC_Pos  (6)                                               
#define USBH_HcInterruptEnable_RHSC_Msk  (0x1ul << USBH_HcInterruptEnable_RHSC_Pos)        
#define USBH_HcInterruptEnable_MIE_Pos   (31)                                              
#define USBH_HcInterruptEnable_MIE_Msk   (0x1ul << USBH_HcInterruptEnable_MIE_Pos)         
#define USBH_HcInterruptDisable_SO_Pos   (0)                                               
#define USBH_HcInterruptDisable_SO_Msk   (0x1ul << USBH_HcInterruptDisable_SO_Pos)         
#define USBH_HcInterruptDisable_WDH_Pos  (1)                                               
#define USBH_HcInterruptDisable_WDH_Msk  (0x1ul << USBH_HcInterruptDisable_WDH_Pos)        
#define USBH_HcInterruptDisable_SF_Pos   (2)                                               
#define USBH_HcInterruptDisable_SF_Msk   (0x1ul << USBH_HcInterruptDisable_SF_Pos)         
#define USBH_HcInterruptDisable_RD_Pos   (3)                                               
#define USBH_HcInterruptDisable_RD_Msk   (0x1ul << USBH_HcInterruptDisable_RD_Pos)         
#define USBH_HcInterruptDisable_FNO_Pos  (5)                                               
#define USBH_HcInterruptDisable_FNO_Msk  (0x1ul << USBH_HcInterruptDisable_FNO_Pos)        
#define USBH_HcInterruptDisable_RHSC_Pos (6)                                               
#define USBH_HcInterruptDisable_RHSC_Msk (0x1ul << USBH_HcInterruptDisable_RHSC_Pos)       
#define USBH_HcInterruptDisable_MIE_Pos  (31)                                              
#define USBH_HcInterruptDisable_MIE_Msk  (0x1ul << USBH_HcInterruptDisable_MIE_Pos)        
#define USBH_HcHCCA_HCCA_Pos             (8)                                               
#define USBH_HcHCCA_HCCA_Msk             (0xfffffful << USBH_HcHCCA_HCCA_Pos)              
#define USBH_HcPeriodCurrentED_PCED_Pos  (4)                                               
#define USBH_HcPeriodCurrentED_PCED_Msk  (0xffffffful << USBH_HcPeriodCurrentED_PCED_Pos)  
#define USBH_HcControlHeadED_CHED_Pos    (4)                                               
#define USBH_HcControlHeadED_CHED_Msk    (0xffffffful << USBH_HcControlHeadED_CHED_Pos)    
#define USBH_HcControlCurrentED_CCED_Pos (4)                                               
#define USBH_HcControlCurrentED_CCED_Msk (0xffffffful << USBH_HcControlCurrentED_CCED_Pos) 
#define USBH_HcBulkHeadED_BHED_Pos       (4)                                               
#define USBH_HcBulkHeadED_BHED_Msk       (0xffffffful << USBH_HcBulkHeadED_BHED_Pos)       
#define USBH_HcBulkCurrentED_BCED_Pos    (4)                                               
#define USBH_HcBulkCurrentED_BCED_Msk    (0xffffffful << USBH_HcBulkCurrentED_BCED_Pos)    
#define USBH_HcDoneHead_DH_Pos           (4)                                               
#define USBH_HcDoneHead_DH_Msk           (0xffffffful << USBH_HcDoneHead_DH_Pos)           
#define USBH_HcFmInterval_FI_Pos         (0)                                               
#define USBH_HcFmInterval_FI_Msk         (0x3ffful << USBH_HcFmInterval_FI_Pos)            
#define USBH_HcFmInterval_FSMPS_Pos      (16)                                              
#define USBH_HcFmInterval_FSMPS_Msk      (0x7ffful << USBH_HcFmInterval_FSMPS_Pos)         
#define USBH_HcFmInterval_FIT_Pos        (31)                                              
#define USBH_HcFmInterval_FIT_Msk        (0x1ul << USBH_HcFmInterval_FIT_Pos)              
#define USBH_HcFmRemaining_FR_Pos        (0)                                               
#define USBH_HcFmRemaining_FR_Msk        (0x3ffful << USBH_HcFmRemaining_FR_Pos)           
#define USBH_HcFmRemaining_FRT_Pos       (31)                                              
#define USBH_HcFmRemaining_FRT_Msk       (0x1ul << USBH_HcFmRemaining_FRT_Pos)             
#define USBH_HcFmNumber_FN_Pos           (0)                                               
#define USBH_HcFmNumber_FN_Msk           (0xfffful << USBH_HcFmNumber_FN_Pos)              
#define USBH_HcPeriodicStart_PS_Pos      (0)                                               
#define USBH_HcPeriodicStart_PS_Msk      (0x3ffful << USBH_HcPeriodicStart_PS_Pos)         
#define USBH_HcLSThreshold_LST_Pos       (0)                                               
#define USBH_HcLSThreshold_LST_Msk       (0xffful << USBH_HcLSThreshold_LST_Pos)           
#define USBH_HcRhDescriptorA_NDP_Pos     (0)                                               
#define USBH_HcRhDescriptorA_NDP_Msk     (0xfful << USBH_HcRhDescriptorA_NDP_Pos)          
#define USBH_HcRhDescriptorA_PSM_Pos     (8)                                               
#define USBH_HcRhDescriptorA_PSM_Msk     (0x1ul << USBH_HcRhDescriptorA_PSM_Pos)           
#define USBH_HcRhDescriptorA_OCPM_Pos    (11)                                              
#define USBH_HcRhDescriptorA_OCPM_Msk    (0x1ul << USBH_HcRhDescriptorA_OCPM_Pos)          
#define USBH_HcRhDescriptorA_NOCP_Pos    (12)                                              
#define USBH_HcRhDescriptorA_NOCP_Msk    (0x1ul << USBH_HcRhDescriptorA_NOCP_Pos)          
#define USBH_HcRhDescriptorB_PPCM_Pos    (16)                                              
#define USBH_HcRhDescriptorB_PPCM_Msk    (0xfffful << USBH_HcRhDescriptorB_PPCM_Pos)       
#define USBH_HcRhStatus_LPS_Pos          (0)                                               
#define USBH_HcRhStatus_LPS_Msk          (0x1ul << USBH_HcRhStatus_LPS_Pos)                
#define USBH_HcRhStatus_OCI_Pos          (1)                                               
#define USBH_HcRhStatus_OCI_Msk          (0x1ul << USBH_HcRhStatus_OCI_Pos)                
#define USBH_HcRhStatus_DRWE_Pos         (15)                                              
#define USBH_HcRhStatus_DRWE_Msk         (0x1ul << USBH_HcRhStatus_DRWE_Pos)               
#define USBH_HcRhStatus_LPSC_Pos         (16)                                              
#define USBH_HcRhStatus_LPSC_Msk         (0x1ul << USBH_HcRhStatus_LPSC_Pos)               
#define USBH_HcRhStatus_OCIC_Pos         (17)                                              
#define USBH_HcRhStatus_OCIC_Msk         (0x1ul << USBH_HcRhStatus_OCIC_Pos)               
#define USBH_HcRhStatus_CRWE_Pos         (31)                                              
#define USBH_HcRhStatus_CRWE_Msk         (0x1ul << USBH_HcRhStatus_CRWE_Pos)               
#define USBH_HcRhPortStatus_CCS_Pos      (0)                                               
#define USBH_HcRhPortStatus_CCS_Msk      (0x1ul << USBH_HcRhPortStatus_CCS_Pos)            
#define USBH_HcRhPortStatus_PES_Pos      (1)                                               
#define USBH_HcRhPortStatus_PES_Msk      (0x1ul << USBH_HcRhPortStatus_PES_Pos)            
#define USBH_HcRhPortStatus_PSS_Pos      (2)                                               
#define USBH_HcRhPortStatus_PSS_Msk      (0x1ul << USBH_HcRhPortStatus_PSS_Pos)            
#define USBH_HcRhPortStatus_POCI_Pos     (3)                                               
#define USBH_HcRhPortStatus_POCI_Msk     (0x1ul << USBH_HcRhPortStatus_POCI_Pos)           
#define USBH_HcRhPortStatus_PRS_Pos      (4)                                               
#define USBH_HcRhPortStatus_PRS_Msk      (0x1ul << USBH_HcRhPortStatus_PRS_Pos)            
#define USBH_HcRhPortStatus_PPS_Pos      (8)                                               
#define USBH_HcRhPortStatus_PPS_Msk      (0x1ul << USBH_HcRhPortStatus_PPS_Pos)            
#define USBH_HcRhPortStatus_LSDA_Pos     (9)                                               
#define USBH_HcRhPortStatus_LSDA_Msk     (0x1ul << USBH_HcRhPortStatus_LSDA_Pos)           
#define USBH_HcRhPortStatus_CSC_Pos      (16)                                              
#define USBH_HcRhPortStatus_CSC_Msk      (0x1ul << USBH_HcRhPortStatus_CSC_Pos)            
#define USBH_HcRhPortStatus_PESC_Pos     (17)                                              
#define USBH_HcRhPortStatus_PESC_Msk     (0x1ul << USBH_HcRhPortStatus_PESC_Pos)           
#define USBH_HcRhPortStatus_PSSC_Pos     (18)                                              
#define USBH_HcRhPortStatus_PSSC_Msk     (0x1ul << USBH_HcRhPortStatus_PSSC_Pos)           
#define USBH_HcRhPortStatus_OCIC_Pos     (19)                                              
#define USBH_HcRhPortStatus_OCIC_Msk     (0x1ul << USBH_HcRhPortStatus_OCIC_Pos)           
#define USBH_HcRhPortStatus_PRSC_Pos     (20)                                              
#define USBH_HcRhPortStatus_PRSC_Msk     (0x1ul << USBH_HcRhPortStatus_PRSC_Pos)           
#define USBH_HcPhyControl_STBYEN_Pos     (27)                                              
#define USBH_HcPhyControl_STBYEN_Msk     (0x1ul << USBH_HcPhyControl_STBYEN_Pos)           
#define USBH_HcMiscControl_ABORT_Pos     (1)                                               
#define USBH_HcMiscControl_ABORT_Msk     (0x1ul << USBH_HcMiscControl_ABORT_Pos)           
#define USBH_HcMiscControl_OCAL_Pos      (3)                                               
#define USBH_HcMiscControl_OCAL_Msk      (0x1ul << USBH_HcMiscControl_OCAL_Pos)            
#define USBH_HcMiscControl_DPRT1_Pos     (16)                                              
#define USBH_HcMiscControl_DPRT1_Msk     (0x1ul << USBH_HcMiscControl_DPRT1_Pos)            /* USBH_CONST */
 /* end of USBH register group */ /* end of REGISTER group */

#if defined ( __CC_ARM   )
#pragma no_anon_unions
#endif

#endif /* __USBH_REG_H__ */