10 #define __USBD_REG_H__ 12 #if defined ( __CC_ARM ) 897 __I uint32_t RESERVE0[1];
902 __I uint32_t RESERVE1[24];
908 __I uint32_t RESERVE2[283];
921 #define USBD_INTEN_BUSIEN_Pos (0) 922 #define USBD_INTEN_BUSIEN_Msk (0x1ul << USBD_INTEN_BUSIEN_Pos) 924 #define USBD_INTEN_USBIEN_Pos (1) 925 #define USBD_INTEN_USBIEN_Msk (0x1ul << USBD_INTEN_USBIEN_Pos) 927 #define USBD_INTEN_VBDETIEN_Pos (2) 928 #define USBD_INTEN_VBDETIEN_Msk (0x1ul << USBD_INTEN_VBDETIEN_Pos) 930 #define USBD_INTEN_NEVWKIEN_Pos (3) 931 #define USBD_INTEN_NEVWKIEN_Msk (0x1ul << USBD_INTEN_NEVWKIEN_Pos) 933 #define USBD_INTEN_SOFIEN_Pos (4) 934 #define USBD_INTEN_SOFIEN_Msk (0x1ul << USBD_INTEN_SOFIEN_Pos) 936 #define USBD_INTEN_WKEN_Pos (8) 937 #define USBD_INTEN_WKEN_Msk (0x1ul << USBD_INTEN_WKEN_Pos) 939 #define USBD_INTEN_INNAKEN_Pos (15) 940 #define USBD_INTEN_INNAKEN_Msk (0x1ul << USBD_INTEN_INNAKEN_Pos) 942 #define USBD_INTSTS_BUSIF_Pos (0) 943 #define USBD_INTSTS_BUSIF_Msk (0x1ul << USBD_INTSTS_BUSIF_Pos) 945 #define USBD_INTSTS_USBIF_Pos (1) 946 #define USBD_INTSTS_USBIF_Msk (0x1ul << USBD_INTSTS_USBIF_Pos) 948 #define USBD_INTSTS_VBDETIF_Pos (2) 949 #define USBD_INTSTS_VBDETIF_Msk (0x1ul << USBD_INTSTS_VBDETIF_Pos) 951 #define USBD_INTSTS_NEVWKIF_Pos (3) 952 #define USBD_INTSTS_NEVWKIF_Msk (0x1ul << USBD_INTSTS_NEVWKIF_Pos) 954 #define USBD_INTSTS_SOFIF_Pos (4) 955 #define USBD_INTSTS_SOFIF_Msk (0x1ul << USBD_INTSTS_SOFIF_Pos) 957 #define USBD_INTSTS_EPEVT0_Pos (16) 958 #define USBD_INTSTS_EPEVT0_Msk (0x1ul << USBD_INTSTS_EPEVT0_Pos) 960 #define USBD_INTSTS_EPEVT1_Pos (17) 961 #define USBD_INTSTS_EPEVT1_Msk (0x1ul << USBD_INTSTS_EPEVT1_Pos) 963 #define USBD_INTSTS_EPEVT2_Pos (18) 964 #define USBD_INTSTS_EPEVT2_Msk (0x1ul << USBD_INTSTS_EPEVT2_Pos) 966 #define USBD_INTSTS_EPEVT3_Pos (19) 967 #define USBD_INTSTS_EPEVT3_Msk (0x1ul << USBD_INTSTS_EPEVT3_Pos) 969 #define USBD_INTSTS_EPEVT4_Pos (20) 970 #define USBD_INTSTS_EPEVT4_Msk (0x1ul << USBD_INTSTS_EPEVT4_Pos) 972 #define USBD_INTSTS_EPEVT5_Pos (21) 973 #define USBD_INTSTS_EPEVT5_Msk (0x1ul << USBD_INTSTS_EPEVT5_Pos) 975 #define USBD_INTSTS_EPEVT6_Pos (22) 976 #define USBD_INTSTS_EPEVT6_Msk (0x1ul << USBD_INTSTS_EPEVT6_Pos) 978 #define USBD_INTSTS_EPEVT7_Pos (23) 979 #define USBD_INTSTS_EPEVT7_Msk (0x1ul << USBD_INTSTS_EPEVT7_Pos) 981 #define USBD_INTSTS_EPEVT8_Pos (24) 982 #define USBD_INTSTS_EPEVT8_Msk (0x1ul << USBD_INTSTS_EPEVT8_Pos) 984 #define USBD_INTSTS_EPEVT9_Pos (25) 985 #define USBD_INTSTS_EPEVT9_Msk (0x1ul << USBD_INTSTS_EPEVT9_Pos) 987 #define USBD_INTSTS_EPEVT10_Pos (26) 988 #define USBD_INTSTS_EPEVT10_Msk (0x1ul << USBD_INTSTS_EPEVT10_Pos) 990 #define USBD_INTSTS_EPEVT11_Pos (27) 991 #define USBD_INTSTS_EPEVT11_Msk (0x1ul << USBD_INTSTS_EPEVT11_Pos) 993 #define USBD_INTSTS_SETUP_Pos (31) 994 #define USBD_INTSTS_SETUP_Msk (0x1ul << USBD_INTSTS_SETUP_Pos) 996 #define USBD_FADDR_FADDR_Pos (0) 997 #define USBD_FADDR_FADDR_Msk (0x7ful << USBD_FADDR_FADDR_Pos) 999 #define USBD_EPSTS_OV_Pos (7) 1000 #define USBD_EPSTS_OV_Msk (0x1ul << USBD_EPSTS_OV_Pos) 1002 #define USBD_ATTR_USBRST_Pos (0) 1003 #define USBD_ATTR_USBRST_Msk (0x1ul << USBD_ATTR_USBRST_Pos) 1005 #define USBD_ATTR_SUSPEND_Pos (1) 1006 #define USBD_ATTR_SUSPEND_Msk (0x1ul << USBD_ATTR_SUSPEND_Pos) 1008 #define USBD_ATTR_RESUME_Pos (2) 1009 #define USBD_ATTR_RESUME_Msk (0x1ul << USBD_ATTR_RESUME_Pos) 1011 #define USBD_ATTR_TOUT_Pos (3) 1012 #define USBD_ATTR_TOUT_Msk (0x1ul << USBD_ATTR_TOUT_Pos) 1014 #define USBD_ATTR_PHYEN_Pos (4) 1015 #define USBD_ATTR_PHYEN_Msk (0x1ul << USBD_ATTR_PHYEN_Pos) 1017 #define USBD_ATTR_RWAKEUP_Pos (5) 1018 #define USBD_ATTR_RWAKEUP_Msk (0x1ul << USBD_ATTR_RWAKEUP_Pos) 1020 #define USBD_ATTR_USBEN_Pos (7) 1021 #define USBD_ATTR_USBEN_Msk (0x1ul << USBD_ATTR_USBEN_Pos) 1023 #define USBD_ATTR_DPPUEN_Pos (8) 1024 #define USBD_ATTR_DPPUEN_Msk (0x1ul << USBD_ATTR_DPPUEN_Pos) 1026 #define USBD_ATTR_BYTEM_Pos (10) 1027 #define USBD_ATTR_BYTEM_Msk (0x1ul << USBD_ATTR_BYTEM_Pos) 1029 #define USBD_ATTR_LPMACK_Pos (11) 1030 #define USBD_ATTR_LPMACK_Msk (0x1ul << USBD_ATTR_LPMACK_Pos) 1032 #define USBD_ATTR_L1SUSPEND_Pos (12) 1033 #define USBD_ATTR_L1SUSPEND_Msk (0x1ul << USBD_ATTR_L1SUSPEND_Pos) 1035 #define USBD_ATTR_L1RESUME_Pos (13) 1036 #define USBD_ATTR_L1RESUME_Msk (0x1ul << USBD_ATTR_L1RESUME_Pos) 1038 #define USBD_VBUSDET_VBUSDET_Pos (0) 1039 #define USBD_VBUSDET_VBUSDET_Msk (0x1ul << USBD_VBUSDET_VBUSDET_Pos) 1041 #define USBD_STBUFSEG_STBUFSEG_Pos (3) 1042 #define USBD_STBUFSEG_STBUFSEG_Msk (0x3ful << USBD_STBUFSEG_STBUFSEG_Pos) 1044 #define USBD_EPSTS0_EPSTS0_Pos (0) 1045 #define USBD_EPSTS0_EPSTS0_Msk (0xful << USBD_EPSTS0_EPSTS0_Pos) 1047 #define USBD_EPSTS0_EPSTS1_Pos (4) 1048 #define USBD_EPSTS0_EPSTS1_Msk (0xful << USBD_EPSTS0_EPSTS1_Pos) 1050 #define USBD_EPSTS0_EPSTS2_Pos (8) 1051 #define USBD_EPSTS0_EPSTS2_Msk (0xful << USBD_EPSTS0_EPSTS2_Pos) 1053 #define USBD_EPSTS0_EPSTS3_Pos (12) 1054 #define USBD_EPSTS0_EPSTS3_Msk (0xful << USBD_EPSTS0_EPSTS3_Pos) 1056 #define USBD_EPSTS0_EPSTS4_Pos (16) 1057 #define USBD_EPSTS0_EPSTS4_Msk (0xful << USBD_EPSTS0_EPSTS4_Pos) 1059 #define USBD_EPSTS0_EPSTS5_Pos (20) 1060 #define USBD_EPSTS0_EPSTS5_Msk (0xful << USBD_EPSTS0_EPSTS5_Pos) 1062 #define USBD_EPSTS0_EPSTS6_Pos (24) 1063 #define USBD_EPSTS0_EPSTS6_Msk (0xful << USBD_EPSTS0_EPSTS6_Pos) 1065 #define USBD_EPSTS0_EPSTS7_Pos (28) 1066 #define USBD_EPSTS0_EPSTS7_Msk (0xful << USBD_EPSTS0_EPSTS7_Pos) 1068 #define USBD_EPSTS1_EPSTS8_Pos (0) 1069 #define USBD_EPSTS1_EPSTS8_Msk (0xful << USBD_EPSTS1_EPSTS8_Pos) 1071 #define USBD_EPSTS1_EPSTS9_Pos (4) 1072 #define USBD_EPSTS1_EPSTS9_Msk (0xful << USBD_EPSTS1_EPSTS9_Pos) 1074 #define USBD_EPSTS1_EPSTS10_Pos (8) 1075 #define USBD_EPSTS1_EPSTS10_Msk (0xful << USBD_EPSTS1_EPSTS10_Pos) 1077 #define USBD_EPSTS1_EPSTS11_Pos (12) 1078 #define USBD_EPSTS1_EPSTS11_Msk (0xful << USBD_EPSTS1_EPSTS11_Pos) 1080 #define USBD_LPMATTR_LPMLINKSTS_Pos (0) 1081 #define USBD_LPMATTR_LPMLINKSTS_Msk (0xful << USBD_LPMATTR_LPMLINKSTS_Pos) 1083 #define USBD_LPMATTR_LPMBESL_Pos (4) 1084 #define USBD_LPMATTR_LPMBESL_Msk (0xful << USBD_LPMATTR_LPMBESL_Pos) 1086 #define USBD_LPMATTR_LPMRWAKUP_Pos (8) 1087 #define USBD_LPMATTR_LPMRWAKUP_Msk (0x1ul << USBD_LPMATTR_LPMRWAKUP_Pos) 1089 #define USBD_FN_FN_Pos (0) 1090 #define USBD_FN_FN_Msk (0x7fful << USBD_FN_FN_Pos) 1092 #define USBD_SE0_SE0_Pos (0) 1093 #define USBD_SE0_SE0_Msk (0x1ul << USBD_SE0_SE0_Pos) 1095 #define USBD_BUFSEG_BUFSEG_Pos (3) 1096 #define USBD_BUFSEG_BUFSEG_Msk (0x3ful << USBD_BUFSEG_BUFSEG_Pos) 1098 #define USBD_MXPLD_MXPLD_Pos (0) 1099 #define USBD_MXPLD_MXPLD_Msk (0x1fful << USBD_MXPLD_MXPLD_Pos) 1101 #define USBD_CFG_EPNUM_Pos (0) 1102 #define USBD_CFG_EPNUM_Msk (0xful << USBD_CFG_EPNUM_Pos) 1104 #define USBD_CFG_ISOCH_Pos (4) 1105 #define USBD_CFG_ISOCH_Msk (0x1ul << USBD_CFG_ISOCH_Pos) 1107 #define USBD_CFG_STATE_Pos (5) 1108 #define USBD_CFG_STATE_Msk (0x3ul << USBD_CFG_STATE_Pos) 1110 #define USBD_CFG_DSQSYNC_Pos (7) 1111 #define USBD_CFG_DSQSYNC_Msk (0x1ul << USBD_CFG_DSQSYNC_Pos) 1113 #define USBD_CFG_CSTALL_Pos (9) 1114 #define USBD_CFG_CSTALL_Msk (0x1ul << USBD_CFG_CSTALL_Pos) 1116 #define USBD_CFGP_CLRRDY_Pos (0) 1117 #define USBD_CFGP_CLRRDY_Msk (0x1ul << USBD_CFGP_CLRRDY_Pos) 1119 #define USBD_CFGP_SSTALL_Pos (1) 1120 #define USBD_CFGP_SSTALL_Msk (0x1ul << USBD_CFGP_SSTALL_Pos) 1126 #if defined ( __CC_ARM ) 1127 #pragma no_anon_unions