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M480 BSP
V3.05.001
The Board Support Package for M480 Series
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USBD register definition header file. More...
Go to the source code of this file.
Data Structures | |
| struct | USBD_EP_T |
| struct | USBD_T |
Macros | |
| #define | USBD_INTEN_BUSIEN_Pos (0) |
| #define | USBD_INTEN_BUSIEN_Msk (0x1ul << USBD_INTEN_BUSIEN_Pos) |
| #define | USBD_INTEN_USBIEN_Pos (1) |
| #define | USBD_INTEN_USBIEN_Msk (0x1ul << USBD_INTEN_USBIEN_Pos) |
| #define | USBD_INTEN_VBDETIEN_Pos (2) |
| #define | USBD_INTEN_VBDETIEN_Msk (0x1ul << USBD_INTEN_VBDETIEN_Pos) |
| #define | USBD_INTEN_NEVWKIEN_Pos (3) |
| #define | USBD_INTEN_NEVWKIEN_Msk (0x1ul << USBD_INTEN_NEVWKIEN_Pos) |
| #define | USBD_INTEN_SOFIEN_Pos (4) |
| #define | USBD_INTEN_SOFIEN_Msk (0x1ul << USBD_INTEN_SOFIEN_Pos) |
| #define | USBD_INTEN_WKEN_Pos (8) |
| #define | USBD_INTEN_WKEN_Msk (0x1ul << USBD_INTEN_WKEN_Pos) |
| #define | USBD_INTEN_INNAKEN_Pos (15) |
| #define | USBD_INTEN_INNAKEN_Msk (0x1ul << USBD_INTEN_INNAKEN_Pos) |
| #define | USBD_INTSTS_BUSIF_Pos (0) |
| #define | USBD_INTSTS_BUSIF_Msk (0x1ul << USBD_INTSTS_BUSIF_Pos) |
| #define | USBD_INTSTS_USBIF_Pos (1) |
| #define | USBD_INTSTS_USBIF_Msk (0x1ul << USBD_INTSTS_USBIF_Pos) |
| #define | USBD_INTSTS_VBDETIF_Pos (2) |
| #define | USBD_INTSTS_VBDETIF_Msk (0x1ul << USBD_INTSTS_VBDETIF_Pos) |
| #define | USBD_INTSTS_NEVWKIF_Pos (3) |
| #define | USBD_INTSTS_NEVWKIF_Msk (0x1ul << USBD_INTSTS_NEVWKIF_Pos) |
| #define | USBD_INTSTS_SOFIF_Pos (4) |
| #define | USBD_INTSTS_SOFIF_Msk (0x1ul << USBD_INTSTS_SOFIF_Pos) |
| #define | USBD_INTSTS_EPEVT0_Pos (16) |
| #define | USBD_INTSTS_EPEVT0_Msk (0x1ul << USBD_INTSTS_EPEVT0_Pos) |
| #define | USBD_INTSTS_EPEVT1_Pos (17) |
| #define | USBD_INTSTS_EPEVT1_Msk (0x1ul << USBD_INTSTS_EPEVT1_Pos) |
| #define | USBD_INTSTS_EPEVT2_Pos (18) |
| #define | USBD_INTSTS_EPEVT2_Msk (0x1ul << USBD_INTSTS_EPEVT2_Pos) |
| #define | USBD_INTSTS_EPEVT3_Pos (19) |
| #define | USBD_INTSTS_EPEVT3_Msk (0x1ul << USBD_INTSTS_EPEVT3_Pos) |
| #define | USBD_INTSTS_EPEVT4_Pos (20) |
| #define | USBD_INTSTS_EPEVT4_Msk (0x1ul << USBD_INTSTS_EPEVT4_Pos) |
| #define | USBD_INTSTS_EPEVT5_Pos (21) |
| #define | USBD_INTSTS_EPEVT5_Msk (0x1ul << USBD_INTSTS_EPEVT5_Pos) |
| #define | USBD_INTSTS_EPEVT6_Pos (22) |
| #define | USBD_INTSTS_EPEVT6_Msk (0x1ul << USBD_INTSTS_EPEVT6_Pos) |
| #define | USBD_INTSTS_EPEVT7_Pos (23) |
| #define | USBD_INTSTS_EPEVT7_Msk (0x1ul << USBD_INTSTS_EPEVT7_Pos) |
| #define | USBD_INTSTS_EPEVT8_Pos (24) |
| #define | USBD_INTSTS_EPEVT8_Msk (0x1ul << USBD_INTSTS_EPEVT8_Pos) |
| #define | USBD_INTSTS_EPEVT9_Pos (25) |
| #define | USBD_INTSTS_EPEVT9_Msk (0x1ul << USBD_INTSTS_EPEVT9_Pos) |
| #define | USBD_INTSTS_EPEVT10_Pos (26) |
| #define | USBD_INTSTS_EPEVT10_Msk (0x1ul << USBD_INTSTS_EPEVT10_Pos) |
| #define | USBD_INTSTS_EPEVT11_Pos (27) |
| #define | USBD_INTSTS_EPEVT11_Msk (0x1ul << USBD_INTSTS_EPEVT11_Pos) |
| #define | USBD_INTSTS_SETUP_Pos (31) |
| #define | USBD_INTSTS_SETUP_Msk (0x1ul << USBD_INTSTS_SETUP_Pos) |
| #define | USBD_FADDR_FADDR_Pos (0) |
| #define | USBD_FADDR_FADDR_Msk (0x7ful << USBD_FADDR_FADDR_Pos) |
| #define | USBD_EPSTS_OV_Pos (7) |
| #define | USBD_EPSTS_OV_Msk (0x1ul << USBD_EPSTS_OV_Pos) |
| #define | USBD_ATTR_USBRST_Pos (0) |
| #define | USBD_ATTR_USBRST_Msk (0x1ul << USBD_ATTR_USBRST_Pos) |
| #define | USBD_ATTR_SUSPEND_Pos (1) |
| #define | USBD_ATTR_SUSPEND_Msk (0x1ul << USBD_ATTR_SUSPEND_Pos) |
| #define | USBD_ATTR_RESUME_Pos (2) |
| #define | USBD_ATTR_RESUME_Msk (0x1ul << USBD_ATTR_RESUME_Pos) |
| #define | USBD_ATTR_TOUT_Pos (3) |
| #define | USBD_ATTR_TOUT_Msk (0x1ul << USBD_ATTR_TOUT_Pos) |
| #define | USBD_ATTR_PHYEN_Pos (4) |
| #define | USBD_ATTR_PHYEN_Msk (0x1ul << USBD_ATTR_PHYEN_Pos) |
| #define | USBD_ATTR_RWAKEUP_Pos (5) |
| #define | USBD_ATTR_RWAKEUP_Msk (0x1ul << USBD_ATTR_RWAKEUP_Pos) |
| #define | USBD_ATTR_USBEN_Pos (7) |
| #define | USBD_ATTR_USBEN_Msk (0x1ul << USBD_ATTR_USBEN_Pos) |
| #define | USBD_ATTR_DPPUEN_Pos (8) |
| #define | USBD_ATTR_DPPUEN_Msk (0x1ul << USBD_ATTR_DPPUEN_Pos) |
| #define | USBD_ATTR_BYTEM_Pos (10) |
| #define | USBD_ATTR_BYTEM_Msk (0x1ul << USBD_ATTR_BYTEM_Pos) |
| #define | USBD_ATTR_LPMACK_Pos (11) |
| #define | USBD_ATTR_LPMACK_Msk (0x1ul << USBD_ATTR_LPMACK_Pos) |
| #define | USBD_ATTR_L1SUSPEND_Pos (12) |
| #define | USBD_ATTR_L1SUSPEND_Msk (0x1ul << USBD_ATTR_L1SUSPEND_Pos) |
| #define | USBD_ATTR_L1RESUME_Pos (13) |
| #define | USBD_ATTR_L1RESUME_Msk (0x1ul << USBD_ATTR_L1RESUME_Pos) |
| #define | USBD_VBUSDET_VBUSDET_Pos (0) |
| #define | USBD_VBUSDET_VBUSDET_Msk (0x1ul << USBD_VBUSDET_VBUSDET_Pos) |
| #define | USBD_STBUFSEG_STBUFSEG_Pos (3) |
| #define | USBD_STBUFSEG_STBUFSEG_Msk (0x3ful << USBD_STBUFSEG_STBUFSEG_Pos) |
| #define | USBD_EPSTS0_EPSTS0_Pos (0) |
| #define | USBD_EPSTS0_EPSTS0_Msk (0xful << USBD_EPSTS0_EPSTS0_Pos) |
| #define | USBD_EPSTS0_EPSTS1_Pos (4) |
| #define | USBD_EPSTS0_EPSTS1_Msk (0xful << USBD_EPSTS0_EPSTS1_Pos) |
| #define | USBD_EPSTS0_EPSTS2_Pos (8) |
| #define | USBD_EPSTS0_EPSTS2_Msk (0xful << USBD_EPSTS0_EPSTS2_Pos) |
| #define | USBD_EPSTS0_EPSTS3_Pos (12) |
| #define | USBD_EPSTS0_EPSTS3_Msk (0xful << USBD_EPSTS0_EPSTS3_Pos) |
| #define | USBD_EPSTS0_EPSTS4_Pos (16) |
| #define | USBD_EPSTS0_EPSTS4_Msk (0xful << USBD_EPSTS0_EPSTS4_Pos) |
| #define | USBD_EPSTS0_EPSTS5_Pos (20) |
| #define | USBD_EPSTS0_EPSTS5_Msk (0xful << USBD_EPSTS0_EPSTS5_Pos) |
| #define | USBD_EPSTS0_EPSTS6_Pos (24) |
| #define | USBD_EPSTS0_EPSTS6_Msk (0xful << USBD_EPSTS0_EPSTS6_Pos) |
| #define | USBD_EPSTS0_EPSTS7_Pos (28) |
| #define | USBD_EPSTS0_EPSTS7_Msk (0xful << USBD_EPSTS0_EPSTS7_Pos) |
| #define | USBD_EPSTS1_EPSTS8_Pos (0) |
| #define | USBD_EPSTS1_EPSTS8_Msk (0xful << USBD_EPSTS1_EPSTS8_Pos) |
| #define | USBD_EPSTS1_EPSTS9_Pos (4) |
| #define | USBD_EPSTS1_EPSTS9_Msk (0xful << USBD_EPSTS1_EPSTS9_Pos) |
| #define | USBD_EPSTS1_EPSTS10_Pos (8) |
| #define | USBD_EPSTS1_EPSTS10_Msk (0xful << USBD_EPSTS1_EPSTS10_Pos) |
| #define | USBD_EPSTS1_EPSTS11_Pos (12) |
| #define | USBD_EPSTS1_EPSTS11_Msk (0xful << USBD_EPSTS1_EPSTS11_Pos) |
| #define | USBD_LPMATTR_LPMLINKSTS_Pos (0) |
| #define | USBD_LPMATTR_LPMLINKSTS_Msk (0xful << USBD_LPMATTR_LPMLINKSTS_Pos) |
| #define | USBD_LPMATTR_LPMBESL_Pos (4) |
| #define | USBD_LPMATTR_LPMBESL_Msk (0xful << USBD_LPMATTR_LPMBESL_Pos) |
| #define | USBD_LPMATTR_LPMRWAKUP_Pos (8) |
| #define | USBD_LPMATTR_LPMRWAKUP_Msk (0x1ul << USBD_LPMATTR_LPMRWAKUP_Pos) |
| #define | USBD_FN_FN_Pos (0) |
| #define | USBD_FN_FN_Msk (0x7fful << USBD_FN_FN_Pos) |
| #define | USBD_SE0_SE0_Pos (0) |
| #define | USBD_SE0_SE0_Msk (0x1ul << USBD_SE0_SE0_Pos) |
| #define | USBD_BUFSEG_BUFSEG_Pos (3) |
| #define | USBD_BUFSEG_BUFSEG_Msk (0x3ful << USBD_BUFSEG_BUFSEG_Pos) |
| #define | USBD_MXPLD_MXPLD_Pos (0) |
| #define | USBD_MXPLD_MXPLD_Msk (0x1fful << USBD_MXPLD_MXPLD_Pos) |
| #define | USBD_CFG_EPNUM_Pos (0) |
| #define | USBD_CFG_EPNUM_Msk (0xful << USBD_CFG_EPNUM_Pos) |
| #define | USBD_CFG_ISOCH_Pos (4) |
| #define | USBD_CFG_ISOCH_Msk (0x1ul << USBD_CFG_ISOCH_Pos) |
| #define | USBD_CFG_STATE_Pos (5) |
| #define | USBD_CFG_STATE_Msk (0x3ul << USBD_CFG_STATE_Pos) |
| #define | USBD_CFG_DSQSYNC_Pos (7) |
| #define | USBD_CFG_DSQSYNC_Msk (0x1ul << USBD_CFG_DSQSYNC_Pos) |
| #define | USBD_CFG_CSTALL_Pos (9) |
| #define | USBD_CFG_CSTALL_Msk (0x1ul << USBD_CFG_CSTALL_Pos) |
| #define | USBD_CFGP_CLRRDY_Pos (0) |
| #define | USBD_CFGP_CLRRDY_Msk (0x1ul << USBD_CFGP_CLRRDY_Pos) |
| #define | USBD_CFGP_SSTALL_Pos (1) |
| #define | USBD_CFGP_SSTALL_Msk (0x1ul << USBD_CFGP_SSTALL_Pos) |
USBD register definition header file.
Definition in file usbd_reg.h.
1.8.15