M480 BSP  V3.05.001
The Board Support Package for M480 Series
timer_reg.h
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1 /**************************************************************************/
9 #ifndef __TIMER_REG_H__
10 #define __TIMER_REG_H__
11 
12 #if defined ( __CC_ARM )
13 #pragma anon_unions
14 #endif
15 
26 typedef struct
27 {
28 
29 
1606  __IO uint32_t CTL;
1607  __IO uint32_t CMP;
1608  __IO uint32_t INTSTS;
1609  __IO uint32_t CNT;
1610  __I uint32_t CAP;
1611  __IO uint32_t EXTCTL;
1612  __IO uint32_t EINTSTS;
1613  __IO uint32_t TRGCTL;
1614  __IO uint32_t ALTCTL;
1616  __I uint32_t RESERVE0[7];
1618  __IO uint32_t PWMCTL;
1619  __IO uint32_t PWMCLKSRC;
1620  __IO uint32_t PWMCLKPSC;
1621  __IO uint32_t PWMCNTCLR;
1622  __IO uint32_t PWMPERIOD;
1623  __IO uint32_t PWMCMPDAT;
1624  __IO uint32_t PWMDTCTL;
1625  __I uint32_t PWMCNT;
1626  __IO uint32_t PWMMSKEN;
1627  __IO uint32_t PWMMSK;
1628  __IO uint32_t PWMBNF;
1629  __IO uint32_t PWMFAILBRK;
1630  __IO uint32_t PWMBRKCTL;
1631  __IO uint32_t PWMPOLCTL;
1632  __IO uint32_t PWMPOEN;
1633  __O uint32_t PWMSWBRK;
1634  __IO uint32_t PWMINTEN0;
1635  __IO uint32_t PWMINTEN1;
1636  __IO uint32_t PWMINTSTS0;
1637  __IO uint32_t PWMINTSTS1;
1638  __IO uint32_t PWMEADCTS;
1639  __IO uint32_t PWMSCTL;
1640  __O uint32_t PWMSTRG;
1641  __IO uint32_t PWMSTATUS;
1642  __I uint32_t PWMPBUF;
1643  __I uint32_t PWMCMPBUF;
1645 } TIMER_T;
1646 
1652 #define TIMER_CTL_PSC_Pos (0)
1653 #define TIMER_CTL_PSC_Msk (0xfful << TIMER_CTL_PSC_Pos)
1655 #define TIMER_CTL_INTRGEN_Pos (19)
1656 #define TIMER_CTL_INTRGEN_Msk (0x1ul << TIMER_CTL_INTRGEN_Pos)
1658 #define TIMER_CTL_PERIOSEL_Pos (20)
1659 #define TIMER_CTL_PERIOSEL_Msk (0x1ul << TIMER_CTL_PERIOSEL_Pos)
1661 #define TIMER_CTL_TGLPINSEL_Pos (21)
1662 #define TIMER_CTL_TGLPINSEL_Msk (0x1ul << TIMER_CTL_TGLPINSEL_Pos)
1664 #define TIMER_CTL_CAPSRC_Pos (22)
1665 #define TIMER_CTL_CAPSRC_Msk (0x1ul << TIMER_CTL_CAPSRC_Pos)
1667 #define TIMER_CTL_WKEN_Pos (23)
1668 #define TIMER_CTL_WKEN_Msk (0x1ul << TIMER_CTL_WKEN_Pos)
1670 #define TIMER_CTL_EXTCNTEN_Pos (24)
1671 #define TIMER_CTL_EXTCNTEN_Msk (0x1ul << TIMER_CTL_EXTCNTEN_Pos)
1673 #define TIMER_CTL_ACTSTS_Pos (25)
1674 #define TIMER_CTL_ACTSTS_Msk (0x1ul << TIMER_CTL_ACTSTS_Pos)
1676 #define TIMER_CTL_OPMODE_Pos (27)
1677 #define TIMER_CTL_OPMODE_Msk (0x3ul << TIMER_CTL_OPMODE_Pos)
1679 #define TIMER_CTL_INTEN_Pos (29)
1680 #define TIMER_CTL_INTEN_Msk (0x1ul << TIMER_CTL_INTEN_Pos)
1682 #define TIMER_CTL_CNTEN_Pos (30)
1683 #define TIMER_CTL_CNTEN_Msk (0x1ul << TIMER_CTL_CNTEN_Pos)
1685 #define TIMER_CTL_ICEDEBUG_Pos (31)
1686 #define TIMER_CTL_ICEDEBUG_Msk (0x1ul << TIMER_CTL_ICEDEBUG_Pos)
1688 #define TIMER_CMP_CMPDAT_Pos (0)
1689 #define TIMER_CMP_CMPDAT_Msk (0xfffffful << TIMER_CMP_CMPDAT_Pos)
1691 #define TIMER_INTSTS_TIF_Pos (0)
1692 #define TIMER_INTSTS_TIF_Msk (0x1ul << TIMER_INTSTS_TIF_Pos)
1694 #define TIMER_INTSTS_TWKF_Pos (1)
1695 #define TIMER_INTSTS_TWKF_Msk (0x1ul << TIMER_INTSTS_TWKF_Pos)
1697 #define TIMER_CNT_CNT_Pos (0)
1698 #define TIMER_CNT_CNT_Msk (0xfffffful << TIMER_CNT_CNT_Pos)
1700 #define TIMER_CNT_RSTACT_Pos (31)
1701 #define TIMER_CNT_RSTACT_Msk (0x1ul << TIMER_CNT_RSTACT_Pos)
1703 #define TIMER_CAP_CAPDAT_Pos (0)
1704 #define TIMER_CAP_CAPDAT_Msk (0xfffffful << TIMER_CAP_CAPDAT_Pos)
1706 #define TIMER_EXTCTL_CNTPHASE_Pos (0)
1707 #define TIMER_EXTCTL_CNTPHASE_Msk (0x1ul << TIMER_EXTCTL_CNTPHASE_Pos)
1709 #define TIMER_EXTCTL_CAPEN_Pos (3)
1710 #define TIMER_EXTCTL_CAPEN_Msk (0x1ul << TIMER_EXTCTL_CAPEN_Pos)
1712 #define TIMER_EXTCTL_CAPFUNCS_Pos (4)
1713 #define TIMER_EXTCTL_CAPFUNCS_Msk (0x1ul << TIMER_EXTCTL_CAPFUNCS_Pos)
1715 #define TIMER_EXTCTL_CAPIEN_Pos (5)
1716 #define TIMER_EXTCTL_CAPIEN_Msk (0x1ul << TIMER_EXTCTL_CAPIEN_Pos)
1718 #define TIMER_EXTCTL_CAPDBEN_Pos (6)
1719 #define TIMER_EXTCTL_CAPDBEN_Msk (0x1ul << TIMER_EXTCTL_CAPDBEN_Pos)
1721 #define TIMER_EXTCTL_CNTDBEN_Pos (7)
1722 #define TIMER_EXTCTL_CNTDBEN_Msk (0x1ul << TIMER_EXTCTL_CNTDBEN_Pos)
1724 #define TIMER_EXTCTL_ICAPSEL_Pos (8)
1725 #define TIMER_EXTCTL_ICAPSEL_Msk (0x7ul << TIMER_EXTCTL_ICAPSEL_Pos)
1727 #define TIMER_EXTCTL_CAPEDGE_Pos (12)
1728 #define TIMER_EXTCTL_CAPEDGE_Msk (0x7ul << TIMER_EXTCTL_CAPEDGE_Pos)
1730 #define TIMER_EXTCTL_ECNTSSEL_Pos (16)
1731 #define TIMER_EXTCTL_ECNTSSEL_Msk (0x1ul << TIMER_EXTCTL_ECNTSSEL_Pos)
1733 #define TIMER_EXTCTL_CAPDIVSCL_Pos (28)
1734 #define TIMER_EXTCTL_CAPDIVSCL_Msk (0xful << TIMER_EXTCTL_CAPDIVSCL_Pos)
1736 #define TIMER_EINTSTS_CAPIF_Pos (0)
1737 #define TIMER_EINTSTS_CAPIF_Msk (0x1ul << TIMER_EINTSTS_CAPIF_Pos)
1739 #define TIMER_TRGCTL_TRGSSEL_Pos (0)
1740 #define TIMER_TRGCTL_TRGSSEL_Msk (0x1ul << TIMER_TRGCTL_TRGSSEL_Pos)
1742 #define TIMER_TRGCTL_TRGEPWM_Pos (1)
1743 #define TIMER_TRGCTL_TRGEPWM_Msk (0x1ul << TIMER_TRGCTL_TRGEPWM_Pos)
1745 #define TIMER_TRGCTL_TRGEADC_Pos (2)
1746 #define TIMER_TRGCTL_TRGEADC_Msk (0x1ul << TIMER_TRGCTL_TRGEADC_Pos)
1748 #define TIMER_TRGCTL_TRGDAC_Pos (3)
1749 #define TIMER_TRGCTL_TRGDAC_Msk (0x1ul << TIMER_TRGCTL_TRGDAC_Pos)
1751 #define TIMER_TRGCTL_TRGPDMA_Pos (4)
1752 #define TIMER_TRGCTL_TRGPDMA_Msk (0x1ul << TIMER_TRGCTL_TRGPDMA_Pos)
1754 #define TIMER_ALTCTL_FUNCSEL_Pos (0)
1755 #define TIMER_ALTCTL_FUNCSEL_Msk (0x1ul << TIMER_ALTCTL_FUNCSEL_Pos)
1757 #define TIMER_PWMCTL_CNTEN_Pos (0)
1758 #define TIMER_PWMCTL_CNTEN_Msk (0x1ul << TIMER_PWMCTL_CNTEN_Pos)
1760 #define TIMER_PWMCTL_CNTTYPE_Pos (1)
1761 #define TIMER_PWMCTL_CNTTYPE_Msk (0x3ul << TIMER_PWMCTL_CNTTYPE_Pos)
1763 #define TIMER_PWMCTL_CNTMODE_Pos (3)
1764 #define TIMER_PWMCTL_CNTMODE_Msk (0x1ul << TIMER_PWMCTL_CNTMODE_Pos)
1766 #define TIMER_PWMCTL_CTRLD_Pos (8)
1767 #define TIMER_PWMCTL_CTRLD_Msk (0x1ul << TIMER_PWMCTL_CTRLD_Pos)
1769 #define TIMER_PWMCTL_IMMLDEN_Pos (9)
1770 #define TIMER_PWMCTL_IMMLDEN_Msk (0x1ul << TIMER_PWMCTL_IMMLDEN_Pos)
1772 #define TIMER_PWMCTL_OUTMODE_Pos (16)
1773 #define TIMER_PWMCTL_OUTMODE_Msk (0x1ul << TIMER_PWMCTL_OUTMODE_Pos)
1775 #define TIMER_PWMCTL_DBGHALT_Pos (30)
1776 #define TIMER_PWMCTL_DBGHALT_Msk (0x1ul << TIMER_PWMCTL_DBGHALT_Pos)
1778 #define TIMER_PWMCTL_DBGTRIOFF_Pos (31)
1779 #define TIMER_PWMCTL_DBGTRIOFF_Msk (0x1ul << TIMER_PWMCTL_DBGTRIOFF_Pos)
1781 #define TIMER_PWMCLKSRC_CLKSRC_Pos (0)
1782 #define TIMER_PWMCLKSRC_CLKSRC_Msk (0x7ul << TIMER_PWMCLKSRC_CLKSRC_Pos)
1784 #define TIMER_PWMCLKPSC_CLKPSC_Pos (0)
1785 #define TIMER_PWMCLKPSC_CLKPSC_Msk (0xffful << TIMER_PWMCLKPSC_CLKPSC_Pos)
1787 #define TIMER_PWMCNTCLR_CNTCLR_Pos (0)
1788 #define TIMER_PWMCNTCLR_CNTCLR_Msk (0x1ul << TIMER_PWMCNTCLR_CNTCLR_Pos)
1790 #define TIMER_PWMPERIOD_PERIOD_Pos (0)
1791 #define TIMER_PWMPERIOD_PERIOD_Msk (0xfffful << TIMER_PWMPERIOD_PERIOD_Pos)
1793 #define TIMER_PWMCMPDAT_CMP_Pos (0)
1794 #define TIMER_PWMCMPDAT_CMP_Msk (0xfffful << TIMER_PWMCMPDAT_CMP_Pos)
1796 #define TIMER_PWMDTCTL_DTCNT_Pos (0)
1797 #define TIMER_PWMDTCTL_DTCNT_Msk (0xffful << TIMER_PWMDTCTL_DTCNT_Pos)
1799 #define TIMER_PWMDTCTL_DTEN_Pos (16)
1800 #define TIMER_PWMDTCTL_DTEN_Msk (0x1ul << TIMER_PWMDTCTL_DTEN_Pos)
1802 #define TIMER_PWMDTCTL_DTCKSEL_Pos (24)
1803 #define TIMER_PWMDTCTL_DTCKSEL_Msk (0x1ul << TIMER_PWMDTCTL_DTCKSEL_Pos)
1805 #define TIMER_PWMCNT_CNT_Pos (0)
1806 #define TIMER_PWMCNT_CNT_Msk (0xfffful << TIMER_PWMCNT_CNT_Pos)
1808 #define TIMER_PWMCNT_DIRF_Pos (16)
1809 #define TIMER_PWMCNT_DIRF_Msk (0x1ul << TIMER_PWMCNT_DIRF_Pos)
1811 #define TIMER_PWMMSKEN_MSKEN0_Pos (0)
1812 #define TIMER_PWMMSKEN_MSKEN0_Msk (0x1ul << TIMER_PWMMSKEN_MSKEN0_Pos)
1814 #define TIMER_PWMMSKEN_MSKEN1_Pos (1)
1815 #define TIMER_PWMMSKEN_MSKEN1_Msk (0x1ul << TIMER_PWMMSKEN_MSKEN1_Pos)
1817 #define TIMER_PWMMSK_MSKDAT0_Pos (0)
1818 #define TIMER_PWMMSK_MSKDAT0_Msk (0x1ul << TIMER_PWMMSK_MSKDAT0_Pos)
1820 #define TIMER_PWMMSK_MSKDAT1_Pos (1)
1821 #define TIMER_PWMMSK_MSKDAT1_Msk (0x1ul << TIMER_PWMMSK_MSKDAT1_Pos)
1823 #define TIMER_PWMBNF_BRKNFEN_Pos (0)
1824 #define TIMER_PWMBNF_BRKNFEN_Msk (0x1ul << TIMER_PWMBNF_BRKNFEN_Pos)
1826 #define TIMER_PWMBNF_BRKNFSEL_Pos (1)
1827 #define TIMER_PWMBNF_BRKNFSEL_Msk (0x7ul << TIMER_PWMBNF_BRKNFSEL_Pos)
1829 #define TIMER_PWMBNF_BRKFCNT_Pos (4)
1830 #define TIMER_PWMBNF_BRKFCNT_Msk (0x7ul << TIMER_PWMBNF_BRKFCNT_Pos)
1832 #define TIMER_PWMBNF_BRKPINV_Pos (7)
1833 #define TIMER_PWMBNF_BRKPINV_Msk (0x1ul << TIMER_PWMBNF_BRKPINV_Pos)
1835 #define TIMER_PWMBNF_BKPINSRC_Pos (16)
1836 #define TIMER_PWMBNF_BKPINSRC_Msk (0x3ul << TIMER_PWMBNF_BKPINSRC_Pos)
1838 #define TIMER_PWMFAILBRK_CSSBRKEN_Pos (0)
1839 #define TIMER_PWMFAILBRK_CSSBRKEN_Msk (0x1ul << TIMER_PWMFAILBRK_CSSBRKEN_Pos)
1841 #define TIMER_PWMFAILBRK_BODBRKEN_Pos (1)
1842 #define TIMER_PWMFAILBRK_BODBRKEN_Msk (0x1ul << TIMER_PWMFAILBRK_BODBRKEN_Pos)
1844 #define TIMER_PWMFAILBRK_RAMBRKEN_Pos (2)
1845 #define TIMER_PWMFAILBRK_RAMBRKEN_Msk (0x1ul << TIMER_PWMFAILBRK_RAMBRKEN_Pos)
1847 #define TIMER_PWMFAILBRK_CORBRKEN_Pos (3)
1848 #define TIMER_PWMFAILBRK_CORBRKEN_Msk (0x1ul << TIMER_PWMFAILBRK_CORBRKEN_Pos)
1850 #define TIMER_PWMBRKCTL_CPO0EBEN_Pos (0)
1851 #define TIMER_PWMBRKCTL_CPO0EBEN_Msk (0x1ul << TIMER_PWMBRKCTL_CPO0EBEN_Pos)
1853 #define TIMER_PWMBRKCTL_CPO1EBEN_Pos (1)
1854 #define TIMER_PWMBRKCTL_CPO1EBEN_Msk (0x1ul << TIMER_PWMBRKCTL_CPO1EBEN_Pos)
1856 #define TIMER_PWMBRKCTL_BRKPEEN_Pos (4)
1857 #define TIMER_PWMBRKCTL_BRKPEEN_Msk (0x1ul << TIMER_PWMBRKCTL_BRKPEEN_Pos)
1859 #define TIMER_PWMBRKCTL_SYSEBEN_Pos (7)
1860 #define TIMER_PWMBRKCTL_SYSEBEN_Msk (0x1ul << TIMER_PWMBRKCTL_SYSEBEN_Pos)
1862 #define TIMER_PWMBRKCTL_CPO0LBEN_Pos (8)
1863 #define TIMER_PWMBRKCTL_CPO0LBEN_Msk (0x1ul << TIMER_PWMBRKCTL_CPO0LBEN_Pos)
1865 #define TIMER_PWMBRKCTL_CPO1LBEN_Pos (9)
1866 #define TIMER_PWMBRKCTL_CPO1LBEN_Msk (0x1ul << TIMER_PWMBRKCTL_CPO1LBEN_Pos)
1868 #define TIMER_PWMBRKCTL_BRKPLEN_Pos (12)
1869 #define TIMER_PWMBRKCTL_BRKPLEN_Msk (0x1ul << TIMER_PWMBRKCTL_BRKPLEN_Pos)
1871 #define TIMER_PWMBRKCTL_SYSLBEN_Pos (15)
1872 #define TIMER_PWMBRKCTL_SYSLBEN_Msk (0x1ul << TIMER_PWMBRKCTL_SYSLBEN_Pos)
1874 #define TIMER_PWMBRKCTL_BRKAEVEN_Pos (16)
1875 #define TIMER_PWMBRKCTL_BRKAEVEN_Msk (0x3ul << TIMER_PWMBRKCTL_BRKAEVEN_Pos)
1877 #define TIMER_PWMBRKCTL_BRKAODD_Pos (18)
1878 #define TIMER_PWMBRKCTL_BRKAODD_Msk (0x3ul << TIMER_PWMBRKCTL_BRKAODD_Pos)
1880 #define TIMER_PWMPOLCTL_PINV0_Pos (0)
1881 #define TIMER_PWMPOLCTL_PINV0_Msk (0x1ul << TIMER_PWMPOLCTL_PINV0_Pos)
1883 #define TIMER_PWMPOLCTL_PINV1_Pos (1)
1884 #define TIMER_PWMPOLCTL_PINV1_Msk (0x1ul << TIMER_PWMPOLCTL_PINV1_Pos)
1886 #define TIMER_PWMPOEN_POEN0_Pos (0)
1887 #define TIMER_PWMPOEN_POEN0_Msk (0x1ul << TIMER_PWMPOEN_POEN0_Pos)
1889 #define TIMER_PWMPOEN_POEN1_Pos (1)
1890 #define TIMER_PWMPOEN_POEN1_Msk (0x1ul << TIMER_PWMPOEN_POEN1_Pos)
1892 #define TIMER_PWMSWBRK_BRKETRG_Pos (0)
1893 #define TIMER_PWMSWBRK_BRKETRG_Msk (0x1ul << TIMER_PWMSWBRK_BRKETRG_Pos)
1895 #define TIMER_PWMSWBRK_BRKLTRG_Pos (8)
1896 #define TIMER_PWMSWBRK_BRKLTRG_Msk (0x1ul << TIMER_PWMSWBRK_BRKLTRG_Pos)
1898 #define TIMER_PWMINTEN0_ZIEN_Pos (0)
1899 #define TIMER_PWMINTEN0_ZIEN_Msk (0x1ul << TIMER_PWMINTEN0_ZIEN_Pos)
1901 #define TIMER_PWMINTEN0_PIEN_Pos (1)
1902 #define TIMER_PWMINTEN0_PIEN_Msk (0x1ul << TIMER_PWMINTEN0_PIEN_Pos)
1904 #define TIMER_PWMINTEN0_CMPUIEN_Pos (2)
1905 #define TIMER_PWMINTEN0_CMPUIEN_Msk (0x1ul << TIMER_PWMINTEN0_CMPUIEN_Pos)
1907 #define TIMER_PWMINTEN0_CMPDIEN_Pos (3)
1908 #define TIMER_PWMINTEN0_CMPDIEN_Msk (0x1ul << TIMER_PWMINTEN0_CMPDIEN_Pos)
1910 #define TIMER_PWMINTEN1_BRKEIEN_Pos (0)
1911 #define TIMER_PWMINTEN1_BRKEIEN_Msk (0x1ul << TIMER_PWMINTEN1_BRKEIEN_Pos)
1913 #define TIMER_PWMINTEN1_BRKLIEN_Pos (8)
1914 #define TIMER_PWMINTEN1_BRKLIEN_Msk (0x1ul << TIMER_PWMINTEN1_BRKLIEN_Pos)
1916 #define TIMER_PWMINTSTS0_ZIF_Pos (0)
1917 #define TIMER_PWMINTSTS0_ZIF_Msk (0x1ul << TIMER_PWMINTSTS0_ZIF_Pos)
1919 #define TIMER_PWMINTSTS0_PIF_Pos (1)
1920 #define TIMER_PWMINTSTS0_PIF_Msk (0x1ul << TIMER_PWMINTSTS0_PIF_Pos)
1922 #define TIMER_PWMINTSTS0_CMPUIF_Pos (2)
1923 #define TIMER_PWMINTSTS0_CMPUIF_Msk (0x1ul << TIMER_PWMINTSTS0_CMPUIF_Pos)
1925 #define TIMER_PWMINTSTS0_CMPDIF_Pos (3)
1926 #define TIMER_PWMINTSTS0_CMPDIF_Msk (0x1ul << TIMER_PWMINTSTS0_CMPDIF_Pos)
1928 #define TIMER_PWMINTSTS1_BRKEIF0_Pos (0)
1929 #define TIMER_PWMINTSTS1_BRKEIF0_Msk (0x1ul << TIMER_PWMINTSTS1_BRKEIF0_Pos)
1931 #define TIMER_PWMINTSTS1_BRKEIF1_Pos (1)
1932 #define TIMER_PWMINTSTS1_BRKEIF1_Msk (0x1ul << TIMER_PWMINTSTS1_BRKEIF1_Pos)
1934 #define TIMER_PWMINTSTS1_BRKLIF0_Pos (8)
1935 #define TIMER_PWMINTSTS1_BRKLIF0_Msk (0x1ul << TIMER_PWMINTSTS1_BRKLIF0_Pos)
1937 #define TIMER_PWMINTSTS1_BRKLIF1_Pos (9)
1938 #define TIMER_PWMINTSTS1_BRKLIF1_Msk (0x1ul << TIMER_PWMINTSTS1_BRKLIF1_Pos)
1940 #define TIMER_PWMINTSTS1_BRKESTS0_Pos (16)
1941 #define TIMER_PWMINTSTS1_BRKESTS0_Msk (0x1ul << TIMER_PWMINTSTS1_BRKESTS0_Pos)
1943 #define TIMER_PWMINTSTS1_BRKESTS1_Pos (17)
1944 #define TIMER_PWMINTSTS1_BRKESTS1_Msk (0x1ul << TIMER_PWMINTSTS1_BRKESTS1_Pos)
1946 #define TIMER_PWMINTSTS1_BRKLSTS0_Pos (24)
1947 #define TIMER_PWMINTSTS1_BRKLSTS0_Msk (0x1ul << TIMER_PWMINTSTS1_BRKLSTS0_Pos)
1949 #define TIMER_PWMINTSTS1_BRKLSTS1_Pos (25)
1950 #define TIMER_PWMINTSTS1_BRKLSTS1_Msk (0x1ul << TIMER_PWMINTSTS1_BRKLSTS1_Pos)
1952 #define TIMER_PWMEADCTS_TRGSEL_Pos (0)
1953 #define TIMER_PWMEADCTS_TRGSEL_Msk (0x7ul << TIMER_PWMEADCTS_TRGSEL_Pos)
1955 #define TIMER_PWMEADCTS_TRGEN_Pos (7)
1956 #define TIMER_PWMEADCTS_TRGEN_Msk (0x1ul << TIMER_PWMEADCTS_TRGEN_Pos)
1958 #define TIMER_PWMSCTL_SYNCMODE_Pos (0)
1959 #define TIMER_PWMSCTL_SYNCMODE_Msk (0x3ul << TIMER_PWMSCTL_SYNCMODE_Pos)
1961 #define TIMER_PWMSCTL_SYNCSRC_Pos (8)
1962 #define TIMER_PWMSCTL_SYNCSRC_Msk (0x1ul << TIMER_PWMSCTL_SYNCSRC_Pos)
1964 #define TIMER_PWMSTRG_STRGEN_Pos (0)
1965 #define TIMER_PWMSTRG_STRGEN_Msk (0x1ul << TIMER_PWMSTRG_STRGEN_Pos)
1967 #define TIMER_PWMSTATUS_CNTMAXF_Pos (0)
1968 #define TIMER_PWMSTATUS_CNTMAXF_Msk (0x1ul << TIMER_PWMSTATUS_CNTMAXF_Pos)
1970 #define TIMER_PWMSTATUS_EADCTRGF_Pos (16)
1971 #define TIMER_PWMSTATUS_EADCTRGF_Msk (0x1ul << TIMER_PWMSTATUS_EADCTRGF_Pos)
1973 #define TIMER_PWMPBUF_PBUF_Pos (0)
1974 #define TIMER_PWMPBUF_PBUF_Msk (0xfffful << TIMER_PWMPBUF_PBUF_Pos)
1976 #define TIMER_PWMCMPBUF_CMPBUF_Pos (0)
1977 #define TIMER_PWMCMPBUF_CMPBUF_Msk (0xfffful << TIMER_PWMCMPBUF_CMPBUF_Pos) /* TIMER_CONST */
1980  /* end of TIMER register group */ /* end of REGISTER group */
1982 
1983 #if defined ( __CC_ARM )
1984 #pragma no_anon_unions
1985 #endif
1986 
1987 #endif /* __TIMER_REG_H__ */
__IO uint32_t CTL
Definition: timer_reg.h:1606
__IO uint32_t PWMBRKCTL
Definition: timer_reg.h:1630
__IO uint32_t PWMEADCTS
Definition: timer_reg.h:1638
__IO uint32_t INTSTS
Definition: timer_reg.h:1608
__IO uint32_t PWMINTSTS1
Definition: timer_reg.h:1637
__IO uint32_t PWMBNF
Definition: timer_reg.h:1628
__IO uint32_t PWMMSK
Definition: timer_reg.h:1627
__IO uint32_t PWMCTL
Definition: timer_reg.h:1618
__IO uint32_t PWMCNTCLR
Definition: timer_reg.h:1621
__IO uint32_t PWMCLKPSC
Definition: timer_reg.h:1620
__I uint32_t CAP
Definition: timer_reg.h:1610
__I uint32_t PWMCNT
Definition: timer_reg.h:1625
__O uint32_t PWMSTRG
Definition: timer_reg.h:1640
__I uint32_t PWMPBUF
Definition: timer_reg.h:1642
__IO uint32_t PWMPOEN
Definition: timer_reg.h:1632
__IO uint32_t PWMSCTL
Definition: timer_reg.h:1639
__IO uint32_t PWMPOLCTL
Definition: timer_reg.h:1631
__IO uint32_t PWMDTCTL
Definition: timer_reg.h:1624
__IO uint32_t PWMINTSTS0
Definition: timer_reg.h:1636
__IO uint32_t PWMFAILBRK
Definition: timer_reg.h:1629
__IO uint32_t PWMINTEN0
Definition: timer_reg.h:1634
__IO uint32_t TRGCTL
Definition: timer_reg.h:1613
__I uint32_t PWMCMPBUF
Definition: timer_reg.h:1643
__IO uint32_t EXTCTL
Definition: timer_reg.h:1611
__IO uint32_t CMP
Definition: timer_reg.h:1607
__IO uint32_t PWMCMPDAT
Definition: timer_reg.h:1623
__IO uint32_t PWMCLKSRC
Definition: timer_reg.h:1619
__IO uint32_t ALTCTL
Definition: timer_reg.h:1614
__O uint32_t PWMSWBRK
Definition: timer_reg.h:1633
__IO uint32_t CNT
Definition: timer_reg.h:1609
__IO uint32_t PWMPERIOD
Definition: timer_reg.h:1622
__IO uint32_t EINTSTS
Definition: timer_reg.h:1612
__IO uint32_t PWMINTEN1
Definition: timer_reg.h:1635
__IO uint32_t PWMMSKEN
Definition: timer_reg.h:1626
__IO uint32_t PWMSTATUS
Definition: timer_reg.h:1641