Document/html/sys_8h_source.html

 /**************************************************************************/
 #ifndef __SYS_H__
 #define __SYS_H__

 #ifdef __cplusplus
 extern "C"
 {
 #endif


 /*---------------------------------------------------------------------------------------------------------*/
 /*  Module Reset Control Resister constant definitions.                                                    */
 /*---------------------------------------------------------------------------------------------------------*/
 #define PDMA_RST            ((0UL<<24) | SYS_IPRST0_PDMARST_Pos)
 #define EBI_RST             ((0UL<<24) | SYS_IPRST0_EBIRST_Pos)
 #define EMAC_RST            ((0UL<<24) | SYS_IPRST0_EMACRST_Pos)
 #define SDH0_RST            ((0UL<<24) | SYS_IPRST0_SDH0RST_Pos)
 #define CRC_RST             ((0UL<<24) | SYS_IPRST0_CRCRST_Pos)
 #define CCAP_RST            ((0UL<<24) | SYS_IPRST0_CCAPRST_Pos)
 #define HSUSBD_RST          ((0UL<<24) | SYS_IPRST0_HSUSBDRST_Pos)
 #define CRPT_RST            ((0UL<<24) | SYS_IPRST0_CRPTRST_Pos)
 #define SPIM_RST            ((0UL<<24) | SYS_IPRST0_SPIMRST_Pos)
 #define USBH_RST            ((0UL<<24) | SYS_IPRST0_USBHRST_Pos)
 #define SDH1_RST            ((0UL<<24) | SYS_IPRST0_SDH1RST_Pos)
 #define GPIO_RST            ((4UL<<24) | SYS_IPRST1_GPIORST_Pos)
 #define TMR0_RST            ((4UL<<24) | SYS_IPRST1_TMR0RST_Pos)
 #define TMR1_RST            ((4UL<<24) | SYS_IPRST1_TMR1RST_Pos)
 #define TMR2_RST            ((4UL<<24) | SYS_IPRST1_TMR2RST_Pos)
 #define TMR3_RST            ((4UL<<24) | SYS_IPRST1_TMR3RST_Pos)
 #define ACMP01_RST          ((4UL<<24) | SYS_IPRST1_ACMP01RST_Pos)
 #define I2C0_RST            ((4UL<<24) | SYS_IPRST1_I2C0RST_Pos)
 #define I2C1_RST            ((4UL<<24) | SYS_IPRST1_I2C1RST_Pos)
 #define I2C2_RST            ((4UL<<24) | SYS_IPRST1_I2C2RST_Pos)
 #define QSPI0_RST           ((4UL<<24) | SYS_IPRST1_QSPI0RST_Pos)
 #define SPI0_RST            ((4UL<<24) | SYS_IPRST1_SPI0RST_Pos)
 #define SPI1_RST            ((4UL<<24) | SYS_IPRST1_SPI1RST_Pos)
 #define SPI2_RST            ((4UL<<24) | SYS_IPRST1_SPI2RST_Pos)
 #define UART0_RST           ((4UL<<24) | SYS_IPRST1_UART0RST_Pos)
 #define UART1_RST           ((4UL<<24) | SYS_IPRST1_UART1RST_Pos)
 #define UART2_RST           ((4UL<<24) | SYS_IPRST1_UART2RST_Pos)
 #define UART3_RST           ((4UL<<24) | SYS_IPRST1_UART3RST_Pos)
 #define UART4_RST           ((4UL<<24) | SYS_IPRST1_UART4RST_Pos)
 #define UART5_RST           ((4UL<<24) | SYS_IPRST1_UART5RST_Pos)
 #define UART6_RST           ((4UL<<24) | SYS_IPRST1_UART6RST_Pos)
 #define UART7_RST           ((4UL<<24) | SYS_IPRST1_UART7RST_Pos)
 #define CAN0_RST            ((4UL<<24) | SYS_IPRST1_CAN0RST_Pos)
 #define CAN1_RST            ((4UL<<24) | SYS_IPRST1_CAN1RST_Pos)
 #define OTG_RST             ((4UL<<24) | SYS_IPRST1_OTGRST_Pos)
 #define USBD_RST            ((4UL<<24) | SYS_IPRST1_USBDRST_Pos)
 #define EADC_RST            ((4UL<<24) | SYS_IPRST1_EADCRST_Pos)
 #define I2S0_RST            ((4UL<<24) | SYS_IPRST1_I2S0RST_Pos)
 #define HSOTG_RST           ((4UL<<24) | SYS_IPRST1_HSOTGRST_Pos)
 #define TRNG_RST            ((4UL<<24) | SYS_IPRST1_TRNGRST_Pos)
 #define SC0_RST             ((8UL<<24) | SYS_IPRST2_SC0RST_Pos)
 #define SC1_RST             ((8UL<<24) | SYS_IPRST2_SC1RST_Pos)
 #define SC2_RST             ((8UL<<24) | SYS_IPRST2_SC2RST_Pos)
 #define QSPI1_RST           ((8UL<<24) | SYS_IPRST2_QSPI1RST_Pos)
 #define SPI3_RST            ((8UL<<24) | SYS_IPRST2_SPI3RST_Pos)
 #define USCI0_RST           ((8UL<<24) | SYS_IPRST2_USCI0RST_Pos)
 #define USCI1_RST           ((8UL<<24) | SYS_IPRST2_USCI1RST_Pos)
 #define DAC_RST             ((8UL<<24) | SYS_IPRST2_DACRST_Pos)
 #define EPWM0_RST           ((8UL<<24) | SYS_IPRST2_EPWM0RST_Pos)
 #define EPWM1_RST           ((8UL<<24) | SYS_IPRST2_EPWM1RST_Pos)
 #define BPWM0_RST           ((8UL<<24) | SYS_IPRST2_BPWM0RST_Pos)
 #define BPWM1_RST           ((8UL<<24) | SYS_IPRST2_BPWM1RST_Pos)
 #define QEI0_RST            ((8UL<<24) | SYS_IPRST2_QEI0RST_Pos)
 #define QEI1_RST            ((8UL<<24) | SYS_IPRST2_QEI1RST_Pos)
 #define ECAP0_RST           ((8UL<<24) | SYS_IPRST2_ECAP0RST_Pos)
 #define ECAP1_RST           ((8UL<<24) | SYS_IPRST2_ECAP1RST_Pos)
 #define CAN2_RST            ((8UL<<24) | SYS_IPRST2_CAN2RST_Pos)
 #define OPA_RST             ((8UL<<24) | SYS_IPRST2_OPARST_Pos)
 #define EADC1_RST           ((8UL<<24) | SYS_IPRST2_EADC1RST_Pos)
 /*---------------------------------------------------------------------------------------------------------*/
 /*  Brown Out Detector Threshold Voltage Selection constant definitions.                                   */
 /*---------------------------------------------------------------------------------------------------------*/
 #define SYS_BODCTL_BOD_RST_EN           (1UL << SYS_BODCTL_BODRSTEN_Pos)
 #define SYS_BODCTL_BOD_INTERRUPT_EN     (0UL << SYS_BODCTL_BODRSTEN_Pos)
 #define SYS_BODCTL_BODVL_3_0V           (7UL << SYS_BODCTL_BODVL_Pos)
 #define SYS_BODCTL_BODVL_2_8V           (6UL << SYS_BODCTL_BODVL_Pos)
 #define SYS_BODCTL_BODVL_2_6V           (5UL << SYS_BODCTL_BODVL_Pos)
 #define SYS_BODCTL_BODVL_2_4V           (4UL << SYS_BODCTL_BODVL_Pos)
 #define SYS_BODCTL_BODVL_2_2V           (3UL << SYS_BODCTL_BODVL_Pos)
 #define SYS_BODCTL_BODVL_2_0V           (2UL << SYS_BODCTL_BODVL_Pos)
 #define SYS_BODCTL_BODVL_1_8V           (1UL << SYS_BODCTL_BODVL_Pos)
 #define SYS_BODCTL_BODVL_1_6V           (0UL << SYS_BODCTL_BODVL_Pos)
 /*---------------------------------------------------------------------------------------------------------*/
 /*  VREFCTL constant definitions. (Write-Protection Register)                                              */
 /*---------------------------------------------------------------------------------------------------------*/
 #define SYS_VREFCTL_VREF_PIN        (0x0UL << SYS_VREFCTL_VREFCTL_Pos)
 #define SYS_VREFCTL_VREF_1_6V       (0x3UL << SYS_VREFCTL_VREFCTL_Pos)
 #define SYS_VREFCTL_VREF_2_0V       (0x7UL << SYS_VREFCTL_VREFCTL_Pos)
 #define SYS_VREFCTL_VREF_2_5V       (0xBUL << SYS_VREFCTL_VREFCTL_Pos)
 #define SYS_VREFCTL_VREF_3_0V       (0xFUL << SYS_VREFCTL_VREFCTL_Pos)
 #define SYS_VREFCTL_VREF_AVDD       (0x10UL << SYS_VREFCTL_VREFCTL_Pos)
 /*---------------------------------------------------------------------------------------------------------*/
 /*  USBPHY constant definitions. (Write-Protection Register)                                               */
 /*---------------------------------------------------------------------------------------------------------*/
 #define SYS_USBPHY_USBROLE_STD_USBD     (0x0UL << SYS_USBPHY_USBROLE_Pos)
 #define SYS_USBPHY_USBROLE_STD_USBH     (0x1UL << SYS_USBPHY_USBROLE_Pos)
 #define SYS_USBPHY_USBROLE_ID_DEPH      (0x2UL << SYS_USBPHY_USBROLE_Pos)
 #define SYS_USBPHY_USBROLE_ON_THE_GO    (0x3UL << SYS_USBPHY_USBROLE_Pos)
 #define SYS_USBPHY_HSUSBROLE_STD_USBD   (0x0UL << SYS_USBPHY_HSUSBROLE_Pos)
 #define SYS_USBPHY_HSUSBROLE_STD_USBH   (0x1UL << SYS_USBPHY_HSUSBROLE_Pos)
 #define SYS_USBPHY_HSUSBROLE_ID_DEPH    (0x2UL << SYS_USBPHY_HSUSBROLE_Pos)
 /*---------------------------------------------------------------------------------------------------------*/
 /*  PLCTL constant definitions. (Write-Protection Register)                                                */
 /*---------------------------------------------------------------------------------------------------------*/
 #define SYS_PLCTL_PLSEL_PL0     (0x0UL<<SYS_PLCTL_PLSEL_Pos)
 #define SYS_PLCTL_PLSEL_PL1     (0x1UL<<SYS_PLCTL_PLSEL_Pos)
 /*---------------------------------------------------------------------------------------------------------*/
 /*  Multi-Function constant definitions.                                                                   */
 /*---------------------------------------------------------------------------------------------------------*/
 /* How to use below #define?
 Example 1: If user want to set PA.0 as SC0_CLK in initial function,
            user can issue following command to achieve it.

            SYS->GPA_MFPL  = (SYS->GPA_MFPL & (~SYS_GPA_MFPL_PA0MFP_Msk) ) | SYS_GPA_MFPL_PA0_MFP_SC0_CLK  ;

 */
 /********************* Bit definition of GPA_MFPL register **********************/
 #define SYS_GPA_MFPL_PA0MFP_GPIO              (0x00UL<<SYS_GPA_MFPL_PA0MFP_Pos)
 #define SYS_GPA_MFPL_PA0MFP_SPIM_MOSI         (0x02UL<<SYS_GPA_MFPL_PA0MFP_Pos)
 #define SYS_GPA_MFPL_PA0MFP_QSPI0_MOSI0       (0x03UL<<SYS_GPA_MFPL_PA0MFP_Pos)
 #define SYS_GPA_MFPL_PA0MFP_SPI0_MOSI         (0x04UL<<SYS_GPA_MFPL_PA0MFP_Pos)
 #define SYS_GPA_MFPL_PA0MFP_SD1_DAT0          (0x05UL<<SYS_GPA_MFPL_PA0MFP_Pos)
 #define SYS_GPA_MFPL_PA0MFP_SC0_CLK           (0x06UL<<SYS_GPA_MFPL_PA0MFP_Pos)
 #define SYS_GPA_MFPL_PA0MFP_UART0_RXD         (0x07UL<<SYS_GPA_MFPL_PA0MFP_Pos)
 #define SYS_GPA_MFPL_PA0MFP_UART1_nRTS        (0x08UL<<SYS_GPA_MFPL_PA0MFP_Pos)
 #define SYS_GPA_MFPL_PA0MFP_I2C2_SDA          (0x09UL<<SYS_GPA_MFPL_PA0MFP_Pos)
 #define SYS_GPA_MFPL_PA0MFP_CCAP_DATA6        (0x0AUL<<SYS_GPA_MFPL_PA0MFP_Pos)
 #define SYS_GPA_MFPL_PA0MFP_BPWM0_CH0         (0x0CUL<<SYS_GPA_MFPL_PA0MFP_Pos)
 #define SYS_GPA_MFPL_PA0MFP_EPWM0_CH5         (0x0DUL<<SYS_GPA_MFPL_PA0MFP_Pos)
 #define SYS_GPA_MFPL_PA0MFP_DAC0_ST           (0x0FUL<<SYS_GPA_MFPL_PA0MFP_Pos)
 #define SYS_GPA_MFPL_PA1MFP_GPIO              (0x00UL<<SYS_GPA_MFPL_PA1MFP_Pos)
 #define SYS_GPA_MFPL_PA1MFP_SPIM_MISO         (0x02UL<<SYS_GPA_MFPL_PA1MFP_Pos)
 #define SYS_GPA_MFPL_PA1MFP_QSPI0_MISO0       (0x03UL<<SYS_GPA_MFPL_PA1MFP_Pos)
 #define SYS_GPA_MFPL_PA1MFP_SPI0_MISO         (0x04UL<<SYS_GPA_MFPL_PA1MFP_Pos)
 #define SYS_GPA_MFPL_PA1MFP_SD1_DAT1          (0x05UL<<SYS_GPA_MFPL_PA1MFP_Pos)
 #define SYS_GPA_MFPL_PA1MFP_SC0_DAT           (0x06UL<<SYS_GPA_MFPL_PA1MFP_Pos)
 #define SYS_GPA_MFPL_PA1MFP_UART0_TXD         (0x07UL<<SYS_GPA_MFPL_PA1MFP_Pos)
 #define SYS_GPA_MFPL_PA1MFP_UART1_nCTS        (0x08UL<<SYS_GPA_MFPL_PA1MFP_Pos)
 #define SYS_GPA_MFPL_PA1MFP_I2C2_SCL          (0x09UL<<SYS_GPA_MFPL_PA1MFP_Pos)
 #define SYS_GPA_MFPL_PA1MFP_CCAP_DATA7        (0x0AUL<<SYS_GPA_MFPL_PA1MFP_Pos)
 #define SYS_GPA_MFPL_PA1MFP_BPWM0_CH1         (0x0CUL<<SYS_GPA_MFPL_PA1MFP_Pos)
 #define SYS_GPA_MFPL_PA1MFP_EPWM0_CH4         (0x0DUL<<SYS_GPA_MFPL_PA1MFP_Pos)
 #define SYS_GPA_MFPL_PA1MFP_DAC1_ST           (0x0FUL<<SYS_GPA_MFPL_PA1MFP_Pos)
 #define SYS_GPA_MFPL_PA2MFP_GPIO              (0x00UL<<SYS_GPA_MFPL_PA2MFP_Pos)
 #define SYS_GPA_MFPL_PA2MFP_SPIM_CLK          (0x02UL<<SYS_GPA_MFPL_PA2MFP_Pos)
 #define SYS_GPA_MFPL_PA2MFP_QSPI0_CLK         (0x03UL<<SYS_GPA_MFPL_PA2MFP_Pos)
 #define SYS_GPA_MFPL_PA2MFP_SPI0_CLK          (0x04UL<<SYS_GPA_MFPL_PA2MFP_Pos)
 #define SYS_GPA_MFPL_PA2MFP_SD1_DAT2          (0x05UL<<SYS_GPA_MFPL_PA2MFP_Pos)
 #define SYS_GPA_MFPL_PA2MFP_SC0_RST           (0x06UL<<SYS_GPA_MFPL_PA2MFP_Pos)
 #define SYS_GPA_MFPL_PA2MFP_UART4_RXD         (0x07UL<<SYS_GPA_MFPL_PA2MFP_Pos)
 #define SYS_GPA_MFPL_PA2MFP_UART1_RXD         (0x08UL<<SYS_GPA_MFPL_PA2MFP_Pos)
 #define SYS_GPA_MFPL_PA2MFP_I2C1_SDA          (0x09UL<<SYS_GPA_MFPL_PA2MFP_Pos)
 #define SYS_GPA_MFPL_PA2MFP_I2C0_SMBSUS       (0x0AUL<<SYS_GPA_MFPL_PA2MFP_Pos)
 #define SYS_GPA_MFPL_PA2MFP_BPWM0_CH2         (0x0CUL<<SYS_GPA_MFPL_PA2MFP_Pos)
 #define SYS_GPA_MFPL_PA2MFP_EPWM0_CH3         (0x0DUL<<SYS_GPA_MFPL_PA2MFP_Pos)
 #define SYS_GPA_MFPL_PA3MFP_GPIO              (0x00UL<<SYS_GPA_MFPL_PA3MFP_Pos)
 #define SYS_GPA_MFPL_PA3MFP_SPIM_SS           (0x02UL<<SYS_GPA_MFPL_PA3MFP_Pos)
 #define SYS_GPA_MFPL_PA3MFP_QSPI0_SS          (0x03UL<<SYS_GPA_MFPL_PA3MFP_Pos)
 #define SYS_GPA_MFPL_PA3MFP_SPI0_SS           (0x04UL<<SYS_GPA_MFPL_PA3MFP_Pos)
 #define SYS_GPA_MFPL_PA3MFP_SD1_DAT3          (0x05UL<<SYS_GPA_MFPL_PA3MFP_Pos)
 #define SYS_GPA_MFPL_PA3MFP_SC0_PWR           (0x06UL<<SYS_GPA_MFPL_PA3MFP_Pos)
 #define SYS_GPA_MFPL_PA3MFP_UART4_TXD         (0x07UL<<SYS_GPA_MFPL_PA3MFP_Pos)
 #define SYS_GPA_MFPL_PA3MFP_UART1_TXD         (0x08UL<<SYS_GPA_MFPL_PA3MFP_Pos)
 #define SYS_GPA_MFPL_PA3MFP_I2C1_SCL          (0x09UL<<SYS_GPA_MFPL_PA3MFP_Pos)
 #define SYS_GPA_MFPL_PA3MFP_I2C0_SMBAL        (0x0AUL<<SYS_GPA_MFPL_PA3MFP_Pos)
 #define SYS_GPA_MFPL_PA3MFP_BPWM0_CH3         (0x0CUL<<SYS_GPA_MFPL_PA3MFP_Pos)
 #define SYS_GPA_MFPL_PA3MFP_EPWM0_CH2         (0x0DUL<<SYS_GPA_MFPL_PA3MFP_Pos)
 #define SYS_GPA_MFPL_PA3MFP_QEI0_B            (0x0EUL<<SYS_GPA_MFPL_PA3MFP_Pos)
 #define SYS_GPA_MFPL_PA3MFP_EPWM1_BRAKE1      (0x0FUL<<SYS_GPA_MFPL_PA3MFP_Pos)
 #define SYS_GPA_MFPL_PA4MFP_GPIO              (0x00UL<<SYS_GPA_MFPL_PA4MFP_Pos)
 #define SYS_GPA_MFPL_PA4MFP_SPIM_D3           (0x02UL<<SYS_GPA_MFPL_PA4MFP_Pos)
 #define SYS_GPA_MFPL_PA4MFP_QSPI0_MOSI1       (0x03UL<<SYS_GPA_MFPL_PA4MFP_Pos)
 #define SYS_GPA_MFPL_PA4MFP_SPI0_I2SMCLK      (0x04UL<<SYS_GPA_MFPL_PA4MFP_Pos)
 #define SYS_GPA_MFPL_PA4MFP_SD1_CLK           (0x05UL<<SYS_GPA_MFPL_PA4MFP_Pos)
 #define SYS_GPA_MFPL_PA4MFP_SC0_nCD           (0x06UL<<SYS_GPA_MFPL_PA4MFP_Pos)
 #define SYS_GPA_MFPL_PA4MFP_UART0_nRTS        (0x07UL<<SYS_GPA_MFPL_PA4MFP_Pos)
 #define SYS_GPA_MFPL_PA4MFP_UART5_RXD         (0x08UL<<SYS_GPA_MFPL_PA4MFP_Pos)
 #define SYS_GPA_MFPL_PA4MFP_I2C0_SDA          (0x09UL<<SYS_GPA_MFPL_PA4MFP_Pos)
 #define SYS_GPA_MFPL_PA4MFP_CAN0_RXD          (0x0AUL<<SYS_GPA_MFPL_PA4MFP_Pos)
 #define SYS_GPA_MFPL_PA4MFP_UART0_RXD         (0x0BUL<<SYS_GPA_MFPL_PA4MFP_Pos)
 #define SYS_GPA_MFPL_PA4MFP_BPWM0_CH4         (0x0CUL<<SYS_GPA_MFPL_PA4MFP_Pos)
 #define SYS_GPA_MFPL_PA4MFP_EPWM0_CH1         (0x0DUL<<SYS_GPA_MFPL_PA4MFP_Pos)
 #define SYS_GPA_MFPL_PA4MFP_QEI0_A            (0x0EUL<<SYS_GPA_MFPL_PA4MFP_Pos)
 #define SYS_GPA_MFPL_PA5MFP_GPIO              (0x00UL<<SYS_GPA_MFPL_PA5MFP_Pos)
 #define SYS_GPA_MFPL_PA5MFP_SPIM_D2           (0x02UL<<SYS_GPA_MFPL_PA5MFP_Pos)
 #define SYS_GPA_MFPL_PA5MFP_QSPI0_MISO1       (0x03UL<<SYS_GPA_MFPL_PA5MFP_Pos)
 #define SYS_GPA_MFPL_PA5MFP_SPI1_I2SMCLK      (0x04UL<<SYS_GPA_MFPL_PA5MFP_Pos)
 #define SYS_GPA_MFPL_PA5MFP_SD1_CMD           (0x05UL<<SYS_GPA_MFPL_PA5MFP_Pos)
 #define SYS_GPA_MFPL_PA5MFP_SC2_nCD           (0x06UL<<SYS_GPA_MFPL_PA5MFP_Pos)
 #define SYS_GPA_MFPL_PA5MFP_UART0_nCTS        (0x07UL<<SYS_GPA_MFPL_PA5MFP_Pos)
 #define SYS_GPA_MFPL_PA5MFP_UART5_TXD         (0x08UL<<SYS_GPA_MFPL_PA5MFP_Pos)
 #define SYS_GPA_MFPL_PA5MFP_I2C0_SCL          (0x09UL<<SYS_GPA_MFPL_PA5MFP_Pos)
 #define SYS_GPA_MFPL_PA5MFP_CAN0_TXD          (0x0AUL<<SYS_GPA_MFPL_PA5MFP_Pos)
 #define SYS_GPA_MFPL_PA5MFP_UART0_TXD         (0x0BUL<<SYS_GPA_MFPL_PA5MFP_Pos)
 #define SYS_GPA_MFPL_PA5MFP_BPWM0_CH5         (0x0CUL<<SYS_GPA_MFPL_PA5MFP_Pos)
 #define SYS_GPA_MFPL_PA5MFP_EPWM0_CH0         (0x0DUL<<SYS_GPA_MFPL_PA5MFP_Pos)
 #define SYS_GPA_MFPL_PA5MFP_QEI0_INDEX        (0x0EUL<<SYS_GPA_MFPL_PA5MFP_Pos)
 #define SYS_GPA_MFPL_PA6MFP_GPIO              (0x00UL<<SYS_GPA_MFPL_PA6MFP_Pos)
 #define SYS_GPA_MFPL_PA6MFP_EBI_AD6           (0x02UL<<SYS_GPA_MFPL_PA6MFP_Pos)
 #define SYS_GPA_MFPL_PA6MFP_EMAC_RMII_RXERR   (0x03UL<<SYS_GPA_MFPL_PA6MFP_Pos)
 #define SYS_GPA_MFPL_PA6MFP_SPI1_SS           (0x04UL<<SYS_GPA_MFPL_PA6MFP_Pos)
 #define SYS_GPA_MFPL_PA6MFP_SD1_nCD           (0x05UL<<SYS_GPA_MFPL_PA6MFP_Pos)
 #define SYS_GPA_MFPL_PA6MFP_SC2_CLK           (0x06UL<<SYS_GPA_MFPL_PA6MFP_Pos)
 #define SYS_GPA_MFPL_PA6MFP_UART0_RXD         (0x07UL<<SYS_GPA_MFPL_PA6MFP_Pos)
 #define SYS_GPA_MFPL_PA6MFP_I2C1_SDA          (0x08UL<<SYS_GPA_MFPL_PA6MFP_Pos)
 #define SYS_GPA_MFPL_PA6MFP_QSPI1_MOSI1       (0x09UL<<SYS_GPA_MFPL_PA6MFP_Pos)
 #define SYS_GPA_MFPL_PA6MFP_EPWM1_CH5         (0x0BUL<<SYS_GPA_MFPL_PA6MFP_Pos)
 #define SYS_GPA_MFPL_PA6MFP_BPWM1_CH3         (0x0CUL<<SYS_GPA_MFPL_PA6MFP_Pos)
 #define SYS_GPA_MFPL_PA6MFP_ACMP1_WLAT        (0x0DUL<<SYS_GPA_MFPL_PA6MFP_Pos)
 #define SYS_GPA_MFPL_PA6MFP_TM3               (0x0EUL<<SYS_GPA_MFPL_PA6MFP_Pos)
 #define SYS_GPA_MFPL_PA6MFP_INT0              (0x0FUL<<SYS_GPA_MFPL_PA6MFP_Pos)
 #define SYS_GPA_MFPL_PA7MFP_GPIO              (0x00UL<<SYS_GPA_MFPL_PA7MFP_Pos)
 #define SYS_GPA_MFPL_PA7MFP_EBI_AD7           (0x02UL<<SYS_GPA_MFPL_PA7MFP_Pos)
 #define SYS_GPA_MFPL_PA7MFP_EMAC_RMII_CRSDV   (0x03UL<<SYS_GPA_MFPL_PA7MFP_Pos)
 #define SYS_GPA_MFPL_PA7MFP_SPI1_CLK          (0x04UL<<SYS_GPA_MFPL_PA7MFP_Pos)
 #define SYS_GPA_MFPL_PA7MFP_SC2_DAT           (0x06UL<<SYS_GPA_MFPL_PA7MFP_Pos)
 #define SYS_GPA_MFPL_PA7MFP_UART0_TXD         (0x07UL<<SYS_GPA_MFPL_PA7MFP_Pos)
 #define SYS_GPA_MFPL_PA7MFP_I2C1_SCL          (0x08UL<<SYS_GPA_MFPL_PA7MFP_Pos)
 #define SYS_GPA_MFPL_PA7MFP_QSPI1_MISO1       (0x09UL<<SYS_GPA_MFPL_PA7MFP_Pos)
 #define SYS_GPA_MFPL_PA7MFP_EPWM1_CH4         (0x0BUL<<SYS_GPA_MFPL_PA7MFP_Pos)
 #define SYS_GPA_MFPL_PA7MFP_BPWM1_CH2         (0x0CUL<<SYS_GPA_MFPL_PA7MFP_Pos)
 #define SYS_GPA_MFPL_PA7MFP_ACMP0_WLAT        (0x0DUL<<SYS_GPA_MFPL_PA7MFP_Pos)
 #define SYS_GPA_MFPL_PA7MFP_TM2               (0x0EUL<<SYS_GPA_MFPL_PA7MFP_Pos)
 #define SYS_GPA_MFPL_PA7MFP_INT1              (0x0FUL<<SYS_GPA_MFPL_PA7MFP_Pos)
 /********************* Bit definition of GPA_MFPH register **********************/
 #define SYS_GPA_MFPH_PA8MFP_GPIO              (0x00UL<<SYS_GPA_MFPH_PA8MFP_Pos)
 #define SYS_GPA_MFPH_PA8MFP_OPA1_P            (0x01UL<<SYS_GPA_MFPH_PA8MFP_Pos)
 #define SYS_GPA_MFPH_PA8MFP_EADC1_CH4         (0x01UL<<SYS_GPA_MFPH_PA8MFP_Pos)
 #define SYS_GPA_MFPH_PA8MFP_EBI_ALE           (0x02UL<<SYS_GPA_MFPH_PA8MFP_Pos)
 #define SYS_GPA_MFPH_PA8MFP_SC2_CLK           (0x03UL<<SYS_GPA_MFPH_PA8MFP_Pos)
 #define SYS_GPA_MFPH_PA8MFP_SPI2_MOSI         (0x04UL<<SYS_GPA_MFPH_PA8MFP_Pos)
 #define SYS_GPA_MFPH_PA8MFP_SD1_DAT0          (0x05UL<<SYS_GPA_MFPH_PA8MFP_Pos)
 #define SYS_GPA_MFPH_PA8MFP_USCI0_CTL1        (0x06UL<<SYS_GPA_MFPH_PA8MFP_Pos)
 #define SYS_GPA_MFPH_PA8MFP_UART1_RXD         (0x07UL<<SYS_GPA_MFPH_PA8MFP_Pos)
 #define SYS_GPA_MFPH_PA8MFP_UART7_RXD         (0x08UL<<SYS_GPA_MFPH_PA8MFP_Pos)
 #define SYS_GPA_MFPH_PA8MFP_BPWM0_CH3         (0x09UL<<SYS_GPA_MFPH_PA8MFP_Pos)
 #define SYS_GPA_MFPH_PA8MFP_QEI1_B            (0x0AUL<<SYS_GPA_MFPH_PA8MFP_Pos)
 #define SYS_GPA_MFPH_PA8MFP_ECAP0_IC2         (0x0BUL<<SYS_GPA_MFPH_PA8MFP_Pos)
 #define SYS_GPA_MFPH_PA8MFP_TM3_EXT           (0x0DUL<<SYS_GPA_MFPH_PA8MFP_Pos)
 #define SYS_GPA_MFPH_PA8MFP_INT4              (0x0FUL<<SYS_GPA_MFPH_PA8MFP_Pos)
 #define SYS_GPA_MFPH_PA9MFP_GPIO              (0x00UL<<SYS_GPA_MFPH_PA9MFP_Pos)
 #define SYS_GPA_MFPH_PA9MFP_OPA1_N            (0x01UL<<SYS_GPA_MFPH_PA9MFP_Pos)
 #define SYS_GPA_MFPH_PA9MFP_EADC1_CH5         (0x01UL<<SYS_GPA_MFPH_PA9MFP_Pos)
 #define SYS_GPA_MFPH_PA9MFP_EBI_MCLK          (0x02UL<<SYS_GPA_MFPH_PA9MFP_Pos)
 #define SYS_GPA_MFPH_PA9MFP_SC2_DAT           (0x03UL<<SYS_GPA_MFPH_PA9MFP_Pos)
 #define SYS_GPA_MFPH_PA9MFP_SPI2_MISO         (0x04UL<<SYS_GPA_MFPH_PA9MFP_Pos)
 #define SYS_GPA_MFPH_PA9MFP_SD1_DAT1          (0x05UL<<SYS_GPA_MFPH_PA9MFP_Pos)
 #define SYS_GPA_MFPH_PA9MFP_USCI0_DAT1        (0x06UL<<SYS_GPA_MFPH_PA9MFP_Pos)
 #define SYS_GPA_MFPH_PA9MFP_UART1_TXD         (0x07UL<<SYS_GPA_MFPH_PA9MFP_Pos)
 #define SYS_GPA_MFPH_PA9MFP_UART7_TXD         (0x08UL<<SYS_GPA_MFPH_PA9MFP_Pos)
 #define SYS_GPA_MFPH_PA9MFP_BPWM0_CH2         (0x09UL<<SYS_GPA_MFPH_PA9MFP_Pos)
 #define SYS_GPA_MFPH_PA9MFP_QEI1_A            (0x0AUL<<SYS_GPA_MFPH_PA9MFP_Pos)
 #define SYS_GPA_MFPH_PA9MFP_ECAP0_IC1         (0x0BUL<<SYS_GPA_MFPH_PA9MFP_Pos)
 #define SYS_GPA_MFPH_PA9MFP_TM2_EXT           (0x0DUL<<SYS_GPA_MFPH_PA9MFP_Pos)
 #define SYS_GPA_MFPH_PA9MFP_SWDH_DAT          (0x0FUL<<SYS_GPA_MFPH_PA9MFP_Pos)
 #define SYS_GPA_MFPH_PA10MFP_GPIO             (0x00UL<<SYS_GPA_MFPH_PA10MFP_Pos)
 #define SYS_GPA_MFPH_PA10MFP_ACMP1_P0         (0x01UL<<SYS_GPA_MFPH_PA10MFP_Pos)
 #define SYS_GPA_MFPH_PA10MFP_OPA1_O           (0x01UL<<SYS_GPA_MFPH_PA10MFP_Pos)
 #define SYS_GPA_MFPH_PA10MFP_EADC1_CH6        (0x01UL<<SYS_GPA_MFPH_PA10MFP_Pos)
 #define SYS_GPA_MFPH_PA10MFP_EBI_nWR          (0x02UL<<SYS_GPA_MFPH_PA10MFP_Pos)
 #define SYS_GPA_MFPH_PA10MFP_SC2_RST          (0x03UL<<SYS_GPA_MFPH_PA10MFP_Pos)
 #define SYS_GPA_MFPH_PA10MFP_SPI2_CLK         (0x04UL<<SYS_GPA_MFPH_PA10MFP_Pos)
 #define SYS_GPA_MFPH_PA10MFP_SD1_DAT2         (0x05UL<<SYS_GPA_MFPH_PA10MFP_Pos)
 #define SYS_GPA_MFPH_PA10MFP_USCI0_DAT0       (0x06UL<<SYS_GPA_MFPH_PA10MFP_Pos)
 #define SYS_GPA_MFPH_PA10MFP_I2C2_SDA         (0x07UL<<SYS_GPA_MFPH_PA10MFP_Pos)
 #define SYS_GPA_MFPH_PA10MFP_UART6_RXD        (0x08UL<<SYS_GPA_MFPH_PA10MFP_Pos)
 #define SYS_GPA_MFPH_PA10MFP_BPWM0_CH1        (0x09UL<<SYS_GPA_MFPH_PA10MFP_Pos)
 #define SYS_GPA_MFPH_PA10MFP_QEI1_INDEX       (0x0AUL<<SYS_GPA_MFPH_PA10MFP_Pos)
 #define SYS_GPA_MFPH_PA10MFP_ECAP0_IC0        (0x0BUL<<SYS_GPA_MFPH_PA10MFP_Pos)
 #define SYS_GPA_MFPH_PA10MFP_TM1_EXT          (0x0DUL<<SYS_GPA_MFPH_PA10MFP_Pos)
 #define SYS_GPA_MFPH_PA10MFP_DAC0_ST          (0x0EUL<<SYS_GPA_MFPH_PA10MFP_Pos)
 #define SYS_GPA_MFPH_PA10MFP_SWDH_CLK         (0x0FUL<<SYS_GPA_MFPH_PA10MFP_Pos)
 #define SYS_GPA_MFPH_PA11MFP_GPIO             (0x00UL<<SYS_GPA_MFPH_PA11MFP_Pos)
 #define SYS_GPA_MFPH_PA11MFP_ACMP0_P0         (0x01UL<<SYS_GPA_MFPH_PA11MFP_Pos)
 #define SYS_GPA_MFPH_PA11MFP_EADC1_CH7        (0x01UL<<SYS_GPA_MFPH_PA11MFP_Pos)
 #define SYS_GPA_MFPH_PA11MFP_EBI_nRD          (0x02UL<<SYS_GPA_MFPH_PA11MFP_Pos)
 #define SYS_GPA_MFPH_PA11MFP_SC2_PWR          (0x03UL<<SYS_GPA_MFPH_PA11MFP_Pos)
 #define SYS_GPA_MFPH_PA11MFP_SPI2_SS          (0x04UL<<SYS_GPA_MFPH_PA11MFP_Pos)
 #define SYS_GPA_MFPH_PA11MFP_SD1_DAT3         (0x05UL<<SYS_GPA_MFPH_PA11MFP_Pos)
 #define SYS_GPA_MFPH_PA11MFP_USCI0_CLK        (0x06UL<<SYS_GPA_MFPH_PA11MFP_Pos)
 #define SYS_GPA_MFPH_PA11MFP_I2C2_SCL         (0x07UL<<SYS_GPA_MFPH_PA11MFP_Pos)
 #define SYS_GPA_MFPH_PA11MFP_UART6_TXD        (0x08UL<<SYS_GPA_MFPH_PA11MFP_Pos)
 #define SYS_GPA_MFPH_PA11MFP_BPWM0_CH0        (0x09UL<<SYS_GPA_MFPH_PA11MFP_Pos)
 #define SYS_GPA_MFPH_PA11MFP_EPWM0_SYNC_OUT   (0x0AUL<<SYS_GPA_MFPH_PA11MFP_Pos)
 #define SYS_GPA_MFPH_PA11MFP_TM0_EXT          (0x0DUL<<SYS_GPA_MFPH_PA11MFP_Pos)
 #define SYS_GPA_MFPH_PA11MFP_DAC1_ST          (0x0EUL<<SYS_GPA_MFPH_PA11MFP_Pos)
 #define SYS_GPA_MFPH_PA12MFP_GPIO             (0x00UL<<SYS_GPA_MFPH_PA12MFP_Pos)
 #define SYS_GPA_MFPH_PA12MFP_I2S0_BCLK        (0x02UL<<SYS_GPA_MFPH_PA12MFP_Pos)
 #define SYS_GPA_MFPH_PA12MFP_UART4_TXD        (0x03UL<<SYS_GPA_MFPH_PA12MFP_Pos)
 #define SYS_GPA_MFPH_PA12MFP_I2C1_SCL         (0x04UL<<SYS_GPA_MFPH_PA12MFP_Pos)
 #define SYS_GPA_MFPH_PA12MFP_SPI2_SS          (0x05UL<<SYS_GPA_MFPH_PA12MFP_Pos)
 #define SYS_GPA_MFPH_PA12MFP_CAN0_TXD         (0x06UL<<SYS_GPA_MFPH_PA12MFP_Pos)
 #define SYS_GPA_MFPH_PA12MFP_SC2_PWR          (0x07UL<<SYS_GPA_MFPH_PA12MFP_Pos)
 #define SYS_GPA_MFPH_PA12MFP_BPWM1_CH2        (0x0BUL<<SYS_GPA_MFPH_PA12MFP_Pos)
 #define SYS_GPA_MFPH_PA12MFP_QEI1_INDEX       (0x0CUL<<SYS_GPA_MFPH_PA12MFP_Pos)
 #define SYS_GPA_MFPH_PA12MFP_USB_VBUS         (0x0EUL<<SYS_GPA_MFPH_PA12MFP_Pos)
 #define SYS_GPA_MFPH_PA13MFP_GPIO             (0x00UL<<SYS_GPA_MFPH_PA13MFP_Pos)
 #define SYS_GPA_MFPH_PA13MFP_I2S0_MCLK        (0x02UL<<SYS_GPA_MFPH_PA13MFP_Pos)
 #define SYS_GPA_MFPH_PA13MFP_UART4_RXD        (0x03UL<<SYS_GPA_MFPH_PA13MFP_Pos)
 #define SYS_GPA_MFPH_PA13MFP_I2C1_SDA         (0x04UL<<SYS_GPA_MFPH_PA13MFP_Pos)
 #define SYS_GPA_MFPH_PA13MFP_SPI2_CLK         (0x05UL<<SYS_GPA_MFPH_PA13MFP_Pos)
 #define SYS_GPA_MFPH_PA13MFP_CAN0_RXD         (0x06UL<<SYS_GPA_MFPH_PA13MFP_Pos)
 #define SYS_GPA_MFPH_PA13MFP_SC2_RST          (0x07UL<<SYS_GPA_MFPH_PA13MFP_Pos)
 #define SYS_GPA_MFPH_PA13MFP_BPWM1_CH3        (0x0BUL<<SYS_GPA_MFPH_PA13MFP_Pos)
 #define SYS_GPA_MFPH_PA13MFP_QEI1_A           (0x0CUL<<SYS_GPA_MFPH_PA13MFP_Pos)
 #define SYS_GPA_MFPH_PA13MFP_USB_D_N          (0x0EUL<<SYS_GPA_MFPH_PA13MFP_Pos)
 #define SYS_GPA_MFPH_PA14MFP_GPIO             (0x00UL<<SYS_GPA_MFPH_PA14MFP_Pos)
 #define SYS_GPA_MFPH_PA14MFP_I2S0_DI          (0x02UL<<SYS_GPA_MFPH_PA14MFP_Pos)
 #define SYS_GPA_MFPH_PA14MFP_UART0_TXD        (0x03UL<<SYS_GPA_MFPH_PA14MFP_Pos)
 #define SYS_GPA_MFPH_PA14MFP_SPI2_MISO        (0x05UL<<SYS_GPA_MFPH_PA14MFP_Pos)
 #define SYS_GPA_MFPH_PA14MFP_I2C2_SCL         (0x06UL<<SYS_GPA_MFPH_PA14MFP_Pos)
 #define SYS_GPA_MFPH_PA14MFP_SC2_DAT          (0x07UL<<SYS_GPA_MFPH_PA14MFP_Pos)
 #define SYS_GPA_MFPH_PA14MFP_BPWM1_CH4        (0x0BUL<<SYS_GPA_MFPH_PA14MFP_Pos)
 #define SYS_GPA_MFPH_PA14MFP_QEI1_B           (0x0CUL<<SYS_GPA_MFPH_PA14MFP_Pos)
 #define SYS_GPA_MFPH_PA14MFP_USB_D_P          (0x0EUL<<SYS_GPA_MFPH_PA14MFP_Pos)
 #define SYS_GPA_MFPH_PA15MFP_GPIO             (0x00UL<<SYS_GPA_MFPH_PA15MFP_Pos)
 #define SYS_GPA_MFPH_PA15MFP_I2S0_DO          (0x02UL<<SYS_GPA_MFPH_PA15MFP_Pos)
 #define SYS_GPA_MFPH_PA15MFP_UART0_RXD        (0x03UL<<SYS_GPA_MFPH_PA15MFP_Pos)
 #define SYS_GPA_MFPH_PA15MFP_SPI2_MOSI        (0x05UL<<SYS_GPA_MFPH_PA15MFP_Pos)
 #define SYS_GPA_MFPH_PA15MFP_I2C2_SDA         (0x06UL<<SYS_GPA_MFPH_PA15MFP_Pos)
 #define SYS_GPA_MFPH_PA15MFP_SC2_CLK          (0x07UL<<SYS_GPA_MFPH_PA15MFP_Pos)
 #define SYS_GPA_MFPH_PA15MFP_BPWM1_CH5        (0x0BUL<<SYS_GPA_MFPH_PA15MFP_Pos)
 #define SYS_GPA_MFPH_PA15MFP_EPWM0_SYNC_IN    (0x0CUL<<SYS_GPA_MFPH_PA15MFP_Pos)
 #define SYS_GPA_MFPH_PA15MFP_USB_OTG_ID       (0x0EUL<<SYS_GPA_MFPH_PA15MFP_Pos)
 /********************* Bit definition of GPB_MFPL register **********************/
 #define SYS_GPB_MFPL_PB0MFP_GPIO              (0x00UL<<SYS_GPB_MFPL_PB0MFP_Pos)
 #define SYS_GPB_MFPL_PB0MFP_EADC0_CH0         (0x01UL<<SYS_GPB_MFPL_PB0MFP_Pos)
 #define SYS_GPB_MFPL_PB0MFP_EADC1_CH8         (0x01UL<<SYS_GPB_MFPL_PB0MFP_Pos)
 #define SYS_GPB_MFPL_PB0MFP_OPA0_P            (0x01UL<<SYS_GPB_MFPL_PB0MFP_Pos)
 #define SYS_GPB_MFPL_PB0MFP_EBI_ADR9          (0x02UL<<SYS_GPB_MFPL_PB0MFP_Pos)
 #define SYS_GPB_MFPL_PB0MFP_SD0_CMD           (0x03UL<<SYS_GPB_MFPL_PB0MFP_Pos)
 #define SYS_GPB_MFPL_PB0MFP_SPI2_I2SMCLK      (0x04UL<<SYS_GPB_MFPL_PB0MFP_Pos)
 #define SYS_GPB_MFPL_PB0MFP_UART2_RXD         (0x07UL<<SYS_GPB_MFPL_PB0MFP_Pos)
 #define SYS_GPB_MFPL_PB0MFP_SPI0_I2SMCLK      (0x08UL<<SYS_GPB_MFPL_PB0MFP_Pos)
 #define SYS_GPB_MFPL_PB0MFP_I2C1_SDA          (0x09UL<<SYS_GPB_MFPL_PB0MFP_Pos)
 #define SYS_GPB_MFPL_PB0MFP_EPWM0_CH5         (0x0BUL<<SYS_GPB_MFPL_PB0MFP_Pos)
 #define SYS_GPB_MFPL_PB0MFP_EPWM1_CH5         (0x0CUL<<SYS_GPB_MFPL_PB0MFP_Pos)
 #define SYS_GPB_MFPL_PB0MFP_EPWM0_BRAKE1      (0x0DUL<<SYS_GPB_MFPL_PB0MFP_Pos)
 #define SYS_GPB_MFPL_PB1MFP_GPIO              (0x00UL<<SYS_GPB_MFPL_PB1MFP_Pos)
 #define SYS_GPB_MFPL_PB1MFP_EADC0_CH1         (0x01UL<<SYS_GPB_MFPL_PB1MFP_Pos)
 #define SYS_GPB_MFPL_PB1MFP_OPA0_N            (0x01UL<<SYS_GPB_MFPL_PB1MFP_Pos)
 #define SYS_GPB_MFPL_PB1MFP_EADC1_CH9         (0x01UL<<SYS_GPB_MFPL_PB1MFP_Pos)
 #define SYS_GPB_MFPL_PB1MFP_EBI_ADR8          (0x02UL<<SYS_GPB_MFPL_PB1MFP_Pos)
 #define SYS_GPB_MFPL_PB1MFP_SD0_CLK           (0x03UL<<SYS_GPB_MFPL_PB1MFP_Pos)
 #define SYS_GPB_MFPL_PB1MFP_EMAC_RMII_RXERR   (0x04UL<<SYS_GPB_MFPL_PB1MFP_Pos)
 #define SYS_GPB_MFPL_PB1MFP_SPI1_I2SMCLK      (0x05UL<<SYS_GPB_MFPL_PB1MFP_Pos)
 #define SYS_GPB_MFPL_PB1MFP_SPI3_I2SMCLK      (0x06UL<<SYS_GPB_MFPL_PB1MFP_Pos)
 #define SYS_GPB_MFPL_PB1MFP_UART2_TXD         (0x07UL<<SYS_GPB_MFPL_PB1MFP_Pos)
 #define SYS_GPB_MFPL_PB1MFP_USCI1_CLK         (0x08UL<<SYS_GPB_MFPL_PB1MFP_Pos)
 #define SYS_GPB_MFPL_PB1MFP_I2C1_SCL          (0x09UL<<SYS_GPB_MFPL_PB1MFP_Pos)
 #define SYS_GPB_MFPL_PB1MFP_I2S0_LRCK         (0x0AUL<<SYS_GPB_MFPL_PB1MFP_Pos)
 #define SYS_GPB_MFPL_PB1MFP_EPWM0_CH4         (0x0BUL<<SYS_GPB_MFPL_PB1MFP_Pos)
 #define SYS_GPB_MFPL_PB1MFP_EPWM1_CH4         (0x0CUL<<SYS_GPB_MFPL_PB1MFP_Pos)
 #define SYS_GPB_MFPL_PB1MFP_EPWM0_BRAKE0      (0x0DUL<<SYS_GPB_MFPL_PB1MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_GPIO              (0x00UL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_ACMP0_P1          (0x01UL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_EADC0_CH2         (0x01UL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_OPA0_O            (0x01UL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_EADC1_CH10        (0x01UL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_EBI_ADR3          (0x02UL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_SD0_DAT0          (0x03UL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_EMAC_RMII_CRSDV   (0x04UL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_SPI1_SS           (0x05UL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_UART1_RXD         (0x06UL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_UART5_nCTS        (0x07UL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_USCI1_DAT0        (0x08UL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_SC0_PWR           (0x09UL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_I2S0_DO           (0x0AUL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_EPWM0_CH3         (0x0BUL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_I2C1_SDA          (0x0CUL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_TM3               (0x0EUL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB2MFP_INT3              (0x0FUL<<SYS_GPB_MFPL_PB2MFP_Pos)
 #define SYS_GPB_MFPL_PB3MFP_GPIO              (0x00UL<<SYS_GPB_MFPL_PB3MFP_Pos)
 #define SYS_GPB_MFPL_PB3MFP_ACMP0_N           (0x01UL<<SYS_GPB_MFPL_PB3MFP_Pos)
 #define SYS_GPB_MFPL_PB3MFP_EADC0_CH3         (0x01UL<<SYS_GPB_MFPL_PB3MFP_Pos)
 #define SYS_GPB_MFPL_PB3MFP_EADC1_CH11        (0x01UL<<SYS_GPB_MFPL_PB3MFP_Pos)
 #define SYS_GPB_MFPL_PB3MFP_EBI_ADR2          (0x02UL<<SYS_GPB_MFPL_PB3MFP_Pos)
 #define SYS_GPB_MFPL_PB3MFP_SD0_DAT1          (0x03UL<<SYS_GPB_MFPL_PB3MFP_Pos)
 #define SYS_GPB_MFPL_PB3MFP_EMAC_RMII_RXD1    (0x04UL<<SYS_GPB_MFPL_PB3MFP_Pos)
 #define SYS_GPB_MFPL_PB3MFP_SPI1_CLK          (0x05UL<<SYS_GPB_MFPL_PB3MFP_Pos)
 #define SYS_GPB_MFPL_PB3MFP_UART1_TXD         (0x06UL<<SYS_GPB_MFPL_PB3MFP_Pos)
 #define SYS_GPB_MFPL_PB3MFP_UART5_nRTS        (0x07UL<<SYS_GPB_MFPL_PB3MFP_Pos)
 #define SYS_GPB_MFPL_PB3MFP_USCI1_DAT1        (0x08UL<<SYS_GPB_MFPL_PB3MFP_Pos)
 #define SYS_GPB_MFPL_PB3MFP_SC0_RST           (0x09UL<<SYS_GPB_MFPL_PB3MFP_Pos)
 #define SYS_GPB_MFPL_PB3MFP_I2S0_DI           (0x0AUL<<SYS_GPB_MFPL_PB3MFP_Pos)
 #define SYS_GPB_MFPL_PB3MFP_EPWM0_CH2         (0x0BUL<<SYS_GPB_MFPL_PB3MFP_Pos)
 #define SYS_GPB_MFPL_PB3MFP_I2C1_SCL          (0x0CUL<<SYS_GPB_MFPL_PB3MFP_Pos)
 #define SYS_GPB_MFPL_PB3MFP_TM2               (0x0EUL<<SYS_GPB_MFPL_PB3MFP_Pos)
 #define SYS_GPB_MFPL_PB3MFP_INT2              (0x0FUL<<SYS_GPB_MFPL_PB3MFP_Pos)
 #define SYS_GPB_MFPL_PB4MFP_GPIO              (0x00UL<<SYS_GPB_MFPL_PB4MFP_Pos)
 #define SYS_GPB_MFPL_PB4MFP_ACMP1_P1          (0x01UL<<SYS_GPB_MFPL_PB4MFP_Pos)
 #define SYS_GPB_MFPL_PB4MFP_EADC0_CH4         (0x01UL<<SYS_GPB_MFPL_PB4MFP_Pos)
 #define SYS_GPB_MFPL_PB4MFP_EBI_ADR1          (0x02UL<<SYS_GPB_MFPL_PB4MFP_Pos)
 #define SYS_GPB_MFPL_PB4MFP_SD0_DAT2          (0x03UL<<SYS_GPB_MFPL_PB4MFP_Pos)
 #define SYS_GPB_MFPL_PB4MFP_EMAC_RMII_RXD0    (0x04UL<<SYS_GPB_MFPL_PB4MFP_Pos)
 #define SYS_GPB_MFPL_PB4MFP_SPI1_MOSI         (0x05UL<<SYS_GPB_MFPL_PB4MFP_Pos)
 #define SYS_GPB_MFPL_PB4MFP_I2C0_SDA          (0x06UL<<SYS_GPB_MFPL_PB4MFP_Pos)
 #define SYS_GPB_MFPL_PB4MFP_UART5_RXD         (0x07UL<<SYS_GPB_MFPL_PB4MFP_Pos)
 #define SYS_GPB_MFPL_PB4MFP_USCI1_CTL1        (0x08UL<<SYS_GPB_MFPL_PB4MFP_Pos)
 #define SYS_GPB_MFPL_PB4MFP_SC0_DAT           (0x09UL<<SYS_GPB_MFPL_PB4MFP_Pos)
 #define SYS_GPB_MFPL_PB4MFP_I2S0_MCLK         (0x0AUL<<SYS_GPB_MFPL_PB4MFP_Pos)
 #define SYS_GPB_MFPL_PB4MFP_EPWM0_CH1         (0x0BUL<<SYS_GPB_MFPL_PB4MFP_Pos)
 #define SYS_GPB_MFPL_PB4MFP_UART2_RXD         (0x0CUL<<SYS_GPB_MFPL_PB4MFP_Pos)
 #define SYS_GPB_MFPL_PB4MFP_TM1               (0x0EUL<<SYS_GPB_MFPL_PB4MFP_Pos)
 #define SYS_GPB_MFPL_PB4MFP_INT1              (0x0FUL<<SYS_GPB_MFPL_PB4MFP_Pos)
 #define SYS_GPB_MFPL_PB5MFP_GPIO              (0x00UL<<SYS_GPB_MFPL_PB5MFP_Pos)
 #define SYS_GPB_MFPL_PB5MFP_ACMP1_N           (0x01UL<<SYS_GPB_MFPL_PB5MFP_Pos)
 #define SYS_GPB_MFPL_PB5MFP_EADC0_CH5         (0x01UL<<SYS_GPB_MFPL_PB5MFP_Pos)
 #define SYS_GPB_MFPL_PB5MFP_EBI_ADR0          (0x02UL<<SYS_GPB_MFPL_PB5MFP_Pos)
 #define SYS_GPB_MFPL_PB5MFP_SD0_DAT3          (0x03UL<<SYS_GPB_MFPL_PB5MFP_Pos)
 #define SYS_GPB_MFPL_PB5MFP_EMAC_RMII_REFCLK  (0x04UL<<SYS_GPB_MFPL_PB5MFP_Pos)
 #define SYS_GPB_MFPL_PB5MFP_SPI1_MISO         (0x05UL<<SYS_GPB_MFPL_PB5MFP_Pos)
 #define SYS_GPB_MFPL_PB5MFP_I2C0_SCL          (0x06UL<<SYS_GPB_MFPL_PB5MFP_Pos)
 #define SYS_GPB_MFPL_PB5MFP_UART5_TXD         (0x07UL<<SYS_GPB_MFPL_PB5MFP_Pos)
 #define SYS_GPB_MFPL_PB5MFP_USCI1_CTL0        (0x08UL<<SYS_GPB_MFPL_PB5MFP_Pos)
 #define SYS_GPB_MFPL_PB5MFP_SC0_CLK           (0x09UL<<SYS_GPB_MFPL_PB5MFP_Pos)
 #define SYS_GPB_MFPL_PB5MFP_I2S0_BCLK         (0x0AUL<<SYS_GPB_MFPL_PB5MFP_Pos)
 #define SYS_GPB_MFPL_PB5MFP_EPWM0_CH0         (0x0BUL<<SYS_GPB_MFPL_PB5MFP_Pos)
 #define SYS_GPB_MFPL_PB5MFP_UART2_TXD         (0x0CUL<<SYS_GPB_MFPL_PB5MFP_Pos)
 #define SYS_GPB_MFPL_PB5MFP_TM0               (0x0EUL<<SYS_GPB_MFPL_PB5MFP_Pos)
 #define SYS_GPB_MFPL_PB5MFP_INT0              (0x0FUL<<SYS_GPB_MFPL_PB5MFP_Pos)
 #define SYS_GPB_MFPL_PB6MFP_GPIO              (0x00UL<<SYS_GPB_MFPL_PB6MFP_Pos)
 #define SYS_GPB_MFPL_PB6MFP_EADC0_CH6         (0x01UL<<SYS_GPB_MFPL_PB6MFP_Pos)
 #define SYS_GPB_MFPL_PB6MFP_EBI_nWRH          (0x02UL<<SYS_GPB_MFPL_PB6MFP_Pos)
 #define SYS_GPB_MFPL_PB6MFP_EMAC_PPS          (0x03UL<<SYS_GPB_MFPL_PB6MFP_Pos)
 #define SYS_GPB_MFPL_PB6MFP_USCI1_DAT1        (0x04UL<<SYS_GPB_MFPL_PB6MFP_Pos)
 #define SYS_GPB_MFPL_PB6MFP_CAN1_RXD          (0x05UL<<SYS_GPB_MFPL_PB6MFP_Pos)
 #define SYS_GPB_MFPL_PB6MFP_UART1_RXD         (0x06UL<<SYS_GPB_MFPL_PB6MFP_Pos)
 #define SYS_GPB_MFPL_PB6MFP_SD1_CLK           (0x07UL<<SYS_GPB_MFPL_PB6MFP_Pos)
 #define SYS_GPB_MFPL_PB6MFP_EBI_nCS1          (0x08UL<<SYS_GPB_MFPL_PB6MFP_Pos)
 #define SYS_GPB_MFPL_PB6MFP_BPWM1_CH5         (0x0AUL<<SYS_GPB_MFPL_PB6MFP_Pos)
 #define SYS_GPB_MFPL_PB6MFP_EPWM1_BRAKE1      (0x0BUL<<SYS_GPB_MFPL_PB6MFP_Pos)
 #define SYS_GPB_MFPL_PB6MFP_EPWM1_CH5         (0x0CUL<<SYS_GPB_MFPL_PB6MFP_Pos)
 #define SYS_GPB_MFPL_PB6MFP_INT4              (0x0DUL<<SYS_GPB_MFPL_PB6MFP_Pos)
 #define SYS_GPB_MFPL_PB6MFP_USB_VBUS_EN       (0x0EUL<<SYS_GPB_MFPL_PB6MFP_Pos)
 #define SYS_GPB_MFPL_PB6MFP_ACMP1_O           (0x0FUL<<SYS_GPB_MFPL_PB6MFP_Pos)
 #define SYS_GPB_MFPL_PB7MFP_GPIO              (0x00UL<<SYS_GPB_MFPL_PB7MFP_Pos)
 #define SYS_GPB_MFPL_PB7MFP_EADC0_CH7         (0x01UL<<SYS_GPB_MFPL_PB7MFP_Pos)
 #define SYS_GPB_MFPL_PB7MFP_EBI_nWRL          (0x02UL<<SYS_GPB_MFPL_PB7MFP_Pos)
 #define SYS_GPB_MFPL_PB7MFP_EMAC_RMII_TXEN    (0x03UL<<SYS_GPB_MFPL_PB7MFP_Pos)
 #define SYS_GPB_MFPL_PB7MFP_USCI1_DAT0        (0x04UL<<SYS_GPB_MFPL_PB7MFP_Pos)
 #define SYS_GPB_MFPL_PB7MFP_CAN1_TXD          (0x05UL<<SYS_GPB_MFPL_PB7MFP_Pos)
 #define SYS_GPB_MFPL_PB7MFP_UART1_TXD         (0x06UL<<SYS_GPB_MFPL_PB7MFP_Pos)
 #define SYS_GPB_MFPL_PB7MFP_SD1_CMD           (0x07UL<<SYS_GPB_MFPL_PB7MFP_Pos)
 #define SYS_GPB_MFPL_PB7MFP_EBI_nCS0          (0x08UL<<SYS_GPB_MFPL_PB7MFP_Pos)
 #define SYS_GPB_MFPL_PB7MFP_BPWM1_CH4         (0x0AUL<<SYS_GPB_MFPL_PB7MFP_Pos)
 #define SYS_GPB_MFPL_PB7MFP_EPWM1_BRAKE0      (0x0BUL<<SYS_GPB_MFPL_PB7MFP_Pos)
 #define SYS_GPB_MFPL_PB7MFP_EPWM1_CH4         (0x0CUL<<SYS_GPB_MFPL_PB7MFP_Pos)
 #define SYS_GPB_MFPL_PB7MFP_INT5              (0x0DUL<<SYS_GPB_MFPL_PB7MFP_Pos)
 #define SYS_GPB_MFPL_PB7MFP_USB_VBUS_ST       (0x0EUL<<SYS_GPB_MFPL_PB7MFP_Pos)
 #define SYS_GPB_MFPL_PB7MFP_ACMP0_O           (0x0FUL<<SYS_GPB_MFPL_PB7MFP_Pos)
 /********************* Bit definition of GPB_MFPH register **********************/
 #define SYS_GPB_MFPH_PB8MFP_GPIO              (0x00UL<<SYS_GPB_MFPH_PB8MFP_Pos)
 #define SYS_GPB_MFPH_PB8MFP_EADC0_CH8         (0x01UL<<SYS_GPB_MFPH_PB8MFP_Pos)
 #define SYS_GPB_MFPH_PB8MFP_EBI_ADR19         (0x02UL<<SYS_GPB_MFPH_PB8MFP_Pos)
 #define SYS_GPB_MFPH_PB8MFP_EMAC_RMII_TXD1    (0x03UL<<SYS_GPB_MFPH_PB8MFP_Pos)
 #define SYS_GPB_MFPH_PB8MFP_USCI1_CLK         (0x04UL<<SYS_GPB_MFPH_PB8MFP_Pos)
 #define SYS_GPB_MFPH_PB8MFP_UART0_RXD         (0x05UL<<SYS_GPB_MFPH_PB8MFP_Pos)
 #define SYS_GPB_MFPH_PB8MFP_UART1_nRTS        (0x06UL<<SYS_GPB_MFPH_PB8MFP_Pos)
 #define SYS_GPB_MFPH_PB8MFP_I2C1_SMBSUS       (0x07UL<<SYS_GPB_MFPH_PB8MFP_Pos)
 #define SYS_GPB_MFPH_PB8MFP_UART7_RXD         (0x08UL<<SYS_GPB_MFPH_PB8MFP_Pos)
 #define SYS_GPB_MFPH_PB8MFP_I2C0_SDA          (0x09UL<<SYS_GPB_MFPH_PB8MFP_Pos)
 #define SYS_GPB_MFPH_PB8MFP_BPWM1_CH3         (0x0AUL<<SYS_GPB_MFPH_PB8MFP_Pos)
 #define SYS_GPB_MFPH_PB8MFP_SPI3_MOSI         (0x0BUL<<SYS_GPB_MFPH_PB8MFP_Pos)
 #define SYS_GPB_MFPH_PB8MFP_CAN2_RXD          (0x0CUL<<SYS_GPB_MFPH_PB8MFP_Pos)
 #define SYS_GPB_MFPH_PB8MFP_INT6              (0x0DUL<<SYS_GPB_MFPH_PB8MFP_Pos)
 #define SYS_GPB_MFPH_PB9MFP_GPIO              (0x00UL<<SYS_GPB_MFPH_PB9MFP_Pos)
 #define SYS_GPB_MFPH_PB9MFP_EADC0_CH9         (0x01UL<<SYS_GPB_MFPH_PB9MFP_Pos)
 #define SYS_GPB_MFPH_PB9MFP_EBI_ADR18         (0x02UL<<SYS_GPB_MFPH_PB9MFP_Pos)
 #define SYS_GPB_MFPH_PB9MFP_EMAC_RMII_TXD0    (0x03UL<<SYS_GPB_MFPH_PB9MFP_Pos)
 #define SYS_GPB_MFPH_PB9MFP_USCI1_CTL1        (0x04UL<<SYS_GPB_MFPH_PB9MFP_Pos)
 #define SYS_GPB_MFPH_PB9MFP_UART0_TXD         (0x05UL<<SYS_GPB_MFPH_PB9MFP_Pos)
 #define SYS_GPB_MFPH_PB9MFP_UART1_nCTS        (0x06UL<<SYS_GPB_MFPH_PB9MFP_Pos)
 #define SYS_GPB_MFPH_PB9MFP_I2C1_SMBAL        (0x07UL<<SYS_GPB_MFPH_PB9MFP_Pos)
 #define SYS_GPB_MFPH_PB9MFP_UART7_TXD         (0x08UL<<SYS_GPB_MFPH_PB9MFP_Pos)
 #define SYS_GPB_MFPH_PB9MFP_I2C0_SCL          (0x09UL<<SYS_GPB_MFPH_PB9MFP_Pos)
 #define SYS_GPB_MFPH_PB9MFP_BPWM1_CH2         (0x0AUL<<SYS_GPB_MFPH_PB9MFP_Pos)
 #define SYS_GPB_MFPH_PB9MFP_SPI3_MISO         (0x0BUL<<SYS_GPB_MFPH_PB9MFP_Pos)
 #define SYS_GPB_MFPH_PB9MFP_CAN2_TXD          (0x0CUL<<SYS_GPB_MFPH_PB9MFP_Pos)
 #define SYS_GPB_MFPH_PB9MFP_INT7              (0x0DUL<<SYS_GPB_MFPH_PB9MFP_Pos)
 #define SYS_GPB_MFPH_PB9MFP_CCAP_HSYNC        (0x0EUL<<SYS_GPB_MFPH_PB9MFP_Pos)
 #define SYS_GPB_MFPH_PB10MFP_GPIO             (0x00UL<<SYS_GPB_MFPH_PB10MFP_Pos)
 #define SYS_GPB_MFPH_PB10MFP_EADC0_CH10       (0x01UL<<SYS_GPB_MFPH_PB10MFP_Pos)
 #define SYS_GPB_MFPH_PB10MFP_EBI_ADR17        (0x02UL<<SYS_GPB_MFPH_PB10MFP_Pos)
 #define SYS_GPB_MFPH_PB10MFP_EMAC_RMII_MDIO   (0x03UL<<SYS_GPB_MFPH_PB10MFP_Pos)
 #define SYS_GPB_MFPH_PB10MFP_USCI1_CTL0       (0x04UL<<SYS_GPB_MFPH_PB10MFP_Pos)
 #define SYS_GPB_MFPH_PB10MFP_UART0_nRTS       (0x05UL<<SYS_GPB_MFPH_PB10MFP_Pos)
 #define SYS_GPB_MFPH_PB10MFP_UART4_RXD        (0x06UL<<SYS_GPB_MFPH_PB10MFP_Pos)
 #define SYS_GPB_MFPH_PB10MFP_I2C1_SDA         (0x07UL<<SYS_GPB_MFPH_PB10MFP_Pos)
 #define SYS_GPB_MFPH_PB10MFP_CAN0_RXD         (0x08UL<<SYS_GPB_MFPH_PB10MFP_Pos)
 #define SYS_GPB_MFPH_PB10MFP_BPWM1_CH1        (0x0AUL<<SYS_GPB_MFPH_PB10MFP_Pos)
 #define SYS_GPB_MFPH_PB10MFP_SPI3_SS          (0x0BUL<<SYS_GPB_MFPH_PB10MFP_Pos)
 #define SYS_GPB_MFPH_PB10MFP_CCAP_VSYNC       (0x0CUL<<SYS_GPB_MFPH_PB10MFP_Pos)
 #define SYS_GPB_MFPH_PB10MFP_HSUSB_VBUS_EN    (0x0EUL<<SYS_GPB_MFPH_PB10MFP_Pos)
 #define SYS_GPB_MFPH_PB11MFP_GPIO             (0x00UL<<SYS_GPB_MFPH_PB11MFP_Pos)
 #define SYS_GPB_MFPH_PB11MFP_EADC0_CH11       (0x01UL<<SYS_GPB_MFPH_PB11MFP_Pos)
 #define SYS_GPB_MFPH_PB11MFP_EBI_ADR16        (0x02UL<<SYS_GPB_MFPH_PB11MFP_Pos)
 #define SYS_GPB_MFPH_PB11MFP_EMAC_RMII_MDC    (0x03UL<<SYS_GPB_MFPH_PB11MFP_Pos)
 #define SYS_GPB_MFPH_PB11MFP_UART0_nCTS       (0x05UL<<SYS_GPB_MFPH_PB11MFP_Pos)
 #define SYS_GPB_MFPH_PB11MFP_UART4_TXD        (0x06UL<<SYS_GPB_MFPH_PB11MFP_Pos)
 #define SYS_GPB_MFPH_PB11MFP_I2C1_SCL         (0x07UL<<SYS_GPB_MFPH_PB11MFP_Pos)
 #define SYS_GPB_MFPH_PB11MFP_CAN0_TXD         (0x08UL<<SYS_GPB_MFPH_PB11MFP_Pos)
 #define SYS_GPB_MFPH_PB11MFP_SPI0_I2SMCLK     (0x09UL<<SYS_GPB_MFPH_PB11MFP_Pos)
 #define SYS_GPB_MFPH_PB11MFP_BPWM1_CH0        (0x0AUL<<SYS_GPB_MFPH_PB11MFP_Pos)
 #define SYS_GPB_MFPH_PB11MFP_SPI3_CLK         (0x0BUL<<SYS_GPB_MFPH_PB11MFP_Pos)
 #define SYS_GPB_MFPH_PB11MFP_CCAP_SFIELD      (0x0CUL<<SYS_GPB_MFPH_PB11MFP_Pos)
 #define SYS_GPB_MFPH_PB11MFP_HSUSB_VBUS_ST    (0x0EUL<<SYS_GPB_MFPH_PB11MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_GPIO             (0x00UL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_ACMP0_P2         (0x01UL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_ACMP1_P2         (0x01UL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_DAC0_OUT         (0x01UL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_EADC0_CH12       (0x01UL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_EADC1_CH12       (0x01UL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_EBI_AD15         (0x02UL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_SC1_CLK          (0x03UL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_SPI0_MOSI        (0x04UL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_USCI0_CLK        (0x05UL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_UART0_RXD        (0x06UL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_UART3_nCTS       (0x07UL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_I2C2_SDA         (0x08UL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_SD0_nCD          (0x09UL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_CCAP_SCLK        (0x0AUL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_EPWM1_CH3        (0x0BUL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_ETM_TRACE_DATA3  (0x0CUL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB12MFP_TM3_EXT          (0x0DUL<<SYS_GPB_MFPH_PB12MFP_Pos)
 #define SYS_GPB_MFPH_PB13MFP_GPIO             (0x00UL<<SYS_GPB_MFPH_PB13MFP_Pos)
 #define SYS_GPB_MFPH_PB13MFP_ACMP0_P3         (0x01UL<<SYS_GPB_MFPH_PB13MFP_Pos)
 #define SYS_GPB_MFPH_PB13MFP_ACMP1_P3         (0x01UL<<SYS_GPB_MFPH_PB13MFP_Pos)
 #define SYS_GPB_MFPH_PB13MFP_DAC1_OUT         (0x01UL<<SYS_GPB_MFPH_PB13MFP_Pos)
 #define SYS_GPB_MFPH_PB13MFP_EADC0_CH13       (0x01UL<<SYS_GPB_MFPH_PB13MFP_Pos)
 #define SYS_GPB_MFPH_PB13MFP_EADC1_CH13       (0x01UL<<SYS_GPB_MFPH_PB13MFP_Pos)
 #define SYS_GPB_MFPH_PB13MFP_EBI_AD14         (0x02UL<<SYS_GPB_MFPH_PB13MFP_Pos)
 #define SYS_GPB_MFPH_PB13MFP_SC1_DAT          (0x03UL<<SYS_GPB_MFPH_PB13MFP_Pos)
 #define SYS_GPB_MFPH_PB13MFP_SPI0_MISO        (0x04UL<<SYS_GPB_MFPH_PB13MFP_Pos)
 #define SYS_GPB_MFPH_PB13MFP_USCI0_DAT0       (0x05UL<<SYS_GPB_MFPH_PB13MFP_Pos)
 #define SYS_GPB_MFPH_PB13MFP_UART0_TXD        (0x06UL<<SYS_GPB_MFPH_PB13MFP_Pos)
 #define SYS_GPB_MFPH_PB13MFP_UART3_nRTS       (0x07UL<<SYS_GPB_MFPH_PB13MFP_Pos)
 #define SYS_GPB_MFPH_PB13MFP_I2C2_SCL         (0x08UL<<SYS_GPB_MFPH_PB13MFP_Pos)
 #define SYS_GPB_MFPH_PB13MFP_CCAP_PIXCLK      (0x0AUL<<SYS_GPB_MFPH_PB13MFP_Pos)
 #define SYS_GPB_MFPH_PB13MFP_EPWM1_CH2        (0x0BUL<<SYS_GPB_MFPH_PB13MFP_Pos)
 #define SYS_GPB_MFPH_PB13MFP_ETM_TRACE_DATA2  (0x0CUL<<SYS_GPB_MFPH_PB13MFP_Pos)
 #define SYS_GPB_MFPH_PB13MFP_TM2_EXT          (0x0DUL<<SYS_GPB_MFPH_PB13MFP_Pos)
 #define SYS_GPB_MFPH_PB14MFP_GPIO             (0x00UL<<SYS_GPB_MFPH_PB14MFP_Pos)
 #define SYS_GPB_MFPH_PB14MFP_EADC0_CH14       (0x01UL<<SYS_GPB_MFPH_PB14MFP_Pos)
 #define SYS_GPB_MFPH_PB14MFP_EADC1_CH14       (0x01UL<<SYS_GPB_MFPH_PB14MFP_Pos)
 #define SYS_GPB_MFPH_PB14MFP_EBI_AD13         (0x02UL<<SYS_GPB_MFPH_PB14MFP_Pos)
 #define SYS_GPB_MFPH_PB14MFP_SC1_RST          (0x03UL<<SYS_GPB_MFPH_PB14MFP_Pos)
 #define SYS_GPB_MFPH_PB14MFP_SPI0_CLK         (0x04UL<<SYS_GPB_MFPH_PB14MFP_Pos)
 #define SYS_GPB_MFPH_PB14MFP_USCI0_DAT1       (0x05UL<<SYS_GPB_MFPH_PB14MFP_Pos)
 #define SYS_GPB_MFPH_PB14MFP_UART0_nRTS       (0x06UL<<SYS_GPB_MFPH_PB14MFP_Pos)
 #define SYS_GPB_MFPH_PB14MFP_UART3_RXD        (0x07UL<<SYS_GPB_MFPH_PB14MFP_Pos)
 #define SYS_GPB_MFPH_PB14MFP_I2C2_SMBSUS      (0x08UL<<SYS_GPB_MFPH_PB14MFP_Pos)
 #define SYS_GPB_MFPH_PB14MFP_EPWM1_CH1        (0x0BUL<<SYS_GPB_MFPH_PB14MFP_Pos)
 #define SYS_GPB_MFPH_PB14MFP_ETM_TRACE_DATA1  (0x0CUL<<SYS_GPB_MFPH_PB14MFP_Pos)
 #define SYS_GPB_MFPH_PB14MFP_TM1_EXT          (0x0DUL<<SYS_GPB_MFPH_PB14MFP_Pos)
 #define SYS_GPB_MFPH_PB14MFP_CLKO             (0x0EUL<<SYS_GPB_MFPH_PB14MFP_Pos)
 #define SYS_GPB_MFPH_PB14MFP_USB_VBUS_ST      (0x0FUL<<SYS_GPB_MFPH_PB14MFP_Pos)
 #define SYS_GPB_MFPH_PB15MFP_GPIO             (0x00UL<<SYS_GPB_MFPH_PB15MFP_Pos)
 #define SYS_GPB_MFPH_PB15MFP_EADC0_CH15       (0x01UL<<SYS_GPB_MFPH_PB15MFP_Pos)
 #define SYS_GPB_MFPH_PB15MFP_EADC1_CH15       (0x01UL<<SYS_GPB_MFPH_PB15MFP_Pos)
 #define SYS_GPB_MFPH_PB15MFP_EBI_AD12         (0x02UL<<SYS_GPB_MFPH_PB15MFP_Pos)
 #define SYS_GPB_MFPH_PB15MFP_SC1_PWR          (0x03UL<<SYS_GPB_MFPH_PB15MFP_Pos)
 #define SYS_GPB_MFPH_PB15MFP_SPI0_SS          (0x04UL<<SYS_GPB_MFPH_PB15MFP_Pos)
 #define SYS_GPB_MFPH_PB15MFP_USCI0_CTL1       (0x05UL<<SYS_GPB_MFPH_PB15MFP_Pos)
 #define SYS_GPB_MFPH_PB15MFP_UART0_nCTS       (0x06UL<<SYS_GPB_MFPH_PB15MFP_Pos)
 #define SYS_GPB_MFPH_PB15MFP_UART3_TXD        (0x07UL<<SYS_GPB_MFPH_PB15MFP_Pos)
 #define SYS_GPB_MFPH_PB15MFP_I2C2_SMBAL       (0x08UL<<SYS_GPB_MFPH_PB15MFP_Pos)
 #define SYS_GPB_MFPH_PB15MFP_EPWM0_BRAKE1     (0x0AUL<<SYS_GPB_MFPH_PB15MFP_Pos)
 #define SYS_GPB_MFPH_PB15MFP_EPWM1_CH0        (0x0BUL<<SYS_GPB_MFPH_PB15MFP_Pos)
 #define SYS_GPB_MFPH_PB15MFP_ETM_TRACE_DATA0  (0x0CUL<<SYS_GPB_MFPH_PB15MFP_Pos)
 #define SYS_GPB_MFPH_PB15MFP_TM0_EXT          (0x0DUL<<SYS_GPB_MFPH_PB15MFP_Pos)
 #define SYS_GPB_MFPH_PB15MFP_USB_VBUS_EN      (0x0EUL<<SYS_GPB_MFPH_PB15MFP_Pos)
 #define SYS_GPB_MFPH_PB15MFP_HSUSB_VBUS_EN    (0x0FUL<<SYS_GPB_MFPH_PB15MFP_Pos)
 /********************* Bit definition of GPC_MFPL register **********************/
 #define SYS_GPC_MFPL_PC0MFP_GPIO              (0x00UL<<SYS_GPC_MFPL_PC0MFP_Pos)
 #define SYS_GPC_MFPL_PC0MFP_EBI_AD0           (0x02UL<<SYS_GPC_MFPL_PC0MFP_Pos)
 #define SYS_GPC_MFPL_PC0MFP_SPIM_MOSI         (0x03UL<<SYS_GPC_MFPL_PC0MFP_Pos)
 #define SYS_GPC_MFPL_PC0MFP_QSPI0_MOSI0       (0x04UL<<SYS_GPC_MFPL_PC0MFP_Pos)
 #define SYS_GPC_MFPL_PC0MFP_SC1_CLK           (0x05UL<<SYS_GPC_MFPL_PC0MFP_Pos)
 #define SYS_GPC_MFPL_PC0MFP_I2S0_LRCK         (0x06UL<<SYS_GPC_MFPL_PC0MFP_Pos)
 #define SYS_GPC_MFPL_PC0MFP_SPI1_SS           (0x07UL<<SYS_GPC_MFPL_PC0MFP_Pos)
 #define SYS_GPC_MFPL_PC0MFP_UART2_RXD         (0x08UL<<SYS_GPC_MFPL_PC0MFP_Pos)
 #define SYS_GPC_MFPL_PC0MFP_I2C0_SDA          (0x09UL<<SYS_GPC_MFPL_PC0MFP_Pos)
 #define SYS_GPC_MFPL_PC0MFP_CAN2_RXD          (0x0AUL<<SYS_GPC_MFPL_PC0MFP_Pos)
 #define SYS_GPC_MFPL_PC0MFP_EPWM1_CH5         (0x0CUL<<SYS_GPC_MFPL_PC0MFP_Pos)
 #define SYS_GPC_MFPL_PC0MFP_CCAP_DATA0        (0x0DUL<<SYS_GPC_MFPL_PC0MFP_Pos)
 #define SYS_GPC_MFPL_PC0MFP_ACMP1_O           (0x0EUL<<SYS_GPC_MFPL_PC0MFP_Pos)
 #define SYS_GPC_MFPL_PC0MFP_EADC1_ST          (0x0FUL<<SYS_GPC_MFPL_PC0MFP_Pos)
 #define SYS_GPC_MFPL_PC1MFP_GPIO              (0x00UL<<SYS_GPC_MFPL_PC1MFP_Pos)
 #define SYS_GPC_MFPL_PC1MFP_EBI_AD1           (0x02UL<<SYS_GPC_MFPL_PC1MFP_Pos)
 #define SYS_GPC_MFPL_PC1MFP_SPIM_MISO         (0x03UL<<SYS_GPC_MFPL_PC1MFP_Pos)
 #define SYS_GPC_MFPL_PC1MFP_QSPI0_MISO0       (0x04UL<<SYS_GPC_MFPL_PC1MFP_Pos)
 #define SYS_GPC_MFPL_PC1MFP_SC1_DAT           (0x05UL<<SYS_GPC_MFPL_PC1MFP_Pos)
 #define SYS_GPC_MFPL_PC1MFP_I2S0_DO           (0x06UL<<SYS_GPC_MFPL_PC1MFP_Pos)
 #define SYS_GPC_MFPL_PC1MFP_SPI1_CLK          (0x07UL<<SYS_GPC_MFPL_PC1MFP_Pos)
 #define SYS_GPC_MFPL_PC1MFP_UART2_TXD         (0x08UL<<SYS_GPC_MFPL_PC1MFP_Pos)
 #define SYS_GPC_MFPL_PC1MFP_I2C0_SCL          (0x09UL<<SYS_GPC_MFPL_PC1MFP_Pos)
 #define SYS_GPC_MFPL_PC1MFP_CAN2_TXD          (0x0AUL<<SYS_GPC_MFPL_PC1MFP_Pos)
 #define SYS_GPC_MFPL_PC1MFP_EPWM1_CH4         (0x0CUL<<SYS_GPC_MFPL_PC1MFP_Pos)
 #define SYS_GPC_MFPL_PC1MFP_CCAP_DATA1        (0x0DUL<<SYS_GPC_MFPL_PC1MFP_Pos)
 #define SYS_GPC_MFPL_PC1MFP_ACMP0_O           (0x0EUL<<SYS_GPC_MFPL_PC1MFP_Pos)
 #define SYS_GPC_MFPL_PC1MFP_EADC0_ST          (0x0FUL<<SYS_GPC_MFPL_PC1MFP_Pos)
 #define SYS_GPC_MFPL_PC2MFP_GPIO              (0x00UL<<SYS_GPC_MFPL_PC2MFP_Pos)
 #define SYS_GPC_MFPL_PC2MFP_EBI_AD2           (0x02UL<<SYS_GPC_MFPL_PC2MFP_Pos)
 #define SYS_GPC_MFPL_PC2MFP_SPIM_CLK          (0x03UL<<SYS_GPC_MFPL_PC2MFP_Pos)
 #define SYS_GPC_MFPL_PC2MFP_QSPI0_CLK         (0x04UL<<SYS_GPC_MFPL_PC2MFP_Pos)
 #define SYS_GPC_MFPL_PC2MFP_SC1_RST           (0x05UL<<SYS_GPC_MFPL_PC2MFP_Pos)
 #define SYS_GPC_MFPL_PC2MFP_I2S0_DI           (0x06UL<<SYS_GPC_MFPL_PC2MFP_Pos)
 #define SYS_GPC_MFPL_PC2MFP_SPI1_MOSI         (0x07UL<<SYS_GPC_MFPL_PC2MFP_Pos)
 #define SYS_GPC_MFPL_PC2MFP_UART2_nCTS        (0x08UL<<SYS_GPC_MFPL_PC2MFP_Pos)
 #define SYS_GPC_MFPL_PC2MFP_I2C0_SMBSUS       (0x09UL<<SYS_GPC_MFPL_PC2MFP_Pos)
 #define SYS_GPC_MFPL_PC2MFP_CAN1_RXD          (0x0AUL<<SYS_GPC_MFPL_PC2MFP_Pos)
 #define SYS_GPC_MFPL_PC2MFP_UART3_RXD         (0x0BUL<<SYS_GPC_MFPL_PC2MFP_Pos)
 #define SYS_GPC_MFPL_PC2MFP_EPWM1_CH3         (0x0CUL<<SYS_GPC_MFPL_PC2MFP_Pos)
 #define SYS_GPC_MFPL_PC2MFP_CCAP_DATA2        (0x0DUL<<SYS_GPC_MFPL_PC2MFP_Pos)
 #define SYS_GPC_MFPL_PC2MFP_QSPI1_MOSI0       (0x0EUL<<SYS_GPC_MFPL_PC2MFP_Pos)
 #define SYS_GPC_MFPL_PC3MFP_GPIO              (0x00UL<<SYS_GPC_MFPL_PC3MFP_Pos)
 #define SYS_GPC_MFPL_PC3MFP_EBI_AD3           (0x02UL<<SYS_GPC_MFPL_PC3MFP_Pos)
 #define SYS_GPC_MFPL_PC3MFP_SPIM_SS           (0x03UL<<SYS_GPC_MFPL_PC3MFP_Pos)
 #define SYS_GPC_MFPL_PC3MFP_QSPI0_SS          (0x04UL<<SYS_GPC_MFPL_PC3MFP_Pos)
 #define SYS_GPC_MFPL_PC3MFP_SC1_PWR           (0x05UL<<SYS_GPC_MFPL_PC3MFP_Pos)
 #define SYS_GPC_MFPL_PC3MFP_I2S0_MCLK         (0x06UL<<SYS_GPC_MFPL_PC3MFP_Pos)
 #define SYS_GPC_MFPL_PC3MFP_SPI1_MISO         (0x07UL<<SYS_GPC_MFPL_PC3MFP_Pos)
 #define SYS_GPC_MFPL_PC3MFP_UART2_nRTS        (0x08UL<<SYS_GPC_MFPL_PC3MFP_Pos)
 #define SYS_GPC_MFPL_PC3MFP_I2C0_SMBAL        (0x09UL<<SYS_GPC_MFPL_PC3MFP_Pos)
 #define SYS_GPC_MFPL_PC3MFP_CAN1_TXD          (0x0AUL<<SYS_GPC_MFPL_PC3MFP_Pos)
 #define SYS_GPC_MFPL_PC3MFP_UART3_TXD         (0x0BUL<<SYS_GPC_MFPL_PC3MFP_Pos)
 #define SYS_GPC_MFPL_PC3MFP_EPWM1_CH2         (0x0CUL<<SYS_GPC_MFPL_PC3MFP_Pos)
 #define SYS_GPC_MFPL_PC3MFP_CCAP_DATA3        (0x0DUL<<SYS_GPC_MFPL_PC3MFP_Pos)
 #define SYS_GPC_MFPL_PC3MFP_QSPI1_MISO0       (0x0EUL<<SYS_GPC_MFPL_PC3MFP_Pos)
 #define SYS_GPC_MFPL_PC4MFP_GPIO              (0x00UL<<SYS_GPC_MFPL_PC4MFP_Pos)
 #define SYS_GPC_MFPL_PC4MFP_EBI_AD4           (0x02UL<<SYS_GPC_MFPL_PC4MFP_Pos)
 #define SYS_GPC_MFPL_PC4MFP_SPIM_D3           (0x03UL<<SYS_GPC_MFPL_PC4MFP_Pos)
 #define SYS_GPC_MFPL_PC4MFP_QSPI0_MOSI1       (0x04UL<<SYS_GPC_MFPL_PC4MFP_Pos)
 #define SYS_GPC_MFPL_PC4MFP_SC1_nCD           (0x05UL<<SYS_GPC_MFPL_PC4MFP_Pos)
 #define SYS_GPC_MFPL_PC4MFP_I2S0_BCLK         (0x06UL<<SYS_GPC_MFPL_PC4MFP_Pos)
 #define SYS_GPC_MFPL_PC4MFP_SPI1_I2SMCLK      (0x07UL<<SYS_GPC_MFPL_PC4MFP_Pos)
 #define SYS_GPC_MFPL_PC4MFP_UART2_RXD         (0x08UL<<SYS_GPC_MFPL_PC4MFP_Pos)
 #define SYS_GPC_MFPL_PC4MFP_I2C1_SDA          (0x09UL<<SYS_GPC_MFPL_PC4MFP_Pos)
 #define SYS_GPC_MFPL_PC4MFP_CAN0_RXD          (0x0AUL<<SYS_GPC_MFPL_PC4MFP_Pos)
 #define SYS_GPC_MFPL_PC4MFP_UART4_RXD         (0x0BUL<<SYS_GPC_MFPL_PC4MFP_Pos)
 #define SYS_GPC_MFPL_PC4MFP_EPWM1_CH1         (0x0CUL<<SYS_GPC_MFPL_PC4MFP_Pos)
 #define SYS_GPC_MFPL_PC4MFP_CCAP_DATA4        (0x0DUL<<SYS_GPC_MFPL_PC4MFP_Pos)
 #define SYS_GPC_MFPL_PC4MFP_QSPI1_CLK         (0x0EUL<<SYS_GPC_MFPL_PC4MFP_Pos)
 #define SYS_GPC_MFPL_PC5MFP_GPIO              (0x00UL<<SYS_GPC_MFPL_PC5MFP_Pos)
 #define SYS_GPC_MFPL_PC5MFP_EBI_AD5           (0x02UL<<SYS_GPC_MFPL_PC5MFP_Pos)
 #define SYS_GPC_MFPL_PC5MFP_SPIM_D2           (0x03UL<<SYS_GPC_MFPL_PC5MFP_Pos)
 #define SYS_GPC_MFPL_PC5MFP_QSPI0_MISO1       (0x04UL<<SYS_GPC_MFPL_PC5MFP_Pos)
 #define SYS_GPC_MFPL_PC5MFP_UART2_TXD         (0x08UL<<SYS_GPC_MFPL_PC5MFP_Pos)
 #define SYS_GPC_MFPL_PC5MFP_I2C1_SCL          (0x09UL<<SYS_GPC_MFPL_PC5MFP_Pos)
 #define SYS_GPC_MFPL_PC5MFP_CAN0_TXD          (0x0AUL<<SYS_GPC_MFPL_PC5MFP_Pos)
 #define SYS_GPC_MFPL_PC5MFP_UART4_TXD         (0x0BUL<<SYS_GPC_MFPL_PC5MFP_Pos)
 #define SYS_GPC_MFPL_PC5MFP_EPWM1_CH0         (0x0CUL<<SYS_GPC_MFPL_PC5MFP_Pos)
 #define SYS_GPC_MFPL_PC5MFP_CCAP_DATA5        (0x0DUL<<SYS_GPC_MFPL_PC5MFP_Pos)
 #define SYS_GPC_MFPL_PC5MFP_QSPI1_SS          (0x0EUL<<SYS_GPC_MFPL_PC5MFP_Pos)
 #define SYS_GPC_MFPL_PC6MFP_GPIO              (0x00UL<<SYS_GPC_MFPL_PC6MFP_Pos)
 #define SYS_GPC_MFPL_PC6MFP_EBI_AD8           (0x02UL<<SYS_GPC_MFPL_PC6MFP_Pos)
 #define SYS_GPC_MFPL_PC6MFP_EMAC_RMII_RXD1    (0x03UL<<SYS_GPC_MFPL_PC6MFP_Pos)
 #define SYS_GPC_MFPL_PC6MFP_SPI1_MOSI         (0x04UL<<SYS_GPC_MFPL_PC6MFP_Pos)
 #define SYS_GPC_MFPL_PC6MFP_UART4_RXD         (0x05UL<<SYS_GPC_MFPL_PC6MFP_Pos)
 #define SYS_GPC_MFPL_PC6MFP_SC2_RST           (0x06UL<<SYS_GPC_MFPL_PC6MFP_Pos)
 #define SYS_GPC_MFPL_PC6MFP_UART0_nRTS        (0x07UL<<SYS_GPC_MFPL_PC6MFP_Pos)
 #define SYS_GPC_MFPL_PC6MFP_I2C1_SMBSUS       (0x08UL<<SYS_GPC_MFPL_PC6MFP_Pos)
 #define SYS_GPC_MFPL_PC6MFP_UART6_RXD         (0x09UL<<SYS_GPC_MFPL_PC6MFP_Pos)
 #define SYS_GPC_MFPL_PC6MFP_EPWM1_CH3         (0x0BUL<<SYS_GPC_MFPL_PC6MFP_Pos)
 #define SYS_GPC_MFPL_PC6MFP_BPWM1_CH1         (0x0CUL<<SYS_GPC_MFPL_PC6MFP_Pos)
 #define SYS_GPC_MFPL_PC6MFP_TM1               (0x0EUL<<SYS_GPC_MFPL_PC6MFP_Pos)
 #define SYS_GPC_MFPL_PC6MFP_INT2              (0x0FUL<<SYS_GPC_MFPL_PC6MFP_Pos)
 #define SYS_GPC_MFPL_PC7MFP_GPIO              (0x00UL<<SYS_GPC_MFPL_PC7MFP_Pos)
 #define SYS_GPC_MFPL_PC7MFP_EBI_AD9           (0x02UL<<SYS_GPC_MFPL_PC7MFP_Pos)
 #define SYS_GPC_MFPL_PC7MFP_EMAC_RMII_RXD0    (0x03UL<<SYS_GPC_MFPL_PC7MFP_Pos)
 #define SYS_GPC_MFPL_PC7MFP_SPI1_MISO         (0x04UL<<SYS_GPC_MFPL_PC7MFP_Pos)
 #define SYS_GPC_MFPL_PC7MFP_UART4_TXD         (0x05UL<<SYS_GPC_MFPL_PC7MFP_Pos)
 #define SYS_GPC_MFPL_PC7MFP_SC2_PWR           (0x06UL<<SYS_GPC_MFPL_PC7MFP_Pos)
 #define SYS_GPC_MFPL_PC7MFP_UART0_nCTS        (0x07UL<<SYS_GPC_MFPL_PC7MFP_Pos)
 #define SYS_GPC_MFPL_PC7MFP_I2C1_SMBAL        (0x08UL<<SYS_GPC_MFPL_PC7MFP_Pos)
 #define SYS_GPC_MFPL_PC7MFP_UART6_TXD         (0x09UL<<SYS_GPC_MFPL_PC7MFP_Pos)
 #define SYS_GPC_MFPL_PC7MFP_EPWM1_CH2         (0x0BUL<<SYS_GPC_MFPL_PC7MFP_Pos)
 #define SYS_GPC_MFPL_PC7MFP_BPWM1_CH0         (0x0CUL<<SYS_GPC_MFPL_PC7MFP_Pos)
 #define SYS_GPC_MFPL_PC7MFP_TM0               (0x0EUL<<SYS_GPC_MFPL_PC7MFP_Pos)
 #define SYS_GPC_MFPL_PC7MFP_INT3              (0x0FUL<<SYS_GPC_MFPL_PC7MFP_Pos)
 /********************* Bit definition of GPC_MFPH register **********************/
 #define SYS_GPC_MFPH_PC8MFP_GPIO              (0x00UL<<SYS_GPC_MFPH_PC8MFP_Pos)
 #define SYS_GPC_MFPH_PC8MFP_EBI_ADR16         (0x02UL<<SYS_GPC_MFPH_PC8MFP_Pos)
 #define SYS_GPC_MFPH_PC8MFP_EMAC_RMII_REFCLK  (0x03UL<<SYS_GPC_MFPH_PC8MFP_Pos)
 #define SYS_GPC_MFPH_PC8MFP_I2C0_SDA          (0x04UL<<SYS_GPC_MFPH_PC8MFP_Pos)
 #define SYS_GPC_MFPH_PC8MFP_UART4_nCTS        (0x05UL<<SYS_GPC_MFPH_PC8MFP_Pos)
 #define SYS_GPC_MFPH_PC8MFP_UART1_RXD         (0x08UL<<SYS_GPC_MFPH_PC8MFP_Pos)
 #define SYS_GPC_MFPH_PC8MFP_EPWM1_CH1         (0x0BUL<<SYS_GPC_MFPH_PC8MFP_Pos)
 #define SYS_GPC_MFPH_PC8MFP_BPWM1_CH4         (0x0CUL<<SYS_GPC_MFPH_PC8MFP_Pos)
 #define SYS_GPC_MFPH_PC9MFP_GPIO              (0x00UL<<SYS_GPC_MFPH_PC9MFP_Pos)
 #define SYS_GPC_MFPH_PC9MFP_EBI_ADR7          (0x02UL<<SYS_GPC_MFPH_PC9MFP_Pos)
 #define SYS_GPC_MFPH_PC9MFP_UART6_nCTS        (0x05UL<<SYS_GPC_MFPH_PC9MFP_Pos)
 #define SYS_GPC_MFPH_PC9MFP_SPI3_SS           (0x06UL<<SYS_GPC_MFPH_PC9MFP_Pos)
 #define SYS_GPC_MFPH_PC9MFP_UART3_RXD         (0x07UL<<SYS_GPC_MFPH_PC9MFP_Pos)
 #define SYS_GPC_MFPH_PC9MFP_CAN1_RXD          (0x09UL<<SYS_GPC_MFPH_PC9MFP_Pos)
 #define SYS_GPC_MFPH_PC9MFP_EPWM1_CH3         (0x0CUL<<SYS_GPC_MFPH_PC9MFP_Pos)
 #define SYS_GPC_MFPH_PC9MFP_EADC1_ST          (0x0EUL<<SYS_GPC_MFPH_PC9MFP_Pos)
 #define SYS_GPC_MFPH_PC10MFP_GPIO             (0x00UL<<SYS_GPC_MFPH_PC10MFP_Pos)
 #define SYS_GPC_MFPH_PC10MFP_EBI_ADR6         (0x02UL<<SYS_GPC_MFPH_PC10MFP_Pos)
 #define SYS_GPC_MFPH_PC10MFP_UART6_nRTS       (0x05UL<<SYS_GPC_MFPH_PC10MFP_Pos)
 #define SYS_GPC_MFPH_PC10MFP_SPI3_CLK         (0x06UL<<SYS_GPC_MFPH_PC10MFP_Pos)
 #define SYS_GPC_MFPH_PC10MFP_UART3_TXD        (0x07UL<<SYS_GPC_MFPH_PC10MFP_Pos)
 #define SYS_GPC_MFPH_PC10MFP_CAN1_TXD         (0x09UL<<SYS_GPC_MFPH_PC10MFP_Pos)
 #define SYS_GPC_MFPH_PC10MFP_ECAP1_IC0        (0x0BUL<<SYS_GPC_MFPH_PC10MFP_Pos)
 #define SYS_GPC_MFPH_PC10MFP_EPWM1_CH2        (0x0CUL<<SYS_GPC_MFPH_PC10MFP_Pos)
 #define SYS_GPC_MFPH_PC10MFP_EADC1_ST         (0x0EUL<<SYS_GPC_MFPH_PC10MFP_Pos)
 #define SYS_GPC_MFPH_PC11MFP_GPIO             (0x00UL<<SYS_GPC_MFPH_PC11MFP_Pos)
 #define SYS_GPC_MFPH_PC11MFP_EBI_ADR5         (0x02UL<<SYS_GPC_MFPH_PC11MFP_Pos)
 #define SYS_GPC_MFPH_PC11MFP_UART0_RXD        (0x03UL<<SYS_GPC_MFPH_PC11MFP_Pos)
 #define SYS_GPC_MFPH_PC11MFP_I2C0_SDA         (0x04UL<<SYS_GPC_MFPH_PC11MFP_Pos)
 #define SYS_GPC_MFPH_PC11MFP_UART6_RXD        (0x05UL<<SYS_GPC_MFPH_PC11MFP_Pos)
 #define SYS_GPC_MFPH_PC11MFP_SPI3_MOSI        (0x06UL<<SYS_GPC_MFPH_PC11MFP_Pos)
 #define SYS_GPC_MFPH_PC11MFP_ECAP1_IC1        (0x0BUL<<SYS_GPC_MFPH_PC11MFP_Pos)
 #define SYS_GPC_MFPH_PC11MFP_EPWM1_CH1        (0x0CUL<<SYS_GPC_MFPH_PC11MFP_Pos)
 #define SYS_GPC_MFPH_PC11MFP_ACMP1_O          (0x0EUL<<SYS_GPC_MFPH_PC11MFP_Pos)
 #define SYS_GPC_MFPH_PC12MFP_GPIO             (0x00UL<<SYS_GPC_MFPH_PC12MFP_Pos)
 #define SYS_GPC_MFPH_PC12MFP_EBI_ADR4         (0x02UL<<SYS_GPC_MFPH_PC12MFP_Pos)
 #define SYS_GPC_MFPH_PC12MFP_UART0_TXD        (0x03UL<<SYS_GPC_MFPH_PC12MFP_Pos)
 #define SYS_GPC_MFPH_PC12MFP_I2C0_SCL         (0x04UL<<SYS_GPC_MFPH_PC12MFP_Pos)
 #define SYS_GPC_MFPH_PC12MFP_UART6_TXD        (0x05UL<<SYS_GPC_MFPH_PC12MFP_Pos)
 #define SYS_GPC_MFPH_PC12MFP_SPI3_MISO        (0x06UL<<SYS_GPC_MFPH_PC12MFP_Pos)
 #define SYS_GPC_MFPH_PC12MFP_SC0_nCD          (0x09UL<<SYS_GPC_MFPH_PC12MFP_Pos)
 #define SYS_GPC_MFPH_PC12MFP_ECAP1_IC2        (0x0BUL<<SYS_GPC_MFPH_PC12MFP_Pos)
 #define SYS_GPC_MFPH_PC12MFP_EPWM1_CH0        (0x0CUL<<SYS_GPC_MFPH_PC12MFP_Pos)
 #define SYS_GPC_MFPH_PC12MFP_ACMP0_O          (0x0EUL<<SYS_GPC_MFPH_PC12MFP_Pos)
 #define SYS_GPC_MFPH_PC13MFP_GPIO             (0x00UL<<SYS_GPC_MFPH_PC13MFP_Pos)
 #define SYS_GPC_MFPH_PC13MFP_EADC1_CH3        (0x01UL<<SYS_GPC_MFPH_PC13MFP_Pos)
 #define SYS_GPC_MFPH_PC13MFP_EBI_ADR10        (0x02UL<<SYS_GPC_MFPH_PC13MFP_Pos)
 #define SYS_GPC_MFPH_PC13MFP_SC2_nCD          (0x03UL<<SYS_GPC_MFPH_PC13MFP_Pos)
 #define SYS_GPC_MFPH_PC13MFP_SPI2_I2SMCLK     (0x04UL<<SYS_GPC_MFPH_PC13MFP_Pos)
 #define SYS_GPC_MFPH_PC13MFP_CAN1_TXD         (0x05UL<<SYS_GPC_MFPH_PC13MFP_Pos)
 #define SYS_GPC_MFPH_PC13MFP_USCI0_CTL0       (0x06UL<<SYS_GPC_MFPH_PC13MFP_Pos)
 #define SYS_GPC_MFPH_PC13MFP_UART2_TXD        (0x07UL<<SYS_GPC_MFPH_PC13MFP_Pos)
 #define SYS_GPC_MFPH_PC13MFP_BPWM0_CH4        (0x09UL<<SYS_GPC_MFPH_PC13MFP_Pos)
 #define SYS_GPC_MFPH_PC13MFP_CLKO             (0x0DUL<<SYS_GPC_MFPH_PC13MFP_Pos)
 #define SYS_GPC_MFPH_PC13MFP_EADC0_ST         (0x0EUL<<SYS_GPC_MFPH_PC13MFP_Pos)
 #define SYS_GPC_MFPH_PC14MFP_GPIO             (0x00UL<<SYS_GPC_MFPH_PC14MFP_Pos)
 #define SYS_GPC_MFPH_PC14MFP_EBI_AD11         (0x02UL<<SYS_GPC_MFPH_PC14MFP_Pos)
 #define SYS_GPC_MFPH_PC14MFP_SC1_nCD          (0x03UL<<SYS_GPC_MFPH_PC14MFP_Pos)
 #define SYS_GPC_MFPH_PC14MFP_SPI0_I2SMCLK     (0x04UL<<SYS_GPC_MFPH_PC14MFP_Pos)
 #define SYS_GPC_MFPH_PC14MFP_USCI0_CTL0       (0x05UL<<SYS_GPC_MFPH_PC14MFP_Pos)
 #define SYS_GPC_MFPH_PC14MFP_QSPI0_CLK        (0x06UL<<SYS_GPC_MFPH_PC14MFP_Pos)
 #define SYS_GPC_MFPH_PC14MFP_EPWM0_SYNC_IN    (0x0BUL<<SYS_GPC_MFPH_PC14MFP_Pos)
 #define SYS_GPC_MFPH_PC14MFP_ETM_TRACE_CLK    (0x0CUL<<SYS_GPC_MFPH_PC14MFP_Pos)
 #define SYS_GPC_MFPH_PC14MFP_TM1              (0x0DUL<<SYS_GPC_MFPH_PC14MFP_Pos)
 #define SYS_GPC_MFPH_PC14MFP_USB_VBUS_ST      (0x0EUL<<SYS_GPC_MFPH_PC14MFP_Pos)
 #define SYS_GPC_MFPH_PC14MFP_HSUSB_VBUS_ST    (0x0FUL<<SYS_GPC_MFPH_PC14MFP_Pos)
 /********************* Bit definition of GPD_MFPL register **********************/
 #define SYS_GPD_MFPL_PD0MFP_GPIO              (0x00UL<<SYS_GPD_MFPL_PD0MFP_Pos)
 #define SYS_GPD_MFPL_PD0MFP_EBI_AD13          (0x02UL<<SYS_GPD_MFPL_PD0MFP_Pos)
 #define SYS_GPD_MFPL_PD0MFP_USCI0_CLK         (0x03UL<<SYS_GPD_MFPL_PD0MFP_Pos)
 #define SYS_GPD_MFPL_PD0MFP_SPI0_MOSI         (0x04UL<<SYS_GPD_MFPL_PD0MFP_Pos)
 #define SYS_GPD_MFPL_PD0MFP_UART3_RXD         (0x05UL<<SYS_GPD_MFPL_PD0MFP_Pos)
 #define SYS_GPD_MFPL_PD0MFP_I2C2_SDA          (0x06UL<<SYS_GPD_MFPL_PD0MFP_Pos)
 #define SYS_GPD_MFPL_PD0MFP_SC2_CLK           (0x07UL<<SYS_GPD_MFPL_PD0MFP_Pos)
 #define SYS_GPD_MFPL_PD0MFP_TM2               (0x0EUL<<SYS_GPD_MFPL_PD0MFP_Pos)
 #define SYS_GPD_MFPL_PD1MFP_GPIO              (0x00UL<<SYS_GPD_MFPL_PD1MFP_Pos)
 #define SYS_GPD_MFPL_PD1MFP_EBI_AD12          (0x02UL<<SYS_GPD_MFPL_PD1MFP_Pos)
 #define SYS_GPD_MFPL_PD1MFP_USCI0_DAT0        (0x03UL<<SYS_GPD_MFPL_PD1MFP_Pos)
 #define SYS_GPD_MFPL_PD1MFP_SPI0_MISO         (0x04UL<<SYS_GPD_MFPL_PD1MFP_Pos)
 #define SYS_GPD_MFPL_PD1MFP_UART3_TXD         (0x05UL<<SYS_GPD_MFPL_PD1MFP_Pos)
 #define SYS_GPD_MFPL_PD1MFP_I2C2_SCL          (0x06UL<<SYS_GPD_MFPL_PD1MFP_Pos)
 #define SYS_GPD_MFPL_PD1MFP_SC2_DAT           (0x07UL<<SYS_GPD_MFPL_PD1MFP_Pos)
 #define SYS_GPD_MFPL_PD2MFP_GPIO              (0x00UL<<SYS_GPD_MFPL_PD2MFP_Pos)
 #define SYS_GPD_MFPL_PD2MFP_EBI_AD11          (0x02UL<<SYS_GPD_MFPL_PD2MFP_Pos)
 #define SYS_GPD_MFPL_PD2MFP_USCI0_DAT1        (0x03UL<<SYS_GPD_MFPL_PD2MFP_Pos)
 #define SYS_GPD_MFPL_PD2MFP_SPI0_CLK          (0x04UL<<SYS_GPD_MFPL_PD2MFP_Pos)
 #define SYS_GPD_MFPL_PD2MFP_UART3_nCTS        (0x05UL<<SYS_GPD_MFPL_PD2MFP_Pos)
 #define SYS_GPD_MFPL_PD2MFP_SC2_RST           (0x07UL<<SYS_GPD_MFPL_PD2MFP_Pos)
 #define SYS_GPD_MFPL_PD2MFP_UART0_RXD         (0x09UL<<SYS_GPD_MFPL_PD2MFP_Pos)
 #define SYS_GPD_MFPL_PD3MFP_GPIO              (0x00UL<<SYS_GPD_MFPL_PD3MFP_Pos)
 #define SYS_GPD_MFPL_PD3MFP_EBI_AD10          (0x02UL<<SYS_GPD_MFPL_PD3MFP_Pos)
 #define SYS_GPD_MFPL_PD3MFP_USCI0_CTL1        (0x03UL<<SYS_GPD_MFPL_PD3MFP_Pos)
 #define SYS_GPD_MFPL_PD3MFP_SPI0_SS           (0x04UL<<SYS_GPD_MFPL_PD3MFP_Pos)
 #define SYS_GPD_MFPL_PD3MFP_UART3_nRTS        (0x05UL<<SYS_GPD_MFPL_PD3MFP_Pos)
 #define SYS_GPD_MFPL_PD3MFP_USCI1_CTL0        (0x06UL<<SYS_GPD_MFPL_PD3MFP_Pos)
 #define SYS_GPD_MFPL_PD3MFP_SC2_PWR           (0x07UL<<SYS_GPD_MFPL_PD3MFP_Pos)
 #define SYS_GPD_MFPL_PD3MFP_SC1_nCD           (0x08UL<<SYS_GPD_MFPL_PD3MFP_Pos)
 #define SYS_GPD_MFPL_PD3MFP_UART0_TXD         (0x09UL<<SYS_GPD_MFPL_PD3MFP_Pos)
 #define SYS_GPD_MFPL_PD4MFP_GPIO              (0x00UL<<SYS_GPD_MFPL_PD4MFP_Pos)
 #define SYS_GPD_MFPL_PD4MFP_USCI0_CTL0        (0x03UL<<SYS_GPD_MFPL_PD4MFP_Pos)
 #define SYS_GPD_MFPL_PD4MFP_I2C1_SDA          (0x04UL<<SYS_GPD_MFPL_PD4MFP_Pos)
 #define SYS_GPD_MFPL_PD4MFP_SPI1_SS           (0x05UL<<SYS_GPD_MFPL_PD4MFP_Pos)
 #define SYS_GPD_MFPL_PD4MFP_USCI1_CTL1        (0x06UL<<SYS_GPD_MFPL_PD4MFP_Pos)
 #define SYS_GPD_MFPL_PD4MFP_SC1_CLK           (0x08UL<<SYS_GPD_MFPL_PD4MFP_Pos)
 #define SYS_GPD_MFPL_PD4MFP_USB_VBUS_ST       (0x0EUL<<SYS_GPD_MFPL_PD4MFP_Pos)
 #define SYS_GPD_MFPL_PD5MFP_GPIO              (0x00UL<<SYS_GPD_MFPL_PD5MFP_Pos)
 #define SYS_GPD_MFPL_PD5MFP_I2C1_SCL          (0x04UL<<SYS_GPD_MFPL_PD5MFP_Pos)
 #define SYS_GPD_MFPL_PD5MFP_SPI1_CLK          (0x05UL<<SYS_GPD_MFPL_PD5MFP_Pos)
 #define SYS_GPD_MFPL_PD5MFP_USCI1_DAT0        (0x06UL<<SYS_GPD_MFPL_PD5MFP_Pos)
 #define SYS_GPD_MFPL_PD5MFP_SC1_DAT           (0x08UL<<SYS_GPD_MFPL_PD5MFP_Pos)
 #define SYS_GPD_MFPL_PD6MFP_GPIO              (0x00UL<<SYS_GPD_MFPL_PD6MFP_Pos)
 #define SYS_GPD_MFPL_PD6MFP_UART1_RXD         (0x03UL<<SYS_GPD_MFPL_PD6MFP_Pos)
 #define SYS_GPD_MFPL_PD6MFP_I2C0_SDA          (0x04UL<<SYS_GPD_MFPL_PD6MFP_Pos)
 #define SYS_GPD_MFPL_PD6MFP_SPI1_MOSI         (0x05UL<<SYS_GPD_MFPL_PD6MFP_Pos)
 #define SYS_GPD_MFPL_PD6MFP_USCI1_DAT1        (0x06UL<<SYS_GPD_MFPL_PD6MFP_Pos)
 #define SYS_GPD_MFPL_PD6MFP_SC1_RST           (0x08UL<<SYS_GPD_MFPL_PD6MFP_Pos)
 #define SYS_GPD_MFPL_PD7MFP_GPIO              (0x00UL<<SYS_GPD_MFPL_PD7MFP_Pos)
 #define SYS_GPD_MFPL_PD7MFP_UART1_TXD         (0x03UL<<SYS_GPD_MFPL_PD7MFP_Pos)
 #define SYS_GPD_MFPL_PD7MFP_I2C0_SCL          (0x04UL<<SYS_GPD_MFPL_PD7MFP_Pos)
 #define SYS_GPD_MFPL_PD7MFP_SPI1_MISO         (0x05UL<<SYS_GPD_MFPL_PD7MFP_Pos)
 #define SYS_GPD_MFPL_PD7MFP_USCI1_CLK         (0x06UL<<SYS_GPD_MFPL_PD7MFP_Pos)
 #define SYS_GPD_MFPL_PD7MFP_SC1_PWR           (0x08UL<<SYS_GPD_MFPL_PD7MFP_Pos)
 /********************* Bit definition of GPD_MFPH register **********************/
 #define SYS_GPD_MFPH_PD8MFP_GPIO              (0x00UL<<SYS_GPD_MFPH_PD8MFP_Pos)
 #define SYS_GPD_MFPH_PD8MFP_EBI_AD6           (0x02UL<<SYS_GPD_MFPH_PD8MFP_Pos)
 #define SYS_GPD_MFPH_PD8MFP_I2C2_SDA          (0x03UL<<SYS_GPD_MFPH_PD8MFP_Pos)
 #define SYS_GPD_MFPH_PD8MFP_UART2_nRTS        (0x04UL<<SYS_GPD_MFPH_PD8MFP_Pos)
 #define SYS_GPD_MFPH_PD8MFP_UART7_RXD         (0x05UL<<SYS_GPD_MFPH_PD8MFP_Pos)
 #define SYS_GPD_MFPH_PD8MFP_CAN2_RXD          (0x06UL<<SYS_GPD_MFPH_PD8MFP_Pos)
 #define SYS_GPD_MFPH_PD9MFP_GPIO              (0x00UL<<SYS_GPD_MFPH_PD9MFP_Pos)
 #define SYS_GPD_MFPH_PD9MFP_EBI_AD7           (0x02UL<<SYS_GPD_MFPH_PD9MFP_Pos)
 #define SYS_GPD_MFPH_PD9MFP_I2C2_SCL          (0x03UL<<SYS_GPD_MFPH_PD9MFP_Pos)
 #define SYS_GPD_MFPH_PD9MFP_UART2_nCTS        (0x04UL<<SYS_GPD_MFPH_PD9MFP_Pos)
 #define SYS_GPD_MFPH_PD9MFP_UART7_TXD         (0x05UL<<SYS_GPD_MFPH_PD9MFP_Pos)
 #define SYS_GPD_MFPH_PD9MFP_CAN2_TXD          (0x06UL<<SYS_GPD_MFPH_PD9MFP_Pos)
 #define SYS_GPD_MFPH_PD10MFP_GPIO             (0x00UL<<SYS_GPD_MFPH_PD10MFP_Pos)
 #define SYS_GPD_MFPH_PD10MFP_OPA2_P           (0x01UL<<SYS_GPD_MFPH_PD10MFP_Pos)
 #define SYS_GPD_MFPH_PD10MFP_EADC1_CH0        (0x01UL<<SYS_GPD_MFPH_PD10MFP_Pos)
 #define SYS_GPD_MFPH_PD10MFP_EBI_nCS2         (0x02UL<<SYS_GPD_MFPH_PD10MFP_Pos)
 #define SYS_GPD_MFPH_PD10MFP_UART1_RXD        (0x03UL<<SYS_GPD_MFPH_PD10MFP_Pos)
 #define SYS_GPD_MFPH_PD10MFP_CAN0_RXD         (0x04UL<<SYS_GPD_MFPH_PD10MFP_Pos)
 #define SYS_GPD_MFPH_PD10MFP_QEI0_B           (0x0AUL<<SYS_GPD_MFPH_PD10MFP_Pos)
 #define SYS_GPD_MFPH_PD10MFP_INT7             (0x0FUL<<SYS_GPD_MFPH_PD10MFP_Pos)
 #define SYS_GPD_MFPH_PD11MFP_GPIO             (0x00UL<<SYS_GPD_MFPH_PD11MFP_Pos)
 #define SYS_GPD_MFPH_PD11MFP_EADC1_CH1        (0x01UL<<SYS_GPD_MFPH_PD11MFP_Pos)
 #define SYS_GPD_MFPH_PD11MFP_OPA2_N           (0x01UL<<SYS_GPD_MFPH_PD11MFP_Pos)
 #define SYS_GPD_MFPH_PD11MFP_EBI_nCS1         (0x02UL<<SYS_GPD_MFPH_PD11MFP_Pos)
 #define SYS_GPD_MFPH_PD11MFP_UART1_TXD        (0x03UL<<SYS_GPD_MFPH_PD11MFP_Pos)
 #define SYS_GPD_MFPH_PD11MFP_CAN0_TXD         (0x04UL<<SYS_GPD_MFPH_PD11MFP_Pos)
 #define SYS_GPD_MFPH_PD11MFP_QEI0_A           (0x0AUL<<SYS_GPD_MFPH_PD11MFP_Pos)
 #define SYS_GPD_MFPH_PD11MFP_INT6             (0x0FUL<<SYS_GPD_MFPH_PD11MFP_Pos)
 #define SYS_GPD_MFPH_PD12MFP_GPIO             (0x00UL<<SYS_GPD_MFPH_PD12MFP_Pos)
 #define SYS_GPD_MFPH_PD12MFP_OPA2_O           (0x01UL<<SYS_GPD_MFPH_PD12MFP_Pos)
 #define SYS_GPD_MFPH_PD12MFP_EADC1_CH2        (0x01UL<<SYS_GPD_MFPH_PD12MFP_Pos)
 #define SYS_GPD_MFPH_PD12MFP_EBI_nCS0         (0x02UL<<SYS_GPD_MFPH_PD12MFP_Pos)
 #define SYS_GPD_MFPH_PD12MFP_CAN1_RXD         (0x05UL<<SYS_GPD_MFPH_PD12MFP_Pos)
 #define SYS_GPD_MFPH_PD12MFP_UART2_RXD        (0x07UL<<SYS_GPD_MFPH_PD12MFP_Pos)
 #define SYS_GPD_MFPH_PD12MFP_BPWM0_CH5        (0x09UL<<SYS_GPD_MFPH_PD12MFP_Pos)
 #define SYS_GPD_MFPH_PD12MFP_QEI0_INDEX       (0x0AUL<<SYS_GPD_MFPH_PD12MFP_Pos)
 #define SYS_GPD_MFPH_PD12MFP_CLKO             (0x0DUL<<SYS_GPD_MFPH_PD12MFP_Pos)
 #define SYS_GPD_MFPH_PD12MFP_EADC0_ST         (0x0EUL<<SYS_GPD_MFPH_PD12MFP_Pos)
 #define SYS_GPD_MFPH_PD12MFP_INT5             (0x0FUL<<SYS_GPD_MFPH_PD12MFP_Pos)
 #define SYS_GPD_MFPH_PD13MFP_GPIO             (0x00UL<<SYS_GPD_MFPH_PD13MFP_Pos)
 #define SYS_GPD_MFPH_PD13MFP_EBI_AD10         (0x02UL<<SYS_GPD_MFPH_PD13MFP_Pos)
 #define SYS_GPD_MFPH_PD13MFP_SD0_nCD          (0x03UL<<SYS_GPD_MFPH_PD13MFP_Pos)
 #define SYS_GPD_MFPH_PD13MFP_SPI0_I2SMCLK     (0x04UL<<SYS_GPD_MFPH_PD13MFP_Pos)
 #define SYS_GPD_MFPH_PD13MFP_SPI1_I2SMCLK     (0x05UL<<SYS_GPD_MFPH_PD13MFP_Pos)
 #define SYS_GPD_MFPH_PD13MFP_SC2_nCD          (0x07UL<<SYS_GPD_MFPH_PD13MFP_Pos)
 #define SYS_GPD_MFPH_PD14MFP_GPIO             (0x00UL<<SYS_GPD_MFPH_PD14MFP_Pos)
 #define SYS_GPD_MFPH_PD14MFP_EBI_nCS0         (0x02UL<<SYS_GPD_MFPH_PD14MFP_Pos)
 #define SYS_GPD_MFPH_PD14MFP_SPI3_I2SMCLK     (0x03UL<<SYS_GPD_MFPH_PD14MFP_Pos)
 #define SYS_GPD_MFPH_PD14MFP_SC1_nCD          (0x04UL<<SYS_GPD_MFPH_PD14MFP_Pos)
 #define SYS_GPD_MFPH_PD14MFP_SPI0_I2SMCLK     (0x05UL<<SYS_GPD_MFPH_PD14MFP_Pos)
 #define SYS_GPD_MFPH_PD14MFP_EPWM0_CH4        (0x0BUL<<SYS_GPD_MFPH_PD14MFP_Pos)
 /********************* Bit definition of GPE_MFPL register **********************/
 #define SYS_GPE_MFPL_PE0MFP_GPIO              (0x00UL<<SYS_GPE_MFPL_PE0MFP_Pos)
 #define SYS_GPE_MFPL_PE0MFP_EBI_AD11          (0x02UL<<SYS_GPE_MFPL_PE0MFP_Pos)
 #define SYS_GPE_MFPL_PE0MFP_QSPI0_MOSI0       (0x03UL<<SYS_GPE_MFPL_PE0MFP_Pos)
 #define SYS_GPE_MFPL_PE0MFP_SC2_CLK           (0x04UL<<SYS_GPE_MFPL_PE0MFP_Pos)
 #define SYS_GPE_MFPL_PE0MFP_I2S0_MCLK         (0x05UL<<SYS_GPE_MFPL_PE0MFP_Pos)
 #define SYS_GPE_MFPL_PE0MFP_SPI1_MOSI         (0x06UL<<SYS_GPE_MFPL_PE0MFP_Pos)
 #define SYS_GPE_MFPL_PE0MFP_UART3_RXD         (0x07UL<<SYS_GPE_MFPL_PE0MFP_Pos)
 #define SYS_GPE_MFPL_PE0MFP_I2C1_SDA          (0x08UL<<SYS_GPE_MFPL_PE0MFP_Pos)
 #define SYS_GPE_MFPL_PE0MFP_UART4_nRTS        (0x09UL<<SYS_GPE_MFPL_PE0MFP_Pos)
 #define SYS_GPE_MFPL_PE1MFP_GPIO              (0x00UL<<SYS_GPE_MFPL_PE1MFP_Pos)
 #define SYS_GPE_MFPL_PE1MFP_EBI_AD10          (0x02UL<<SYS_GPE_MFPL_PE1MFP_Pos)
 #define SYS_GPE_MFPL_PE1MFP_QSPI0_MISO0       (0x03UL<<SYS_GPE_MFPL_PE1MFP_Pos)
 #define SYS_GPE_MFPL_PE1MFP_SC2_DAT           (0x04UL<<SYS_GPE_MFPL_PE1MFP_Pos)
 #define SYS_GPE_MFPL_PE1MFP_I2S0_BCLK         (0x05UL<<SYS_GPE_MFPL_PE1MFP_Pos)
 #define SYS_GPE_MFPL_PE1MFP_SPI1_MISO         (0x06UL<<SYS_GPE_MFPL_PE1MFP_Pos)
 #define SYS_GPE_MFPL_PE1MFP_UART3_TXD         (0x07UL<<SYS_GPE_MFPL_PE1MFP_Pos)
 #define SYS_GPE_MFPL_PE1MFP_I2C1_SCL          (0x08UL<<SYS_GPE_MFPL_PE1MFP_Pos)
 #define SYS_GPE_MFPL_PE1MFP_UART4_nCTS        (0x09UL<<SYS_GPE_MFPL_PE1MFP_Pos)
 #define SYS_GPE_MFPL_PE2MFP_GPIO              (0x00UL<<SYS_GPE_MFPL_PE2MFP_Pos)
 #define SYS_GPE_MFPL_PE2MFP_EBI_ALE           (0x02UL<<SYS_GPE_MFPL_PE2MFP_Pos)
 #define SYS_GPE_MFPL_PE2MFP_SD0_DAT0          (0x03UL<<SYS_GPE_MFPL_PE2MFP_Pos)
 #define SYS_GPE_MFPL_PE2MFP_SPIM_MOSI         (0x04UL<<SYS_GPE_MFPL_PE2MFP_Pos)
 #define SYS_GPE_MFPL_PE2MFP_SPI3_MOSI         (0x05UL<<SYS_GPE_MFPL_PE2MFP_Pos)
 #define SYS_GPE_MFPL_PE2MFP_SC0_CLK           (0x06UL<<SYS_GPE_MFPL_PE2MFP_Pos)
 #define SYS_GPE_MFPL_PE2MFP_USCI0_CLK         (0x07UL<<SYS_GPE_MFPL_PE2MFP_Pos)
 #define SYS_GPE_MFPL_PE2MFP_UART6_nCTS        (0x08UL<<SYS_GPE_MFPL_PE2MFP_Pos)
 #define SYS_GPE_MFPL_PE2MFP_UART7_RXD         (0x09UL<<SYS_GPE_MFPL_PE2MFP_Pos)
 #define SYS_GPE_MFPL_PE2MFP_QEI0_B            (0x0BUL<<SYS_GPE_MFPL_PE2MFP_Pos)
 #define SYS_GPE_MFPL_PE2MFP_EPWM0_CH5         (0x0CUL<<SYS_GPE_MFPL_PE2MFP_Pos)
 #define SYS_GPE_MFPL_PE2MFP_BPWM0_CH0         (0x0DUL<<SYS_GPE_MFPL_PE2MFP_Pos)
 #define SYS_GPE_MFPL_PE3MFP_GPIO              (0x00UL<<SYS_GPE_MFPL_PE3MFP_Pos)
 #define SYS_GPE_MFPL_PE3MFP_EBI_MCLK          (0x02UL<<SYS_GPE_MFPL_PE3MFP_Pos)
 #define SYS_GPE_MFPL_PE3MFP_SD0_DAT1          (0x03UL<<SYS_GPE_MFPL_PE3MFP_Pos)
 #define SYS_GPE_MFPL_PE3MFP_SPIM_MISO         (0x04UL<<SYS_GPE_MFPL_PE3MFP_Pos)
 #define SYS_GPE_MFPL_PE3MFP_SPI3_MISO         (0x05UL<<SYS_GPE_MFPL_PE3MFP_Pos)
 #define SYS_GPE_MFPL_PE3MFP_SC0_DAT           (0x06UL<<SYS_GPE_MFPL_PE3MFP_Pos)
 #define SYS_GPE_MFPL_PE3MFP_USCI0_DAT0        (0x07UL<<SYS_GPE_MFPL_PE3MFP_Pos)
 #define SYS_GPE_MFPL_PE3MFP_UART6_nRTS        (0x08UL<<SYS_GPE_MFPL_PE3MFP_Pos)
 #define SYS_GPE_MFPL_PE3MFP_UART7_TXD         (0x09UL<<SYS_GPE_MFPL_PE3MFP_Pos)
 #define SYS_GPE_MFPL_PE3MFP_QEI0_A            (0x0BUL<<SYS_GPE_MFPL_PE3MFP_Pos)
 #define SYS_GPE_MFPL_PE3MFP_EPWM0_CH4         (0x0CUL<<SYS_GPE_MFPL_PE3MFP_Pos)
 #define SYS_GPE_MFPL_PE3MFP_BPWM0_CH1         (0x0DUL<<SYS_GPE_MFPL_PE3MFP_Pos)
 #define SYS_GPE_MFPL_PE4MFP_GPIO              (0x00UL<<SYS_GPE_MFPL_PE4MFP_Pos)
 #define SYS_GPE_MFPL_PE4MFP_EBI_nWR           (0x02UL<<SYS_GPE_MFPL_PE4MFP_Pos)
 #define SYS_GPE_MFPL_PE4MFP_SD0_DAT2          (0x03UL<<SYS_GPE_MFPL_PE4MFP_Pos)
 #define SYS_GPE_MFPL_PE4MFP_SPIM_CLK          (0x04UL<<SYS_GPE_MFPL_PE4MFP_Pos)
 #define SYS_GPE_MFPL_PE4MFP_SPI3_CLK          (0x05UL<<SYS_GPE_MFPL_PE4MFP_Pos)
 #define SYS_GPE_MFPL_PE4MFP_SC0_RST           (0x06UL<<SYS_GPE_MFPL_PE4MFP_Pos)
 #define SYS_GPE_MFPL_PE4MFP_USCI0_DAT1        (0x07UL<<SYS_GPE_MFPL_PE4MFP_Pos)
 #define SYS_GPE_MFPL_PE4MFP_UART6_RXD         (0x08UL<<SYS_GPE_MFPL_PE4MFP_Pos)
 #define SYS_GPE_MFPL_PE4MFP_UART7_nCTS        (0x09UL<<SYS_GPE_MFPL_PE4MFP_Pos)
 #define SYS_GPE_MFPL_PE4MFP_QEI0_INDEX        (0x0BUL<<SYS_GPE_MFPL_PE4MFP_Pos)
 #define SYS_GPE_MFPL_PE4MFP_EPWM0_CH3         (0x0CUL<<SYS_GPE_MFPL_PE4MFP_Pos)
 #define SYS_GPE_MFPL_PE4MFP_BPWM0_CH2         (0x0DUL<<SYS_GPE_MFPL_PE4MFP_Pos)
 #define SYS_GPE_MFPL_PE5MFP_GPIO              (0x00UL<<SYS_GPE_MFPL_PE5MFP_Pos)
 #define SYS_GPE_MFPL_PE5MFP_EBI_nRD           (0x02UL<<SYS_GPE_MFPL_PE5MFP_Pos)
 #define SYS_GPE_MFPL_PE5MFP_SD0_DAT3          (0x03UL<<SYS_GPE_MFPL_PE5MFP_Pos)
 #define SYS_GPE_MFPL_PE5MFP_SPIM_SS           (0x04UL<<SYS_GPE_MFPL_PE5MFP_Pos)
 #define SYS_GPE_MFPL_PE5MFP_SPI3_SS           (0x05UL<<SYS_GPE_MFPL_PE5MFP_Pos)
 #define SYS_GPE_MFPL_PE5MFP_SC0_PWR           (0x06UL<<SYS_GPE_MFPL_PE5MFP_Pos)
 #define SYS_GPE_MFPL_PE5MFP_USCI0_CTL1        (0x07UL<<SYS_GPE_MFPL_PE5MFP_Pos)
 #define SYS_GPE_MFPL_PE5MFP_UART6_TXD         (0x08UL<<SYS_GPE_MFPL_PE5MFP_Pos)
 #define SYS_GPE_MFPL_PE5MFP_UART7_nRTS        (0x09UL<<SYS_GPE_MFPL_PE5MFP_Pos)
 #define SYS_GPE_MFPL_PE5MFP_QEI1_B            (0x0BUL<<SYS_GPE_MFPL_PE5MFP_Pos)
 #define SYS_GPE_MFPL_PE5MFP_EPWM0_CH2         (0x0CUL<<SYS_GPE_MFPL_PE5MFP_Pos)
 #define SYS_GPE_MFPL_PE5MFP_BPWM0_CH3         (0x0DUL<<SYS_GPE_MFPL_PE5MFP_Pos)
 #define SYS_GPE_MFPL_PE6MFP_GPIO              (0x00UL<<SYS_GPE_MFPL_PE6MFP_Pos)
 #define SYS_GPE_MFPL_PE6MFP_SD0_CLK           (0x03UL<<SYS_GPE_MFPL_PE6MFP_Pos)
 #define SYS_GPE_MFPL_PE6MFP_SPIM_D3           (0x04UL<<SYS_GPE_MFPL_PE6MFP_Pos)
 #define SYS_GPE_MFPL_PE6MFP_SPI3_I2SMCLK      (0x05UL<<SYS_GPE_MFPL_PE6MFP_Pos)
 #define SYS_GPE_MFPL_PE6MFP_SC0_nCD           (0x06UL<<SYS_GPE_MFPL_PE6MFP_Pos)
 #define SYS_GPE_MFPL_PE6MFP_USCI0_CTL0        (0x07UL<<SYS_GPE_MFPL_PE6MFP_Pos)
 #define SYS_GPE_MFPL_PE6MFP_UART5_RXD         (0x08UL<<SYS_GPE_MFPL_PE6MFP_Pos)
 #define SYS_GPE_MFPL_PE6MFP_CAN1_RXD          (0x09UL<<SYS_GPE_MFPL_PE6MFP_Pos)
 #define SYS_GPE_MFPL_PE6MFP_QEI1_A            (0x0BUL<<SYS_GPE_MFPL_PE6MFP_Pos)
 #define SYS_GPE_MFPL_PE6MFP_EPWM0_CH1         (0x0CUL<<SYS_GPE_MFPL_PE6MFP_Pos)
 #define SYS_GPE_MFPL_PE6MFP_BPWM0_CH4         (0x0DUL<<SYS_GPE_MFPL_PE6MFP_Pos)
 #define SYS_GPE_MFPL_PE7MFP_GPIO              (0x00UL<<SYS_GPE_MFPL_PE7MFP_Pos)
 #define SYS_GPE_MFPL_PE7MFP_SD0_CMD           (0x03UL<<SYS_GPE_MFPL_PE7MFP_Pos)
 #define SYS_GPE_MFPL_PE7MFP_SPIM_D2           (0x04UL<<SYS_GPE_MFPL_PE7MFP_Pos)
 #define SYS_GPE_MFPL_PE7MFP_UART5_TXD         (0x08UL<<SYS_GPE_MFPL_PE7MFP_Pos)
 #define SYS_GPE_MFPL_PE7MFP_CAN1_TXD          (0x09UL<<SYS_GPE_MFPL_PE7MFP_Pos)
 #define SYS_GPE_MFPL_PE7MFP_QEI1_INDEX        (0x0BUL<<SYS_GPE_MFPL_PE7MFP_Pos)
 #define SYS_GPE_MFPL_PE7MFP_EPWM0_CH0         (0x0CUL<<SYS_GPE_MFPL_PE7MFP_Pos)
 #define SYS_GPE_MFPL_PE7MFP_BPWM0_CH5         (0x0DUL<<SYS_GPE_MFPL_PE7MFP_Pos)
 /********************* Bit definition of GPE_MFPH register **********************/
 #define SYS_GPE_MFPH_PE8MFP_GPIO              (0x00UL<<SYS_GPE_MFPH_PE8MFP_Pos)
 #define SYS_GPE_MFPH_PE8MFP_EBI_ADR10         (0x02UL<<SYS_GPE_MFPH_PE8MFP_Pos)
 #define SYS_GPE_MFPH_PE8MFP_EMAC_RMII_MDC      (0x03UL<<SYS_GPE_MFPH_PE8MFP_Pos)
 #define SYS_GPE_MFPH_PE8MFP_I2S0_BCLK         (0x04UL<<SYS_GPE_MFPH_PE8MFP_Pos)
 #define SYS_GPE_MFPH_PE8MFP_SPI2_CLK          (0x05UL<<SYS_GPE_MFPH_PE8MFP_Pos)
 #define SYS_GPE_MFPH_PE8MFP_USCI1_CTL1        (0x06UL<<SYS_GPE_MFPH_PE8MFP_Pos)
 #define SYS_GPE_MFPH_PE8MFP_UART2_TXD         (0x07UL<<SYS_GPE_MFPH_PE8MFP_Pos)
 #define SYS_GPE_MFPH_PE8MFP_EPWM0_CH0         (0x0AUL<<SYS_GPE_MFPH_PE8MFP_Pos)
 #define SYS_GPE_MFPH_PE8MFP_EPWM0_BRAKE0      (0x0BUL<<SYS_GPE_MFPH_PE8MFP_Pos)
 #define SYS_GPE_MFPH_PE8MFP_ECAP0_IC0         (0x0CUL<<SYS_GPE_MFPH_PE8MFP_Pos)
 #define SYS_GPE_MFPH_PE8MFP_TRACE_DATA3       (0x0EUL<<SYS_GPE_MFPH_PE8MFP_Pos)
 #define SYS_GPE_MFPH_PE9MFP_GPIO              (0x00UL<<SYS_GPE_MFPH_PE9MFP_Pos)
 #define SYS_GPE_MFPH_PE9MFP_EBI_ADR11         (0x02UL<<SYS_GPE_MFPH_PE9MFP_Pos)
 #define SYS_GPE_MFPH_PE9MFP_EMAC_RMII_MDIO    (0x03UL<<SYS_GPE_MFPH_PE9MFP_Pos)
 #define SYS_GPE_MFPH_PE9MFP_I2S0_MCLK         (0x04UL<<SYS_GPE_MFPH_PE9MFP_Pos)
 #define SYS_GPE_MFPH_PE9MFP_SPI2_MISO         (0x05UL<<SYS_GPE_MFPH_PE9MFP_Pos)
 #define SYS_GPE_MFPH_PE9MFP_USCI1_CTL0        (0x06UL<<SYS_GPE_MFPH_PE9MFP_Pos)
 #define SYS_GPE_MFPH_PE9MFP_UART2_RXD         (0x07UL<<SYS_GPE_MFPH_PE9MFP_Pos)
 #define SYS_GPE_MFPH_PE9MFP_EPWM0_CH1         (0x0AUL<<SYS_GPE_MFPH_PE9MFP_Pos)
 #define SYS_GPE_MFPH_PE9MFP_EPWM0_BRAKE1      (0x0BUL<<SYS_GPE_MFPH_PE9MFP_Pos)
 #define SYS_GPE_MFPH_PE9MFP_ECAP0_IC1         (0x0CUL<<SYS_GPE_MFPH_PE9MFP_Pos)
 #define SYS_GPE_MFPH_PE9MFP_TRACE_DATA2       (0x0EUL<<SYS_GPE_MFPH_PE9MFP_Pos)
 #define SYS_GPE_MFPH_PE10MFP_GPIO             (0x00UL<<SYS_GPE_MFPH_PE10MFP_Pos)
 #define SYS_GPE_MFPH_PE10MFP_EBI_ADR12        (0x02UL<<SYS_GPE_MFPH_PE10MFP_Pos)
 #define SYS_GPE_MFPH_PE10MFP_EMAC_RMII_TXD0   (0x03UL<<SYS_GPE_MFPH_PE10MFP_Pos)
 #define SYS_GPE_MFPH_PE10MFP_I2S0_DI          (0x04UL<<SYS_GPE_MFPH_PE10MFP_Pos)
 #define SYS_GPE_MFPH_PE10MFP_SPI2_MOSI        (0x05UL<<SYS_GPE_MFPH_PE10MFP_Pos)
 #define SYS_GPE_MFPH_PE10MFP_USCI1_DAT0       (0x06UL<<SYS_GPE_MFPH_PE10MFP_Pos)
 #define SYS_GPE_MFPH_PE10MFP_UART3_TXD        (0x07UL<<SYS_GPE_MFPH_PE10MFP_Pos)
 #define SYS_GPE_MFPH_PE10MFP_EPWM0_CH2        (0x0AUL<<SYS_GPE_MFPH_PE10MFP_Pos)
 #define SYS_GPE_MFPH_PE10MFP_EPWM1_BRAKE0     (0x0BUL<<SYS_GPE_MFPH_PE10MFP_Pos)
 #define SYS_GPE_MFPH_PE10MFP_ECAP0_IC2        (0x0CUL<<SYS_GPE_MFPH_PE10MFP_Pos)
 #define SYS_GPE_MFPH_PE10MFP_TRACE_DATA1      (0x0EUL<<SYS_GPE_MFPH_PE10MFP_Pos)
 #define SYS_GPE_MFPH_PE11MFP_GPIO             (0x00UL<<SYS_GPE_MFPH_PE11MFP_Pos)
 #define SYS_GPE_MFPH_PE11MFP_EBI_ADR13        (0x02UL<<SYS_GPE_MFPH_PE11MFP_Pos)
 #define SYS_GPE_MFPH_PE11MFP_EMAC_RMII_TXD1   (0x03UL<<SYS_GPE_MFPH_PE11MFP_Pos)
 #define SYS_GPE_MFPH_PE11MFP_I2S0_DO          (0x04UL<<SYS_GPE_MFPH_PE11MFP_Pos)
 #define SYS_GPE_MFPH_PE11MFP_SPI2_SS          (0x05UL<<SYS_GPE_MFPH_PE11MFP_Pos)
 #define SYS_GPE_MFPH_PE11MFP_USCI1_DAT1       (0x06UL<<SYS_GPE_MFPH_PE11MFP_Pos)
 #define SYS_GPE_MFPH_PE11MFP_UART3_RXD        (0x07UL<<SYS_GPE_MFPH_PE11MFP_Pos)
 #define SYS_GPE_MFPH_PE11MFP_UART1_nCTS       (0x08UL<<SYS_GPE_MFPH_PE11MFP_Pos)
 #define SYS_GPE_MFPH_PE11MFP_EPWM0_CH3        (0x0AUL<<SYS_GPE_MFPH_PE11MFP_Pos)
 #define SYS_GPE_MFPH_PE11MFP_EPWM1_BRAKE1     (0x0BUL<<SYS_GPE_MFPH_PE11MFP_Pos)
 #define SYS_GPE_MFPH_PE11MFP_ECAP1_IC2        (0x0DUL<<SYS_GPE_MFPH_PE11MFP_Pos)
 #define SYS_GPE_MFPH_PE11MFP_TRACE_DATA0      (0x0EUL<<SYS_GPE_MFPH_PE11MFP_Pos)
 #define SYS_GPE_MFPH_PE12MFP_GPIO             (0x00UL<<SYS_GPE_MFPH_PE12MFP_Pos)
 #define SYS_GPE_MFPH_PE12MFP_EBI_ADR14        (0x02UL<<SYS_GPE_MFPH_PE12MFP_Pos)
 #define SYS_GPE_MFPH_PE12MFP_EMAC_RMII_TXEN    (0x03UL<<SYS_GPE_MFPH_PE12MFP_Pos)
 #define SYS_GPE_MFPH_PE12MFP_I2S0_LRCK        (0x04UL<<SYS_GPE_MFPH_PE12MFP_Pos)
 #define SYS_GPE_MFPH_PE12MFP_SPI2_I2SMCLK     (0x05UL<<SYS_GPE_MFPH_PE12MFP_Pos)
 #define SYS_GPE_MFPH_PE12MFP_USCI1_CLK        (0x06UL<<SYS_GPE_MFPH_PE12MFP_Pos)
 #define SYS_GPE_MFPH_PE12MFP_UART1_nRTS       (0x08UL<<SYS_GPE_MFPH_PE12MFP_Pos)
 #define SYS_GPE_MFPH_PE12MFP_EPWM0_CH4        (0x0AUL<<SYS_GPE_MFPH_PE12MFP_Pos)
 #define SYS_GPE_MFPH_PE12MFP_ECAP1_IC1        (0x0DUL<<SYS_GPE_MFPH_PE12MFP_Pos)
 #define SYS_GPE_MFPH_PE12MFP_TRACE_CLK        (0x0EUL<<SYS_GPE_MFPH_PE12MFP_Pos)
 #define SYS_GPE_MFPH_PE13MFP_GPIO             (0x00UL<<SYS_GPE_MFPH_PE13MFP_Pos)
 #define SYS_GPE_MFPH_PE13MFP_EBI_ADR15        (0x02UL<<SYS_GPE_MFPH_PE13MFP_Pos)
 #define SYS_GPE_MFPH_PE13MFP_EMAC_PPS         (0x03UL<<SYS_GPE_MFPH_PE13MFP_Pos)
 #define SYS_GPE_MFPH_PE13MFP_I2C0_SCL         (0x04UL<<SYS_GPE_MFPH_PE13MFP_Pos)
 #define SYS_GPE_MFPH_PE13MFP_UART4_nRTS       (0x05UL<<SYS_GPE_MFPH_PE13MFP_Pos)
 #define SYS_GPE_MFPH_PE13MFP_UART1_TXD        (0x08UL<<SYS_GPE_MFPH_PE13MFP_Pos)
 #define SYS_GPE_MFPH_PE13MFP_EPWM0_CH5        (0x0AUL<<SYS_GPE_MFPH_PE13MFP_Pos)
 #define SYS_GPE_MFPH_PE13MFP_EPWM1_CH0        (0x0BUL<<SYS_GPE_MFPH_PE13MFP_Pos)
 #define SYS_GPE_MFPH_PE13MFP_BPWM1_CH5        (0x0CUL<<SYS_GPE_MFPH_PE13MFP_Pos)
 #define SYS_GPE_MFPH_PE13MFP_ECAP1_IC0        (0x0DUL<<SYS_GPE_MFPH_PE13MFP_Pos)
 #define SYS_GPE_MFPH_PE14MFP_GPIO             (0x00UL<<SYS_GPE_MFPH_PE14MFP_Pos)
 #define SYS_GPE_MFPH_PE14MFP_EBI_AD8          (0x02UL<<SYS_GPE_MFPH_PE14MFP_Pos)
 #define SYS_GPE_MFPH_PE14MFP_UART2_TXD        (0x03UL<<SYS_GPE_MFPH_PE14MFP_Pos)
 #define SYS_GPE_MFPH_PE14MFP_CAN0_TXD         (0x04UL<<SYS_GPE_MFPH_PE14MFP_Pos)
 #define SYS_GPE_MFPH_PE14MFP_SD1_nCD          (0x05UL<<SYS_GPE_MFPH_PE14MFP_Pos)
 #define SYS_GPE_MFPH_PE14MFP_UART6_TXD        (0x06UL<<SYS_GPE_MFPH_PE14MFP_Pos)
 #define SYS_GPE_MFPH_PE15MFP_GPIO             (0x00UL<<SYS_GPE_MFPH_PE15MFP_Pos)
 #define SYS_GPE_MFPH_PE15MFP_EBI_AD9          (0x02UL<<SYS_GPE_MFPH_PE15MFP_Pos)
 #define SYS_GPE_MFPH_PE15MFP_UART2_RXD        (0x03UL<<SYS_GPE_MFPH_PE15MFP_Pos)
 #define SYS_GPE_MFPH_PE15MFP_CAN0_RXD         (0x04UL<<SYS_GPE_MFPH_PE15MFP_Pos)
 #define SYS_GPE_MFPH_PE15MFP_UART6_RXD        (0x06UL<<SYS_GPE_MFPH_PE15MFP_Pos)
 /********************* Bit definition of GPF_MFPL register **********************/
 #define SYS_GPF_MFPL_PF0MFP_GPIO              (0x00UL<<SYS_GPF_MFPL_PF0MFP_Pos)
 #define SYS_GPF_MFPL_PF0MFP_UART1_TXD         (0x02UL<<SYS_GPF_MFPL_PF0MFP_Pos)
 #define SYS_GPF_MFPL_PF0MFP_I2C1_SCL          (0x03UL<<SYS_GPF_MFPL_PF0MFP_Pos)
 #define SYS_GPF_MFPL_PF0MFP_UART0_TXD         (0x04UL<<SYS_GPF_MFPL_PF0MFP_Pos)
 #define SYS_GPF_MFPL_PF0MFP_BPWM1_CH0         (0x0CUL<<SYS_GPF_MFPL_PF0MFP_Pos)
 #define SYS_GPF_MFPL_PF0MFP_ICE_DAT           (0x0EUL<<SYS_GPF_MFPL_PF0MFP_Pos)
 #define SYS_GPF_MFPL_PF1MFP_GPIO              (0x00UL<<SYS_GPF_MFPL_PF1MFP_Pos)
 #define SYS_GPF_MFPL_PF1MFP_UART1_RXD         (0x02UL<<SYS_GPF_MFPL_PF1MFP_Pos)
 #define SYS_GPF_MFPL_PF1MFP_I2C1_SDA          (0x03UL<<SYS_GPF_MFPL_PF1MFP_Pos)
 #define SYS_GPF_MFPL_PF1MFP_UART0_RXD         (0x04UL<<SYS_GPF_MFPL_PF1MFP_Pos)
 #define SYS_GPF_MFPL_PF1MFP_BPWM1_CH1         (0x0CUL<<SYS_GPF_MFPL_PF1MFP_Pos)
 #define SYS_GPF_MFPL_PF1MFP_ICE_CLK           (0x0EUL<<SYS_GPF_MFPL_PF1MFP_Pos)
 #define SYS_GPF_MFPL_PF2MFP_GPIO              (0x00UL<<SYS_GPF_MFPL_PF2MFP_Pos)
 #define SYS_GPF_MFPL_PF2MFP_EBI_nCS1          (0x02UL<<SYS_GPF_MFPL_PF2MFP_Pos)
 #define SYS_GPF_MFPL_PF2MFP_UART0_RXD         (0x03UL<<SYS_GPF_MFPL_PF2MFP_Pos)
 #define SYS_GPF_MFPL_PF2MFP_I2C0_SDA          (0x04UL<<SYS_GPF_MFPL_PF2MFP_Pos)
 #define SYS_GPF_MFPL_PF2MFP_QSPI0_CLK         (0x05UL<<SYS_GPF_MFPL_PF2MFP_Pos)
 #define SYS_GPF_MFPL_PF2MFP_XT1_OUT           (0x0AUL<<SYS_GPF_MFPL_PF2MFP_Pos)
 #define SYS_GPF_MFPL_PF2MFP_BPWM1_CH1         (0x0BUL<<SYS_GPF_MFPL_PF2MFP_Pos)
 #define SYS_GPF_MFPL_PF3MFP_GPIO              (0x00UL<<SYS_GPF_MFPL_PF3MFP_Pos)
 #define SYS_GPF_MFPL_PF3MFP_EBI_nCS0          (0x02UL<<SYS_GPF_MFPL_PF3MFP_Pos)
 #define SYS_GPF_MFPL_PF3MFP_UART0_TXD         (0x03UL<<SYS_GPF_MFPL_PF3MFP_Pos)
 #define SYS_GPF_MFPL_PF3MFP_I2C0_SCL          (0x04UL<<SYS_GPF_MFPL_PF3MFP_Pos)
 #define SYS_GPF_MFPL_PF3MFP_XT1_IN            (0x0AUL<<SYS_GPF_MFPL_PF3MFP_Pos)
 #define SYS_GPF_MFPL_PF3MFP_BPWM1_CH0         (0x0BUL<<SYS_GPF_MFPL_PF3MFP_Pos)
 #define SYS_GPF_MFPL_PF4MFP_GPIO              (0x00UL<<SYS_GPF_MFPL_PF4MFP_Pos)
 #define SYS_GPF_MFPL_PF4MFP_UART2_TXD         (0x02UL<<SYS_GPF_MFPL_PF4MFP_Pos)
 #define SYS_GPF_MFPL_PF4MFP_UART2_nRTS        (0x04UL<<SYS_GPF_MFPL_PF4MFP_Pos)
 #define SYS_GPF_MFPL_PF4MFP_EPWM0_CH1         (0x07UL<<SYS_GPF_MFPL_PF4MFP_Pos)
 #define SYS_GPF_MFPL_PF4MFP_BPWM0_CH5         (0x08UL<<SYS_GPF_MFPL_PF4MFP_Pos)
 #define SYS_GPF_MFPL_PF4MFP_X32_OUT           (0x0AUL<<SYS_GPF_MFPL_PF4MFP_Pos)
 #define SYS_GPF_MFPL_PF4MFP_EADC1_ST          (0x0BUL<<SYS_GPF_MFPL_PF4MFP_Pos)
 #define SYS_GPF_MFPL_PF5MFP_GPIO              (0x00UL<<SYS_GPF_MFPL_PF5MFP_Pos)
 #define SYS_GPF_MFPL_PF5MFP_UART2_RXD         (0x02UL<<SYS_GPF_MFPL_PF5MFP_Pos)
 #define SYS_GPF_MFPL_PF5MFP_UART2_nCTS        (0x04UL<<SYS_GPF_MFPL_PF5MFP_Pos)
 #define SYS_GPF_MFPL_PF5MFP_EPWM0_CH0         (0x07UL<<SYS_GPF_MFPL_PF5MFP_Pos)
 #define SYS_GPF_MFPL_PF5MFP_BPWM0_CH4         (0x08UL<<SYS_GPF_MFPL_PF5MFP_Pos)
 #define SYS_GPF_MFPL_PF5MFP_EPWM0_SYNC_OUT    (0x09UL<<SYS_GPF_MFPL_PF5MFP_Pos)
 #define SYS_GPF_MFPL_PF5MFP_X32_IN            (0x0AUL<<SYS_GPF_MFPL_PF5MFP_Pos)
 #define SYS_GPF_MFPL_PF5MFP_EADC0_ST          (0x0BUL<<SYS_GPF_MFPL_PF5MFP_Pos)
 #define SYS_GPF_MFPL_PF6MFP_GPIO              (0x00UL<<SYS_GPF_MFPL_PF6MFP_Pos)
 #define SYS_GPF_MFPL_PF6MFP_EBI_ADR19         (0x02UL<<SYS_GPF_MFPL_PF6MFP_Pos)
 #define SYS_GPF_MFPL_PF6MFP_SC0_CLK           (0x03UL<<SYS_GPF_MFPL_PF6MFP_Pos)
 #define SYS_GPF_MFPL_PF6MFP_I2S0_LRCK         (0x04UL<<SYS_GPF_MFPL_PF6MFP_Pos)
 #define SYS_GPF_MFPL_PF6MFP_SPI0_MOSI         (0x05UL<<SYS_GPF_MFPL_PF6MFP_Pos)
 #define SYS_GPF_MFPL_PF6MFP_UART4_RXD         (0x06UL<<SYS_GPF_MFPL_PF6MFP_Pos)
 #define SYS_GPF_MFPL_PF6MFP_EBI_nCS0          (0x07UL<<SYS_GPF_MFPL_PF6MFP_Pos)
 #define SYS_GPF_MFPL_PF6MFP_CAN2_RXD          (0x08UL<<SYS_GPF_MFPL_PF6MFP_Pos)
 #define SYS_GPF_MFPL_PF6MFP_TAMPER0           (0x0AUL<<SYS_GPF_MFPL_PF6MFP_Pos)
 #define SYS_GPF_MFPL_PF7MFP_GPIO              (0x00UL<<SYS_GPF_MFPL_PF7MFP_Pos)
 #define SYS_GPF_MFPL_PF7MFP_EBI_ADR18         (0x02UL<<SYS_GPF_MFPL_PF7MFP_Pos)
 #define SYS_GPF_MFPL_PF7MFP_SC0_DAT           (0x03UL<<SYS_GPF_MFPL_PF7MFP_Pos)
 #define SYS_GPF_MFPL_PF7MFP_I2S0_DO           (0x04UL<<SYS_GPF_MFPL_PF7MFP_Pos)
 #define SYS_GPF_MFPL_PF7MFP_SPI0_MISO         (0x05UL<<SYS_GPF_MFPL_PF7MFP_Pos)
 #define SYS_GPF_MFPL_PF7MFP_UART4_TXD         (0x06UL<<SYS_GPF_MFPL_PF7MFP_Pos)
 #define SYS_GPF_MFPL_PF7MFP_CCAP_DATA0        (0x07UL<<SYS_GPF_MFPL_PF7MFP_Pos)
 #define SYS_GPF_MFPL_PF7MFP_CAN2_TXD          (0x08UL<<SYS_GPF_MFPL_PF7MFP_Pos)
 #define SYS_GPF_MFPL_PF7MFP_TAMPER1           (0x0AUL<<SYS_GPF_MFPL_PF7MFP_Pos)
 /********************* Bit definition of GPF_MFPH register **********************/
 #define SYS_GPF_MFPH_PF8MFP_GPIO              (0x00UL<<SYS_GPF_MFPH_PF8MFP_Pos)
 #define SYS_GPF_MFPH_PF8MFP_EBI_ADR17         (0x02UL<<SYS_GPF_MFPH_PF8MFP_Pos)
 #define SYS_GPF_MFPH_PF8MFP_SC0_RST           (0x03UL<<SYS_GPF_MFPH_PF8MFP_Pos)
 #define SYS_GPF_MFPH_PF8MFP_I2S0_DI           (0x04UL<<SYS_GPF_MFPH_PF8MFP_Pos)
 #define SYS_GPF_MFPH_PF8MFP_SPI0_CLK          (0x05UL<<SYS_GPF_MFPH_PF8MFP_Pos)
 #define SYS_GPF_MFPH_PF8MFP_UART5_nCTS        (0x06UL<<SYS_GPF_MFPH_PF8MFP_Pos)
 #define SYS_GPF_MFPH_PF8MFP_CCAP_DATA1        (0x07UL<<SYS_GPF_MFPH_PF8MFP_Pos)
 #define SYS_GPF_MFPH_PF8MFP_CAN1_RXD          (0x08UL<<SYS_GPF_MFPH_PF8MFP_Pos)
 #define SYS_GPF_MFPH_PF8MFP_TAMPER2           (0x0AUL<<SYS_GPF_MFPH_PF8MFP_Pos)
 #define SYS_GPF_MFPH_PF9MFP_GPIO              (0x00UL<<SYS_GPF_MFPH_PF9MFP_Pos)
 #define SYS_GPF_MFPH_PF9MFP_EBI_ADR16         (0x02UL<<SYS_GPF_MFPH_PF9MFP_Pos)
 #define SYS_GPF_MFPH_PF9MFP_SC0_PWR           (0x03UL<<SYS_GPF_MFPH_PF9MFP_Pos)
 #define SYS_GPF_MFPH_PF9MFP_I2S0_MCLK         (0x04UL<<SYS_GPF_MFPH_PF9MFP_Pos)
 #define SYS_GPF_MFPH_PF9MFP_SPI0_SS           (0x05UL<<SYS_GPF_MFPH_PF9MFP_Pos)
 #define SYS_GPF_MFPH_PF9MFP_UART5_nRTS        (0x06UL<<SYS_GPF_MFPH_PF9MFP_Pos)
 #define SYS_GPF_MFPH_PF9MFP_CCAP_DATA2        (0x07UL<<SYS_GPF_MFPH_PF9MFP_Pos)
 #define SYS_GPF_MFPH_PF9MFP_CAN1_TXD          (0x08UL<<SYS_GPF_MFPH_PF9MFP_Pos)
 #define SYS_GPF_MFPH_PF9MFP_TAMPER3           (0x0AUL<<SYS_GPF_MFPH_PF9MFP_Pos)
 #define SYS_GPF_MFPH_PF10MFP_GPIO             (0x00UL<<SYS_GPF_MFPH_PF10MFP_Pos)
 #define SYS_GPF_MFPH_PF10MFP_EBI_ADR15        (0x02UL<<SYS_GPF_MFPH_PF10MFP_Pos)
 #define SYS_GPF_MFPH_PF10MFP_SC0_nCD          (0x03UL<<SYS_GPF_MFPH_PF10MFP_Pos)
 #define SYS_GPF_MFPH_PF10MFP_I2S0_BCLK        (0x04UL<<SYS_GPF_MFPH_PF10MFP_Pos)
 #define SYS_GPF_MFPH_PF10MFP_SPI0_I2SMCLK     (0x05UL<<SYS_GPF_MFPH_PF10MFP_Pos)
 #define SYS_GPF_MFPH_PF10MFP_UART5_RXD        (0x06UL<<SYS_GPF_MFPH_PF10MFP_Pos)
 #define SYS_GPF_MFPH_PF10MFP_CCAP_DATA3       (0x07UL<<SYS_GPF_MFPH_PF10MFP_Pos)
 #define SYS_GPF_MFPH_PF10MFP_TAMPER4          (0x0AUL<<SYS_GPF_MFPH_PF10MFP_Pos)
 #define SYS_GPF_MFPH_PF11MFP_GPIO             (0x00UL<<SYS_GPF_MFPH_PF11MFP_Pos)
 #define SYS_GPF_MFPH_PF11MFP_EBI_ADR14        (0x02UL<<SYS_GPF_MFPH_PF11MFP_Pos)
 #define SYS_GPF_MFPH_PF11MFP_SPI2_MOSI        (0x03UL<<SYS_GPF_MFPH_PF11MFP_Pos)
 #define SYS_GPF_MFPH_PF11MFP_UART5_TXD        (0x06UL<<SYS_GPF_MFPH_PF11MFP_Pos)
 #define SYS_GPF_MFPH_PF11MFP_CCAP_DATA4       (0x07UL<<SYS_GPF_MFPH_PF11MFP_Pos)
 #define SYS_GPF_MFPH_PF11MFP_TAMPER5          (0x0AUL<<SYS_GPF_MFPH_PF11MFP_Pos)
 #define SYS_GPF_MFPH_PF11MFP_TM3              (0x0DUL<<SYS_GPF_MFPH_PF11MFP_Pos)
 /********************* Bit definition of GPG_MFPL register **********************/
 #define SYS_GPG_MFPL_PG0MFP_GPIO              (0x00UL<<SYS_GPG_MFPL_PG0MFP_Pos)
 #define SYS_GPG_MFPL_PG0MFP_EBI_ADR8          (0x02UL<<SYS_GPG_MFPL_PG0MFP_Pos)
 #define SYS_GPG_MFPL_PG0MFP_I2C0_SCL          (0x04UL<<SYS_GPG_MFPL_PG0MFP_Pos)
 #define SYS_GPG_MFPL_PG0MFP_I2C1_SMBAL        (0x05UL<<SYS_GPG_MFPL_PG0MFP_Pos)
 #define SYS_GPG_MFPL_PG0MFP_UART2_RXD         (0x06UL<<SYS_GPG_MFPL_PG0MFP_Pos)
 #define SYS_GPG_MFPL_PG0MFP_CAN1_TXD          (0x07UL<<SYS_GPG_MFPL_PG0MFP_Pos)
 #define SYS_GPG_MFPL_PG0MFP_UART1_TXD         (0x08UL<<SYS_GPG_MFPL_PG0MFP_Pos)
 #define SYS_GPG_MFPL_PG1MFP_GPIO              (0x00UL<<SYS_GPG_MFPL_PG1MFP_Pos)
 #define SYS_GPG_MFPL_PG1MFP_EBI_ADR9          (0x02UL<<SYS_GPG_MFPL_PG1MFP_Pos)
 #define SYS_GPG_MFPL_PG1MFP_SPI2_I2SMCLK      (0x03UL<<SYS_GPG_MFPL_PG1MFP_Pos)
 #define SYS_GPG_MFPL_PG1MFP_I2C0_SDA          (0x04UL<<SYS_GPG_MFPL_PG1MFP_Pos)
 #define SYS_GPG_MFPL_PG1MFP_I2C1_SMBSUS       (0x05UL<<SYS_GPG_MFPL_PG1MFP_Pos)
 #define SYS_GPG_MFPL_PG1MFP_UART2_TXD         (0x06UL<<SYS_GPG_MFPL_PG1MFP_Pos)
 #define SYS_GPG_MFPL_PG1MFP_CAN1_RXD          (0x07UL<<SYS_GPG_MFPL_PG1MFP_Pos)
 #define SYS_GPG_MFPL_PG1MFP_UART1_RXD         (0x08UL<<SYS_GPG_MFPL_PG1MFP_Pos)
 #define SYS_GPG_MFPL_PG2MFP_GPIO              (0x00UL<<SYS_GPG_MFPL_PG2MFP_Pos)
 #define SYS_GPG_MFPL_PG2MFP_EBI_ADR11         (0x02UL<<SYS_GPG_MFPL_PG2MFP_Pos)
 #define SYS_GPG_MFPL_PG2MFP_SPI2_SS           (0x03UL<<SYS_GPG_MFPL_PG2MFP_Pos)
 #define SYS_GPG_MFPL_PG2MFP_I2C0_SMBAL        (0x04UL<<SYS_GPG_MFPL_PG2MFP_Pos)
 #define SYS_GPG_MFPL_PG2MFP_I2C1_SCL          (0x05UL<<SYS_GPG_MFPL_PG2MFP_Pos)
 #define SYS_GPG_MFPL_PG2MFP_CCAP_DATA7        (0x07UL<<SYS_GPG_MFPL_PG2MFP_Pos)
 #define SYS_GPG_MFPL_PG2MFP_TM0               (0x0DUL<<SYS_GPG_MFPL_PG2MFP_Pos)
 #define SYS_GPG_MFPL_PG3MFP_GPIO              (0x00UL<<SYS_GPG_MFPL_PG3MFP_Pos)
 #define SYS_GPG_MFPL_PG3MFP_EBI_ADR12         (0x02UL<<SYS_GPG_MFPL_PG3MFP_Pos)
 #define SYS_GPG_MFPL_PG3MFP_SPI2_CLK          (0x03UL<<SYS_GPG_MFPL_PG3MFP_Pos)
 #define SYS_GPG_MFPL_PG3MFP_I2C0_SMBSUS       (0x04UL<<SYS_GPG_MFPL_PG3MFP_Pos)
 #define SYS_GPG_MFPL_PG3MFP_I2C1_SDA          (0x05UL<<SYS_GPG_MFPL_PG3MFP_Pos)
 #define SYS_GPG_MFPL_PG3MFP_CCAP_DATA6        (0x07UL<<SYS_GPG_MFPL_PG3MFP_Pos)
 #define SYS_GPG_MFPL_PG3MFP_TM1               (0x0DUL<<SYS_GPG_MFPL_PG3MFP_Pos)
 #define SYS_GPG_MFPL_PG4MFP_GPIO              (0x00UL<<SYS_GPG_MFPL_PG4MFP_Pos)
 #define SYS_GPG_MFPL_PG4MFP_EBI_ADR13         (0x02UL<<SYS_GPG_MFPL_PG4MFP_Pos)
 #define SYS_GPG_MFPL_PG4MFP_SPI2_MISO         (0x03UL<<SYS_GPG_MFPL_PG4MFP_Pos)
 #define SYS_GPG_MFPL_PG4MFP_CCAP_DATA5        (0x07UL<<SYS_GPG_MFPL_PG4MFP_Pos)
 #define SYS_GPG_MFPL_PG4MFP_TM2               (0x0DUL<<SYS_GPG_MFPL_PG4MFP_Pos)
 #define SYS_GPG_MFPL_PG5MFP_GPIO              (0x00UL<<SYS_GPG_MFPL_PG5MFP_Pos)
 #define SYS_GPG_MFPL_PG5MFP_EBI_nCS1          (0x02UL<<SYS_GPG_MFPL_PG5MFP_Pos)
 #define SYS_GPG_MFPL_PG5MFP_SPI3_SS           (0x03UL<<SYS_GPG_MFPL_PG5MFP_Pos)
 #define SYS_GPG_MFPL_PG5MFP_SC1_PWR           (0x04UL<<SYS_GPG_MFPL_PG5MFP_Pos)
 #define SYS_GPG_MFPL_PG5MFP_EPWM0_CH3         (0x0BUL<<SYS_GPG_MFPL_PG5MFP_Pos)
 #define SYS_GPG_MFPL_PG6MFP_GPIO              (0x00UL<<SYS_GPG_MFPL_PG6MFP_Pos)
 #define SYS_GPG_MFPL_PG6MFP_EBI_nCS2          (0x02UL<<SYS_GPG_MFPL_PG6MFP_Pos)
 #define SYS_GPG_MFPL_PG6MFP_SPI3_CLK          (0x03UL<<SYS_GPG_MFPL_PG6MFP_Pos)
 #define SYS_GPG_MFPL_PG6MFP_SC1_RST           (0x04UL<<SYS_GPG_MFPL_PG6MFP_Pos)
 #define SYS_GPG_MFPL_PG6MFP_EPWM0_CH2         (0x0BUL<<SYS_GPG_MFPL_PG6MFP_Pos)
 #define SYS_GPG_MFPL_PG7MFP_GPIO              (0x00UL<<SYS_GPG_MFPL_PG7MFP_Pos)
 #define SYS_GPG_MFPL_PG7MFP_EBI_nWRL          (0x02UL<<SYS_GPG_MFPL_PG7MFP_Pos)
 #define SYS_GPG_MFPL_PG7MFP_SPI3_MISO         (0x03UL<<SYS_GPG_MFPL_PG7MFP_Pos)
 #define SYS_GPG_MFPL_PG7MFP_SC1_DAT           (0x04UL<<SYS_GPG_MFPL_PG7MFP_Pos)
 #define SYS_GPG_MFPL_PG7MFP_EPWM0_CH1         (0x0BUL<<SYS_GPG_MFPL_PG7MFP_Pos)
 /********************* Bit definition of GPG_MFPH register **********************/
 #define SYS_GPG_MFPH_PG8MFP_GPIO              (0x00UL<<SYS_GPG_MFPH_PG8MFP_Pos)
 #define SYS_GPG_MFPH_PG8MFP_EBI_nWRH          (0x02UL<<SYS_GPG_MFPH_PG8MFP_Pos)
 #define SYS_GPG_MFPH_PG8MFP_SPI3_MOSI         (0x03UL<<SYS_GPG_MFPH_PG8MFP_Pos)
 #define SYS_GPG_MFPH_PG8MFP_SC1_CLK           (0x04UL<<SYS_GPG_MFPH_PG8MFP_Pos)
 #define SYS_GPG_MFPH_PG8MFP_EPWM0_CH0         (0x0BUL<<SYS_GPG_MFPH_PG8MFP_Pos)
 #define SYS_GPG_MFPH_PG9MFP_GPIO              (0x00UL<<SYS_GPG_MFPH_PG9MFP_Pos)
 #define SYS_GPG_MFPH_PG9MFP_EBI_AD0           (0x02UL<<SYS_GPG_MFPH_PG9MFP_Pos)
 #define SYS_GPG_MFPH_PG9MFP_SD1_DAT3          (0x03UL<<SYS_GPG_MFPH_PG9MFP_Pos)
 #define SYS_GPG_MFPH_PG9MFP_SPIM_D2           (0x04UL<<SYS_GPG_MFPH_PG9MFP_Pos)
 #define SYS_GPG_MFPH_PG9MFP_QSPI1_MISO1       (0x05UL<<SYS_GPG_MFPH_PG9MFP_Pos)
 #define SYS_GPG_MFPH_PG9MFP_CCAP_PIXCLK       (0x07UL<<SYS_GPG_MFPH_PG9MFP_Pos)
 #define SYS_GPG_MFPH_PG9MFP_BPWM0_CH5         (0x0CUL<<SYS_GPG_MFPH_PG9MFP_Pos)
 #define SYS_GPG_MFPH_PG10MFP_GPIO             (0x00UL<<SYS_GPG_MFPH_PG10MFP_Pos)
 #define SYS_GPG_MFPH_PG10MFP_EBI_AD1          (0x02UL<<SYS_GPG_MFPH_PG10MFP_Pos)
 #define SYS_GPG_MFPH_PG10MFP_SD1_DAT2         (0x03UL<<SYS_GPG_MFPH_PG10MFP_Pos)
 #define SYS_GPG_MFPH_PG10MFP_SPIM_D3          (0x04UL<<SYS_GPG_MFPH_PG10MFP_Pos)
 #define SYS_GPG_MFPH_PG10MFP_QSPI1_MOSI1      (0x05UL<<SYS_GPG_MFPH_PG10MFP_Pos)
 #define SYS_GPG_MFPH_PG10MFP_CCAP_SCLK        (0x07UL<<SYS_GPG_MFPH_PG10MFP_Pos)
 #define SYS_GPG_MFPH_PG10MFP_BPWM0_CH4        (0x0CUL<<SYS_GPG_MFPH_PG10MFP_Pos)
 #define SYS_GPG_MFPH_PG11MFP_GPIO             (0x00UL<<SYS_GPG_MFPH_PG11MFP_Pos)
 #define SYS_GPG_MFPH_PG11MFP_EBI_AD2          (0x02UL<<SYS_GPG_MFPH_PG11MFP_Pos)
 #define SYS_GPG_MFPH_PG11MFP_SD1_DAT1         (0x03UL<<SYS_GPG_MFPH_PG11MFP_Pos)
 #define SYS_GPG_MFPH_PG11MFP_SPIM_SS          (0x04UL<<SYS_GPG_MFPH_PG11MFP_Pos)
 #define SYS_GPG_MFPH_PG11MFP_QSPI1_SS         (0x05UL<<SYS_GPG_MFPH_PG11MFP_Pos)
 #define SYS_GPG_MFPH_PG11MFP_UART7_TXD        (0x06UL<<SYS_GPG_MFPH_PG11MFP_Pos)
 #define SYS_GPG_MFPH_PG11MFP_CCAP_SFIELD      (0x07UL<<SYS_GPG_MFPH_PG11MFP_Pos)
 #define SYS_GPG_MFPH_PG11MFP_BPWM0_CH3        (0x0CUL<<SYS_GPG_MFPH_PG11MFP_Pos)
 #define SYS_GPG_MFPH_PG12MFP_GPIO             (0x00UL<<SYS_GPG_MFPH_PG12MFP_Pos)
 #define SYS_GPG_MFPH_PG12MFP_EBI_AD3          (0x02UL<<SYS_GPG_MFPH_PG12MFP_Pos)
 #define SYS_GPG_MFPH_PG12MFP_SD1_DAT0         (0x03UL<<SYS_GPG_MFPH_PG12MFP_Pos)
 #define SYS_GPG_MFPH_PG12MFP_SPIM_CLK         (0x04UL<<SYS_GPG_MFPH_PG12MFP_Pos)
 #define SYS_GPG_MFPH_PG12MFP_QSPI1_CLK        (0x05UL<<SYS_GPG_MFPH_PG12MFP_Pos)
 #define SYS_GPG_MFPH_PG12MFP_UART7_RXD        (0x06UL<<SYS_GPG_MFPH_PG12MFP_Pos)
 #define SYS_GPG_MFPH_PG12MFP_CCAP_VSYNC       (0x07UL<<SYS_GPG_MFPH_PG12MFP_Pos)
 #define SYS_GPG_MFPH_PG12MFP_BPWM0_CH2        (0x0CUL<<SYS_GPG_MFPH_PG12MFP_Pos)
 #define SYS_GPG_MFPH_PG13MFP_GPIO             (0x00UL<<SYS_GPG_MFPH_PG13MFP_Pos)
 #define SYS_GPG_MFPH_PG13MFP_EBI_AD4          (0x02UL<<SYS_GPG_MFPH_PG13MFP_Pos)
 #define SYS_GPG_MFPH_PG13MFP_SD1_CMD          (0x03UL<<SYS_GPG_MFPH_PG13MFP_Pos)
 #define SYS_GPG_MFPH_PG13MFP_SPIM_MISO        (0x04UL<<SYS_GPG_MFPH_PG13MFP_Pos)
 #define SYS_GPG_MFPH_PG13MFP_QSPI1_MISO0      (0x05UL<<SYS_GPG_MFPH_PG13MFP_Pos)
 #define SYS_GPG_MFPH_PG13MFP_UART6_TXD        (0x06UL<<SYS_GPG_MFPH_PG13MFP_Pos)
 #define SYS_GPG_MFPH_PG13MFP_CCAP_HSYNC       (0x07UL<<SYS_GPG_MFPH_PG13MFP_Pos)
 #define SYS_GPG_MFPH_PG13MFP_BPWM0_CH1        (0x0CUL<<SYS_GPG_MFPH_PG13MFP_Pos)
 #define SYS_GPG_MFPH_PG14MFP_GPIO             (0x00UL<<SYS_GPG_MFPH_PG14MFP_Pos)
 #define SYS_GPG_MFPH_PG14MFP_EBI_AD5          (0x02UL<<SYS_GPG_MFPH_PG14MFP_Pos)
 #define SYS_GPG_MFPH_PG14MFP_SD1_CLK          (0x03UL<<SYS_GPG_MFPH_PG14MFP_Pos)
 #define SYS_GPG_MFPH_PG14MFP_SPIM_MOSI        (0x04UL<<SYS_GPG_MFPH_PG14MFP_Pos)
 #define SYS_GPG_MFPH_PG14MFP_QSPI1_MOSI0      (0x05UL<<SYS_GPG_MFPH_PG14MFP_Pos)
 #define SYS_GPG_MFPH_PG14MFP_UART6_RXD        (0x06UL<<SYS_GPG_MFPH_PG14MFP_Pos)
 #define SYS_GPG_MFPH_PG14MFP_BPWM0_CH0        (0x0CUL<<SYS_GPG_MFPH_PG14MFP_Pos)
 #define SYS_GPG_MFPH_PG15MFP_GPIO             (0x00UL<<SYS_GPG_MFPH_PG15MFP_Pos)
 #define SYS_GPG_MFPH_PG15MFP_SD1_nCD          (0x03UL<<SYS_GPG_MFPH_PG15MFP_Pos)
 #define SYS_GPG_MFPH_PG15MFP_CLKO             (0x0EUL<<SYS_GPG_MFPH_PG15MFP_Pos)
 #define SYS_GPG_MFPH_PG15MFP_EADC0_ST         (0x0FUL<<SYS_GPG_MFPH_PG15MFP_Pos)
 /********************* Bit definition of GPH_MFPL register **********************/
 #define SYS_GPH_MFPL_PH0MFP_GPIO              (0x00UL<<SYS_GPH_MFPL_PH0MFP_Pos)
 #define SYS_GPH_MFPL_PH0MFP_EBI_ADR7          (0x02UL<<SYS_GPH_MFPL_PH0MFP_Pos)
 #define SYS_GPH_MFPL_PH0MFP_UART5_TXD         (0x04UL<<SYS_GPH_MFPL_PH0MFP_Pos)
 #define SYS_GPH_MFPL_PH0MFP_TM0_EXT           (0x0DUL<<SYS_GPH_MFPL_PH0MFP_Pos)
 #define SYS_GPH_MFPL_PH1MFP_GPIO              (0x00UL<<SYS_GPH_MFPL_PH1MFP_Pos)
 #define SYS_GPH_MFPL_PH1MFP_EBI_ADR6          (0x02UL<<SYS_GPH_MFPL_PH1MFP_Pos)
 #define SYS_GPH_MFPL_PH1MFP_UART5_RXD         (0x04UL<<SYS_GPH_MFPL_PH1MFP_Pos)
 #define SYS_GPH_MFPL_PH1MFP_TM1_EXT           (0x0DUL<<SYS_GPH_MFPL_PH1MFP_Pos)
 #define SYS_GPH_MFPL_PH2MFP_GPIO              (0x00UL<<SYS_GPH_MFPL_PH2MFP_Pos)
 #define SYS_GPH_MFPL_PH2MFP_EBI_ADR5          (0x02UL<<SYS_GPH_MFPL_PH2MFP_Pos)
 #define SYS_GPH_MFPL_PH2MFP_UART5_nRTS        (0x04UL<<SYS_GPH_MFPL_PH2MFP_Pos)
 #define SYS_GPH_MFPL_PH2MFP_UART4_TXD         (0x05UL<<SYS_GPH_MFPL_PH2MFP_Pos)
 #define SYS_GPH_MFPL_PH2MFP_I2C0_SCL          (0x06UL<<SYS_GPH_MFPL_PH2MFP_Pos)
 #define SYS_GPH_MFPL_PH2MFP_TM2_EXT           (0x0DUL<<SYS_GPH_MFPL_PH2MFP_Pos)
 #define SYS_GPH_MFPL_PH3MFP_GPIO              (0x00UL<<SYS_GPH_MFPL_PH3MFP_Pos)
 #define SYS_GPH_MFPL_PH3MFP_EBI_ADR4          (0x02UL<<SYS_GPH_MFPL_PH3MFP_Pos)
 #define SYS_GPH_MFPL_PH3MFP_SPI1_I2SMCLK      (0x03UL<<SYS_GPH_MFPL_PH3MFP_Pos)
 #define SYS_GPH_MFPL_PH3MFP_UART5_nCTS        (0x04UL<<SYS_GPH_MFPL_PH3MFP_Pos)
 #define SYS_GPH_MFPL_PH3MFP_UART4_RXD         (0x05UL<<SYS_GPH_MFPL_PH3MFP_Pos)
 #define SYS_GPH_MFPL_PH3MFP_I2C0_SDA          (0x06UL<<SYS_GPH_MFPL_PH3MFP_Pos)
 #define SYS_GPH_MFPL_PH3MFP_TM3_EXT           (0x0DUL<<SYS_GPH_MFPL_PH3MFP_Pos)
 #define SYS_GPH_MFPL_PH4MFP_GPIO              (0x00UL<<SYS_GPH_MFPL_PH4MFP_Pos)
 #define SYS_GPH_MFPL_PH4MFP_EBI_ADR3          (0x02UL<<SYS_GPH_MFPL_PH4MFP_Pos)
 #define SYS_GPH_MFPL_PH4MFP_SPI1_MISO         (0x03UL<<SYS_GPH_MFPL_PH4MFP_Pos)
 #define SYS_GPH_MFPL_PH4MFP_UART7_nRTS        (0x04UL<<SYS_GPH_MFPL_PH4MFP_Pos)
 #define SYS_GPH_MFPL_PH4MFP_UART6_TXD         (0x05UL<<SYS_GPH_MFPL_PH4MFP_Pos)
 #define SYS_GPH_MFPL_PH5MFP_GPIO              (0x00UL<<SYS_GPH_MFPL_PH5MFP_Pos)
 #define SYS_GPH_MFPL_PH5MFP_EBI_ADR2          (0x02UL<<SYS_GPH_MFPL_PH5MFP_Pos)
 #define SYS_GPH_MFPL_PH5MFP_SPI1_MOSI         (0x03UL<<SYS_GPH_MFPL_PH5MFP_Pos)
 #define SYS_GPH_MFPL_PH5MFP_UART7_nCTS        (0x04UL<<SYS_GPH_MFPL_PH5MFP_Pos)
 #define SYS_GPH_MFPL_PH5MFP_UART6_RXD         (0x05UL<<SYS_GPH_MFPL_PH5MFP_Pos)
 #define SYS_GPH_MFPL_PH6MFP_GPIO              (0x00UL<<SYS_GPH_MFPL_PH6MFP_Pos)
 #define SYS_GPH_MFPL_PH6MFP_EBI_ADR1          (0x02UL<<SYS_GPH_MFPL_PH6MFP_Pos)
 #define SYS_GPH_MFPL_PH6MFP_SPI1_CLK          (0x03UL<<SYS_GPH_MFPL_PH6MFP_Pos)
 #define SYS_GPH_MFPL_PH6MFP_UART7_TXD         (0x04UL<<SYS_GPH_MFPL_PH6MFP_Pos)
 #define SYS_GPH_MFPL_PH7MFP_GPIO              (0x00UL<<SYS_GPH_MFPL_PH7MFP_Pos)
 #define SYS_GPH_MFPL_PH7MFP_EBI_ADR0          (0x02UL<<SYS_GPH_MFPL_PH7MFP_Pos)
 #define SYS_GPH_MFPL_PH7MFP_SPI1_SS           (0x03UL<<SYS_GPH_MFPL_PH7MFP_Pos)
 #define SYS_GPH_MFPL_PH7MFP_UART7_RXD         (0x04UL<<SYS_GPH_MFPL_PH7MFP_Pos)
 /********************* Bit definition of GPH_MFPH register **********************/
 #define SYS_GPH_MFPH_PH8MFP_GPIO              (0x00UL<<SYS_GPH_MFPH_PH8MFP_Pos)
 #define SYS_GPH_MFPH_PH8MFP_EBI_AD12          (0x02UL<<SYS_GPH_MFPH_PH8MFP_Pos)
 #define SYS_GPH_MFPH_PH8MFP_QSPI0_CLK         (0x03UL<<SYS_GPH_MFPH_PH8MFP_Pos)
 #define SYS_GPH_MFPH_PH8MFP_SC2_PWR           (0x04UL<<SYS_GPH_MFPH_PH8MFP_Pos)
 #define SYS_GPH_MFPH_PH8MFP_I2S0_DI           (0x05UL<<SYS_GPH_MFPH_PH8MFP_Pos)
 #define SYS_GPH_MFPH_PH8MFP_SPI1_CLK          (0x06UL<<SYS_GPH_MFPH_PH8MFP_Pos)
 #define SYS_GPH_MFPH_PH8MFP_UART3_nRTS        (0x07UL<<SYS_GPH_MFPH_PH8MFP_Pos)
 #define SYS_GPH_MFPH_PH8MFP_I2C1_SMBAL        (0x08UL<<SYS_GPH_MFPH_PH8MFP_Pos)
 #define SYS_GPH_MFPH_PH8MFP_I2C2_SCL          (0x09UL<<SYS_GPH_MFPH_PH8MFP_Pos)
 #define SYS_GPH_MFPH_PH8MFP_UART1_TXD         (0x0AUL<<SYS_GPH_MFPH_PH8MFP_Pos)
 #define SYS_GPH_MFPH_PH9MFP_GPIO              (0x00UL<<SYS_GPH_MFPH_PH9MFP_Pos)
 #define SYS_GPH_MFPH_PH9MFP_EBI_AD13          (0x02UL<<SYS_GPH_MFPH_PH9MFP_Pos)
 #define SYS_GPH_MFPH_PH9MFP_QSPI0_SS          (0x03UL<<SYS_GPH_MFPH_PH9MFP_Pos)
 #define SYS_GPH_MFPH_PH9MFP_SC2_RST           (0x04UL<<SYS_GPH_MFPH_PH9MFP_Pos)
 #define SYS_GPH_MFPH_PH9MFP_I2S0_DO           (0x05UL<<SYS_GPH_MFPH_PH9MFP_Pos)
 #define SYS_GPH_MFPH_PH9MFP_SPI1_SS           (0x06UL<<SYS_GPH_MFPH_PH9MFP_Pos)
 #define SYS_GPH_MFPH_PH9MFP_UART3_nCTS        (0x07UL<<SYS_GPH_MFPH_PH9MFP_Pos)
 #define SYS_GPH_MFPH_PH9MFP_I2C1_SMBSUS       (0x08UL<<SYS_GPH_MFPH_PH9MFP_Pos)
 #define SYS_GPH_MFPH_PH9MFP_I2C2_SDA          (0x09UL<<SYS_GPH_MFPH_PH9MFP_Pos)
 #define SYS_GPH_MFPH_PH9MFP_UART1_RXD         (0x0AUL<<SYS_GPH_MFPH_PH9MFP_Pos)
 #define SYS_GPH_MFPH_PH10MFP_GPIO             (0x00UL<<SYS_GPH_MFPH_PH10MFP_Pos)
 #define SYS_GPH_MFPH_PH10MFP_EBI_AD14         (0x02UL<<SYS_GPH_MFPH_PH10MFP_Pos)
 #define SYS_GPH_MFPH_PH10MFP_QSPI0_MISO1      (0x03UL<<SYS_GPH_MFPH_PH10MFP_Pos)
 #define SYS_GPH_MFPH_PH10MFP_SC2_nCD          (0x04UL<<SYS_GPH_MFPH_PH10MFP_Pos)
 #define SYS_GPH_MFPH_PH10MFP_I2S0_LRCK        (0x05UL<<SYS_GPH_MFPH_PH10MFP_Pos)
 #define SYS_GPH_MFPH_PH10MFP_SPI1_I2SMCLK     (0x06UL<<SYS_GPH_MFPH_PH10MFP_Pos)
 #define SYS_GPH_MFPH_PH10MFP_UART4_TXD        (0x07UL<<SYS_GPH_MFPH_PH10MFP_Pos)
 #define SYS_GPH_MFPH_PH10MFP_UART0_TXD        (0x08UL<<SYS_GPH_MFPH_PH10MFP_Pos)
 #define SYS_GPH_MFPH_PH11MFP_GPIO             (0x00UL<<SYS_GPH_MFPH_PH11MFP_Pos)
 #define SYS_GPH_MFPH_PH11MFP_EBI_AD15         (0x02UL<<SYS_GPH_MFPH_PH11MFP_Pos)
 #define SYS_GPH_MFPH_PH11MFP_QSPI0_MOSI1      (0x03UL<<SYS_GPH_MFPH_PH11MFP_Pos)
 #define SYS_GPH_MFPH_PH11MFP_UART4_RXD        (0x07UL<<SYS_GPH_MFPH_PH11MFP_Pos)
 #define SYS_GPH_MFPH_PH11MFP_UART0_RXD        (0x08UL<<SYS_GPH_MFPH_PH11MFP_Pos)
 #define SYS_GPH_MFPH_PH11MFP_EPWM0_CH5        (0x0BUL<<SYS_GPH_MFPH_PH11MFP_Pos)
  /* end of group SYS_EXPORTED_CONSTANTS */


 #define SYS_CLEAR_BOD_INT_FLAG()        (SYS->BODCTL |= SYS_BODCTL_BODIF_Msk)

 #define SYS_CLEAR_BOD_LPM()             (SYS->BODCTL &= ~SYS_BODCTL_BODLPM_Msk)

 #define SYS_DISABLE_BOD()               (SYS->BODCTL &= ~SYS_BODCTL_BODEN_Msk)

 #define SYS_ENABLE_BOD()                (SYS->BODCTL |= SYS_BODCTL_BODEN_Msk)

 #define SYS_GET_BOD_INT_FLAG()          (SYS->BODCTL & SYS_BODCTL_BODIF_Msk)

 #define SYS_GET_BOD_OUTPUT()            (SYS->BODCTL & SYS_BODCTL_BODOUT_Msk)

 #define SYS_DISABLE_BOD_RST()           (SYS->BODCTL &= ~SYS_BODCTL_BODRSTEN_Msk)

 #define SYS_ENABLE_BOD_RST()            (SYS->BODCTL |= SYS_BODCTL_BODRSTEN_Msk)

 #define SYS_SET_BOD_LPM()               (SYS->BODCTL |= SYS_BODCTL_BODLPM_Msk)

 #define SYS_SET_BOD_LEVEL(u32Level)     (SYS->BODCTL = (SYS->BODCTL & ~SYS_BODCTL_BODVL_Msk) | (u32Level))

 #define SYS_IS_BOD_RST()                (SYS->RSTSTS & SYS_RSTSTS_BODRF_Msk)

 #define SYS_IS_CPU_RST()                (SYS->RSTSTS & SYS_RSTSTS_CPURF_Msk)

 #define SYS_IS_LVR_RST()                (SYS->RSTSTS & SYS_RSTSTS_LVRF_Msk)

 #define SYS_IS_POR_RST()                (SYS->RSTSTS & SYS_RSTSTS_PORF_Msk)

 #define SYS_IS_RSTPIN_RST()             (SYS->RSTSTS & SYS_RSTSTS_PINRF_Msk)

 #define SYS_IS_SYSTEM_RST()             (SYS->RSTSTS & SYS_RSTSTS_SYSRF_Msk)

 #define SYS_IS_WDT_RST()                (SYS->RSTSTS & SYS_RSTSTS_WDTRF_Msk)

 #define SYS_DISABLE_LVR()               (SYS->BODCTL &= ~SYS_BODCTL_LVREN_Msk)

 #define SYS_ENABLE_LVR()                (SYS->BODCTL |= SYS_BODCTL_LVREN_Msk)

 #define SYS_DISABLE_POR()               (((SYS->CSERVER & SYS_CSERVER_VERSION_Msk) == 0) ? (SYS->PORCTL = 0x5AA5):(SYS->PORDISAN = 0x5AA5))

 #define SYS_ENABLE_POR()               (((SYS->CSERVER & SYS_CSERVER_VERSION_Msk) == 0) ? (SYS->PORCTL = 0):(SYS->PORDISAN = 0))

 #define SYS_CLEAR_RST_SOURCE(u32RstSrc) ((SYS->RSTSTS) = (u32RstSrc) )


 /*---------------------------------------------------------------------------------------------------------*/
 /* static inline functions                                                                                 */
 /*---------------------------------------------------------------------------------------------------------*/
 /* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */
 __STATIC_INLINE void SYS_UnlockReg(void);
 __STATIC_INLINE void SYS_LockReg(void);

 __STATIC_INLINE void SYS_UnlockReg(void)
 {
     do
     {
         SYS->REGLCTL = 0x59UL;
         SYS->REGLCTL = 0x16UL;
         SYS->REGLCTL = 0x88UL;
     }
     while(SYS->REGLCTL == 0UL);
 }

 __STATIC_INLINE void SYS_LockReg(void)
 {
     SYS->REGLCTL = 0UL;
 }


 void SYS_ClearResetSrc(uint32_t u32Src);
 uint32_t SYS_GetBODStatus(void);
 uint32_t SYS_GetResetSrc(void);
 uint32_t SYS_IsRegLocked(void);
 uint32_t SYS_ReadPDID(void);
 void SYS_ResetChip(void);
 void SYS_ResetCPU(void);
 void SYS_ResetModule(uint32_t u32ModuleIndex);
 void SYS_EnableBOD(int32_t i32Mode, uint32_t u32BODLevel);
 void SYS_DisableBOD(void);
 void SYS_SetPowerLevel(uint32_t u32PowerLevel);
 void SYS_SetVRef(uint32_t u32VRefCTL);
  /* end of group SYS_EXPORTED_FUNCTIONS */
  /* end of group SYS_Driver */
  /* end of group Standard_Driver */


 #ifdef __cplusplus
 }
 #endif

 #endif  /* __SYS_H__ */

 /*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/
SYS_GetBODStatus
uint32_t SYS_GetBODStatus(void)
Get Brown-out detector output status.
Definition: sys.c:56

SYS_SetVRef
void SYS_SetVRef(uint32_t u32VRefCTL)
Set Reference Voltage.
Definition: sys.c:268

SYS_ResetChip
void SYS_ResetChip(void)
Reset chip with chip reset.
Definition: sys.c:102

SYS_ResetModule
void SYS_ResetModule(uint32_t u32ModuleIndex)
Reset selected module.
Definition: sys.c:184

SYS_GetResetSrc
uint32_t SYS_GetResetSrc(void)
Get reset status register value.
Definition: sys.c:67

SYS_LockReg
__STATIC_INLINE void SYS_LockReg(void)
Enable register write-protection function.
Definition: sys.h:1604

SYS_DisableBOD
void SYS_DisableBOD(void)
Disable Brown-out detector function.
Definition: sys.c:235

SYS_ReadPDID
uint32_t SYS_ReadPDID(void)
Get product ID.
Definition: sys.c:90

SYS
#define SYS
Definition: M480.h:367

SYS_IsRegLocked
uint32_t SYS_IsRegLocked(void)
Check if register is locked nor not.
Definition: sys.c:79

SYS_ResetCPU
void SYS_ResetCPU(void)
Reset chip with CPU reset.
Definition: sys.c:114

SYS_UnlockReg
__STATIC_INLINE void SYS_UnlockReg(void)
Disable register write-protection function.
Definition: sys.h:1586

SYS_SetPowerLevel
void SYS_SetPowerLevel(uint32_t u32PowerLevel)
Set Power Level.
Definition: sys.c:249

SYS_ClearResetSrc
void SYS_ClearResetSrc(uint32_t u32Src)
Clear reset source.
Definition: sys.c:44

SYS_EnableBOD
void SYS_EnableBOD(int32_t i32Mode, uint32_t u32BODLevel)
Enable and configure Brown-out detector function.
Definition: sys.c:216