spim_reg.h

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/**************************************************************************/
#ifndef __SPIM_REG_H__
#define __SPIM_REG_H__

#if defined ( __CC_ARM   )
#pragma anon_unions
#endif

typedef struct
{


    __IO uint32_t CTL0;                  
    __IO uint32_t CTL1;                  
    __I  uint32_t RESERVE0[1];
    __IO uint32_t RXCLKDLY;              
    __I  uint32_t RX[4];                 
    __IO uint32_t TX[4];                 
    __IO uint32_t SRAMADDR;              
    __IO uint32_t DMACNT;                
    __IO uint32_t FADDR;                 
    __O  uint32_t KEY1;                  
    __O  uint32_t KEY2;                  
    __IO uint32_t DMMCTL;                
    __IO uint32_t CTL2;                  
} SPIM_T;

#define SPIM_CTL0_CIPHOFF_Pos            (0)                                               
#define SPIM_CTL0_CIPHOFF_Msk            (0x1ul << SPIM_CTL0_CIPHOFF_Pos)                  
#define SPIM_CTL0_BALEN_Pos              (2)                                               
#define SPIM_CTL0_BALEN_Msk              (0x1ul << SPIM_CTL0_BALEN_Pos)                    
#define SPIM_CTL0_B4ADDREN_Pos           (5)                                               
#define SPIM_CTL0_B4ADDREN_Msk           (0x1ul << SPIM_CTL0_B4ADDREN_Pos)                 
#define SPIM_CTL0_IEN_Pos                (6)                                               
#define SPIM_CTL0_IEN_Msk                (0x1ul << SPIM_CTL0_IEN_Pos)                      
#define SPIM_CTL0_IF_Pos                 (7)                                               
#define SPIM_CTL0_IF_Msk                 (0x1ul << SPIM_CTL0_IF_Pos)                       
#define SPIM_CTL0_DWIDTH_Pos             (8)                                               
#define SPIM_CTL0_DWIDTH_Msk             (0x1ful << SPIM_CTL0_DWIDTH_Pos)                  
#define SPIM_CTL0_BURSTNUM_Pos           (13)                                              
#define SPIM_CTL0_BURSTNUM_Msk           (0x3ul << SPIM_CTL0_BURSTNUM_Pos)                 
#define SPIM_CTL0_QDIODIR_Pos            (15)                                              
#define SPIM_CTL0_QDIODIR_Msk            (0x1ul << SPIM_CTL0_QDIODIR_Pos)                  
#define SPIM_CTL0_SUSPITV_Pos            (16)                                              
#define SPIM_CTL0_SUSPITV_Msk            (0xful << SPIM_CTL0_SUSPITV_Pos)                  
#define SPIM_CTL0_BITMODE_Pos            (20)                                              
#define SPIM_CTL0_BITMODE_Msk            (0x3ul << SPIM_CTL0_BITMODE_Pos)                  
#define SPIM_CTL0_OPMODE_Pos             (22)                                              
#define SPIM_CTL0_OPMODE_Msk             (0x3ul << SPIM_CTL0_OPMODE_Pos)                   
#define SPIM_CTL0_CMDCODE_Pos            (24)                                              
#define SPIM_CTL0_CMDCODE_Msk            (0xfful << SPIM_CTL0_CMDCODE_Pos)                 
#define SPIM_CTL1_SPIMEN_Pos             (0)                                               
#define SPIM_CTL1_SPIMEN_Msk             (0x1ul << SPIM_CTL1_SPIMEN_Pos)                   
#define SPIM_CTL1_CACHEOFF_Pos           (1)                                               
#define SPIM_CTL1_CACHEOFF_Msk           (0x1ul << SPIM_CTL1_CACHEOFF_Pos)                 
#define SPIM_CTL1_CCMEN_Pos              (2)                                               
#define SPIM_CTL1_CCMEN_Msk              (0x1ul << SPIM_CTL1_CCMEN_Pos)                    
#define SPIM_CTL1_CDINVAL_Pos            (3)                                               
#define SPIM_CTL1_CDINVAL_Msk            (0x1ul << SPIM_CTL1_CDINVAL_Pos)                  
#define SPIM_CTL1_SS_Pos                 (4)                                               
#define SPIM_CTL1_SS_Msk                 (0x1ul << SPIM_CTL1_SS_Pos)                       
#define SPIM_CTL1_SSACTPOL_Pos           (5)                                               
#define SPIM_CTL1_SSACTPOL_Msk           (0x1ul << SPIM_CTL1_SSACTPOL_Pos)                 
#define SPIM_CTL1_IDLETIME_Pos           (8)                                               
#define SPIM_CTL1_IDLETIME_Msk           (0xful << SPIM_CTL1_IDLETIME_Pos)                 
#define SPIM_CTL1_DIVIDER_Pos            (16)                                              
#define SPIM_CTL1_DIVIDER_Msk            (0xfffful << SPIM_CTL1_DIVIDER_Pos)               
#define SPIM_RXCLKDLY_DWDELSEL_Pos       (0)                                               
#define SPIM_RXCLKDLY_DWDELSEL_Msk       (0xfful << SPIM_RXCLKDLY_DWDELSEL_Pos)            
#define SPIM_RXCLKDLY_RDDLYSEL_Pos       (16)                                              
#define SPIM_RXCLKDLY_RDDLYSEL_Msk       (0x7ul << SPIM_RXCLKDLY_RDDLYSEL_Pos)             
#define SPIM_RXCLKDLY_RDEDGE_Pos         (20)                                              
#define SPIM_RXCLKDLY_RDEDGE_Msk         (0x1ul << SPIM_RXCLKDLY_RDEDGE_Pos)               
#define SPIM_RX_RXDAT_Pos                (0)                                               
#define SPIM_RX_RXDAT_Msk                (0xfffffffful << SPIM_RX_RXDAT_Pos)               
#define SPIM_TX_TXDAT_Pos                (0)                                               
#define SPIM_TX_TXDAT_Msk                (0xfffffffful << SPIM_TX_TXDAT_Pos)               
#define SPIM_SRAMADDR_ADDR_Pos           (0)                                               
#define SPIM_SRAMADDR_ADDR_Msk           (0xfffffffful << SPIM_SRAMADDR_ADDR_Pos)          
#define SPIM_DMACNT_DMACNT_Pos           (0)                                               
#define SPIM_DMACNT_DMACNT_Msk           (0xfffffful << SPIM_DMACNT_DMACNT_Pos)            
#define SPIM_FADDR_ADDR_Pos              (0)                                               
#define SPIM_FADDR_ADDR_Msk              (0xfffffffful << SPIM_FADDR_ADDR_Pos)             
#define SPIM_KEY1_KEY1_Pos               (0)                                               
#define SPIM_KEY1_KEY1_Msk               (0xfffffffful << SPIM_KEY1_KEY1_Pos)              
#define SPIM_KEY2_KEY2_Pos               (0)                                               
#define SPIM_KEY2_KEY2_Msk               (0xfffffffful << SPIM_KEY2_KEY2_Pos)              
#define SPIM_DMMCTL_CRMDAT_Pos           (8)                                               
#define SPIM_DMMCTL_CRMDAT_Msk           (0xfful << SPIM_DMMCTL_CRMDAT_Pos)                
#define SPIM_DMMCTL_DESELTIM_Pos         (16)                                              
#define SPIM_DMMCTL_DESELTIM_Msk         (0x1ful << SPIM_DMMCTL_DESELTIM_Pos)              
#define SPIM_DMMCTL_BWEN_Pos             (24)                                              
#define SPIM_DMMCTL_BWEN_Msk             (0x1ul << SPIM_DMMCTL_BWEN_Pos)                   
#define SPIM_DMMCTL_CREN_Pos             (25)                                              
#define SPIM_DMMCTL_CREN_Msk             (0x1ul << SPIM_DMMCTL_CREN_Pos)                   
#define SPIM_DMMCTL_UACTSCLK_Pos         (26)                                              
#define SPIM_DMMCTL_UACTSCLK_Msk         (0x1ul << SPIM_DMMCTL_UACTSCLK_Pos)               
#define SPIM_DMMCTL_ACTSCLKT_Pos         (28)                                              
#define SPIM_DMMCTL_ACTSCLKT_Msk         (0xful << SPIM_DMMCTL_ACTSCLKT_Pos)               
#define SPIM_CTL2_USETEN_Pos             (16)                                              
#define SPIM_CTL2_USETEN_Msk             (0x1ul << SPIM_CTL2_USETEN_Pos)                   
#define SPIM_CTL2_DTRMPOFF_Pos           (20)                                              
#define SPIM_CTL2_DTRMPOFF_Msk           (0x1ul << SPIM_CTL2_DTRMPOFF_Pos)                 
#define SPIM_CTL2_DCNUM_Pos              (24)                                              
#define SPIM_CTL2_DCNUM_Msk              (0x1ful << SPIM_CTL2_DCNUM_Pos)                    /* SPIM_CONST */
 /* end of SPIM register group */ /* end of REGISTER group */

#if defined ( __CC_ARM   )
#pragma no_anon_unions
#endif

#endif /* __SPIM_REG_H__ */