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M480 BSP
V3.05.001
The Board Support Package for M480 Series
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M480 series SPI driver header file. More...
Go to the source code of this file.
Macros | |
| #define | SPI_MODE_0 |
| #define | SPI_MODE_1 |
| #define | SPI_MODE_2 |
| #define | SPI_MODE_3 |
| #define | SPI_SLAVE |
| #define | SPI_MASTER |
| #define | SPI_SS |
| #define | SPI_SS_ACTIVE_HIGH |
| #define | SPI_SS_ACTIVE_LOW |
| #define | SPI_UNIT_INT_MASK |
| #define | SPI_SSACT_INT_MASK |
| #define | SPI_SSINACT_INT_MASK |
| #define | SPI_SLVUR_INT_MASK |
| #define | SPI_SLVBE_INT_MASK |
| #define | SPI_TXUF_INT_MASK |
| #define | SPI_FIFO_TXTH_INT_MASK |
| #define | SPI_FIFO_RXTH_INT_MASK |
| #define | SPI_FIFO_RXOV_INT_MASK |
| #define | SPI_FIFO_RXTO_INT_MASK |
| #define | SPI_BUSY_MASK |
| #define | SPI_RX_EMPTY_MASK |
| #define | SPI_RX_FULL_MASK |
| #define | SPI_TX_EMPTY_MASK |
| #define | SPI_TX_FULL_MASK |
| #define | SPI_TXRX_RESET_MASK |
| #define | SPI_SPIEN_STS_MASK |
| #define | SPI_SSLINE_STS_MASK |
| #define | SPII2S_DATABIT_8 |
| #define | SPII2S_DATABIT_16 |
| #define | SPII2S_DATABIT_24 |
| #define | SPII2S_DATABIT_32 |
| #define | SPII2S_MONO |
| #define | SPII2S_STEREO |
| #define | SPII2S_FORMAT_I2S |
| #define | SPII2S_FORMAT_MSB |
| #define | SPII2S_FORMAT_PCMA |
| #define | SPII2S_FORMAT_PCMB |
| #define | SPII2S_MODE_SLAVE |
| #define | SPII2S_MODE_MASTER |
| #define | SPII2S_MONO_RIGHT |
| #define | SPII2S_MONO_LEFT |
| #define | SPII2S_RIGHT |
| #define | SPII2S_LEFT |
| #define | SPII2S_FIFO_TXTH_INT_MASK |
| #define | SPII2S_FIFO_RXTH_INT_MASK |
| #define | SPII2S_FIFO_RXOV_INT_MASK |
| #define | SPII2S_FIFO_RXTO_INT_MASK |
| #define | SPII2S_TXUF_INT_MASK |
| #define | SPII2S_RIGHT_ZC_INT_MASK |
| #define | SPII2S_LEFT_ZC_INT_MASK |
| #define | SPI_CLR_UNIT_TRANS_INT_FLAG(spi) |
| Clear the unit transfer interrupt flag. More... | |
| #define | SPI_TRIGGER_RX_PDMA(spi) |
| Trigger RX PDMA function. More... | |
| #define | SPI_TRIGGER_TX_PDMA(spi) |
| Trigger TX PDMA function. More... | |
| #define | SPI_TRIGGER_TX_RX_PDMA(spi) |
| Trigger TX and RX PDMA function. More... | |
| #define | SPI_DISABLE_RX_PDMA(spi) |
| Disable RX PDMA transfer. More... | |
| #define | SPI_DISABLE_TX_PDMA(spi) |
| Disable TX PDMA transfer. More... | |
| #define | SPI_DISABLE_TX_RX_PDMA(spi) |
| Disable TX and RX PDMA transfer. More... | |
| #define | SPI_GET_RX_FIFO_COUNT(spi) |
| Get the count of available data in RX FIFO. More... | |
| #define | SPI_GET_RX_FIFO_EMPTY_FLAG(spi) |
| Get the RX FIFO empty flag. More... | |
| #define | SPI_GET_TX_FIFO_EMPTY_FLAG(spi) |
| Get the TX FIFO empty flag. More... | |
| #define | SPI_GET_TX_FIFO_FULL_FLAG(spi) |
| Get the TX FIFO full flag. More... | |
| #define | SPI_READ_RX(spi) |
| Get the datum read from RX register. More... | |
| #define | SPI_WRITE_TX(spi, u32TxData) |
| Write datum to TX register. More... | |
| #define | SPI_SET_SS_HIGH(spi) |
| Set SPIx_SS pin to high state. More... | |
| #define | SPI_SET_SS_LOW(spi) |
| Set SPIx_SS pin to low state. More... | |
| #define | SPI_ENABLE_BYTE_REORDER(spi) |
| Enable Byte Reorder function. More... | |
| #define | SPI_DISABLE_BYTE_REORDER(spi) |
| Disable Byte Reorder function. More... | |
| #define | SPI_SET_SUSPEND_CYCLE(spi, u32SuspCycle) |
| Set the length of suspend interval. More... | |
| #define | SPI_SET_LSB_FIRST(spi) |
| Set the SPI transfer sequence with LSB first. More... | |
| #define | SPI_SET_MSB_FIRST(spi) |
| Set the SPI transfer sequence with MSB first. More... | |
| #define | SPI_SET_DATA_WIDTH(spi, u32Width) |
| Set the data width of a SPI transaction. More... | |
| #define | SPI_IS_BUSY(spi) |
| Get the SPI busy state. More... | |
| #define | SPI_ENABLE(spi) |
| Enable SPI controller. More... | |
| #define | SPI_DISABLE(spi) |
| Disable SPI controller. More... | |
| #define | SPII2S_ENABLE_TXDMA(i2s) |
| Enable I2S TX DMA function. More... | |
| #define | SPII2S_DISABLE_TXDMA(i2s) |
| Disable I2S TX DMA function. More... | |
| #define | SPII2S_ENABLE_RXDMA(i2s) |
| Enable I2S RX DMA function. More... | |
| #define | SPII2S_DISABLE_RXDMA(i2s) |
| Disable I2S RX DMA function. More... | |
| #define | SPII2S_ENABLE_TX(i2s) |
| Enable I2S TX function. More... | |
| #define | SPII2S_DISABLE_TX(i2s) |
| Disable I2S TX function. More... | |
| #define | SPII2S_ENABLE_RX(i2s) |
| Enable I2S RX function. More... | |
| #define | SPII2S_DISABLE_RX(i2s) |
| Disable I2S RX function. More... | |
| #define | SPII2S_ENABLE_TX_MUTE(i2s) |
| Enable TX Mute function. More... | |
| #define | SPII2S_DISABLE_TX_MUTE(i2s) |
| Disable TX Mute function. More... | |
| #define | SPII2S_CLR_TX_FIFO(i2s) |
| Clear TX FIFO. More... | |
| #define | SPII2S_CLR_RX_FIFO(i2s) |
| Clear RX FIFO. More... | |
| #define | SPII2S_WRITE_TX_FIFO(i2s, u32Data) |
| Write data to I2S TX FIFO. More... | |
| #define | SPII2S_READ_RX_FIFO(i2s) |
| Read RX FIFO. More... | |
| #define | SPII2S_GET_INT_FLAG(i2s, u32Mask) |
| Get the interrupt flag. More... | |
| #define | SPII2S_CLR_INT_FLAG(i2s, u32Mask) |
| Clear the interrupt flag. More... | |
| #define | SPII2S_GET_TX_FIFO_LEVEL(i2s) |
| Get transmit FIFO level. More... | |
| #define | SPII2S_GET_RX_FIFO_LEVEL(i2s) |
| Get receive FIFO level. More... | |
Functions | |
| __STATIC_INLINE void | SPII2S_ENABLE_TX_ZCD (SPI_T *i2s, uint32_t u32ChMask) |
| Enable zero cross detection function. More... | |
| __STATIC_INLINE void | SPII2S_DISABLE_TX_ZCD (SPI_T *i2s, uint32_t u32ChMask) |
| Disable zero cross detection function. More... | |
| __STATIC_INLINE void | SPII2S_SET_MONO_RX_CHANNEL (SPI_T *i2s, uint32_t u32Ch) |
| This function sets the recording source channel when mono mode is used. More... | |
| uint32_t | SPI_Open (SPI_T *spi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock) |
| This function make SPI module be ready to transfer. More... | |
| void | SPI_Close (SPI_T *spi) |
| Disable SPI controller. More... | |
| void | SPI_ClearRxFIFO (SPI_T *spi) |
| Clear RX FIFO buffer. More... | |
| void | SPI_ClearTxFIFO (SPI_T *spi) |
| Clear TX FIFO buffer. More... | |
| void | SPI_DisableAutoSS (SPI_T *spi) |
| Disable the automatic slave selection function. More... | |
| void | SPI_EnableAutoSS (SPI_T *spi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel) |
| Enable the automatic slave selection function. More... | |
| uint32_t | SPI_SetBusClock (SPI_T *spi, uint32_t u32BusClock) |
| Set the SPI bus clock. More... | |
| void | SPI_SetFIFO (SPI_T *spi, uint32_t u32TxThreshold, uint32_t u32RxThreshold) |
| Configure FIFO threshold setting. More... | |
| uint32_t | SPI_GetBusClock (SPI_T *spi) |
| Get the actual frequency of SPI bus clock. Only available in Master mode. More... | |
| void | SPI_EnableInt (SPI_T *spi, uint32_t u32Mask) |
| Enable interrupt function. More... | |
| void | SPI_DisableInt (SPI_T *spi, uint32_t u32Mask) |
| Disable interrupt function. More... | |
| uint32_t | SPI_GetIntFlag (SPI_T *spi, uint32_t u32Mask) |
| Get interrupt flag. More... | |
| void | SPI_ClearIntFlag (SPI_T *spi, uint32_t u32Mask) |
| Clear interrupt flag. More... | |
| uint32_t | SPI_GetStatus (SPI_T *spi, uint32_t u32Mask) |
| Get SPI status. More... | |
| uint32_t | SPII2S_Open (SPI_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat) |
| This function configures some parameters of I2S interface for general purpose use. More... | |
| void | SPII2S_Close (SPI_T *i2s) |
| Disable I2S function. More... | |
| void | SPII2S_EnableInt (SPI_T *i2s, uint32_t u32Mask) |
| Enable interrupt function. More... | |
| void | SPII2S_DisableInt (SPI_T *i2s, uint32_t u32Mask) |
| Disable interrupt function. More... | |
| uint32_t | SPII2S_EnableMCLK (SPI_T *i2s, uint32_t u32BusClock) |
| Enable master clock (MCLK). More... | |
| void | SPII2S_DisableMCLK (SPI_T *i2s) |
| Disable master clock (MCLK). More... | |
| void | SPII2S_SetFIFO (SPI_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold) |
| Configure FIFO threshold setting. More... | |
M480 series SPI driver header file.
Definition in file spi.h.
1.8.15