Document/html/i2c__reg_8h_source.html

 /**************************************************************************/
 #ifndef __I2C_REG_H__
 #define __I2C_REG_H__

 #if defined ( __CC_ARM   )
 #pragma anon_unions
 #endif

 typedef struct
 {


     __IO uint32_t CTL0;
     __IO uint32_t ADDR0;
     __IO uint32_t DAT;
     __I  uint32_t STATUS0;
     __IO uint32_t CLKDIV;
     __IO uint32_t TOCTL;
     __IO uint32_t ADDR1;
     __IO uint32_t ADDR2;
     __IO uint32_t ADDR3;
     __IO uint32_t ADDRMSK0;
     __IO uint32_t ADDRMSK1;
     __IO uint32_t ADDRMSK2;
     __IO uint32_t ADDRMSK3;
     __I  uint32_t RESERVE0[2];
     __IO uint32_t WKCTL;
     __IO uint32_t WKSTS;
     __IO uint32_t CTL1;
     __IO uint32_t STATUS1;
     __IO uint32_t TMCTL;
     __IO uint32_t BUSCTL;
     __IO uint32_t BUSTCTL;
     __IO uint32_t BUSSTS;
     __IO uint32_t PKTSIZE;
     __I  uint32_t PKTCRC;
     __IO uint32_t BUSTOUT;
     __IO uint32_t CLKTOUT;
 } I2C_T;

 #define I2C_CTL0_AA_Pos                  (2)
 #define I2C_CTL0_AA_Msk                  (0x1ul << I2C_CTL0_AA_Pos)
 #define I2C_CTL0_SI_Pos                  (3)
 #define I2C_CTL0_SI_Msk                  (0x1ul << I2C_CTL0_SI_Pos)
 #define I2C_CTL0_STO_Pos                 (4)
 #define I2C_CTL0_STO_Msk                 (0x1ul << I2C_CTL0_STO_Pos)
 #define I2C_CTL0_STA_Pos                 (5)
 #define I2C_CTL0_STA_Msk                 (0x1ul << I2C_CTL0_STA_Pos)
 #define I2C_CTL0_I2CEN_Pos               (6)
 #define I2C_CTL0_I2CEN_Msk               (0x1ul << I2C_CTL0_I2CEN_Pos)
 #define I2C_CTL0_INTEN_Pos               (7)
 #define I2C_CTL0_INTEN_Msk               (0x1ul << I2C_CTL0_INTEN_Pos)
 #define I2C_ADDR0_GC_Pos                 (0)
 #define I2C_ADDR0_GC_Msk                 (0x1ul << I2C_ADDR0_GC_Pos)
 #define I2C_ADDR0_ADDR_Pos               (1)
 #define I2C_ADDR0_ADDR_Msk               (0x3fful << I2C_ADDR0_ADDR_Pos)
 #define I2C_DAT_DAT_Pos                  (0)
 #define I2C_DAT_DAT_Msk                  (0xfful << I2C_DAT_DAT_Pos)
 #define I2C_STATUS0_STATUS_Pos           (0)
 #define I2C_STATUS0_STATUS_Msk           (0xfful << I2C_STATUS_STATUS0_Pos)
 #define I2C_CLKDIV_DIVIDER_Pos           (0)
 #define I2C_CLKDIV_DIVIDER_Msk           (0x3fful << I2C_CLKDIV_DIVIDER_Pos)
 #define I2C_TOCTL_TOIF_Pos               (0)
 #define I2C_TOCTL_TOIF_Msk               (0x1ul << I2C_TOCTL_TOIF_Pos)
 #define I2C_TOCTL_TOCDIV4_Pos            (1)
 #define I2C_TOCTL_TOCDIV4_Msk            (0x1ul << I2C_TOCTL_TOCDIV4_Pos)
 #define I2C_TOCTL_TOCEN_Pos              (2)
 #define I2C_TOCTL_TOCEN_Msk              (0x1ul << I2C_TOCTL_TOCEN_Pos)
 #define I2C_ADDR1_GC_Pos                 (0)
 #define I2C_ADDR1_GC_Msk                 (0x1ul << I2C_ADDR1_GC_Pos)
 #define I2C_ADDR1_ADDR_Pos               (1)
 #define I2C_ADDR1_ADDR_Msk               (0x3fful << I2C_ADDR1_ADDR_Pos)
 #define I2C_ADDR2_GC_Pos                 (0)
 #define I2C_ADDR2_GC_Msk                 (0x1ul << I2C_ADDR2_GC_Pos)
 #define I2C_ADDR2_ADDR_Pos               (1)
 #define I2C_ADDR2_ADDR_Msk               (0x3fful << I2C_ADDR2_ADDR_Pos)
 #define I2C_ADDR3_GC_Pos                 (0)
 #define I2C_ADDR3_GC_Msk                 (0x1ul << I2C_ADDR3_GC_Pos)
 #define I2C_ADDR3_ADDR_Pos               (1)
 #define I2C_ADDR3_ADDR_Msk               (0x3fful << I2C_ADDR3_ADDR_Pos)
 #define I2C_ADDRMSK0_ADDRMSK_Pos         (1)
 #define I2C_ADDRMSK0_ADDRMSK_Msk         (0x3fful << I2C_ADDRMSK0_ADDRMSK_Pos)
 #define I2C_ADDRMSK1_ADDRMSK_Pos         (1)
 #define I2C_ADDRMSK1_ADDRMSK_Msk         (0x3fful << I2C_ADDRMSK1_ADDRMSK_Pos)
 #define I2C_ADDRMSK2_ADDRMSK_Pos         (1)
 #define I2C_ADDRMSK2_ADDRMSK_Msk         (0x3fful << I2C_ADDRMSK2_ADDRMSK_Pos)
 #define I2C_ADDRMSK3_ADDRMSK_Pos         (1)
 #define I2C_ADDRMSK3_ADDRMSK_Msk         (0x3fful << I2C_ADDRMSK3_ADDRMSK_Pos)
 #define I2C_WKCTL_WKEN_Pos               (0)
 #define I2C_WKCTL_WKEN_Msk               (0x1ul << I2C_WKCTL_WKEN_Pos)
 #define I2C_WKCTL_NHDBUSEN_Pos           (7)
 #define I2C_WKCTL_NHDBUSEN_Msk           (0x1ul << I2C_WKCTL_NHDBUSEN_Pos)
 #define I2C_WKSTS_WKIF_Pos               (0)
 #define I2C_WKSTS_WKIF_Msk               (0x1ul << I2C_WKSTS_WKIF_Pos)
 #define I2C_WKSTS_WKAKDONE_Pos           (1)
 #define I2C_WKSTS_WKAKDONE_Msk           (0x1ul << I2C_WKSTS_WKAKDONE_Pos)
 #define I2C_WKSTS_WRSTSWK_Pos            (2)
 #define I2C_WKSTS_WRSTSWK_Msk            (0x1ul << I2C_WKSTS_WRSTSWK_Pos)
 #define I2C_CTL1_TXPDMAEN_Pos            (0)
 #define I2C_CTL1_TXPDMAEN_Msk            (0x1ul << I2C_CTL1_TXPDMAEN_Pos)
 #define I2C_CTL1_RXPDMAEN_Pos            (1)
 #define I2C_CTL1_RXPDMAEN_Msk            (0x1ul << I2C_CTL1_RXPDMAEN_Pos)
 #define I2C_CTL1_PDMARST_Pos             (2)
 #define I2C_CTL1_PDMARST_Msk             (0x1ul << I2C_CTL1_PDMARST_Pos)
 #define I2C_CTL1_PDMASTR_Pos             (8)
 #define I2C_CTL1_PDMASTR_Msk             (0x1ul << I2C_CTL1_PDMASTR_Pos)
 #define I2C_CTL1_ADDR10EN_Pos            (9)
 #define I2C_CTL1_ADDR10EN_Msk            (0x1ul << I2C_CTL1_ADDR10EN_Pos)
 #define I2C_STATUS1_ADMAT0_Pos           (0)
 #define I2C_STATUS1_ADMAT0_Msk           (0x1ul << I2C_STATUS1_ADMAT0_Pos)
 #define I2C_STATUS1_ADMAT1_Pos           (1)
 #define I2C_STATUS1_ADMAT1_Msk           (0x1ul << I2C_STATUS1_ADMAT1_Pos)
 #define I2C_STATUS1_ADMAT2_Pos           (2)
 #define I2C_STATUS1_ADMAT2_Msk           (0x1ul << I2C_STATUS1_ADMAT2_Pos)
 #define I2C_STATUS1_ADMAT3_Pos           (3)
 #define I2C_STATUS1_ADMAT3_Msk           (0x1ul << I2C_STATUS1_ADMAT3_Pos)
 #define I2C_STATUS1_ONBUSY_Pos           (8)
 #define I2C_STATUS1_ONBUSY_Msk           (0x1ul << I2C_STATUS1_ONBUSY_Pos)
 #define I2C_TMCTL_STCTL_Pos              (0)
 #define I2C_TMCTL_STCTL_Msk              (0x1fful << I2C_TMCTL_STCTL_Pos)
 #define I2C_TMCTL_HTCTL_Pos              (16)
 #define I2C_TMCTL_HTCTL_Msk              (0x1fful << I2C_TMCTL_HTCTL_Pos)
 #define I2C_BUSCTL_ACKMEN_Pos            (0)
 #define I2C_BUSCTL_ACKMEN_Msk            (0x1ul << I2C_BUSCTL_ACKMEN_Pos)
 #define I2C_BUSCTL_PECEN_Pos             (1)
 #define I2C_BUSCTL_PECEN_Msk             (0x1ul << I2C_BUSCTL_PECEN_Pos)
 #define I2C_BUSCTL_BMDEN_Pos             (2)
 #define I2C_BUSCTL_BMDEN_Msk             (0x1ul << I2C_BUSCTL_BMDEN_Pos)
 #define I2C_BUSCTL_BMHEN_Pos             (3)
 #define I2C_BUSCTL_BMHEN_Msk             (0x1ul << I2C_BUSCTL_BMHEN_Pos)
 #define I2C_BUSCTL_ALERTEN_Pos           (4)
 #define I2C_BUSCTL_ALERTEN_Msk           (0x1ul << I2C_BUSCTL_ALERTEN_Pos)
 #define I2C_BUSCTL_SCTLOSTS_Pos          (5)
 #define I2C_BUSCTL_SCTLOSTS_Msk          (0x1ul << I2C_BUSCTL_SCTLOSTS_Pos)
 #define I2C_BUSCTL_SCTLOEN_Pos           (6)
 #define I2C_BUSCTL_SCTLOEN_Msk           (0x1ul << I2C_BUSCTL_SCTLOEN_Pos)
 #define I2C_BUSCTL_BUSEN_Pos             (7)
 #define I2C_BUSCTL_BUSEN_Msk             (0x1ul << I2C_BUSCTL_BUSEN_Pos)
 #define I2C_BUSCTL_PECTXEN_Pos           (8)
 #define I2C_BUSCTL_PECTXEN_Msk           (0x1ul << I2C_BUSCTL_PECTXEN_Pos)
 #define I2C_BUSCTL_TIDLE_Pos             (9)
 #define I2C_BUSCTL_TIDLE_Msk             (0x1ul << I2C_BUSCTL_TIDLE_Pos)
 #define I2C_BUSCTL_PECCLR_Pos            (10)
 #define I2C_BUSCTL_PECCLR_Msk            (0x1ul << I2C_BUSCTL_PECCLR_Pos)
 #define I2C_BUSCTL_ACKM9SI_Pos           (11)
 #define I2C_BUSCTL_ACKM9SI_Msk           (0x1ul << I2C_BUSCTL_ACKM9SI_Pos)
 #define I2C_BUSCTL_BCDIEN_Pos            (12)
 #define I2C_BUSCTL_BCDIEN_Msk            (0x1ul << I2C_BUSCTL_BCDIEN_Pos)
 #define I2C_BUSCTL_PECDIEN_Pos           (13)
 #define I2C_BUSCTL_PECDIEN_Msk           (0x1ul << I2C_BUSCTL_PECDIEN_Pos)
 #define I2C_BUSTCTL_BUSTOEN_Pos          (0)
 #define I2C_BUSTCTL_BUSTOEN_Msk          (0x1ul << I2C_BUSTCTL_BUSTOEN_Pos)
 #define I2C_BUSTCTL_CLKTOEN_Pos          (1)
 #define I2C_BUSTCTL_CLKTOEN_Msk          (0x1ul << I2C_BUSTCTL_CLKTOEN_Pos)
 #define I2C_BUSTCTL_BUSTOIEN_Pos         (2)
 #define I2C_BUSTCTL_BUSTOIEN_Msk         (0x1ul << I2C_BUSTCTL_BUSTOIEN_Pos)
 #define I2C_BUSTCTL_CLKTOIEN_Pos         (3)
 #define I2C_BUSTCTL_CLKTOIEN_Msk         (0x1ul << I2C_BUSTCTL_CLKTOIEN_Pos)
 #define I2C_BUSTCTL_TORSTEN_Pos          (4)
 #define I2C_BUSTCTL_TORSTEN_Msk          (0x1ul << I2C_BUSTCTL_TORSTEN_Pos)
 #define I2C_BUSSTS_BUSY_Pos              (0)
 #define I2C_BUSSTS_BUSY_Msk              (0x1ul << I2C_BUSSTS_BUSY_Pos)
 #define I2C_BUSSTS_BCDONE_Pos            (1)
 #define I2C_BUSSTS_BCDONE_Msk            (0x1ul << I2C_BUSSTS_BCDONE_Pos)
 #define I2C_BUSSTS_PECERR_Pos            (2)
 #define I2C_BUSSTS_PECERR_Msk            (0x1ul << I2C_BUSSTS_PECERR_Pos)
 #define I2C_BUSSTS_ALERT_Pos             (3)
 #define I2C_BUSSTS_ALERT_Msk             (0x1ul << I2C_BUSSTS_ALERT_Pos)
 #define I2C_BUSSTS_SCTLDIN_Pos           (4)
 #define I2C_BUSSTS_SCTLDIN_Msk           (0x1ul << I2C_BUSSTS_SCTLDIN_Pos)
 #define I2C_BUSSTS_BUSTO_Pos             (5)
 #define I2C_BUSSTS_BUSTO_Msk             (0x1ul << I2C_BUSSTS_BUSTO_Pos)
 #define I2C_BUSSTS_CLKTO_Pos             (6)
 #define I2C_BUSSTS_CLKTO_Msk             (0x1ul << I2C_BUSSTS_CLKTO_Pos)
 #define I2C_BUSSTS_PECDONE_Pos           (7)
 #define I2C_BUSSTS_PECDONE_Msk           (0x1ul << I2C_BUSSTS_PECDONE_Pos)
 #define I2C_PKTSIZE_PLDSIZE_Pos          (0)
 #define I2C_PKTSIZE_PLDSIZE_Msk          (0x1fful << I2C_PKTSIZE_PLDSIZE_Pos)
 #define I2C_PKTCRC_PECCRC_Pos            (0)
 #define I2C_PKTCRC_PECCRC_Msk            (0xfful << I2C_PKTCRC_PECCRC_Pos)
 #define I2C_BUSTOUT_BUSTO_Pos            (0)
 #define I2C_BUSTOUT_BUSTO_Msk            (0xfful << I2C_BUSTOUT_BUSTO_Pos)
 #define I2C_CLKTOUT_CLKTO_Pos            (0)
 #define I2C_CLKTOUT_CLKTO_Msk            (0xfful << I2C_CLKTOUT_CLKTO_Pos)                  /* I2C_CONST */
  /* end of I2C register group */ /* end of REGISTER group */

 #if defined ( __CC_ARM   )
 #pragma no_anon_unions
 #endif

 #endif /* __I2C_REG_H__ */
I2C_T::PKTSIZE
__IO uint32_t PKTSIZE
Definition: i2c_reg.h:1070

I2C_T::BUSSTS
__IO uint32_t BUSSTS
Definition: i2c_reg.h:1069

I2C_T::ADDR2
__IO uint32_t ADDR2
Definition: i2c_reg.h:1053

I2C_T::WKCTL
__IO uint32_t WKCTL
Definition: i2c_reg.h:1062

I2C_T::ADDRMSK0
__IO uint32_t ADDRMSK0
Definition: i2c_reg.h:1055

I2C_T::BUSTOUT
__IO uint32_t BUSTOUT
Definition: i2c_reg.h:1072

I2C_T
Definition: i2c_reg.h:26

I2C_T::ADDR0
__IO uint32_t ADDR0
Definition: i2c_reg.h:1047

I2C_T::CLKTOUT
__IO uint32_t CLKTOUT
Definition: i2c_reg.h:1073

I2C_T::STATUS0
__I uint32_t STATUS0
Definition: i2c_reg.h:1049

I2C_T::ADDRMSK1
__IO uint32_t ADDRMSK1
Definition: i2c_reg.h:1056

I2C_T::ADDRMSK3
__IO uint32_t ADDRMSK3
Definition: i2c_reg.h:1058

I2C_T::ADDRMSK2
__IO uint32_t ADDRMSK2
Definition: i2c_reg.h:1057

I2C_T::WKSTS
__IO uint32_t WKSTS
Definition: i2c_reg.h:1063

I2C_T::CTL0
__IO uint32_t CTL0
Definition: i2c_reg.h:1046

I2C_T::TMCTL
__IO uint32_t TMCTL
Definition: i2c_reg.h:1066

I2C_T::TOCTL
__IO uint32_t TOCTL
Definition: i2c_reg.h:1051

I2C_T::CTL1
__IO uint32_t CTL1
Definition: i2c_reg.h:1064

I2C_T::ADDR1
__IO uint32_t ADDR1
Definition: i2c_reg.h:1052

I2C_T::STATUS1
__IO uint32_t STATUS1
Definition: i2c_reg.h:1065

I2C_T::CLKDIV
__IO uint32_t CLKDIV
Definition: i2c_reg.h:1050

I2C_T::BUSCTL
__IO uint32_t BUSCTL
Definition: i2c_reg.h:1067

I2C_T::ADDR3
__IO uint32_t ADDR3
Definition: i2c_reg.h:1054

I2C_T::PKTCRC
__I uint32_t PKTCRC
Definition: i2c_reg.h:1071

I2C_T::DAT
__IO uint32_t DAT
Definition: i2c_reg.h:1048

I2C_T::BUSTCTL
__IO uint32_t BUSTCTL
Definition: i2c_reg.h:1068