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M480 BSP
V3.05.001
The Board Support Package for M480 Series
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Macros | |
| #define | EBI_BANK0_BASE_ADDR |
| #define | EBI_BANK1_BASE_ADDR |
| #define | EBI_BANK2_BASE_ADDR |
| #define | EBI_MAX_SIZE |
| #define | EBI_BANK0 |
| #define | EBI_BANK1 |
| #define | EBI_BANK2 |
| #define | EBI_BUSWIDTH_8BIT |
| #define | EBI_BUSWIDTH_16BIT |
| #define | EBI_CS_ACTIVE_LOW |
| #define | EBI_CS_ACTIVE_HIGH |
| #define | EBI_MCLKDIV_1 |
| #define | EBI_MCLKDIV_2 |
| #define | EBI_MCLKDIV_4 |
| #define | EBI_MCLKDIV_8 |
| #define | EBI_MCLKDIV_16 |
| #define | EBI_MCLKDIV_32 |
| #define | EBI_MCLKDIV_64 |
| #define | EBI_MCLKDIV_128 |
| #define | EBI_TIMING_FASTEST |
| #define | EBI_TIMING_VERYFAST |
| #define | EBI_TIMING_FAST |
| #define | EBI_TIMING_NORMAL |
| #define | EBI_TIMING_SLOW |
| #define | EBI_TIMING_VERYSLOW |
| #define | EBI_TIMING_SLOWEST |
| #define | EBI_OPMODE_NORMAL |
| #define | EBI_OPMODE_CACCESS |
| #define | EBI_OPMODE_ADSEPARATE |
| #define EBI_OPMODE_ADSEPARATE |
| #define EBI_OPMODE_CACCESS |
1.8.15