Device CMSIS Definitions

Macros
#define	__CM4_REV   0x0201UL
#define	__NVIC_PRIO_BITS   4UL
#define	__Vendor_SysTickConfig   0UL
#define	__MPU_PRESENT   1UL
#define	__FPU_PRESENT   1UL

Typedefs
typedef enum IRQn	IRQn_Type

Enumerations
enum	IRQn {   NonMaskableInt_IRQn = -14,   MemoryManagement_IRQn = -12,   BusFault_IRQn = -11,   UsageFault_IRQn = -10,   SVCall_IRQn = -5,   DebugMonitor_IRQn = -4,   PendSV_IRQn = -2,   SysTick_IRQn = -1,   BOD_IRQn = 0,   IRC_IRQn = 1,   PWRWU_IRQn = 2,   RAMPE_IRQn = 3,   CKFAIL_IRQn = 4,   RTC_IRQn = 6,   TAMPER_IRQn = 7,   WDT_IRQn = 8,   WWDT_IRQn = 9,   EINT0_IRQn = 10,   EINT1_IRQn = 11,   EINT2_IRQn = 12,   EINT3_IRQn = 13,   EINT4_IRQn = 14,   EINT5_IRQn = 15,   GPA_IRQn = 16,   GPB_IRQn = 17,   GPC_IRQn = 18,   GPD_IRQn = 19,   GPE_IRQn = 20,   GPF_IRQn = 21,   QSPI0_IRQn = 22,   SPI0_IRQn = 23,   BRAKE0_IRQn = 24,   EPWM0P0_IRQn = 25,   EPWM0P1_IRQn = 26,   EPWM0P2_IRQn = 27,   BRAKE1_IRQn = 28,   EPWM1P0_IRQn = 29,   EPWM1P1_IRQn = 30,   EPWM1P2_IRQn = 31,   TMR0_IRQn = 32,   TMR1_IRQn = 33,   TMR2_IRQn = 34,   TMR3_IRQn = 35,   UART0_IRQn = 36,   UART1_IRQn = 37,   I2C0_IRQn = 38,   I2C1_IRQn = 39,   PDMA_IRQn = 40,   DAC_IRQn = 41,   EADC00_IRQn = 42,   EADC01_IRQn = 43,   ACMP01_IRQn = 44,   EADC02_IRQn = 46,   EADC03_IRQn = 47,   UART2_IRQn = 48,   UART3_IRQn = 49,   QSPI1_IRQn = 50,   SPI1_IRQn = 51,   SPI2_IRQn = 52,   USBD_IRQn = 53,   USBH_IRQn = 54,   USBOTG_IRQn = 55,   CAN0_IRQn = 56,   CAN1_IRQn = 57,   SC0_IRQn = 58,   SC1_IRQn = 59,   SC2_IRQn = 60,   SPI3_IRQn = 62,   EMAC_TX_IRQn = 66,   EMAC_RX_IRQn = 67,   SDH0_IRQn = 64,   USBD20_IRQn = 65,   I2S0_IRQn = 68,   OPA_IRQn = 70,   CRPT_IRQn = 71,   GPG_IRQn = 72,   EINT6_IRQn = 73,   UART4_IRQn = 74,   UART5_IRQn = 75,   USCI0_IRQn = 76,   USCI1_IRQn = 77,   BPWM0_IRQn = 78,   BPWM1_IRQn = 79,   SPIM_IRQn = 80,   CCAP_IRQn = 81,   I2C2_IRQn = 82,   QEI0_IRQn = 84,   QEI1_IRQn = 85,   ECAP0_IRQn = 86,   ECAP1_IRQn = 87,   GPH_IRQn = 88,   EINT7_IRQn = 89,   SDH1_IRQn = 90,   HSUSBH_IRQn = 92,   USBOTG20_IRQn = 93,   TRNG_IRQn = 101,   UART6_IRQn = 102,   UART7_IRQn = 103,   EADC10_IRQn = 104,   EADC11_IRQn = 105,   EADC12_IRQn = 106,   EADC13_IRQn = 107,   CAN2_IRQn = 108 }

Detailed Description

Configuration of the Cortex-M4 Processor and Core Peripherals

Macro Definition Documentation

__CM4_REV

#define __CM4_REV   0x0201UL

Core Revision r2p1

Definition at line 188 of file M480.h.

__FPU_PRESENT

#define __FPU_PRESENT   1UL

FPU present or not

Definition at line 196 of file M480.h.

__MPU_PRESENT

#define __MPU_PRESENT   1UL

MPU present or not

Definition at line 191 of file M480.h.

__NVIC_PRIO_BITS

#define __NVIC_PRIO_BITS   4UL

Number of Bits used for Priority Levels

Definition at line 189 of file M480.h.

__Vendor_SysTickConfig

#define __Vendor_SysTickConfig   0UL

Set to 1 if different SysTick Config is used

Definition at line 190 of file M480.h.

Typedef Documentation

IRQn_Type

typedef enum IRQn IRQn_Type

Interrupt Number Definition.

Enumeration Type Documentation

IRQn

enum IRQn

Interrupt Number Definition.

Enumerator
NonMaskableInt_IRQn	2 Non Maskable Interrupt
MemoryManagement_IRQn	4 Memory Management Interrupt
BusFault_IRQn	5 Bus Fault Interrupt
UsageFault_IRQn	6 Usage Fault Interrupt
SVCall_IRQn	11 SV Call Interrupt
DebugMonitor_IRQn	12 Debug Monitor Interrupt
PendSV_IRQn	14 Pend SV Interrupt
SysTick_IRQn	15 System Tick Interrupt
BOD_IRQn	Brown Out detection Interrupt
IRC_IRQn	Internal RC Interrupt
PWRWU_IRQn	Power Down Wake Up Interrupt
RAMPE_IRQn	SRAM parity check failed Interrupt
CKFAIL_IRQn	Clock failed Interrupt
RTC_IRQn	Real Time Clock Interrupt
TAMPER_IRQn	Tamper detection Interrupt
WDT_IRQn	Watchdog timer Interrupt
WWDT_IRQn	Window Watchdog timer Interrupt
EINT0_IRQn	External Input 0 Interrupt
EINT1_IRQn	External Input 1 Interrupt
EINT2_IRQn	External Input 2 Interrupt
EINT3_IRQn	External Input 3 Interrupt
EINT4_IRQn	External Input 4 Interrupt
EINT5_IRQn	External Input 5 Interrupt
GPA_IRQn	GPIO Port A Interrupt
GPB_IRQn	GPIO Port B Interrupt
GPC_IRQn	GPIO Port C Interrupt
GPD_IRQn	GPIO Port D Interrupt
GPE_IRQn	GPIO Port E Interrupt
GPF_IRQn	GPIO Port F Interrupt
QSPI0_IRQn	QSPI0 Interrupt
SPI0_IRQn	SPI0 Interrupt
BRAKE0_IRQn	BRAKE0 Interrupt
EPWM0P0_IRQn	EPWM0P0 Interrupt
EPWM0P1_IRQn	EPWM0P1 Interrupt
EPWM0P2_IRQn	EPWM0P2 Interrupt
BRAKE1_IRQn	BRAKE1 Interrupt
EPWM1P0_IRQn	EPWM1P0 Interrupt
EPWM1P1_IRQn	EPWM1P1 Interrupt
EPWM1P2_IRQn	EPWM1P2 Interrupt
TMR0_IRQn	Timer 0 Interrupt
TMR1_IRQn	Timer 1 Interrupt
TMR2_IRQn	Timer 2 Interrupt
TMR3_IRQn	Timer 3 Interrupt
UART0_IRQn	UART 0 Interrupt
UART1_IRQn	UART 1 Interrupt
I2C0_IRQn	I2C 0 Interrupt
I2C1_IRQn	I2C 1 Interrupt
PDMA_IRQn	Peripheral DMA Interrupt
DAC_IRQn	DAC Interrupt
EADC00_IRQn	EADC00 Interrupt
EADC01_IRQn	EADC01 Interrupt
ACMP01_IRQn	Analog Comparator 0 and 1 Interrupt
EADC02_IRQn	EADC02 Interrupt
EADC03_IRQn	EADC03 Interrupt
UART2_IRQn	UART2 Interrupt
UART3_IRQn	UART3 Interrupt
QSPI1_IRQn	QSPI1 Interrupt
SPI1_IRQn	SPI1 Interrupt
SPI2_IRQn	SPI2 Interrupt
USBD_IRQn	USB device Interrupt
USBH_IRQn	USB host Interrupt
USBOTG_IRQn	USB OTG Interrupt
CAN0_IRQn	CAN0 Interrupt
CAN1_IRQn	CAN1 Interrupt
SC0_IRQn	Smart Card 0 Interrupt
SC1_IRQn	Smart Card 1 Interrupt
SC2_IRQn	Smart Card 2 Interrupt
SPI3_IRQn	SPI3 Interrupt
EMAC_TX_IRQn	Ethernet MAC TX Interrupt
EMAC_RX_IRQn	Ethernet MAC RX Interrupt
SDH0_IRQn	Secure Digital Host Controller 0 Interrupt
USBD20_IRQn	High Speed USB device Interrupt
I2S0_IRQn	I2S0 Interrupt
OPA_IRQn	OPA Interrupt
CRPT_IRQn	CRPT Interrupt
GPG_IRQn	GPIO Port G Interrupt
EINT6_IRQn	External Input 6 Interrupt
UART4_IRQn	UART4 Interrupt
UART5_IRQn	UART5 Interrupt
USCI0_IRQn	USCI0 Interrupt
USCI1_IRQn	USCI1 Interrupt
BPWM0_IRQn	BPWM0 Interrupt
BPWM1_IRQn	BPWM1 Interrupt
SPIM_IRQn	SPIM Interrupt
CCAP_IRQn	CCAP Interrupt
I2C2_IRQn	I2C2 Interrupt
QEI0_IRQn	QEI0 Interrupt
QEI1_IRQn	QEI1 Interrupt
ECAP0_IRQn	ECAP0 Interrupt
ECAP1_IRQn	ECAP1 Interrupt
GPH_IRQn	GPIO Port H Interrupt
EINT7_IRQn	External Input 7 Interrupt
SDH1_IRQn	Secure Digital Host Controller 1 Interrupt
HSUSBH_IRQn	High speed USB host Interrupt
USBOTG20_IRQn	High speed USB OTG Interrupt
TRNG_IRQn	TRNG Interrupt
UART6_IRQn	UART6 Interrupt
UART7_IRQn	UART7 Interrupt
EADC10_IRQn	EADC10 Interrupt
EADC11_IRQn	EADC11 Interrupt
EADC12_IRQn	EADC12 Interrupt
EADC13_IRQn	EADC13 Interrupt
CAN2_IRQn	CAN2 Interrupt

Definition at line 68 of file M480.h.