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M480 BSP
V3.05.001
The Board Support Package for M480 Series
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Macros | |
| #define | ACMP_CTL_FILTSEL_OFF |
| #define | ACMP_CTL_FILTSEL_1PCLK |
| #define | ACMP_CTL_FILTSEL_2PCLK |
| #define | ACMP_CTL_FILTSEL_4PCLK |
| #define | ACMP_CTL_FILTSEL_8PCLK |
| #define | ACMP_CTL_FILTSEL_16PCLK |
| #define | ACMP_CTL_FILTSEL_32PCLK |
| #define | ACMP_CTL_FILTSEL_64PCLK |
| #define | ACMP_CTL_INTPOL_RF |
| #define | ACMP_CTL_INTPOL_R |
| #define | ACMP_CTL_INTPOL_F |
| #define | ACMP_CTL_POSSEL_P0 |
| #define | ACMP_CTL_POSSEL_P1 |
| #define | ACMP_CTL_POSSEL_P2 |
| #define | ACMP_CTL_POSSEL_P3 |
| #define | ACMP_CTL_NEGSEL_PIN |
| #define | ACMP_CTL_NEGSEL_CRV |
| #define | ACMP_CTL_NEGSEL_VBG |
| #define | ACMP_CTL_NEGSEL_DAC |
| #define | ACMP_CTL_HYSTERESIS_30MV |
| #define | ACMP_CTL_HYSTERESIS_20MV |
| #define | ACMP_CTL_HYSTERESIS_10MV |
| #define | ACMP_CTL_HYSTERESIS_DISABLE |
| #define | ACMP_VREF_CRVSSEL_VDDA |
| #define | ACMP_VREF_CRVSSEL_INTVREF |
| #define ACMP_CTL_FILTSEL_16PCLK |
| #define ACMP_CTL_FILTSEL_1PCLK |
| #define ACMP_CTL_FILTSEL_2PCLK |
| #define ACMP_CTL_FILTSEL_32PCLK |
| #define ACMP_CTL_FILTSEL_4PCLK |
| #define ACMP_CTL_FILTSEL_64PCLK |
| #define ACMP_CTL_FILTSEL_8PCLK |
| #define ACMP_CTL_FILTSEL_OFF |
| #define ACMP_CTL_HYSTERESIS_10MV |
| #define ACMP_CTL_HYSTERESIS_20MV |
| #define ACMP_CTL_HYSTERESIS_30MV |
| #define ACMP_CTL_HYSTERESIS_DISABLE |
| #define ACMP_CTL_INTPOL_F |
| #define ACMP_CTL_INTPOL_R |
| #define ACMP_CTL_INTPOL_RF |
| #define ACMP_CTL_NEGSEL_CRV |
| #define ACMP_CTL_NEGSEL_DAC |
| #define ACMP_CTL_NEGSEL_PIN |
| #define ACMP_CTL_NEGSEL_VBG |
| #define ACMP_CTL_POSSEL_P0 |
| #define ACMP_CTL_POSSEL_P1 |
| #define ACMP_CTL_POSSEL_P2 |
| #define ACMP_CTL_POSSEL_P3 |
| #define ACMP_VREF_CRVSSEL_INTVREF |
1.8.15