M480 BSP  V3.05.001
The Board Support Package for M480 Series
fmc_reg.h
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1 /**************************************************************************/
9 #ifndef __FMC_REG_H__
10 #define __FMC_REG_H__
11 
12 #if defined ( __CC_ARM )
13 #pragma anon_unions
14 #endif
15 
26 typedef struct
27 {
963  __IO uint32_t ISPCTL;
964  __IO uint32_t ISPADDR;
965  __IO uint32_t ISPDAT;
966  __IO uint32_t ISPCMD;
967  __IO uint32_t ISPTRG;
968  __I uint32_t DFBA;
969  __I uint32_t RESERVE0[10];
972  __IO uint32_t ISPSTS;
973  __I uint32_t RESERVE1[2];
976  __IO uint32_t CYCCTL;
977  __O uint32_t KPKEY0;
978  __O uint32_t KPKEY1;
979  __O uint32_t KPKEY2;
980  __IO uint32_t KPKEYTRG;
981  __IO uint32_t KPKEYSTS;
982  __I uint32_t KPKEYCNT;
983  __I uint32_t KPCNT;
984  __I uint32_t RESERVE2[5];
987  __IO uint32_t MPDAT0;
988  __IO uint32_t MPDAT1;
989  __IO uint32_t MPDAT2;
990  __IO uint32_t MPDAT3;
991  __I uint32_t RESERVE3[12];
994  __I uint32_t MPSTS;
995  __I uint32_t MPADDR;
996  __I uint32_t RESERVE4[2];
999  __I uint32_t XOMR0STS;
1000  __I uint32_t XOMR1STS;
1001  __I uint32_t XOMR2STS;
1002  __I uint32_t XOMR3STS;
1003  __I uint32_t XOMSTS;
1005 } FMC_T;
1006 
1012 #define FMC_ISPCTL_ISPEN_Pos (0)
1013 #define FMC_ISPCTL_ISPEN_Msk (0x1ul << FMC_ISPCTL_ISPEN_Pos)
1015 #define FMC_ISPCTL_BS_Pos (1)
1016 #define FMC_ISPCTL_BS_Msk (0x1ul << FMC_ISPCTL_BS_Pos)
1018 #define FMC_ISPCTL_SPUEN_Pos (2)
1019 #define FMC_ISPCTL_SPUEN_Msk (0x1ul << FMC_ISPCTL_SPUEN_Pos)
1021 #define FMC_ISPCTL_APUEN_Pos (3)
1022 #define FMC_ISPCTL_APUEN_Msk (0x1ul << FMC_ISPCTL_APUEN_Pos)
1024 #define FMC_ISPCTL_CFGUEN_Pos (4)
1025 #define FMC_ISPCTL_CFGUEN_Msk (0x1ul << FMC_ISPCTL_CFGUEN_Pos)
1027 #define FMC_ISPCTL_LDUEN_Pos (5)
1028 #define FMC_ISPCTL_LDUEN_Msk (0x1ul << FMC_ISPCTL_LDUEN_Pos)
1030 #define FMC_ISPCTL_ISPFF_Pos (6)
1031 #define FMC_ISPCTL_ISPFF_Msk (0x1ul << FMC_ISPCTL_ISPFF_Pos)
1033 #define FMC_ISPCTL_BL_Pos (16)
1034 #define FMC_ISPCTL_BL_Msk (0x1ul << FMC_ISPCTL_BL_Pos)
1036 #define FMC_ISPADDR_ISPADDR_Pos (0)
1037 #define FMC_ISPADDR_ISPADDR_Msk (0xfffffffful << FMC_ISPADDR_ISPADDR_Pos)
1039 #define FMC_ISPDAT_ISPDAT_Pos (0)
1040 #define FMC_ISPDAT_ISPDAT_Msk (0xfffffffful << FMC_ISPDAT_ISPDAT_Pos)
1042 #define FMC_ISPCMD_CMD_Pos (0)
1043 #define FMC_ISPCMD_CMD_Msk (0x7ful << FMC_ISPCMD_CMD_Pos)
1045 #define FMC_ISPTRG_ISPGO_Pos (0)
1046 #define FMC_ISPTRG_ISPGO_Msk (0x1ul << FMC_ISPTRG_ISPGO_Pos)
1048 #define FMC_DFBA_DFBA_Pos (0)
1049 #define FMC_DFBA_DFBA_Msk (0xfffffffful << FMC_DFBA_DFBA_Pos)
1051 #define FMC_ISPSTS_ISPBUSY_Pos (0)
1052 #define FMC_ISPSTS_ISPBUSY_Msk (0x1ul << FMC_ISPSTS_ISPBUSY_Pos)
1054 #define FMC_ISPSTS_CBS_Pos (1)
1055 #define FMC_ISPSTS_CBS_Msk (0x3ul << FMC_ISPSTS_CBS_Pos)
1057 #define FMC_ISPSTS_MBS_Pos (3)
1058 #define FMC_ISPSTS_MBS_Msk (0x1ul << FMC_ISPSTS_MBS_Pos)
1060 #define FMC_ISPSTS_FCYCDIS_Pos (4)
1061 #define FMC_ISPSTS_FCYCDIS_Msk (0x1ul << FMC_ISPSTS_FCYCDIS_Pos)
1063 #define FMC_ISPSTS_PGFF_Pos (5)
1064 #define FMC_ISPSTS_PGFF_Msk (0x1ul << FMC_ISPSTS_PGFF_Pos)
1066 #define FMC_ISPSTS_ISPFF_Pos (6)
1067 #define FMC_ISPSTS_ISPFF_Msk (0x1ul << FMC_ISPSTS_ISPFF_Pos)
1069 #define FMC_ISPSTS_ALLONE_Pos (7)
1070 #define FMC_ISPSTS_ALLONE_Msk (0x1ul << FMC_ISPSTS_ALLONE_Pos)
1072 #define FMC_ISPSTS_VECMAP_Pos (9)
1073 #define FMC_ISPSTS_VECMAP_Msk (0x7ffful << FMC_ISPSTS_VECMAP_Pos)
1075 #define FMC_ISPSTS_SCODE_Pos (31)
1076 #define FMC_ISPSTS_SCODE_Msk (0x1ul << FMC_ISPSTS_SCODE_Pos)
1078 #define FMC_CYCCTL_CYCLE_Pos (0)
1079 #define FMC_CYCCTL_CYCLE_Msk (0xful << FMC_CYCCTL_CYCLE_Pos)
1081 #define FMC_KPKEY0_KPKEY0_Pos (0)
1082 #define FMC_KPKEY0_KPKEY0_Msk (0xfffffffful << FMC_KPKEY0_KPKEY0_Pos)
1084 #define FMC_KPKEY1_KPKEY1_Pos (0)
1085 #define FMC_KPKEY1_KPKEY1_Msk (0xfffffffful << FMC_KPKEY1_KPKEY1_Pos)
1087 #define FMC_KPKEY2_KPKEY2_Pos (0)
1088 #define FMC_KPKEY2_KPKEY2_Msk (0xfffffffful << FMC_KPKEY2_KPKEY2_Pos)
1090 #define FMC_KPKEYTRG_KPKEYGO_Pos (0)
1091 #define FMC_KPKEYTRG_KPKEYGO_Msk (0x1ul << FMC_KPKEYTRG_KPKEYGO_Pos)
1093 #define FMC_KPKEYTRG_TCEN_Pos (1)
1094 #define FMC_KPKEYTRG_TCEN_Msk (0x1ul << FMC_KPKEYTRG_TCEN_Pos)
1096 #define FMC_KPKEYSTS_KEYBUSY_Pos (0)
1097 #define FMC_KPKEYSTS_KEYBUSY_Msk (0x1ul << FMC_KPKEYSTS_KEYBUSY_Pos)
1099 #define FMC_KPKEYSTS_KEYLOCK_Pos (1)
1100 #define FMC_KPKEYSTS_KEYLOCK_Msk (0x1ul << FMC_KPKEYSTS_KEYLOCK_Pos)
1102 #define FMC_KPKEYSTS_KEYMATCH_Pos (2)
1103 #define FMC_KPKEYSTS_KEYMATCH_Msk (0x1ul << FMC_KPKEYSTS_KEYMATCH_Pos)
1105 #define FMC_KPKEYSTS_FORBID_Pos (3)
1106 #define FMC_KPKEYSTS_FORBID_Msk (0x1ul << FMC_KPKEYSTS_FORBID_Pos)
1108 #define FMC_KPKEYSTS_KEYFLAG_Pos (4)
1109 #define FMC_KPKEYSTS_KEYFLAG_Msk (0x1ul << FMC_KPKEYSTS_KEYFLAG_Pos)
1111 #define FMC_KPKEYSTS_CFGFLAG_Pos (5)
1112 #define FMC_KPKEYSTS_CFGFLAG_Msk (0x1ul << FMC_KPKEYSTS_CFGFLAG_Pos)
1114 #define FMC_KPKEYSTS_SPFLAG_Pos (6)
1115 #define FMC_KPKEYSTS_SPFLAG_Msk (0x1ul << FMC_KPKEYSTS_SPFLAG_Pos)
1117 #define FMC_KPKEYCNT_KPKECNT_Pos (0)
1118 #define FMC_KPKEYCNT_KPKECNT_Msk (0x3ful << FMC_KPKEYCNT_KPKECNT_Pos)
1120 #define FMC_KPKEYCNT_KPKEMAX_Pos (8)
1121 #define FMC_KPKEYCNT_KPKEMAX_Msk (0x3ful << FMC_KPKEYCNT_KPKEMAX_Pos)
1123 #define FMC_KPCNT_KPCNT_Pos (0)
1124 #define FMC_KPCNT_KPCNT_Msk (0xful << FMC_KPCNT_KPCNT_Pos)
1126 #define FMC_KPCNT_KPMAX_Pos (8)
1127 #define FMC_KPCNT_KPMAX_Msk (0xful << FMC_KPCNT_KPMAX_Pos)
1129 #define FMC_MPDAT0_ISPDAT0_Pos (0)
1130 #define FMC_MPDAT0_ISPDAT0_Msk (0xfffffffful << FMC_MPDAT0_ISPDAT0_Pos)
1132 #define FMC_MPDAT1_ISPDAT1_Pos (0)
1133 #define FMC_MPDAT1_ISPDAT1_Msk (0xfffffffful << FMC_MPDAT1_ISPDAT1_Pos)
1135 #define FMC_MPDAT2_ISPDAT2_Pos (0)
1136 #define FMC_MPDAT2_ISPDAT2_Msk (0xfffffffful << FMC_MPDAT2_ISPDAT2_Pos)
1138 #define FMC_MPDAT3_ISPDAT3_Pos (0)
1139 #define FMC_MPDAT3_ISPDAT3_Msk (0xfffffffful << FMC_MPDAT3_ISPDAT3_Pos)
1141 #define FMC_MPSTS_MPBUSY_Pos (0)
1142 #define FMC_MPSTS_MPBUSY_Msk (0x1ul << FMC_MPSTS_MPBUSY_Pos)
1144 #define FMC_MPSTS_PPGO_Pos (1)
1145 #define FMC_MPSTS_PPGO_Msk (0x1ul << FMC_MPSTS_PPGO_Pos)
1147 #define FMC_MPSTS_ISPFF_Pos (2)
1148 #define FMC_MPSTS_ISPFF_Msk (0x1ul << FMC_MPSTS_ISPFF_Pos)
1150 #define FMC_MPSTS_D0_Pos (4)
1151 #define FMC_MPSTS_D0_Msk (0x1ul << FMC_MPSTS_D0_Pos)
1153 #define FMC_MPSTS_D1_Pos (5)
1154 #define FMC_MPSTS_D1_Msk (0x1ul << FMC_MPSTS_D1_Pos)
1156 #define FMC_MPSTS_D2_Pos (6)
1157 #define FMC_MPSTS_D2_Msk (0x1ul << FMC_MPSTS_D2_Pos)
1159 #define FMC_MPSTS_D3_Pos (7)
1160 #define FMC_MPSTS_D3_Msk (0x1ul << FMC_MPSTS_D3_Pos)
1162 #define FMC_MPADDR_MPADDR_Pos (0)
1163 #define FMC_MPADDR_MPADDR_Msk (0xfffffffful << FMC_MPADDR_MPADDR_Pos)
1165 #define FMC_XOMR0STS_SIZE_Pos (0)
1166 #define FMC_XOMR0STS_SIZE_Msk (0xfful << FMC_XOMR0STS_SIZE_Pos)
1168 #define FMC_XOMR0STS_BASE_Pos (8)
1169 #define FMC_XOMR0STS_BASE_Msk (0xfffffful << FMC_XOMR0STS_BASE_Pos)
1171 #define FMC_XOMR1STS_SIZE_Pos (0)
1172 #define FMC_XOMR1STS_SIZE_Msk (0xfful << FMC_XOMR1STS_SIZE_Pos)
1174 #define FMC_XOMR1STS_BASE_Pos (8)
1175 #define FMC_XOMR1STS_BASE_Msk (0xfffffful << FMC_XOMR1STS_BASE_Pos)
1177 #define FMC_XOMR2STS_SIZE_Pos (0)
1178 #define FMC_XOMR2STS_SIZE_Msk (0xfful << FMC_XOMR2STS_SIZE_Pos)
1180 #define FMC_XOMR2STS_BASE_Pos (8)
1181 #define FMC_XOMR2STS_BASE_Msk (0xfffffful << FMC_XOM20STS_BASE_Pos)
1183 #define FMC_XOMR3STS_SIZE_Pos (0)
1184 #define FMC_XOMR3STS_SIZE_Msk (0xfful << FMC_XOMR3STS_SIZE_Pos)
1186 #define FMC_XOMR3STS_BASE_Pos (8)
1187 #define FMC_XOMR3STS_BASE_Msk (0xfffffful << FMC_XOMR3STS_BASE_Pos)
1189 #define FMC_XOMSTS_XOMR0ON_Pos (0)
1190 #define FMC_XOMSTS_XOMR0ON_Msk (0x1ul << FMC_XOMSTS_XOMR0ON_Pos)
1192 #define FMC_XOMSTS_XOMR1ON_Pos (1)
1193 #define FMC_XOMSTS_XOMR1ON_Msk (0x1ul << FMC_XOMSTS_XOMR1ON_Pos)
1195 #define FMC_XOMSTS_XOMR2ON_Pos (2)
1196 #define FMC_XOMSTS_XOMR2ON_Msk (0x1ul << FMC_XOMSTS_XOMR2ON_Pos)
1198 #define FMC_XOMSTS_XOMR3ON_Pos (3)
1199 #define FMC_XOMSTS_XOMR3ON_Msk (0x1ul << FMC_XOMSTS_XOMR3ON_Pos)
1201 #define FMC_XOMSTS_XOMPEF_Pos (4)
1202 #define FMC_XOMSTS_XOMPEF_Msk (0x1ul << FMC_XOMSTS_XOMPEF_Pos) /* FMC_CONST */
1205  /* end of FMC register group */ /* end of REGISTER group */
1207 
1208 #if defined ( __CC_ARM )
1209 #pragma no_anon_unions
1210 #endif
1211 
1212 #endif /* __FMC_REG_H__ */
__IO uint32_t MPDAT1
Definition: fmc_reg.h:988
__IO uint32_t ISPCTL
Definition: fmc_reg.h:963
__I uint32_t KPKEYCNT
Definition: fmc_reg.h:982
__IO uint32_t ISPTRG
Definition: fmc_reg.h:967
__IO uint32_t ISPSTS
Definition: fmc_reg.h:972
__I uint32_t DFBA
Definition: fmc_reg.h:968
__I uint32_t MPADDR
Definition: fmc_reg.h:995
__I uint32_t KPCNT
Definition: fmc_reg.h:983
__I uint32_t XOMR3STS
Definition: fmc_reg.h:1002
__IO uint32_t ISPDAT
Definition: fmc_reg.h:965
__O uint32_t KPKEY0
Definition: fmc_reg.h:977
__IO uint32_t MPDAT0
Definition: fmc_reg.h:987
__IO uint32_t MPDAT3
Definition: fmc_reg.h:990
__I uint32_t MPSTS
Definition: fmc_reg.h:994
__I uint32_t XOMR2STS
Definition: fmc_reg.h:1001
__IO uint32_t ISPCMD
Definition: fmc_reg.h:966
Definition: fmc_reg.h:26
__IO uint32_t MPDAT2
Definition: fmc_reg.h:989
__IO uint32_t KPKEYSTS
Definition: fmc_reg.h:981
__IO uint32_t ISPADDR
Definition: fmc_reg.h:964
__O uint32_t KPKEY2
Definition: fmc_reg.h:979
__I uint32_t XOMR0STS
Definition: fmc_reg.h:999
__O uint32_t KPKEY1
Definition: fmc_reg.h:978
__IO uint32_t KPKEYTRG
Definition: fmc_reg.h:980
__I uint32_t XOMR1STS
Definition: fmc_reg.h:1000
__IO uint32_t CYCCTL
Definition: fmc_reg.h:976
__I uint32_t XOMSTS
Definition: fmc_reg.h:1003