Document/html/epwm__reg_8h_source.html

 /**************************************************************************/
 #ifndef __EPWM_REG_H__
 #define __EPWM_REG_H__

 #if defined ( __CC_ARM   )
 #pragma anon_unions
 #endif

 typedef struct
 {
     __IO uint32_t RCAPDAT;
     __IO uint32_t FCAPDAT;
 } ECAPDAT_T;

 typedef struct
 {


     __IO uint32_t CTL0;
     __IO uint32_t CTL1;
     __IO uint32_t SYNC;
     __IO uint32_t SWSYNC;
     __IO uint32_t CLKSRC;
     __IO uint32_t CLKPSC[3];
     __IO uint32_t CNTEN;
     __IO uint32_t CNTCLR;
     __IO uint32_t LOAD;
     __I  uint32_t RESERVE0[1];
     __IO uint32_t PERIOD[6];
     __I  uint32_t RESERVE1[2];
     __IO uint32_t CMPDAT[6];
     __I  uint32_t RESERVE2[2];
     __IO uint32_t DTCTL[3];
     __I  uint32_t RESERVE3[1];
     __IO uint32_t PHS[3];
     __I  uint32_t RESERVE4[1];
     __I  uint32_t CNT[6];
     __I  uint32_t RESERVE5[2];
     __IO uint32_t WGCTL0;
     __IO uint32_t WGCTL1;
     __IO uint32_t MSKEN;
     __IO uint32_t MSK;
     __IO uint32_t BNF;
     __IO uint32_t FAILBRK;
     __IO uint32_t BRKCTL[3];
     __IO uint32_t POLCTL;
     __IO uint32_t POEN;
     __O  uint32_t SWBRK;
     __IO uint32_t INTEN0;
     __IO uint32_t INTEN1;
     __IO uint32_t INTSTS0;
     __IO uint32_t INTSTS1;
     __I  uint32_t RESERVE6[1];
     __IO uint32_t DACTRGEN;
     __IO uint32_t EADCTS0;
     __IO uint32_t EADCTS1;
     __IO uint32_t FTCMPDAT[3];
     __I  uint32_t RESERVE7[1];
     __IO uint32_t SSCTL;
     __O  uint32_t SSTRG;
     __IO uint32_t LEBCTL;
     __IO uint32_t LEBCNT;
     __IO uint32_t STATUS;
     __I  uint32_t RESERVE8[3];
     __IO uint32_t IFA[6];
     __I  uint32_t RESERVE9[2];
     __IO uint32_t AINTSTS;
     __IO uint32_t AINTEN;
     __IO uint32_t APDMACTL;
     __I  uint32_t RESERVE10[1];
     __IO uint32_t FDEN;
     __IO uint32_t FDCTL[6];
     __IO uint32_t FDIEN;
     __IO uint32_t FDSTS;
     __IO uint32_t EADCPSCCTL;
     __IO uint32_t EADCPSC0;
     __IO uint32_t EADCPSC1;
     __IO uint32_t EADCPSCNT0;
     __IO uint32_t EADCPSCNT1;
     __I  uint32_t RESERVE11[26];
     __IO uint32_t CAPINEN;
     __IO uint32_t CAPCTL;
     __I  uint32_t CAPSTS;
     ECAPDAT_T CAPDAT[6];
     __IO uint32_t PDMACTL;
     __I  uint32_t PDMACAP[3];
     __I  uint32_t RESERVE12[1];
     __IO uint32_t CAPIEN;
     __IO uint32_t CAPIF;
     __I  uint32_t RESERVE13[43];
     __I  uint32_t PBUF[6];
     __I  uint32_t CMPBUF[6];
     __I  uint32_t CPSCBUF[3];
     __I  uint32_t FTCBUF[3];
     __IO uint32_t FTCI;
 } EPWM_T;

 #define EPWM_CTL0_CTRLD0_Pos              (0)
 #define EPWM_CTL0_CTRLD0_Msk              (0x1ul << EPWM_CTL0_CTRLD0_Pos)
 #define EPWM_CTL0_CTRLD1_Pos              (1)
 #define EPWM_CTL0_CTRLD1_Msk              (0x1ul << EPWM_CTL0_CTRLD1_Pos)
 #define EPWM_CTL0_CTRLD2_Pos              (2)
 #define EPWM_CTL0_CTRLD2_Msk              (0x1ul << EPWM_CTL0_CTRLD2_Pos)
 #define EPWM_CTL0_CTRLD3_Pos              (3)
 #define EPWM_CTL0_CTRLD3_Msk              (0x1ul << EPWM_CTL0_CTRLD3_Pos)
 #define EPWM_CTL0_CTRLD4_Pos              (4)
 #define EPWM_CTL0_CTRLD4_Msk              (0x1ul << EPWM_CTL0_CTRLD4_Pos)
 #define EPWM_CTL0_CTRLD5_Pos              (5)
 #define EPWM_CTL0_CTRLD5_Msk              (0x1ul << EPWM_CTL0_CTRLD5_Pos)
 #define EPWM_CTL0_WINLDEN0_Pos            (8)
 #define EPWM_CTL0_WINLDEN0_Msk            (0x1ul << EPWM_CTL0_WINLDEN0_Pos)
 #define EPWM_CTL0_WINLDEN1_Pos            (9)
 #define EPWM_CTL0_WINLDEN1_Msk            (0x1ul << EPWM_CTL0_WINLDEN1_Pos)
 #define EPWM_CTL0_WINLDEN2_Pos            (10)
 #define EPWM_CTL0_WINLDEN2_Msk            (0x1ul << EPWM_CTL0_WINLDEN2_Pos)
 #define EPWM_CTL0_WINLDEN3_Pos            (11)
 #define EPWM_CTL0_WINLDEN3_Msk            (0x1ul << EPWM_CTL0_WINLDEN3_Pos)
 #define EPWM_CTL0_WINLDEN4_Pos            (12)
 #define EPWM_CTL0_WINLDEN4_Msk            (0x1ul << EPWM_CTL0_WINLDEN4_Pos)
 #define EPWM_CTL0_WINLDEN5_Pos            (13)
 #define EPWM_CTL0_WINLDEN5_Msk            (0x1ul << EPWM_CTL0_WINLDEN5_Pos)
 #define EPWM_CTL0_IMMLDEN0_Pos            (16)
 #define EPWM_CTL0_IMMLDEN0_Msk            (0x1ul << EPWM_CTL0_IMMLDEN0_Pos)
 #define EPWM_CTL0_IMMLDEN1_Pos            (17)
 #define EPWM_CTL0_IMMLDEN1_Msk            (0x1ul << EPWM_CTL0_IMMLDEN1_Pos)
 #define EPWM_CTL0_IMMLDEN2_Pos            (18)
 #define EPWM_CTL0_IMMLDEN2_Msk            (0x1ul << EPWM_CTL0_IMMLDEN2_Pos)
 #define EPWM_CTL0_IMMLDEN3_Pos            (19)
 #define EPWM_CTL0_IMMLDEN3_Msk            (0x1ul << EPWM_CTL0_IMMLDEN3_Pos)
 #define EPWM_CTL0_IMMLDEN4_Pos            (20)
 #define EPWM_CTL0_IMMLDEN4_Msk            (0x1ul << EPWM_CTL0_IMMLDEN4_Pos)
 #define EPWM_CTL0_IMMLDEN5_Pos            (21)
 #define EPWM_CTL0_IMMLDEN5_Msk            (0x1ul << EPWM_CTL0_IMMLDEN5_Pos)
 #define EPWM_CTL0_GROUPEN_Pos             (24)
 #define EPWM_CTL0_GROUPEN_Msk             (0x1ul << EPWM_CTL0_GROUPEN_Pos)
 #define EPWM_CTL0_DBGHALT_Pos             (30)
 #define EPWM_CTL0_DBGHALT_Msk             (0x1ul << EPWM_CTL0_DBGHALT_Pos)
 #define EPWM_CTL0_DBGTRIOFF_Pos           (31)
 #define EPWM_CTL0_DBGTRIOFF_Msk           (0x1ul << EPWM_CTL0_DBGTRIOFF_Pos)
 #define EPWM_CTL1_CNTTYPE0_Pos            (0)
 #define EPWM_CTL1_CNTTYPE0_Msk            (0x3ul << EPWM_CTL1_CNTTYPE0_Pos)
 #define EPWM_CTL1_CNTTYPE1_Pos            (2)
 #define EPWM_CTL1_CNTTYPE1_Msk            (0x3ul << EPWM_CTL1_CNTTYPE1_Pos)
 #define EPWM_CTL1_CNTTYPE2_Pos            (4)
 #define EPWM_CTL1_CNTTYPE2_Msk            (0x3ul << EPWM_CTL1_CNTTYPE2_Pos)
 #define EPWM_CTL1_CNTTYPE3_Pos            (6)
 #define EPWM_CTL1_CNTTYPE3_Msk            (0x3ul << EPWM_CTL1_CNTTYPE3_Pos)
 #define EPWM_CTL1_CNTTYPE4_Pos            (8)
 #define EPWM_CTL1_CNTTYPE4_Msk            (0x3ul << EPWM_CTL1_CNTTYPE4_Pos)
 #define EPWM_CTL1_CNTTYPE5_Pos            (10)
 #define EPWM_CTL1_CNTTYPE5_Msk            (0x3ul << EPWM_CTL1_CNTTYPE5_Pos)
 #define EPWM_CTL1_CNTMODE0_Pos            (16)
 #define EPWM_CTL1_CNTMODE0_Msk            (0x1ul << EPWM_CTL1_CNTMODE0_Pos)
 #define EPWM_CTL1_CNTMODE1_Pos            (17)
 #define EPWM_CTL1_CNTMODE1_Msk            (0x1ul << EPWM_CTL1_CNTMODE1_Pos)
 #define EPWM_CTL1_CNTMODE2_Pos            (18)
 #define EPWM_CTL1_CNTMODE2_Msk            (0x1ul << EPWM_CTL1_CNTMODE2_Pos)
 #define EPWM_CTL1_CNTMODE3_Pos            (19)
 #define EPWM_CTL1_CNTMODE3_Msk            (0x1ul << EPWM_CTL1_CNTMODE3_Pos)
 #define EPWM_CTL1_CNTMODE4_Pos            (20)
 #define EPWM_CTL1_CNTMODE4_Msk            (0x1ul << EPWM_CTL1_CNTMODE4_Pos)
 #define EPWM_CTL1_CNTMODE5_Pos            (21)
 #define EPWM_CTL1_CNTMODE5_Msk            (0x1ul << EPWM_CTL1_CNTMODE5_Pos)
 #define EPWM_CTL1_OUTMODE0_Pos            (24)
 #define EPWM_CTL1_OUTMODE0_Msk            (0x1ul << EPWM_CTL1_OUTMODE0_Pos)
 #define EPWM_CTL1_OUTMODE2_Pos            (25)
 #define EPWM_CTL1_OUTMODE2_Msk            (0x1ul << EPWM_CTL1_OUTMODE2_Pos)
 #define EPWM_CTL1_OUTMODE4_Pos            (26)
 #define EPWM_CTL1_OUTMODE4_Msk            (0x1ul << EPWM_CTL1_OUTMODE4_Pos)
 #define EPWM_SYNC_PHSEN0_Pos              (0)
 #define EPWM_SYNC_PHSEN0_Msk              (0x1ul << EPWM_SYNC_PHSEN0_Pos)
 #define EPWM_SYNC_PHSEN2_Pos              (1)
 #define EPWM_SYNC_PHSEN2_Msk              (0x1ul << EPWM_SYNC_PHSEN2_Pos)
 #define EPWM_SYNC_PHSEN4_Pos              (2)
 #define EPWM_SYNC_PHSEN4_Msk              (0x1ul << EPWM_SYNC_PHSEN4_Pos)
 #define EPWM_SYNC_SINSRC0_Pos             (8)
 #define EPWM_SYNC_SINSRC0_Msk             (0x3ul << EPWM_SYNC_SINSRC0_Pos)
 #define EPWM_SYNC_SINSRC2_Pos             (10)
 #define EPWM_SYNC_SINSRC2_Msk             (0x3ul << EPWM_SYNC_SINSRC2_Pos)
 #define EPWM_SYNC_SINSRC4_Pos             (12)
 #define EPWM_SYNC_SINSRC4_Msk             (0x3ul << EPWM_SYNC_SINSRC4_Pos)
 #define EPWM_SYNC_SNFLTEN_Pos             (16)
 #define EPWM_SYNC_SNFLTEN_Msk             (0x1ul << EPWM_SYNC_SNFLTEN_Pos)
 #define EPWM_SYNC_SFLTCSEL_Pos            (17)
 #define EPWM_SYNC_SFLTCSEL_Msk            (0x7ul << EPWM_SYNC_SFLTCSEL_Pos)
 #define EPWM_SYNC_SFLTCNT_Pos             (20)
 #define EPWM_SYNC_SFLTCNT_Msk             (0x7ul << EPWM_SYNC_SFLTCNT_Pos)
 #define EPWM_SYNC_SINPINV_Pos             (23)
 #define EPWM_SYNC_SINPINV_Msk             (0x1ul << EPWM_SYNC_SINPINV_Pos)
 #define EPWM_SYNC_PHSDIR0_Pos             (24)
 #define EPWM_SYNC_PHSDIR0_Msk             (0x1ul << EPWM_SYNC_PHSDIR0_Pos)
 #define EPWM_SYNC_PHSDIR2_Pos             (25)
 #define EPWM_SYNC_PHSDIR2_Msk             (0x1ul << EPWM_SYNC_PHSDIR2_Pos)
 #define EPWM_SYNC_PHSDIR4_Pos             (26)
 #define EPWM_SYNC_PHSDIR4_Msk             (0x1ul << EPWM_SYNC_PHSDIR4_Pos)
 #define EPWM_SWSYNC_SWSYNC0_Pos           (0)
 #define EPWM_SWSYNC_SWSYNC0_Msk           (0x1ul << EPWM_SWSYNC_SWSYNC0_Pos)
 #define EPWM_SWSYNC_SWSYNC2_Pos           (1)
 #define EPWM_SWSYNC_SWSYNC2_Msk           (0x1ul << EPWM_SWSYNC_SWSYNC2_Pos)
 #define EPWM_SWSYNC_SWSYNC4_Pos           (2)
 #define EPWM_SWSYNC_SWSYNC4_Msk           (0x1ul << EPWM_SWSYNC_SWSYNC4_Pos)
 #define EPWM_CLKSRC_ECLKSRC0_Pos          (0)
 #define EPWM_CLKSRC_ECLKSRC0_Msk          (0x7ul << EPWM_CLKSRC_ECLKSRC0_Pos)
 #define EPWM_CLKSRC_ECLKSRC2_Pos          (8)
 #define EPWM_CLKSRC_ECLKSRC2_Msk          (0x7ul << EPWM_CLKSRC_ECLKSRC2_Pos)
 #define EPWM_CLKSRC_ECLKSRC4_Pos          (16)
 #define EPWM_CLKSRC_ECLKSRC4_Msk          (0x7ul << EPWM_CLKSRC_ECLKSRC4_Pos)
 #define EPWM_CLKPSC0_1_CLKPSC_Pos         (0)
 #define EPWM_CLKPSC0_1_CLKPSC_Msk         (0xffful << EPWM_CLKPSC0_1_CLKPSC_Pos)
 #define EPWM_CLKPSC2_3_CLKPSC_Pos         (0)
 #define EPWM_CLKPSC2_3_CLKPSC_Msk         (0xffful << EPWM_CLKPSC2_3_CLKPSC_Pos)
 #define EPWM_CLKPSC4_5_CLKPSC_Pos         (0)
 #define EPWM_CLKPSC4_5_CLKPSC_Msk         (0xffful << EPWM_CLKPSC4_5_CLKPSC_Pos)
 #define EPWM_CNTEN_CNTEN0_Pos             (0)
 #define EPWM_CNTEN_CNTEN0_Msk             (0x1ul << EPWM_CNTEN_CNTEN0_Pos)
 #define EPWM_CNTEN_CNTEN1_Pos             (1)
 #define EPWM_CNTEN_CNTEN1_Msk             (0x1ul << EPWM_CNTEN_CNTEN1_Pos)
 #define EPWM_CNTEN_CNTEN2_Pos             (2)
 #define EPWM_CNTEN_CNTEN2_Msk             (0x1ul << EPWM_CNTEN_CNTEN2_Pos)
 #define EPWM_CNTEN_CNTEN3_Pos             (3)
 #define EPWM_CNTEN_CNTEN3_Msk             (0x1ul << EPWM_CNTEN_CNTEN3_Pos)
 #define EPWM_CNTEN_CNTEN4_Pos             (4)
 #define EPWM_CNTEN_CNTEN4_Msk             (0x1ul << EPWM_CNTEN_CNTEN4_Pos)
 #define EPWM_CNTEN_CNTEN5_Pos             (5)
 #define EPWM_CNTEN_CNTEN5_Msk             (0x1ul << EPWM_CNTEN_CNTEN5_Pos)
 #define EPWM_CNTCLR_CNTCLR0_Pos           (0)
 #define EPWM_CNTCLR_CNTCLR0_Msk           (0x1ul << EPWM_CNTCLR_CNTCLR0_Pos)
 #define EPWM_CNTCLR_CNTCLR1_Pos           (1)
 #define EPWM_CNTCLR_CNTCLR1_Msk           (0x1ul << EPWM_CNTCLR_CNTCLR1_Pos)
 #define EPWM_CNTCLR_CNTCLR2_Pos           (2)
 #define EPWM_CNTCLR_CNTCLR2_Msk           (0x1ul << EPWM_CNTCLR_CNTCLR2_Pos)
 #define EPWM_CNTCLR_CNTCLR3_Pos           (3)
 #define EPWM_CNTCLR_CNTCLR3_Msk           (0x1ul << EPWM_CNTCLR_CNTCLR3_Pos)
 #define EPWM_CNTCLR_CNTCLR4_Pos           (4)
 #define EPWM_CNTCLR_CNTCLR4_Msk           (0x1ul << EPWM_CNTCLR_CNTCLR4_Pos)
 #define EPWM_CNTCLR_CNTCLR5_Pos           (5)
 #define EPWM_CNTCLR_CNTCLR5_Msk           (0x1ul << EPWM_CNTCLR_CNTCLR5_Pos)
 #define EPWM_LOAD_LOAD0_Pos               (0)
 #define EPWM_LOAD_LOAD0_Msk               (0x1ul << EPWM_LOAD_LOAD0_Pos)
 #define EPWM_LOAD_LOAD1_Pos               (1)
 #define EPWM_LOAD_LOAD1_Msk               (0x1ul << EPWM_LOAD_LOAD1_Pos)
 #define EPWM_LOAD_LOAD2_Pos               (2)
 #define EPWM_LOAD_LOAD2_Msk               (0x1ul << EPWM_LOAD_LOAD2_Pos)
 #define EPWM_LOAD_LOAD3_Pos               (3)
 #define EPWM_LOAD_LOAD3_Msk               (0x1ul << EPWM_LOAD_LOAD3_Pos)
 #define EPWM_LOAD_LOAD4_Pos               (4)
 #define EPWM_LOAD_LOAD4_Msk               (0x1ul << EPWM_LOAD_LOAD4_Pos)
 #define EPWM_LOAD_LOAD5_Pos               (5)
 #define EPWM_LOAD_LOAD5_Msk               (0x1ul << EPWM_LOAD_LOAD5_Pos)
 #define EPWM_PERIOD0_PERIOD_Pos           (0)
 #define EPWM_PERIOD0_PERIOD_Msk           (0xfffful << EPWM_PERIOD0_PERIOD_Pos)
 #define EPWM_PERIOD1_PERIOD_Pos           (0)
 #define EPWM_PERIOD1_PERIOD_Msk           (0xfffful << EPWM_PERIOD1_PERIOD_Pos)
 #define EPWM_PERIOD2_PERIOD_Pos           (0)
 #define EPWM_PERIOD2_PERIOD_Msk           (0xfffful << EPWM_PERIOD2_PERIOD_Pos)
 #define EPWM_PERIOD3_PERIOD_Pos           (0)
 #define EPWM_PERIOD3_PERIOD_Msk           (0xfffful << EPWM_PERIOD3_PERIOD_Pos)
 #define EPWM_PERIOD4_PERIOD_Pos           (0)
 #define EPWM_PERIOD4_PERIOD_Msk           (0xfffful << EPWM_PERIOD4_PERIOD_Pos)
 #define EPWM_PERIOD5_PERIOD_Pos           (0)
 #define EPWM_PERIOD5_PERIOD_Msk           (0xfffful << EPWM_PERIOD5_PERIOD_Pos)
 #define EPWM_CMPDAT0_CMP_Pos              (0)
 #define EPWM_CMPDAT0_CMP_Msk              (0xfffful << EPWM_CMPDAT0_CMP_Pos)
 #define EPWM_CMPDAT1_CMP_Pos              (0)
 #define EPWM_CMPDAT1_CMP_Msk              (0xfffful << EPWM_CMPDAT1_CMP_Pos)
 #define EPWM_CMPDAT2_CMP_Pos              (0)
 #define EPWM_CMPDAT2_CMP_Msk              (0xfffful << EPWM_CMPDAT2_CMP_Pos)
 #define EPWM_CMPDAT3_CMP_Pos              (0)
 #define EPWM_CMPDAT3_CMP_Msk              (0xfffful << EPWM_CMPDAT3_CMP_Pos)
 #define EPWM_CMPDAT4_CMP_Pos              (0)
 #define EPWM_CMPDAT4_CMP_Msk              (0xfffful << EPWM_CMPDAT4_CMP_Pos)
 #define EPWM_CMPDAT5_CMP_Pos              (0)
 #define EPWM_CMPDAT5_CMP_Msk              (0xfffful << EPWM_CMPDAT5_CMP_Pos)
 #define EPWM_DTCTL0_1_DTCNT_Pos           (0)
 #define EPWM_DTCTL0_1_DTCNT_Msk           (0xffful << EPWM_DTCTL0_1_DTCNT_Pos)
 #define EPWM_DTCTL0_1_DTEN_Pos            (16)
 #define EPWM_DTCTL0_1_DTEN_Msk            (0x1ul << EPWM_DTCTL0_1_DTEN_Pos)
 #define EPWM_DTCTL0_1_DTCKSEL_Pos         (24)
 #define EPWM_DTCTL0_1_DTCKSEL_Msk         (0x1ul << EPWM_DTCTL0_1_DTCKSEL_Pos)
 #define EPWM_DTCTL2_3_DTCNT_Pos           (0)
 #define EPWM_DTCTL2_3_DTCNT_Msk           (0xffful << EPWM_DTCTL2_3_DTCNT_Pos)
 #define EPWM_DTCTL2_3_DTEN_Pos            (16)
 #define EPWM_DTCTL2_3_DTEN_Msk            (0x1ul << EPWM_DTCTL2_3_DTEN_Pos)
 #define EPWM_DTCTL2_3_DTCKSEL_Pos         (24)
 #define EPWM_DTCTL2_3_DTCKSEL_Msk         (0x1ul << EPWM_DTCTL2_3_DTCKSEL_Pos)
 #define EPWM_DTCTL4_5_DTCNT_Pos           (0)
 #define EPWM_DTCTL4_5_DTCNT_Msk           (0xffful << EPWM_DTCTL4_5_DTCNT_Pos)
 #define EPWM_DTCTL4_5_DTEN_Pos            (16)
 #define EPWM_DTCTL4_5_DTEN_Msk            (0x1ul << EPWM_DTCTL4_5_DTEN_Pos)
 #define EPWM_DTCTL4_5_DTCKSEL_Pos         (24)
 #define EPWM_DTCTL4_5_DTCKSEL_Msk         (0x1ul << EPWM_DTCTL4_5_DTCKSEL_Pos)
 #define EPWM_PHS0_1_PHS_Pos               (0)
 #define EPWM_PHS0_1_PHS_Msk               (0xfffful << EPWM_PHS0_1_PHS_Pos)
 #define EPWM_PHS2_3_PHS_Pos               (0)
 #define EPWM_PHS2_3_PHS_Msk               (0xfffful << EPWM_PHS2_3_PHS_Pos)
 #define EPWM_PHS4_5_PHS_Pos               (0)
 #define EPWM_PHS4_5_PHS_Msk               (0xfffful << EPWM_PHS4_5_PHS_Pos)
 #define EPWM_CNT0_CNT_Pos                 (0)
 #define EPWM_CNT0_CNT_Msk                 (0xfffful << EPWM_CNT0_CNT_Pos)
 #define EPWM_CNT0_DIRF_Pos                (16)
 #define EPWM_CNT0_DIRF_Msk                (0x1ul << EPWM_CNT0_DIRF_Pos)
 #define EPWM_CNT1_CNT_Pos                 (0)
 #define EPWM_CNT1_CNT_Msk                 (0xfffful << EPWM_CNT1_CNT_Pos)
 #define EPWM_CNT1_DIRF_Pos                (16)
 #define EPWM_CNT1_DIRF_Msk                (0x1ul << EPWM_CNT1_DIRF_Pos)
 #define EPWM_CNT2_CNT_Pos                 (0)
 #define EPWM_CNT2_CNT_Msk                 (0xfffful << EPWM_CNT2_CNT_Pos)
 #define EPWM_CNT2_DIRF_Pos                (16)
 #define EPWM_CNT2_DIRF_Msk                (0x1ul << EPWM_CNT2_DIRF_Pos)
 #define EPWM_CNT3_CNT_Pos                 (0)
 #define EPWM_CNT3_CNT_Msk                 (0xfffful << EPWM_CNT3_CNT_Pos)
 #define EPWM_CNT3_DIRF_Pos                (16)
 #define EPWM_CNT3_DIRF_Msk                (0x1ul << EPWM_CNT3_DIRF_Pos)
 #define EPWM_CNT4_CNT_Pos                 (0)
 #define EPWM_CNT4_CNT_Msk                 (0xfffful << EPWM_CNT4_CNT_Pos)
 #define EPWM_CNT4_DIRF_Pos                (16)
 #define EPWM_CNT4_DIRF_Msk                (0x1ul << EPWM_CNT4_DIRF_Pos)
 #define EPWM_CNT5_CNT_Pos                 (0)
 #define EPWM_CNT5_CNT_Msk                 (0xfffful << EPWM_CNT5_CNT_Pos)
 #define EPWM_CNT5_DIRF_Pos                (16)
 #define EPWM_CNT5_DIRF_Msk                (0x1ul << EPWM_CNT5_DIRF_Pos)
 #define EPWM_WGCTL0_ZPCTL0_Pos            (0)
 #define EPWM_WGCTL0_ZPCTL0_Msk            (0x3ul << EPWM_WGCTL0_ZPCTL0_Pos)
 #define EPWM_WGCTL0_ZPCTL1_Pos            (2)
 #define EPWM_WGCTL0_ZPCTL1_Msk            (0x3ul << EPWM_WGCTL0_ZPCTL1_Pos)
 #define EPWM_WGCTL0_ZPCTL2_Pos            (4)
 #define EPWM_WGCTL0_ZPCTL2_Msk            (0x3ul << EPWM_WGCTL0_ZPCTL2_Pos)
 #define EPWM_WGCTL0_ZPCTL3_Pos            (6)
 #define EPWM_WGCTL0_ZPCTL3_Msk            (0x3ul << EPWM_WGCTL0_ZPCTL3_Pos)
 #define EPWM_WGCTL0_ZPCTL4_Pos            (8)
 #define EPWM_WGCTL0_ZPCTL4_Msk            (0x3ul << EPWM_WGCTL0_ZPCTL4_Pos)
 #define EPWM_WGCTL0_ZPCTL5_Pos            (10)
 #define EPWM_WGCTL0_ZPCTL5_Msk            (0x3ul << EPWM_WGCTL0_ZPCTL5_Pos)
 #define EPWM_WGCTL0_PRDPCTL0_Pos          (16)
 #define EPWM_WGCTL0_PRDPCTL0_Msk          (0x3ul << EPWM_WGCTL0_PRDPCTL0_Pos)
 #define EPWM_WGCTL0_PRDPCTL1_Pos          (18)
 #define EPWM_WGCTL0_PRDPCTL1_Msk          (0x3ul << EPWM_WGCTL0_PRDPCTL1_Pos)
 #define EPWM_WGCTL0_PRDPCTL2_Pos          (20)
 #define EPWM_WGCTL0_PRDPCTL2_Msk          (0x3ul << EPWM_WGCTL0_PRDPCTL2_Pos)
 #define EPWM_WGCTL0_PRDPCTL3_Pos          (22)
 #define EPWM_WGCTL0_PRDPCTL3_Msk          (0x3ul << EPWM_WGCTL0_PRDPCTL3_Pos)
 #define EPWM_WGCTL0_PRDPCTL4_Pos          (24)
 #define EPWM_WGCTL0_PRDPCTL4_Msk          (0x3ul << EPWM_WGCTL0_PRDPCTL4_Pos)
 #define EPWM_WGCTL0_PRDPCTL5_Pos          (26)
 #define EPWM_WGCTL0_PRDPCTL5_Msk          (0x3ul << EPWM_WGCTL0_PRDPCTL5_Pos)
 #define EPWM_WGCTL1_CMPUCTL0_Pos          (0)
 #define EPWM_WGCTL1_CMPUCTL0_Msk          (0x3ul << EPWM_WGCTL1_CMPUCTL0_Pos)
 #define EPWM_WGCTL1_CMPUCTL1_Pos          (2)
 #define EPWM_WGCTL1_CMPUCTL1_Msk          (0x3ul << EPWM_WGCTL1_CMPUCTL1_Pos)
 #define EPWM_WGCTL1_CMPUCTL2_Pos          (4)
 #define EPWM_WGCTL1_CMPUCTL2_Msk          (0x3ul << EPWM_WGCTL1_CMPUCTL2_Pos)
 #define EPWM_WGCTL1_CMPUCTL3_Pos          (6)
 #define EPWM_WGCTL1_CMPUCTL3_Msk          (0x3ul << EPWM_WGCTL1_CMPUCTL3_Pos)
 #define EPWM_WGCTL1_CMPUCTL4_Pos          (8)
 #define EPWM_WGCTL1_CMPUCTL4_Msk          (0x3ul << EPWM_WGCTL1_CMPUCTL4_Pos)
 #define EPWM_WGCTL1_CMPUCTL5_Pos          (10)
 #define EPWM_WGCTL1_CMPUCTL5_Msk          (0x3ul << EPWM_WGCTL1_CMPUCTL5_Pos)
 #define EPWM_WGCTL1_CMPDCTL0_Pos          (16)
 #define EPWM_WGCTL1_CMPDCTL0_Msk          (0x3ul << EPWM_WGCTL1_CMPDCTL0_Pos)
 #define EPWM_WGCTL1_CMPDCTL1_Pos          (18)
 #define EPWM_WGCTL1_CMPDCTL1_Msk          (0x3ul << EPWM_WGCTL1_CMPDCTL1_Pos)
 #define EPWM_WGCTL1_CMPDCTL2_Pos          (20)
 #define EPWM_WGCTL1_CMPDCTL2_Msk          (0x3ul << EPWM_WGCTL1_CMPDCTL2_Pos)
 #define EPWM_WGCTL1_CMPDCTL3_Pos          (22)
 #define EPWM_WGCTL1_CMPDCTL3_Msk          (0x3ul << EPWM_WGCTL1_CMPDCTL3_Pos)
 #define EPWM_WGCTL1_CMPDCTL4_Pos          (24)
 #define EPWM_WGCTL1_CMPDCTL4_Msk          (0x3ul << EPWM_WGCTL1_CMPDCTL4_Pos)
 #define EPWM_WGCTL1_CMPDCTL5_Pos          (26)
 #define EPWM_WGCTL1_CMPDCTL5_Msk          (0x3ul << EPWM_WGCTL1_CMPDCTL5_Pos)
 #define EPWM_MSKEN_MSKEN0_Pos             (0)
 #define EPWM_MSKEN_MSKEN0_Msk             (0x1ul << EPWM_MSKEN_MSKEN0_Pos)
 #define EPWM_MSKEN_MSKEN1_Pos             (1)
 #define EPWM_MSKEN_MSKEN1_Msk             (0x1ul << EPWM_MSKEN_MSKEN1_Pos)
 #define EPWM_MSKEN_MSKEN2_Pos             (2)
 #define EPWM_MSKEN_MSKEN2_Msk             (0x1ul << EPWM_MSKEN_MSKEN2_Pos)
 #define EPWM_MSKEN_MSKEN3_Pos             (3)
 #define EPWM_MSKEN_MSKEN3_Msk             (0x1ul << EPWM_MSKEN_MSKEN3_Pos)
 #define EPWM_MSKEN_MSKEN4_Pos             (4)
 #define EPWM_MSKEN_MSKEN4_Msk             (0x1ul << EPWM_MSKEN_MSKEN4_Pos)
 #define EPWM_MSKEN_MSKEN5_Pos             (5)
 #define EPWM_MSKEN_MSKEN5_Msk             (0x1ul << EPWM_MSKEN_MSKEN5_Pos)
 #define EPWM_MSK_MSKDAT0_Pos              (0)
 #define EPWM_MSK_MSKDAT0_Msk              (0x1ul << EPWM_MSK_MSKDAT0_Pos)
 #define EPWM_MSK_MSKDAT1_Pos              (1)
 #define EPWM_MSK_MSKDAT1_Msk              (0x1ul << EPWM_MSK_MSKDAT1_Pos)
 #define EPWM_MSK_MSKDAT2_Pos              (2)
 #define EPWM_MSK_MSKDAT2_Msk              (0x1ul << EPWM_MSK_MSKDAT2_Pos)
 #define EPWM_MSK_MSKDAT3_Pos              (3)
 #define EPWM_MSK_MSKDAT3_Msk              (0x1ul << EPWM_MSK_MSKDAT3_Pos)
 #define EPWM_MSK_MSKDAT4_Pos              (4)
 #define EPWM_MSK_MSKDAT4_Msk              (0x1ul << EPWM_MSK_MSKDAT4_Pos)
 #define EPWM_MSK_MSKDAT5_Pos              (5)
 #define EPWM_MSK_MSKDAT5_Msk              (0x1ul << EPWM_MSK_MSKDAT5_Pos)
 #define EPWM_BNF_BRK0NFEN_Pos             (0)
 #define EPWM_BNF_BRK0NFEN_Msk             (0x1ul << EPWM_BNF_BRK0NFEN_Pos)
 #define EPWM_BNF_BRK0NFSEL_Pos            (1)
 #define EPWM_BNF_BRK0NFSEL_Msk            (0x7ul << EPWM_BNF_BRK0NFSEL_Pos)
 #define EPWM_BNF_BRK0FCNT_Pos             (4)
 #define EPWM_BNF_BRK0FCNT_Msk             (0x7ul << EPWM_BNF_BRK0FCNT_Pos)
 #define EPWM_BNF_BRK0PINV_Pos             (7)
 #define EPWM_BNF_BRK0PINV_Msk             (0x1ul << EPWM_BNF_BRK0PINV_Pos)
 #define EPWM_BNF_BRK1NFEN_Pos             (8)
 #define EPWM_BNF_BRK1NFEN_Msk             (0x1ul << EPWM_BNF_BRK1NFEN_Pos)
 #define EPWM_BNF_BRK1NFSEL_Pos            (9)
 #define EPWM_BNF_BRK1NFSEL_Msk            (0x7ul << EPWM_BNF_BRK1NFSEL_Pos)
 #define EPWM_BNF_BRK1FCNT_Pos             (12)
 #define EPWM_BNF_BRK1FCNT_Msk             (0x7ul << EPWM_BNF_BRK1FCNT_Pos)
 #define EPWM_BNF_BRK1PINV_Pos             (15)
 #define EPWM_BNF_BRK1PINV_Msk             (0x1ul << EPWM_BNF_BRK1PINV_Pos)
 #define EPWM_BNF_BK0SRC_Pos               (16)
 #define EPWM_BNF_BK0SRC_Msk               (0x1ul << EPWM_BNF_BK0SRC_Pos)
 #define EPWM_BNF_BK1SRC_Pos               (24)
 #define EPWM_BNF_BK1SRC_Msk               (0x1ul << EPWM_BNF_BK1SRC_Pos)
 #define EPWM_FAILBRK_CSSBRKEN_Pos         (0)
 #define EPWM_FAILBRK_CSSBRKEN_Msk         (0x1ul << EPWM_FAILBRK_CSSBRKEN_Pos)
 #define EPWM_FAILBRK_BODBRKEN_Pos         (1)
 #define EPWM_FAILBRK_BODBRKEN_Msk         (0x1ul << EPWM_FAILBRK_BODBRKEN_Pos)
 #define EPWM_FAILBRK_RAMBRKEN_Pos         (2)
 #define EPWM_FAILBRK_RAMBRKEN_Msk         (0x1ul << EPWM_FAILBRK_RAMBRKEN_Pos)
 #define EPWM_FAILBRK_CORBRKEN_Pos         (3)
 #define EPWM_FAILBRK_CORBRKEN_Msk         (0x1ul << EPWM_FAILBRK_CORBRKEN_Pos)
 #define EPWM_BRKCTL0_1_CPO0EBEN_Pos       (0)
 #define EPWM_BRKCTL0_1_CPO0EBEN_Msk       (0x1ul << EPWM_BRKCTL0_1_CPO0EBEN_Pos)
 #define EPWM_BRKCTL0_1_CPO1EBEN_Pos       (1)
 #define EPWM_BRKCTL0_1_CPO1EBEN_Msk       (0x1ul << EPWM_BRKCTL0_1_CPO1EBEN_Pos)
 #define EPWM_BRKCTL0_1_BRKP0EEN_Pos       (4)
 #define EPWM_BRKCTL0_1_BRKP0EEN_Msk       (0x1ul << EPWM_BRKCTL0_1_BRKP0EEN_Pos)
 #define EPWM_BRKCTL0_1_BRKP1EEN_Pos       (5)
 #define EPWM_BRKCTL0_1_BRKP1EEN_Msk       (0x1ul << EPWM_BRKCTL0_1_BRKP1EEN_Pos)
 #define EPWM_BRKCTL0_1_SYSEBEN_Pos        (7)
 #define EPWM_BRKCTL0_1_SYSEBEN_Msk        (0x1ul << EPWM_BRKCTL0_1_SYSEBEN_Pos)
 #define EPWM_BRKCTL0_1_CPO0LBEN_Pos       (8)
 #define EPWM_BRKCTL0_1_CPO0LBEN_Msk       (0x1ul << EPWM_BRKCTL0_1_CPO0LBEN_Pos)
 #define EPWM_BRKCTL0_1_CPO1LBEN_Pos       (9)
 #define EPWM_BRKCTL0_1_CPO1LBEN_Msk       (0x1ul << EPWM_BRKCTL0_1_CPO1LBEN_Pos)
 #define EPWM_BRKCTL0_1_BRKP0LEN_Pos       (12)
 #define EPWM_BRKCTL0_1_BRKP0LEN_Msk       (0x1ul << EPWM_BRKCTL0_1_BRKP0LEN_Pos)
 #define EPWM_BRKCTL0_1_BRKP1LEN_Pos       (13)
 #define EPWM_BRKCTL0_1_BRKP1LEN_Msk       (0x1ul << EPWM_BRKCTL0_1_BRKP1LEN_Pos)
 #define EPWM_BRKCTL0_1_SYSLBEN_Pos        (15)
 #define EPWM_BRKCTL0_1_SYSLBEN_Msk        (0x1ul << EPWM_BRKCTL0_1_SYSLBEN_Pos)
 #define EPWM_BRKCTL0_1_BRKAEVEN_Pos       (16)
 #define EPWM_BRKCTL0_1_BRKAEVEN_Msk       (0x3ul << EPWM_BRKCTL0_1_BRKAEVEN_Pos)
 #define EPWM_BRKCTL0_1_BRKAODD_Pos        (18)
 #define EPWM_BRKCTL0_1_BRKAODD_Msk        (0x3ul << EPWM_BRKCTL0_1_BRKAODD_Pos)
 #define EPWM_BRKCTL0_1_EADCEBEN_Pos       (20)
 #define EPWM_BRKCTL0_1_EADCEBEN_Msk       (0x1ul << EPWM_BRKCTL0_1_EADCEBEN_Pos)
 #define EPWM_BRKCTL0_1_EADCLBEN_Pos       (28)
 #define EPWM_BRKCTL0_1_EADCLBEN_Msk       (0x1ul << EPWM_BRKCTL0_1_EADCLBEN_Pos)
 #define EPWM_BRKCTL2_3_CPO0EBEN_Pos       (0)
 #define EPWM_BRKCTL2_3_CPO0EBEN_Msk       (0x1ul << EPWM_BRKCTL2_3_CPO0EBEN_Pos)
 #define EPWM_BRKCTL2_3_CPO1EBEN_Pos       (1)
 #define EPWM_BRKCTL2_3_CPO1EBEN_Msk       (0x1ul << EPWM_BRKCTL2_3_CPO1EBEN_Pos)
 #define EPWM_BRKCTL2_3_BRKP0EEN_Pos       (4)
 #define EPWM_BRKCTL2_3_BRKP0EEN_Msk       (0x1ul << EPWM_BRKCTL2_3_BRKP0EEN_Pos)
 #define EPWM_BRKCTL2_3_BRKP1EEN_Pos       (5)
 #define EPWM_BRKCTL2_3_BRKP1EEN_Msk       (0x1ul << EPWM_BRKCTL2_3_BRKP1EEN_Pos)
 #define EPWM_BRKCTL2_3_SYSEBEN_Pos        (7)
 #define EPWM_BRKCTL2_3_SYSEBEN_Msk        (0x1ul << EPWM_BRKCTL2_3_SYSEBEN_Pos)
 #define EPWM_BRKCTL2_3_CPO0LBEN_Pos       (8)
 #define EPWM_BRKCTL2_3_CPO0LBEN_Msk       (0x1ul << EPWM_BRKCTL2_3_CPO0LBEN_Pos)
 #define EPWM_BRKCTL2_3_CPO1LBEN_Pos       (9)
 #define EPWM_BRKCTL2_3_CPO1LBEN_Msk       (0x1ul << EPWM_BRKCTL2_3_CPO1LBEN_Pos)
 #define EPWM_BRKCTL2_3_BRKP0LEN_Pos       (12)
 #define EPWM_BRKCTL2_3_BRKP0LEN_Msk       (0x1ul << EPWM_BRKCTL2_3_BRKP0LEN_Pos)
 #define EPWM_BRKCTL2_3_BRKP1LEN_Pos       (13)
 #define EPWM_BRKCTL2_3_BRKP1LEN_Msk       (0x1ul << EPWM_BRKCTL2_3_BRKP1LEN_Pos)
 #define EPWM_BRKCTL2_3_SYSLBEN_Pos        (15)
 #define EPWM_BRKCTL2_3_SYSLBEN_Msk        (0x1ul << EPWM_BRKCTL2_3_SYSLBEN_Pos)
 #define EPWM_BRKCTL2_3_BRKAEVEN_Pos       (16)
 #define EPWM_BRKCTL2_3_BRKAEVEN_Msk       (0x3ul << EPWM_BRKCTL2_3_BRKAEVEN_Pos)
 #define EPWM_BRKCTL2_3_BRKAODD_Pos        (18)
 #define EPWM_BRKCTL2_3_BRKAODD_Msk        (0x3ul << EPWM_BRKCTL2_3_BRKAODD_Pos)
 #define EPWM_BRKCTL2_3_EADCEBEN_Pos       (20)
 #define EPWM_BRKCTL2_3_EADCEBEN_Msk       (0x1ul << EPWM_BRKCTL2_3_EADCEBEN_Pos)
 #define EPWM_BRKCTL2_3_EADCLBEN_Pos       (28)
 #define EPWM_BRKCTL2_3_EADCLBEN_Msk       (0x1ul << EPWM_BRKCTL2_3_EADCLBEN_Pos)
 #define EPWM_BRKCTL4_5_CPO0EBEN_Pos       (0)
 #define EPWM_BRKCTL4_5_CPO0EBEN_Msk       (0x1ul << EPWM_BRKCTL4_5_CPO0EBEN_Pos)
 #define EPWM_BRKCTL4_5_CPO1EBEN_Pos       (1)
 #define EPWM_BRKCTL4_5_CPO1EBEN_Msk       (0x1ul << EPWM_BRKCTL4_5_CPO1EBEN_Pos)
 #define EPWM_BRKCTL4_5_BRKP0EEN_Pos       (4)
 #define EPWM_BRKCTL4_5_BRKP0EEN_Msk       (0x1ul << EPWM_BRKCTL4_5_BRKP0EEN_Pos)
 #define EPWM_BRKCTL4_5_BRKP1EEN_Pos       (5)
 #define EPWM_BRKCTL4_5_BRKP1EEN_Msk       (0x1ul << EPWM_BRKCTL4_5_BRKP1EEN_Pos)
 #define EPWM_BRKCTL4_5_SYSEBEN_Pos        (7)
 #define EPWM_BRKCTL4_5_SYSEBEN_Msk        (0x1ul << EPWM_BRKCTL4_5_SYSEBEN_Pos)
 #define EPWM_BRKCTL4_5_CPO0LBEN_Pos       (8)
 #define EPWM_BRKCTL4_5_CPO0LBEN_Msk       (0x1ul << EPWM_BRKCTL4_5_CPO0LBEN_Pos)
 #define EPWM_BRKCTL4_5_CPO1LBEN_Pos       (9)
 #define EPWM_BRKCTL4_5_CPO1LBEN_Msk       (0x1ul << EPWM_BRKCTL4_5_CPO1LBEN_Pos)
 #define EPWM_BRKCTL4_5_BRKP0LEN_Pos       (12)
 #define EPWM_BRKCTL4_5_BRKP0LEN_Msk       (0x1ul << EPWM_BRKCTL4_5_BRKP0LEN_Pos)
 #define EPWM_BRKCTL4_5_BRKP1LEN_Pos       (13)
 #define EPWM_BRKCTL4_5_BRKP1LEN_Msk       (0x1ul << EPWM_BRKCTL4_5_BRKP1LEN_Pos)
 #define EPWM_BRKCTL4_5_SYSLBEN_Pos        (15)
 #define EPWM_BRKCTL4_5_SYSLBEN_Msk        (0x1ul << EPWM_BRKCTL4_5_SYSLBEN_Pos)
 #define EPWM_BRKCTL4_5_BRKAEVEN_Pos       (16)
 #define EPWM_BRKCTL4_5_BRKAEVEN_Msk       (0x3ul << EPWM_BRKCTL4_5_BRKAEVEN_Pos)
 #define EPWM_BRKCTL4_5_BRKAODD_Pos        (18)
 #define EPWM_BRKCTL4_5_BRKAODD_Msk        (0x3ul << EPWM_BRKCTL4_5_BRKAODD_Pos)
 #define EPWM_BRKCTL4_5_EADCEBEN_Pos       (20)
 #define EPWM_BRKCTL4_5_EADCEBEN_Msk       (0x1ul << EPWM_BRKCTL4_5_EADCEBEN_Pos)
 #define EPWM_BRKCTL4_5_EADCLBEN_Pos       (28)
 #define EPWM_BRKCTL4_5_EADCLBEN_Msk       (0x1ul << EPWM_BRKCTL4_5_EADCLBEN_Pos)
 #define EPWM_POLCTL_PINV0_Pos             (0)
 #define EPWM_POLCTL_PINV0_Msk             (0x1ul << EPWM_POLCTL_PINV0_Pos)
 #define EPWM_POLCTL_PINV1_Pos             (1)
 #define EPWM_POLCTL_PINV1_Msk             (0x1ul << EPWM_POLCTL_PINV1_Pos)
 #define EPWM_POLCTL_PINV2_Pos             (2)
 #define EPWM_POLCTL_PINV2_Msk             (0x1ul << EPWM_POLCTL_PINV2_Pos)
 #define EPWM_POLCTL_PINV3_Pos             (3)
 #define EPWM_POLCTL_PINV3_Msk             (0x1ul << EPWM_POLCTL_PINV3_Pos)
 #define EPWM_POLCTL_PINV4_Pos             (4)
 #define EPWM_POLCTL_PINV4_Msk             (0x1ul << EPWM_POLCTL_PINV4_Pos)
 #define EPWM_POLCTL_PINV5_Pos             (5)
 #define EPWM_POLCTL_PINV5_Msk             (0x1ul << EPWM_POLCTL_PINV5_Pos)
 #define EPWM_POEN_POEN0_Pos               (0)
 #define EPWM_POEN_POEN0_Msk               (0x1ul << EPWM_POEN_POEN0_Pos)
 #define EPWM_POEN_POEN1_Pos               (1)
 #define EPWM_POEN_POEN1_Msk               (0x1ul << EPWM_POEN_POEN1_Pos)
 #define EPWM_POEN_POEN2_Pos               (2)
 #define EPWM_POEN_POEN2_Msk               (0x1ul << EPWM_POEN_POEN2_Pos)
 #define EPWM_POEN_POEN3_Pos               (3)
 #define EPWM_POEN_POEN3_Msk               (0x1ul << EPWM_POEN_POEN3_Pos)
 #define EPWM_POEN_POEN4_Pos               (4)
 #define EPWM_POEN_POEN4_Msk               (0x1ul << EPWM_POEN_POEN4_Pos)
 #define EPWM_POEN_POEN5_Pos               (5)
 #define EPWM_POEN_POEN5_Msk               (0x1ul << EPWM_POEN_POEN5_Pos)
 #define EPWM_SWBRK_BRKETRG0_Pos           (0)
 #define EPWM_SWBRK_BRKETRG0_Msk           (0x1ul << EPWM_SWBRK_BRKETRG0_Pos)
 #define EPWM_SWBRK_BRKETRG2_Pos           (1)
 #define EPWM_SWBRK_BRKETRG2_Msk           (0x1ul << EPWM_SWBRK_BRKETRG2_Pos)
 #define EPWM_SWBRK_BRKETRG4_Pos           (2)
 #define EPWM_SWBRK_BRKETRG4_Msk           (0x1ul << EPWM_SWBRK_BRKETRG4_Pos)
 #define EPWM_SWBRK_BRKLTRG0_Pos           (8)
 #define EPWM_SWBRK_BRKLTRG0_Msk           (0x1ul << EPWM_SWBRK_BRKLTRG0_Pos)
 #define EPWM_SWBRK_BRKLTRG2_Pos           (9)
 #define EPWM_SWBRK_BRKLTRG2_Msk           (0x1ul << EPWM_SWBRK_BRKLTRG2_Pos)
 #define EPWM_SWBRK_BRKLTRG4_Pos           (10)
 #define EPWM_SWBRK_BRKLTRG4_Msk           (0x1ul << EPWM_SWBRK_BRKLTRG4_Pos)
 #define EPWM_INTEN0_ZIEN0_Pos             (0)
 #define EPWM_INTEN0_ZIEN0_Msk             (0x1ul << EPWM_INTEN0_ZIEN0_Pos)
 #define EPWM_INTEN0_ZIEN1_Pos             (1)
 #define EPWM_INTEN0_ZIEN1_Msk             (0x1ul << EPWM_INTEN0_ZIEN1_Pos)
 #define EPWM_INTEN0_ZIEN2_Pos             (2)
 #define EPWM_INTEN0_ZIEN2_Msk             (0x1ul << EPWM_INTEN0_ZIEN2_Pos)
 #define EPWM_INTEN0_ZIEN3_Pos             (3)
 #define EPWM_INTEN0_ZIEN3_Msk             (0x1ul << EPWM_INTEN0_ZIEN3_Pos)
 #define EPWM_INTEN0_ZIEN4_Pos             (4)
 #define EPWM_INTEN0_ZIEN4_Msk             (0x1ul << EPWM_INTEN0_ZIEN4_Pos)
 #define EPWM_INTEN0_ZIEN5_Pos             (5)
 #define EPWM_INTEN0_ZIEN5_Msk             (0x1ul << EPWM_INTEN0_ZIEN5_Pos)
 #define EPWM_INTEN0_PIEN0_Pos             (8)
 #define EPWM_INTEN0_PIEN0_Msk             (0x1ul << EPWM_INTEN0_PIEN0_Pos)
 #define EPWM_INTEN0_PIEN1_Pos             (9)
 #define EPWM_INTEN0_PIEN1_Msk             (0x1ul << EPWM_INTEN0_PIEN1_Pos)
 #define EPWM_INTEN0_PIEN2_Pos             (10)
 #define EPWM_INTEN0_PIEN2_Msk             (0x1ul << EPWM_INTEN0_PIEN2_Pos)
 #define EPWM_INTEN0_PIEN3_Pos             (11)
 #define EPWM_INTEN0_PIEN3_Msk             (0x1ul << EPWM_INTEN0_PIEN3_Pos)
 #define EPWM_INTEN0_PIEN4_Pos             (12)
 #define EPWM_INTEN0_PIEN4_Msk             (0x1ul << EPWM_INTEN0_PIEN4_Pos)
 #define EPWM_INTEN0_PIEN5_Pos             (13)
 #define EPWM_INTEN0_PIEN5_Msk             (0x1ul << EPWM_INTEN0_PIEN5_Pos)
 #define EPWM_INTEN0_CMPUIEN0_Pos          (16)
 #define EPWM_INTEN0_CMPUIEN0_Msk          (0x1ul << EPWM_INTEN0_CMPUIEN0_Pos)
 #define EPWM_INTEN0_CMPUIEN1_Pos          (17)
 #define EPWM_INTEN0_CMPUIEN1_Msk          (0x1ul << EPWM_INTEN0_CMPUIEN1_Pos)
 #define EPWM_INTEN0_CMPUIEN2_Pos          (18)
 #define EPWM_INTEN0_CMPUIEN2_Msk          (0x1ul << EPWM_INTEN0_CMPUIEN2_Pos)
 #define EPWM_INTEN0_CMPUIEN3_Pos          (19)
 #define EPWM_INTEN0_CMPUIEN3_Msk          (0x1ul << EPWM_INTEN0_CMPUIEN3_Pos)
 #define EPWM_INTEN0_CMPUIEN4_Pos          (20)
 #define EPWM_INTEN0_CMPUIEN4_Msk          (0x1ul << EPWM_INTEN0_CMPUIEN4_Pos)
 #define EPWM_INTEN0_CMPUIEN5_Pos          (21)
 #define EPWM_INTEN0_CMPUIEN5_Msk          (0x1ul << EPWM_INTEN0_CMPUIEN5_Pos)
 #define EPWM_INTEN0_CMPDIEN0_Pos          (24)
 #define EPWM_INTEN0_CMPDIEN0_Msk          (0x1ul << EPWM_INTEN0_CMPDIEN0_Pos)
 #define EPWM_INTEN0_CMPDIEN1_Pos          (25)
 #define EPWM_INTEN0_CMPDIEN1_Msk          (0x1ul << EPWM_INTEN0_CMPDIEN1_Pos)
 #define EPWM_INTEN0_CMPDIEN2_Pos          (26)
 #define EPWM_INTEN0_CMPDIEN2_Msk          (0x1ul << EPWM_INTEN0_CMPDIEN2_Pos)
 #define EPWM_INTEN0_CMPDIEN3_Pos          (27)
 #define EPWM_INTEN0_CMPDIEN3_Msk          (0x1ul << EPWM_INTEN0_CMPDIEN3_Pos)
 #define EPWM_INTEN0_CMPDIEN4_Pos          (28)
 #define EPWM_INTEN0_CMPDIEN4_Msk          (0x1ul << EPWM_INTEN0_CMPDIEN4_Pos)
 #define EPWM_INTEN0_CMPDIEN5_Pos          (29)
 #define EPWM_INTEN0_CMPDIEN5_Msk          (0x1ul << EPWM_INTEN0_CMPDIEN5_Pos)
 #define EPWM_INTEN1_BRKEIEN0_1_Pos        (0)
 #define EPWM_INTEN1_BRKEIEN0_1_Msk        (0x1ul << EPWM_INTEN1_BRKEIEN0_1_Pos)
 #define EPWM_INTEN1_BRKEIEN2_3_Pos        (1)
 #define EPWM_INTEN1_BRKEIEN2_3_Msk        (0x1ul << EPWM_INTEN1_BRKEIEN2_3_Pos)
 #define EPWM_INTEN1_BRKEIEN4_5_Pos        (2)
 #define EPWM_INTEN1_BRKEIEN4_5_Msk        (0x1ul << EPWM_INTEN1_BRKEIEN4_5_Pos)
 #define EPWM_INTEN1_BRKLIEN0_1_Pos        (8)
 #define EPWM_INTEN1_BRKLIEN0_1_Msk        (0x1ul << EPWM_INTEN1_BRKLIEN0_1_Pos)
 #define EPWM_INTEN1_BRKLIEN2_3_Pos        (9)
 #define EPWM_INTEN1_BRKLIEN2_3_Msk        (0x1ul << EPWM_INTEN1_BRKLIEN2_3_Pos)
 #define EPWM_INTEN1_BRKLIEN4_5_Pos        (10)
 #define EPWM_INTEN1_BRKLIEN4_5_Msk        (0x1ul << EPWM_INTEN1_BRKLIEN4_5_Pos)
 #define EPWM_INTSTS0_ZIF0_Pos             (0)
 #define EPWM_INTSTS0_ZIF0_Msk             (0x1ul << EPWM_INTSTS0_ZIF0_Pos)
 #define EPWM_INTSTS0_ZIF1_Pos             (1)
 #define EPWM_INTSTS0_ZIF1_Msk             (0x1ul << EPWM_INTSTS0_ZIF1_Pos)
 #define EPWM_INTSTS0_ZIF2_Pos             (2)
 #define EPWM_INTSTS0_ZIF2_Msk             (0x1ul << EPWM_INTSTS0_ZIF2_Pos)
 #define EPWM_INTSTS0_ZIF3_Pos             (3)
 #define EPWM_INTSTS0_ZIF3_Msk             (0x1ul << EPWM_INTSTS0_ZIF3_Pos)
 #define EPWM_INTSTS0_ZIF4_Pos             (4)
 #define EPWM_INTSTS0_ZIF4_Msk             (0x1ul << EPWM_INTSTS0_ZIF4_Pos)
 #define EPWM_INTSTS0_ZIF5_Pos             (5)
 #define EPWM_INTSTS0_ZIF5_Msk             (0x1ul << EPWM_INTSTS0_ZIF5_Pos)
 #define EPWM_INTSTS0_PIF0_Pos             (8)
 #define EPWM_INTSTS0_PIF0_Msk             (0x1ul << EPWM_INTSTS0_PIF0_Pos)
 #define EPWM_INTSTS0_PIF1_Pos             (9)
 #define EPWM_INTSTS0_PIF1_Msk             (0x1ul << EPWM_INTSTS0_PIF1_Pos)
 #define EPWM_INTSTS0_PIF2_Pos             (10)
 #define EPWM_INTSTS0_PIF2_Msk             (0x1ul << EPWM_INTSTS0_PIF2_Pos)
 #define EPWM_INTSTS0_PIF3_Pos             (11)
 #define EPWM_INTSTS0_PIF3_Msk             (0x1ul << EPWM_INTSTS0_PIF3_Pos)
 #define EPWM_INTSTS0_PIF4_Pos             (12)
 #define EPWM_INTSTS0_PIF4_Msk             (0x1ul << EPWM_INTSTS0_PIF4_Pos)
 #define EPWM_INTSTS0_PIF5_Pos             (13)
 #define EPWM_INTSTS0_PIF5_Msk             (0x1ul << EPWM_INTSTS0_PIF5_Pos)
 #define EPWM_INTSTS0_CMPUIF0_Pos          (16)
 #define EPWM_INTSTS0_CMPUIF0_Msk          (0x1ul << EPWM_INTSTS0_CMPUIF0_Pos)
 #define EPWM_INTSTS0_CMPUIF1_Pos          (17)
 #define EPWM_INTSTS0_CMPUIF1_Msk          (0x1ul << EPWM_INTSTS0_CMPUIF1_Pos)
 #define EPWM_INTSTS0_CMPUIF2_Pos          (18)
 #define EPWM_INTSTS0_CMPUIF2_Msk          (0x1ul << EPWM_INTSTS0_CMPUIF2_Pos)
 #define EPWM_INTSTS0_CMPUIF3_Pos          (19)
 #define EPWM_INTSTS0_CMPUIF3_Msk          (0x1ul << EPWM_INTSTS0_CMPUIF3_Pos)
 #define EPWM_INTSTS0_CMPUIF4_Pos          (20)
 #define EPWM_INTSTS0_CMPUIF4_Msk          (0x1ul << EPWM_INTSTS0_CMPUIF4_Pos)
 #define EPWM_INTSTS0_CMPUIF5_Pos          (21)
 #define EPWM_INTSTS0_CMPUIF5_Msk          (0x1ul << EPWM_INTSTS0_CMPUIF5_Pos)
 #define EPWM_INTSTS0_CMPDIF0_Pos          (24)
 #define EPWM_INTSTS0_CMPDIF0_Msk          (0x1ul << EPWM_INTSTS0_CMPDIF0_Pos)
 #define EPWM_INTSTS0_CMPDIF1_Pos          (25)
 #define EPWM_INTSTS0_CMPDIF1_Msk          (0x1ul << EPWM_INTSTS0_CMPDIF1_Pos)
 #define EPWM_INTSTS0_CMPDIF2_Pos          (26)
 #define EPWM_INTSTS0_CMPDIF2_Msk          (0x1ul << EPWM_INTSTS0_CMPDIF2_Pos)
 #define EPWM_INTSTS0_CMPDIF3_Pos          (27)
 #define EPWM_INTSTS0_CMPDIF3_Msk          (0x1ul << EPWM_INTSTS0_CMPDIF3_Pos)
 #define EPWM_INTSTS0_CMPDIF4_Pos          (28)
 #define EPWM_INTSTS0_CMPDIF4_Msk          (0x1ul << EPWM_INTSTS0_CMPDIF4_Pos)
 #define EPWM_INTSTS0_CMPDIF5_Pos          (29)
 #define EPWM_INTSTS0_CMPDIF5_Msk          (0x1ul << EPWM_INTSTS0_CMPDIF5_Pos)
 #define EPWM_INTSTS1_BRKEIF0_Pos          (0)
 #define EPWM_INTSTS1_BRKEIF0_Msk          (0x1ul << EPWM_INTSTS1_BRKEIF0_Pos)
 #define EPWM_INTSTS1_BRKEIF1_Pos          (1)
 #define EPWM_INTSTS1_BRKEIF1_Msk          (0x1ul << EPWM_INTSTS1_BRKEIF1_Pos)
 #define EPWM_INTSTS1_BRKEIF2_Pos          (2)
 #define EPWM_INTSTS1_BRKEIF2_Msk          (0x1ul << EPWM_INTSTS1_BRKEIF2_Pos)
 #define EPWM_INTSTS1_BRKEIF3_Pos          (3)
 #define EPWM_INTSTS1_BRKEIF3_Msk          (0x1ul << EPWM_INTSTS1_BRKEIF3_Pos)
 #define EPWM_INTSTS1_BRKEIF4_Pos          (4)
 #define EPWM_INTSTS1_BRKEIF4_Msk          (0x1ul << EPWM_INTSTS1_BRKEIF4_Pos)
 #define EPWM_INTSTS1_BRKEIF5_Pos          (5)
 #define EPWM_INTSTS1_BRKEIF5_Msk          (0x1ul << EPWM_INTSTS1_BRKEIF5_Pos)
 #define EPWM_INTSTS1_BRKLIF0_Pos          (8)
 #define EPWM_INTSTS1_BRKLIF0_Msk          (0x1ul << EPWM_INTSTS1_BRKLIF0_Pos)
 #define EPWM_INTSTS1_BRKLIF1_Pos          (9)
 #define EPWM_INTSTS1_BRKLIF1_Msk          (0x1ul << EPWM_INTSTS1_BRKLIF1_Pos)
 #define EPWM_INTSTS1_BRKLIF2_Pos          (10)
 #define EPWM_INTSTS1_BRKLIF2_Msk          (0x1ul << EPWM_INTSTS1_BRKLIF2_Pos)
 #define EPWM_INTSTS1_BRKLIF3_Pos          (11)
 #define EPWM_INTSTS1_BRKLIF3_Msk          (0x1ul << EPWM_INTSTS1_BRKLIF3_Pos)
 #define EPWM_INTSTS1_BRKLIF4_Pos          (12)
 #define EPWM_INTSTS1_BRKLIF4_Msk          (0x1ul << EPWM_INTSTS1_BRKLIF4_Pos)
 #define EPWM_INTSTS1_BRKLIF5_Pos          (13)
 #define EPWM_INTSTS1_BRKLIF5_Msk          (0x1ul << EPWM_INTSTS1_BRKLIF5_Pos)
 #define EPWM_INTSTS1_BRKESTS0_Pos         (16)
 #define EPWM_INTSTS1_BRKESTS0_Msk         (0x1ul << EPWM_INTSTS1_BRKESTS0_Pos)
 #define EPWM_INTSTS1_BRKESTS1_Pos         (17)
 #define EPWM_INTSTS1_BRKESTS1_Msk         (0x1ul << EPWM_INTSTS1_BRKESTS1_Pos)
 #define EPWM_INTSTS1_BRKESTS2_Pos         (18)
 #define EPWM_INTSTS1_BRKESTS2_Msk         (0x1ul << EPWM_INTSTS1_BRKESTS2_Pos)
 #define EPWM_INTSTS1_BRKESTS3_Pos         (19)
 #define EPWM_INTSTS1_BRKESTS3_Msk         (0x1ul << EPWM_INTSTS1_BRKESTS3_Pos)
 #define EPWM_INTSTS1_BRKESTS4_Pos         (20)
 #define EPWM_INTSTS1_BRKESTS4_Msk         (0x1ul << EPWM_INTSTS1_BRKESTS4_Pos)
 #define EPWM_INTSTS1_BRKESTS5_Pos         (21)
 #define EPWM_INTSTS1_BRKESTS5_Msk         (0x1ul << EPWM_INTSTS1_BRKESTS5_Pos)
 #define EPWM_INTSTS1_BRKLSTS0_Pos         (24)
 #define EPWM_INTSTS1_BRKLSTS0_Msk         (0x1ul << EPWM_INTSTS1_BRKLSTS0_Pos)
 #define EPWM_INTSTS1_BRKLSTS1_Pos         (25)
 #define EPWM_INTSTS1_BRKLSTS1_Msk         (0x1ul << EPWM_INTSTS1_BRKLSTS1_Pos)
 #define EPWM_INTSTS1_BRKLSTS2_Pos         (26)
 #define EPWM_INTSTS1_BRKLSTS2_Msk         (0x1ul << EPWM_INTSTS1_BRKLSTS2_Pos)
 #define EPWM_INTSTS1_BRKLSTS3_Pos         (27)
 #define EPWM_INTSTS1_BRKLSTS3_Msk         (0x1ul << EPWM_INTSTS1_BRKLSTS3_Pos)
 #define EPWM_INTSTS1_BRKLSTS4_Pos         (28)
 #define EPWM_INTSTS1_BRKLSTS4_Msk         (0x1ul << EPWM_INTSTS1_BRKLSTS4_Pos)
 #define EPWM_INTSTS1_BRKLSTS5_Pos         (29)
 #define EPWM_INTSTS1_BRKLSTS5_Msk         (0x1ul << EPWM_INTSTS1_BRKLSTS5_Pos)
 #define EPWM_DACTRGEN_ZTE0_Pos            (0)
 #define EPWM_DACTRGEN_ZTE0_Msk            (0x1ul << EPWM_DACTRGEN_ZTE0_Pos)
 #define EPWM_DACTRGEN_ZTE1_Pos            (1)
 #define EPWM_DACTRGEN_ZTE1_Msk            (0x1ul << EPWM_DACTRGEN_ZTE1_Pos)
 #define EPWM_DACTRGEN_ZTE2_Pos            (2)
 #define EPWM_DACTRGEN_ZTE2_Msk            (0x1ul << EPWM_DACTRGEN_ZTE2_Pos)
 #define EPWM_DACTRGEN_ZTE3_Pos            (3)
 #define EPWM_DACTRGEN_ZTE3_Msk            (0x1ul << EPWM_DACTRGEN_ZTE3_Pos)
 #define EPWM_DACTRGEN_ZTE4_Pos            (4)
 #define EPWM_DACTRGEN_ZTE4_Msk            (0x1ul << EPWM_DACTRGEN_ZTE4_Pos)
 #define EPWM_DACTRGEN_ZTE5_Pos            (5)
 #define EPWM_DACTRGEN_ZTE5_Msk            (0x1ul << EPWM_DACTRGEN_ZTE5_Pos)
 #define EPWM_DACTRGEN_PTE0_Pos            (8)
 #define EPWM_DACTRGEN_PTE0_Msk            (0x1ul << EPWM_DACTRGEN_PTE0_Pos)
 #define EPWM_DACTRGEN_PTE1_Pos            (9)
 #define EPWM_DACTRGEN_PTE1_Msk            (0x1ul << EPWM_DACTRGEN_PTE1_Pos)
 #define EPWM_DACTRGEN_PTE2_Pos            (10)
 #define EPWM_DACTRGEN_PTE2_Msk            (0x1ul << EPWM_DACTRGEN_PTE2_Pos)
 #define EPWM_DACTRGEN_PTE3_Pos            (11)
 #define EPWM_DACTRGEN_PTE3_Msk            (0x1ul << EPWM_DACTRGEN_PTE3_Pos)
 #define EPWM_DACTRGEN_PTE4_Pos            (12)
 #define EPWM_DACTRGEN_PTE4_Msk            (0x1ul << EPWM_DACTRGEN_PTE4_Pos)
 #define EPWM_DACTRGEN_PTE5_Pos            (13)
 #define EPWM_DACTRGEN_PTE5_Msk            (0x1ul << EPWM_DACTRGEN_PTE5_Pos)
 #define EPWM_DACTRGEN_CUTRGE0_Pos         (16)
 #define EPWM_DACTRGEN_CUTRGE0_Msk         (0x1ul << EPWM_DACTRGEN_CUTRGE0_Pos)
 #define EPWM_DACTRGEN_CUTRGE1_Pos         (17)
 #define EPWM_DACTRGEN_CUTRGE1_Msk         (0x1ul << EPWM_DACTRGEN_CUTRGE1_Pos)
 #define EPWM_DACTRGEN_CUTRGE2_Pos         (18)
 #define EPWM_DACTRGEN_CUTRGE2_Msk         (0x1ul << EPWM_DACTRGEN_CUTRGE2_Pos)
 #define EPWM_DACTRGEN_CUTRGE3_Pos         (19)
 #define EPWM_DACTRGEN_CUTRGE3_Msk         (0x1ul << EPWM_DACTRGEN_CUTRGE3_Pos)
 #define EPWM_DACTRGEN_CUTRGE4_Pos         (20)
 #define EPWM_DACTRGEN_CUTRGE4_Msk         (0x1ul << EPWM_DACTRGEN_CUTRGE4_Pos)
 #define EPWM_DACTRGEN_CUTRGE5_Pos         (21)
 #define EPWM_DACTRGEN_CUTRGE5_Msk         (0x1ul << EPWM_DACTRGEN_CUTRGE5_Pos)
 #define EPWM_DACTRGEN_CDTRGE0_Pos         (24)
 #define EPWM_DACTRGEN_CDTRGE0_Msk         (0x1ul << EPWM_DACTRGEN_CDTRGE0_Pos)
 #define EPWM_DACTRGEN_CDTRGE1_Pos         (25)
 #define EPWM_DACTRGEN_CDTRGE1_Msk         (0x1ul << EPWM_DACTRGEN_CDTRGE1_Pos)
 #define EPWM_DACTRGEN_CDTRGE2_Pos         (26)
 #define EPWM_DACTRGEN_CDTRGE2_Msk         (0x1ul << EPWM_DACTRGEN_CDTRGE2_Pos)
 #define EPWM_DACTRGEN_CDTRGE3_Pos         (27)
 #define EPWM_DACTRGEN_CDTRGE3_Msk         (0x1ul << EPWM_DACTRGEN_CDTRGE3_Pos)
 #define EPWM_DACTRGEN_CDTRGE4_Pos         (28)
 #define EPWM_DACTRGEN_CDTRGE4_Msk         (0x1ul << EPWM_DACTRGEN_CDTRGE4_Pos)
 #define EPWM_DACTRGEN_CDTRGE5_Pos         (29)
 #define EPWM_DACTRGEN_CDTRGE5_Msk         (0x1ul << EPWM_DACTRGEN_CDTRGE5_Pos)
 #define EPWM_EADCTS0_TRGSEL0_Pos          (0)
 #define EPWM_EADCTS0_TRGSEL0_Msk          (0xful << EPWM_EADCTS0_TRGSEL0_Pos)
 #define EPWM_EADCTS0_TRGEN0_Pos           (7)
 #define EPWM_EADCTS0_TRGEN0_Msk           (0x1ul << EPWM_EADCTS0_TRGEN0_Pos)
 #define EPWM_EADCTS0_TRGSEL1_Pos          (8)
 #define EPWM_EADCTS0_TRGSEL1_Msk          (0xful << EPWM_EADCTS0_TRGSEL1_Pos)
 #define EPWM_EADCTS0_TRGEN1_Pos           (15)
 #define EPWM_EADCTS0_TRGEN1_Msk           (0x1ul << EPWM_EADCTS0_TRGEN1_Pos)
 #define EPWM_EADCTS0_TRGSEL2_Pos          (16)
 #define EPWM_EADCTS0_TRGSEL2_Msk          (0xful << EPWM_EADCTS0_TRGSEL2_Pos)
 #define EPWM_EADCTS0_TRGEN2_Pos           (23)
 #define EPWM_EADCTS0_TRGEN2_Msk           (0x1ul << EPWM_EADCTS0_TRGEN2_Pos)
 #define EPWM_EADCTS0_TRGSEL3_Pos          (24)
 #define EPWM_EADCTS0_TRGSEL3_Msk          (0xful << EPWM_EADCTS0_TRGSEL3_Pos)
 #define EPWM_EADCTS0_TRGEN3_Pos           (31)
 #define EPWM_EADCTS0_TRGEN3_Msk           (0x1ul << EPWM_EADCTS0_TRGEN3_Pos)
 #define EPWM_EADCTS1_TRGSEL4_Pos          (0)
 #define EPWM_EADCTS1_TRGSEL4_Msk          (0xful << EPWM_EADCTS1_TRGSEL4_Pos)
 #define EPWM_EADCTS1_TRGEN4_Pos           (7)
 #define EPWM_EADCTS1_TRGEN4_Msk           (0x1ul << EPWM_EADCTS1_TRGEN4_Pos)
 #define EPWM_EADCTS1_TRGSEL5_Pos          (8)
 #define EPWM_EADCTS1_TRGSEL5_Msk          (0xful << EPWM_EADCTS1_TRGSEL5_Pos)
 #define EPWM_EADCTS1_TRGEN5_Pos           (15)
 #define EPWM_EADCTS1_TRGEN5_Msk           (0x1ul << EPWM_EADCTS1_TRGEN5_Pos)
 #define EPWM_FTCMPDAT0_1_FTCMP_Pos        (0)
 #define EPWM_FTCMPDAT0_1_FTCMP_Msk        (0xfffful << EPWM_FTCMPDAT0_1_FTCMP_Pos)
 #define EPWM_FTCMPDAT2_3_FTCMP_Pos        (0)
 #define EPWM_FTCMPDAT2_3_FTCMP_Msk        (0xfffful << EPWM_FTCMPDAT2_3_FTCMP_Pos)
 #define EPWM_FTCMPDAT4_5_FTCMP_Pos        (0)
 #define EPWM_FTCMPDAT4_5_FTCMP_Msk        (0xfffful << EPWM_FTCMPDAT4_5_FTCMP_Pos)
 #define EPWM_SSCTL_SSEN0_Pos              (0)
 #define EPWM_SSCTL_SSEN0_Msk              (0x1ul << EPWM_SSCTL_SSEN0_Pos)
 #define EPWM_SSCTL_SSEN1_Pos              (1)
 #define EPWM_SSCTL_SSEN1_Msk              (0x1ul << EPWM_SSCTL_SSEN1_Pos)
 #define EPWM_SSCTL_SSEN2_Pos              (2)
 #define EPWM_SSCTL_SSEN2_Msk              (0x1ul << EPWM_SSCTL_SSEN2_Pos)
 #define EPWM_SSCTL_SSEN3_Pos              (3)
 #define EPWM_SSCTL_SSEN3_Msk              (0x1ul << EPWM_SSCTL_SSEN3_Pos)
 #define EPWM_SSCTL_SSEN4_Pos              (4)
 #define EPWM_SSCTL_SSEN4_Msk              (0x1ul << EPWM_SSCTL_SSEN4_Pos)
 #define EPWM_SSCTL_SSEN5_Pos              (5)
 #define EPWM_SSCTL_SSEN5_Msk              (0x1ul << EPWM_SSCTL_SSEN5_Pos)
 #define EPWM_SSCTL_SSRC_Pos               (8)
 #define EPWM_SSCTL_SSRC_Msk               (0x3ul << EPWM_SSCTL_SSRC_Pos)
 #define EPWM_SSTRG_CNTSEN_Pos             (0)
 #define EPWM_SSTRG_CNTSEN_Msk             (0x1ul << EPWM_SSTRG_CNTSEN_Pos)
 #define EPWM_LEBCTL_LEBEN_Pos             (0)
 #define EPWM_LEBCTL_LEBEN_Msk             (0x1ul << EPWM_LEBCTL_LEBEN_Pos)
 #define EPWM_LEBCTL_SRCEN0_Pos            (8)
 #define EPWM_LEBCTL_SRCEN0_Msk            (0x1ul << EPWM_LEBCTL_SRCEN0_Pos)
 #define EPWM_LEBCTL_SRCEN2_Pos            (9)
 #define EPWM_LEBCTL_SRCEN2_Msk            (0x1ul << EPWM_LEBCTL_SRCEN2_Pos)
 #define EPWM_LEBCTL_SRCEN4_Pos            (10)
 #define EPWM_LEBCTL_SRCEN4_Msk            (0x1ul << EPWM_LEBCTL_SRCEN4_Pos)
 #define EPWM_LEBCTL_TRGTYPE_Pos           (16)
 #define EPWM_LEBCTL_TRGTYPE_Msk           (0x3ul << EPWM_LEBCTL_TRGTYPE_Pos)
 #define EPWM_LEBCNT_LEBCNT_Pos            (0)
 #define EPWM_LEBCNT_LEBCNT_Msk            (0x1fful << EPWM_LEBCNT_LEBCNT_Pos)
 #define EPWM_STATUS_CNTMAXF0_Pos          (0)
 #define EPWM_STATUS_CNTMAXF0_Msk          (0x1ul << EPWM_STATUS_CNTMAXF0_Pos)
 #define EPWM_STATUS_CNTMAXF1_Pos          (1)
 #define EPWM_STATUS_CNTMAXF1_Msk          (0x1ul << EPWM_STATUS_CNTMAXF1_Pos)
 #define EPWM_STATUS_CNTMAXF2_Pos          (2)
 #define EPWM_STATUS_CNTMAXF2_Msk          (0x1ul << EPWM_STATUS_CNTMAXF2_Pos)
 #define EPWM_STATUS_CNTMAXF3_Pos          (3)
 #define EPWM_STATUS_CNTMAXF3_Msk          (0x1ul << EPWM_STATUS_CNTMAXF3_Pos)
 #define EPWM_STATUS_CNTMAXF4_Pos          (4)
 #define EPWM_STATUS_CNTMAXF4_Msk          (0x1ul << EPWM_STATUS_CNTMAXF4_Pos)
 #define EPWM_STATUS_CNTMAXF5_Pos          (5)
 #define EPWM_STATUS_CNTMAXF5_Msk          (0x1ul << EPWM_STATUS_CNTMAXF5_Pos)
 #define EPWM_STATUS_SYNCINF0_Pos          (8)
 #define EPWM_STATUS_SYNCINF0_Msk          (0x1ul << EPWM_STATUS_SYNCINF0_Pos)
 #define EPWM_STATUS_SYNCINF2_Pos          (9)
 #define EPWM_STATUS_SYNCINF2_Msk          (0x1ul << EPWM_STATUS_SYNCINF2_Pos)
 #define EPWM_STATUS_SYNCINF4_Pos          (10)
 #define EPWM_STATUS_SYNCINF4_Msk          (0x1ul << EPWM_STATUS_SYNCINF4_Pos)
 #define EPWM_STATUS_EADCTRGF0_Pos         (16)
 #define EPWM_STATUS_EADCTRGF0_Msk         (0x1ul << EPWM_STATUS_EADCTRGF0_Pos)
 #define EPWM_STATUS_EADCTRGF1_Pos         (17)
 #define EPWM_STATUS_EADCTRGF1_Msk         (0x1ul << EPWM_STATUS_EADCTRGF1_Pos)
 #define EPWM_STATUS_EADCTRGF2_Pos         (18)
 #define EPWM_STATUS_EADCTRGF2_Msk         (0x1ul << EPWM_STATUS_EADCTRGF2_Pos)
 #define EPWM_STATUS_EADCTRGF3_Pos         (19)
 #define EPWM_STATUS_EADCTRGF3_Msk         (0x1ul << EPWM_STATUS_EADCTRGF3_Pos)
 #define EPWM_STATUS_EADCTRGF4_Pos         (20)
 #define EPWM_STATUS_EADCTRGF4_Msk         (0x1ul << EPWM_STATUS_EADCTRGF4_Pos)
 #define EPWM_STATUS_EADCTRGF5_Pos         (21)
 #define EPWM_STATUS_EADCTRGF5_Msk         (0x1ul << EPWM_STATUS_EADCTRGF5_Pos)
 #define EPWM_STATUS_DACTRGF_Pos           (24)
 #define EPWM_STATUS_DACTRGF_Msk           (0x1ul << EPWM_STATUS_DACTRGF_Pos)
 #define EPWM_IFA0_IFACNT_Pos              (0)
 #define EPWM_IFA0_IFACNT_Msk              (0xfffful << EPWM_IFA0_IFACNT_Pos)
 #define EPWM_IFA0_STPMOD_Pos              (24)
 #define EPWM_IFA0_STPMOD_Msk              (0x1ul << EPWM_IFA0_STPMOD_Pos)
 #define EPWM_IFA0_IFASEL_Pos              (28)
 #define EPWM_IFA0_IFASEL_Msk              (0x3ul << EPWM_IFA0_IFASEL_Pos)
 #define EPWM_IFA0_IFAEN_Pos               (31)
 #define EPWM_IFA0_IFAEN_Msk               (0x1ul << EPWM_IFA0_IFAEN_Pos)
 #define EPWM_IFA1_IFACNT_Pos              (0)
 #define EPWM_IFA1_IFACNT_Msk              (0xfffful << EPWM_IFA1_IFACNT_Pos)
 #define EPWM_IFA1_STPMOD_Pos              (24)
 #define EPWM_IFA1_STPMOD_Msk              (0x1ul << EPWM_IFA1_STPMOD_Pos)
 #define EPWM_IFA1_IFASEL_Pos              (28)
 #define EPWM_IFA1_IFASEL_Msk              (0x3ul << EPWM_IFA1_IFASEL_Pos)
 #define EPWM_IFA1_IFAEN_Pos               (31)
 #define EPWM_IFA1_IFAEN_Msk               (0x1ul << EPWM_IFA1_IFAEN_Pos)
 #define EPWM_IFA2_IFACNT_Pos              (0)
 #define EPWM_IFA2_IFACNT_Msk              (0xfffful << EPWM_IFA2_IFACNT_Pos)
 #define EPWM_IFA2_STPMOD_Pos              (24)
 #define EPWM_IFA2_STPMOD_Msk              (0x1ul << EPWM_IFA2_STPMOD_Pos)
 #define EPWM_IFA2_IFASEL_Pos              (28)
 #define EPWM_IFA2_IFASEL_Msk              (0x3ul << EPWM_IFA2_IFASEL_Pos)
 #define EPWM_IFA2_IFAEN_Pos               (31)
 #define EPWM_IFA2_IFAEN_Msk               (0x1ul << EPWM_IFA2_IFAEN_Pos)
 #define EPWM_IFA3_IFACNT_Pos              (0)
 #define EPWM_IFA3_IFACNT_Msk              (0xfffful << EPWM_IFA3_IFACNT_Pos)
 #define EPWM_IFA3_STPMOD_Pos              (24)
 #define EPWM_IFA3_STPMOD_Msk              (0x1ul << EPWM_IFA3_STPMOD_Pos)
 #define EPWM_IFA3_IFASEL_Pos              (28)
 #define EPWM_IFA3_IFASEL_Msk              (0x3ul << EPWM_IFA3_IFASEL_Pos)
 #define EPWM_IFA3_IFAEN_Pos               (31)
 #define EPWM_IFA3_IFAEN_Msk               (0x1ul << EPWM_IFA3_IFAEN_Pos)
 #define EPWM_IFA4_IFACNT_Pos              (0)
 #define EPWM_IFA4_IFACNT_Msk              (0xfffful << EPWM_IFA4_IFACNT_Pos)
 #define EPWM_IFA4_STPMOD_Pos              (24)
 #define EPWM_IFA4_STPMOD_Msk              (0x1ul << EPWM_IFA4_STPMOD_Pos)
 #define EPWM_IFA4_IFASEL_Pos              (28)
 #define EPWM_IFA4_IFASEL_Msk              (0x3ul << EPWM_IFA4_IFASEL_Pos)
 #define EPWM_IFA4_IFAEN_Pos               (31)
 #define EPWM_IFA4_IFAEN_Msk               (0x1ul << EPWM_IFA4_IFAEN_Pos)
 #define EPWM_IFA5_IFACNT_Pos              (0)
 #define EPWM_IFA5_IFACNT_Msk              (0xfffful << EPWM_IFA5_IFACNT_Pos)
 #define EPWM_IFA5_STPMOD_Pos              (24)
 #define EPWM_IFA5_STPMOD_Msk              (0x1ul << EPWM_IFA5_STPMOD_Pos)
 #define EPWM_IFA5_IFASEL_Pos              (28)
 #define EPWM_IFA5_IFASEL_Msk              (0x3ul << EPWM_IFA5_IFASEL_Pos)
 #define EPWM_IFA5_IFAEN_Pos               (31)
 #define EPWM_IFA5_IFAEN_Msk               (0x1ul << EPWM_IFA5_IFAEN_Pos)
 #define EPWM_AINTSTS_IFAIF0_Pos           (0)
 #define EPWM_AINTSTS_IFAIF0_Msk           (0x1ul << EPWM_AINTSTS_IFAIF0_Pos)
 #define EPWM_AINTSTS_IFAIF1_Pos           (1)
 #define EPWM_AINTSTS_IFAIF1_Msk           (0x1ul << EPWM_AINTSTS_IFAIF1_Pos)
 #define EPWM_AINTSTS_IFAIF2_Pos           (2)
 #define EPWM_AINTSTS_IFAIF2_Msk           (0x1ul << EPWM_AINTSTS_IFAIF2_Pos)
 #define EPWM_AINTSTS_IFAIF3_Pos           (3)
 #define EPWM_AINTSTS_IFAIF3_Msk           (0x1ul << EPWM_AINTSTS_IFAIF3_Pos)
 #define EPWM_AINTSTS_IFAIF4_Pos           (4)
 #define EPWM_AINTSTS_IFAIF4_Msk           (0x1ul << EPWM_AINTSTS_IFAIF4_Pos)
 #define EPWM_AINTSTS_IFAIF5_Pos           (5)
 #define EPWM_AINTSTS_IFAIF5_Msk           (0x1ul << EPWM_AINTSTS_IFAIF5_Pos)
 #define EPWM_AINTEN_IFAIEN0_Pos           (0)
 #define EPWM_AINTEN_IFAIEN0_Msk           (0x1ul << EPWM_AINTEN_IFAIEN0_Pos)
 #define EPWM_AINTEN_IFAIEN1_Pos           (1)
 #define EPWM_AINTEN_IFAIEN1_Msk           (0x1ul << EPWM_AINTEN_IFAIEN1_Pos)
 #define EPWM_AINTEN_IFAIEN2_Pos           (2)
 #define EPWM_AINTEN_IFAIEN2_Msk           (0x1ul << EPWM_AINTEN_IFAIEN2_Pos)
 #define EPWM_AINTEN_IFAIEN3_Pos           (3)
 #define EPWM_AINTEN_IFAIEN3_Msk           (0x1ul << EPWM_AINTEN_IFAIEN3_Pos)
 #define EPWM_AINTEN_IFAIEN4_Pos           (4)
 #define EPWM_AINTEN_IFAIEN4_Msk           (0x1ul << EPWM_AINTEN_IFAIEN4_Pos)
 #define EPWM_AINTEN_IFAIEN5_Pos           (5)
 #define EPWM_AINTEN_IFAIEN5_Msk           (0x1ul << EPWM_AINTEN_IFAIEN5_Pos)
 #define EPWM_APDMACTL_APDMAEN0_Pos        (0)
 #define EPWM_APDMACTL_APDMAEN0_Msk        (0x1ul << EPWM_APDMACTL_APDMAEN0_Pos)
 #define EPWM_APDMACTL_APDMAEN1_Pos        (1)
 #define EPWM_APDMACTL_APDMAEN1_Msk        (0x1ul << EPWM_APDMACTL_APDMAEN1_Pos)
 #define EPWM_APDMACTL_APDMAEN2_Pos        (2)
 #define EPWM_APDMACTL_APDMAEN2_Msk        (0x1ul << EPWM_APDMACTL_APDMAEN2_Pos)
 #define EPWM_APDMACTL_APDMAEN3_Pos        (3)
 #define EPWM_APDMACTL_APDMAEN3_Msk        (0x1ul << EPWM_APDMACTL_APDMAEN3_Pos)
 #define EPWM_APDMACTL_APDMAEN4_Pos        (4)
 #define EPWM_APDMACTL_APDMAEN4_Msk        (0x1ul << EPWM_APDMACTL_APDMAEN4_Pos)
 #define EPWM_APDMACTL_APDMAEN5_Pos        (5)
 #define EPWM_APDMACTL_APDMAEN5_Msk        (0x1ul << EPWM_APDMACTL_APDMAEN5_Pos)
 #define EPWM_FDEN_FDEN0_Pos               (0)
 #define EPWM_FDEN_FDEN0_Msk               (0x1ul << EPWM_FDEN_FDEN0_Pos)
 #define EPWM_FDEN_FDEN1_Pos               (1)
 #define EPWM_FDEN_FDEN1_Msk               (0x1ul << EPWM_FDEN_FDEN1_Pos)
 #define EPWM_FDEN_FDEN2_Pos               (2)
 #define EPWM_FDEN_FDEN2_Msk               (0x1ul << EPWM_FDEN_FDEN2_Pos)
 #define EPWM_FDEN_FDEN3_Pos               (3)
 #define EPWM_FDEN_FDEN3_Msk               (0x1ul << EPWM_FDEN_FDEN3_Pos)
 #define EPWM_FDEN_FDEN4_Pos               (4)
 #define EPWM_FDEN_FDEN4_Msk               (0x1ul << EPWM_FDEN_FDEN4_Pos)
 #define EPWM_FDEN_FDEN5_Pos               (5)
 #define EPWM_FDEN_FDEN5_Msk               (0x1ul << EPWM_FDEN_FDEN5_Pos)
 #define EPWM_FDEN_FDODIS0_Pos             (8)
 #define EPWM_FDEN_FDODIS0_Msk             (0x1ul << EPWM_FDEN_FDODIS0_Pos)
 #define EPWM_FDEN_FDODIS1_Pos             (9)
 #define EPWM_FDEN_FDODIS1_Msk             (0x1ul << EPWM_FDEN_FDODIS1_Pos)
 #define EPWM_FDEN_FDODIS2_Pos             (10)
 #define EPWM_FDEN_FDODIS2_Msk             (0x1ul << EPWM_FDEN_FDODIS2_Pos)
 #define EPWM_FDEN_FDODIS3_Pos             (11)
 #define EPWM_FDEN_FDODIS3_Msk             (0x1ul << EPWM_FDEN_FDODIS3_Pos)
 #define EPWM_FDEN_FDODIS4_Pos             (12)
 #define EPWM_FDEN_FDODIS4_Msk             (0x1ul << EPWM_FDEN_FDODIS4_Pos)
 #define EPWM_FDEN_FDODIS5_Pos             (13)
 #define EPWM_FDEN_FDODIS5_Msk             (0x1ul << EPWM_FDEN_FDODIS5_Pos)
 #define EPWM_FDEN_FDCKS0_Pos              (16)
 #define EPWM_FDEN_FDCKS0_Msk              (0x1ul << EPWM_FDEN_FDCKS0_Pos)
 #define EPWM_FDEN_FDCKS1_Pos              (17)
 #define EPWM_FDEN_FDCKS1_Msk              (0x1ul << EPWM_FDEN_FDCKS1_Pos)
 #define EPWM_FDEN_FDCKS2_Pos              (18)
 #define EPWM_FDEN_FDCKS2_Msk              (0x1ul << EPWM_FDEN_FDCKS2_Pos)
 #define EPWM_FDEN_FDCKS3_Pos              (19)
 #define EPWM_FDEN_FDCKS3_Msk              (0x1ul << EPWM_FDEN_FDCKS3_Pos)
 #define EPWM_FDEN_FDCKS4_Pos              (20)
 #define EPWM_FDEN_FDCKS4_Msk              (0x1ul << EPWM_FDEN_FDCKS4_Pos)
 #define EPWM_FDEN_FDCKS5_Pos              (21)
 #define EPWM_FDEN_FDCKS5_Msk              (0x1ul << EPWM_FDEN_FDCKS5_Pos)
 #define EPWM_FDCTL0_TRMSKCNT_Pos          (0)
 #define EPWM_FDCTL0_TRMSKCNT_Msk          (0x7ful << EPWM_FDCTL0_TRMSKCNT_Pos)
 #define EPWM_FDCTL0_FDMSKEN_Pos           (15)
 #define EPWM_FDCTL0_FDMSKEN_Msk           (0x1ul << EPWM_FDCTL0_FDMSKEN_Pos)
 #define EPWM_FDCTL0_DGSMPCYC_Pos          (16)
 #define EPWM_FDCTL0_DGSMPCYC_Msk          (0x7ul << EPWM_FDCTL0_DGSMPCYC_Pos)
 #define EPWM_FDCTL0_FDCKSEL_Pos           (28)
 #define EPWM_FDCTL0_FDCKSEL_Msk           (0x3ul << EPWM_FDCTL0_FDCKSEL_Pos)
 #define EPWM_FDCTL0_FDDGEN_Pos            (31)
 #define EPWM_FDCTL0_FDDGEN_Msk            (0x1ul << EPWM_FDCTL0_FDDGEN_Pos)
 #define EPWM_FDCTL1_TRMSKCNT_Pos          (0)
 #define EPWM_FDCTL1_TRMSKCNT_Msk          (0x7ful << EPWM_FDCTL1_TRMSKCNT_Pos)
 #define EPWM_FDCTL1_FDMSKEN_Pos           (15)
 #define EPWM_FDCTL1_FDMSKEN_Msk           (0x1ul << EPWM_FDCTL1_FDMSKEN_Pos)
 #define EPWM_FDCTL1_DGSMPCYC_Pos          (16)
 #define EPWM_FDCTL1_DGSMPCYC_Msk          (0x7ul << EPWM_FDCTL1_DGSMPCYC_Pos)
 #define EPWM_FDCTL1_FDCKSEL_Pos           (28)
 #define EPWM_FDCTL1_FDCKSEL_Msk           (0x3ul << EPWM_FDCTL1_FDCKSEL_Pos)
 #define EPWM_FDCTL1_FDDGEN_Pos            (31)
 #define EPWM_FDCTL1_FDDGEN_Msk            (0x1ul << EPWM_FDCTL1_FDDGEN_Pos)
 #define EPWM_FDCTL2_TRMSKCNT_Pos          (0)
 #define EPWM_FDCTL2_TRMSKCNT_Msk          (0x7ful << EPWM_FDCTL2_TRMSKCNT_Pos)
 #define EPWM_FDCTL2_FDMSKEN_Pos           (15)
 #define EPWM_FDCTL2_FDMSKEN_Msk           (0x1ul << EPWM_FDCTL2_FDMSKEN_Pos)
 #define EPWM_FDCTL2_DGSMPCYC_Pos          (16)
 #define EPWM_FDCTL2_DGSMPCYC_Msk          (0x7ul << EPWM_FDCTL2_DGSMPCYC_Pos)
 #define EPWM_FDCTL2_FDCKSEL_Pos           (28)
 #define EPWM_FDCTL2_FDCKSEL_Msk           (0x3ul << EPWM_FDCTL2_FDCKSEL_Pos)
 #define EPWM_FDCTL2_FDDGEN_Pos            (31)
 #define EPWM_FDCTL2_FDDGEN_Msk            (0x1ul << EPWM_FDCTL2_FDDGEN_Pos)
 #define EPWM_FDCTL3_TRMSKCNT_Pos          (0)
 #define EPWM_FDCTL3_TRMSKCNT_Msk          (0x7ful << EPWM_FDCTL3_TRMSKCNT_Pos)
 #define EPWM_FDCTL3_FDMSKEN_Pos           (15)
 #define EPWM_FDCTL3_FDMSKEN_Msk           (0x1ul << EPWM_FDCTL3_FDMSKEN_Pos)
 #define EPWM_FDCTL3_DGSMPCYC_Pos          (16)
 #define EPWM_FDCTL3_DGSMPCYC_Msk          (0x7ul << EPWM_FDCTL3_DGSMPCYC_Pos)
 #define EPWM_FDCTL3_FDCKSEL_Pos           (28)
 #define EPWM_FDCTL3_FDCKSEL_Msk           (0x3ul << EPWM_FDCTL3_FDCKSEL_Pos)
 #define EPWM_FDCTL3_FDDGEN_Pos            (31)
 #define EPWM_FDCTL3_FDDGEN_Msk            (0x1ul << EPWM_FDCTL3_FDDGEN_Pos)
 #define EPWM_FDCTL4_TRMSKCNT_Pos          (0)
 #define EPWM_FDCTL4_TRMSKCNT_Msk          (0x7ful << EPWM_FDCTL4_TRMSKCNT_Pos)
 #define EPWM_FDCTL4_FDMSKEN_Pos           (15)
 #define EPWM_FDCTL4_FDMSKEN_Msk           (0x1ul << EPWM_FDCTL4_FDMSKEN_Pos)
 #define EPWM_FDCTL4_DGSMPCYC_Pos          (16)
 #define EPWM_FDCTL4_DGSMPCYC_Msk          (0x7ul << EPWM_FDCTL4_DGSMPCYC_Pos)
 #define EPWM_FDCTL4_FDCKSEL_Pos           (28)
 #define EPWM_FDCTL4_FDCKSEL_Msk           (0x3ul << EPWM_FDCTL4_FDCKSEL_Pos)
 #define EPWM_FDCTL4_FDDGEN_Pos            (31)
 #define EPWM_FDCTL4_FDDGEN_Msk            (0x1ul << EPWM_FDCTL4_FDDGEN_Pos)
 #define EPWM_FDCTL5_TRMSKCNT_Pos          (0)
 #define EPWM_FDCTL5_TRMSKCNT_Msk          (0x7ful << EPWM_FDCTL5_TRMSKCNT_Pos)
 #define EPWM_FDCTL5_FDMSKEN_Pos           (15)
 #define EPWM_FDCTL5_FDMSKEN_Msk           (0x1ul << EPWM_FDCTL5_FDMSKEN_Pos)
 #define EPWM_FDCTL5_DGSMPCYC_Pos          (16)
 #define EPWM_FDCTL5_DGSMPCYC_Msk          (0x7ul << EPWM_FDCTL5_DGSMPCYC_Pos)
 #define EPWM_FDCTL5_FDCKSEL_Pos           (28)
 #define EPWM_FDCTL5_FDCKSEL_Msk           (0x3ul << EPWM_FDCTL5_FDCKSEL_Pos)
 #define EPWM_FDCTL5_FDDGEN_Pos            (31)
 #define EPWM_FDCTL5_FDDGEN_Msk            (0x1ul << EPWM_FDCTL5_FDDGEN_Pos)
 #define EPWM_FDIEN_FDIEN0_Pos             (0)
 #define EPWM_FDIEN_FDIEN0_Msk             (0x1ul << EPWM_FDIEN_FDIEN0_Pos)
 #define EPWM_FDIEN_FDIEN1_Pos             (1)
 #define EPWM_FDIEN_FDIEN1_Msk             (0x1ul << EPWM_FDIEN_FDIEN1_Pos)
 #define EPWM_FDIEN_FDIEN2_Pos             (2)
 #define EPWM_FDIEN_FDIEN2_Msk             (0x1ul << EPWM_FDIEN_FDIEN2_Pos)
 #define EPWM_FDIEN_FDIEN3_Pos             (3)
 #define EPWM_FDIEN_FDIEN3_Msk             (0x1ul << EPWM_FDIEN_FDIEN3_Pos)
 #define EPWM_FDIEN_FDIEN4_Pos             (4)
 #define EPWM_FDIEN_FDIEN4_Msk             (0x1ul << EPWM_FDIEN_FDIEN4_Pos)
 #define EPWM_FDIEN_FDIEN5_Pos             (5)
 #define EPWM_FDIEN_FDIEN5_Msk             (0x1ul << EPWM_FDIEN_FDIEN5_Pos)
 #define EPWM_FDSTS_FDIF0_Pos              (0)
 #define EPWM_FDSTS_FDIF0_Msk              (0x1ul << EPWM_FDSTS_FDIF0_Pos)
 #define EPWM_FDSTS_FDIF1_Pos              (1)
 #define EPWM_FDSTS_FDIF1_Msk              (0x1ul << EPWM_FDSTS_FDIF1_Pos)
 #define EPWM_FDSTS_FDIF2_Pos              (2)
 #define EPWM_FDSTS_FDIF2_Msk              (0x1ul << EPWM_FDSTS_FDIF2_Pos)
 #define EPWM_FDSTS_FDIF3_Pos              (3)
 #define EPWM_FDSTS_FDIF3_Msk              (0x1ul << EPWM_FDSTS_FDIF3_Pos)
 #define EPWM_FDSTS_FDIF4_Pos              (4)
 #define EPWM_FDSTS_FDIF4_Msk              (0x1ul << EPWM_FDSTS_FDIF4_Pos)
 #define EPWM_FDSTS_FDIF5_Pos              (5)
 #define EPWM_FDSTS_FDIF5_Msk              (0x1ul << EPWM_FDSTS_FDIF5_Pos)
 #define EPWM_EADCPSCCTL_PSCEN0_Pos        (0)
 #define EPWM_EADCPSCCTL_PSCEN0_Msk        (0x1ul << EPWM_EADCPSCCTL_PSCEN0_Pos)
 #define EPWM_EADCPSCCTL_PSCEN1_Pos        (1)
 #define EPWM_EADCPSCCTL_PSCEN1_Msk        (0x1ul << EPWM_EADCPSCCTL_PSCEN1_Pos)
 #define EPWM_EADCPSCCTL_PSCEN2_Pos        (2)
 #define EPWM_EADCPSCCTL_PSCEN2_Msk        (0x1ul << EPWM_EADCPSCCTL_PSCEN2_Pos)
 #define EPWM_EADCPSCCTL_PSCEN3_Pos        (3)
 #define EPWM_EADCPSCCTL_PSCEN3_Msk        (0x1ul << EPWM_EADCPSCCTL_PSCEN3_Pos)
 #define EPWM_EADCPSCCTL_PSCEN4_Pos        (4)
 #define EPWM_EADCPSCCTL_PSCEN4_Msk        (0x1ul << EPWM_EADCPSCCTL_PSCEN4_Pos)
 #define EPWM_EADCPSCCTL_PSCEN5_Pos        (5)
 #define EPWM_EADCPSCCTL_PSCEN5_Msk        (0x1ul << EPWM_EADCPSCCTL_PSCEN5_Pos)
 #define EPWM_EADCPSC0_EADCPSC0_Pos        (0)
 #define EPWM_EADCPSC0_EADCPSC0_Msk        (0xful << EPWM_EADCPSC0_EADCPSC0_Pos)
 #define EPWM_EADCPSC0_EADCPSC1_Pos        (8)
 #define EPWM_EADCPSC0_EADCPSC1_Msk        (0xful << EPWM_EADCPSC0_EADCPSC1_Pos)
 #define EPWM_EADCPSC0_EADCPSC2_Pos        (16)
 #define EPWM_EADCPSC0_EADCPSC2_Msk        (0xful << EPWM_EADCPSC0_EADCPSC2_Pos)
 #define EPWM_EADCPSC0_EADCPSC3_Pos        (24)
 #define EPWM_EADCPSC0_EADCPSC3_Msk        (0xful << EPWM_EADCPSC0_EADCPSC3_Pos)
 #define EPWM_EADCPSC1_EADCPSC4_Pos        (0)
 #define EPWM_EADCPSC1_EADCPSC4_Msk        (0xful << EPWM_EADCPSC1_EADCPSC4_Pos)
 #define EPWM_EADCPSC1_EADCPSC5_Pos        (8)
 #define EPWM_EADCPSC1_EADCPSC5_Msk        (0xful << EPWM_EADCPSC1_EADCPSC5_Pos)
 #define EPWM_EADCPSCNT0_PSCNT0_Pos        (0)
 #define EPWM_EADCPSCNT0_PSCNT0_Msk        (0xful << EPWM_EADCPSCNT0_PSCNT0_Pos)
 #define EPWM_EADCPSCNT0_PSCNT1_Pos        (8)
 #define EPWM_EADCPSCNT0_PSCNT1_Msk        (0xful << EPWM_EADCPSCNT0_PSCNT1_Pos)
 #define EPWM_EADCPSCNT0_PSCNT2_Pos        (16)
 #define EPWM_EADCPSCNT0_PSCNT2_Msk        (0xful << EPWM_EADCPSCNT0_PSCNT2_Pos)
 #define EPWM_EADCPSCNT0_PSCNT3_Pos        (24)
 #define EPWM_EADCPSCNT0_PSCNT3_Msk        (0xful << EPWM_EADCPSCNT0_PSCNT3_Pos)
 #define EPWM_EADCPSCNT1_PSCNT4_Pos        (0)
 #define EPWM_EADCPSCNT1_PSCNT4_Msk        (0xful << EPWM_EADCPSCNT1_PSCNT4_Pos)
 #define EPWM_EADCPSCNT1_PSCNT5_Pos        (8)
 #define EPWM_EADCPSCNT1_PSCNT5_Msk        (0xful << EPWM_EADCPSCNT1_PSCNT5_Pos)
 #define EPWM_CAPINEN_CAPINEN0_Pos         (0)
 #define EPWM_CAPINEN_CAPINEN0_Msk         (0x1ul << EPWM_CAPINEN_CAPINEN0_Pos)
 #define EPWM_CAPINEN_CAPINEN1_Pos         (1)
 #define EPWM_CAPINEN_CAPINEN1_Msk         (0x1ul << EPWM_CAPINEN_CAPINEN1_Pos)
 #define EPWM_CAPINEN_CAPINEN2_Pos         (2)
 #define EPWM_CAPINEN_CAPINEN2_Msk         (0x1ul << EPWM_CAPINEN_CAPINEN2_Pos)
 #define EPWM_CAPINEN_CAPINEN3_Pos         (3)
 #define EPWM_CAPINEN_CAPINEN3_Msk         (0x1ul << EPWM_CAPINEN_CAPINEN3_Pos)
 #define EPWM_CAPINEN_CAPINEN4_Pos         (4)
 #define EPWM_CAPINEN_CAPINEN4_Msk         (0x1ul << EPWM_CAPINEN_CAPINEN4_Pos)
 #define EPWM_CAPINEN_CAPINEN5_Pos         (5)
 #define EPWM_CAPINEN_CAPINEN5_Msk         (0x1ul << EPWM_CAPINEN_CAPINEN5_Pos)
 #define EPWM_CAPCTL_CAPEN0_Pos            (0)
 #define EPWM_CAPCTL_CAPEN0_Msk            (0x1ul << EPWM_CAPCTL_CAPEN0_Pos)
 #define EPWM_CAPCTL_CAPEN1_Pos            (1)
 #define EPWM_CAPCTL_CAPEN1_Msk            (0x1ul << EPWM_CAPCTL_CAPEN1_Pos)
 #define EPWM_CAPCTL_CAPEN2_Pos            (2)
 #define EPWM_CAPCTL_CAPEN2_Msk            (0x1ul << EPWM_CAPCTL_CAPEN2_Pos)
 #define EPWM_CAPCTL_CAPEN3_Pos            (3)
 #define EPWM_CAPCTL_CAPEN3_Msk            (0x1ul << EPWM_CAPCTL_CAPEN3_Pos)
 #define EPWM_CAPCTL_CAPEN4_Pos            (4)
 #define EPWM_CAPCTL_CAPEN4_Msk            (0x1ul << EPWM_CAPCTL_CAPEN4_Pos)
 #define EPWM_CAPCTL_CAPEN5_Pos            (5)
 #define EPWM_CAPCTL_CAPEN5_Msk            (0x1ul << EPWM_CAPCTL_CAPEN5_Pos)
 #define EPWM_CAPCTL_CAPINV0_Pos           (8)
 #define EPWM_CAPCTL_CAPINV0_Msk           (0x1ul << EPWM_CAPCTL_CAPINV0_Pos)
 #define EPWM_CAPCTL_CAPINV1_Pos           (9)
 #define EPWM_CAPCTL_CAPINV1_Msk           (0x1ul << EPWM_CAPCTL_CAPINV1_Pos)
 #define EPWM_CAPCTL_CAPINV2_Pos           (10)
 #define EPWM_CAPCTL_CAPINV2_Msk           (0x1ul << EPWM_CAPCTL_CAPINV2_Pos)
 #define EPWM_CAPCTL_CAPINV3_Pos           (11)
 #define EPWM_CAPCTL_CAPINV3_Msk           (0x1ul << EPWM_CAPCTL_CAPINV3_Pos)
 #define EPWM_CAPCTL_CAPINV4_Pos           (12)
 #define EPWM_CAPCTL_CAPINV4_Msk           (0x1ul << EPWM_CAPCTL_CAPINV4_Pos)
 #define EPWM_CAPCTL_CAPINV5_Pos           (13)
 #define EPWM_CAPCTL_CAPINV5_Msk           (0x1ul << EPWM_CAPCTL_CAPINV5_Pos)
 #define EPWM_CAPCTL_RCRLDEN0_Pos          (16)
 #define EPWM_CAPCTL_RCRLDEN0_Msk          (0x1ul << EPWM_CAPCTL_RCRLDEN0_Pos)
 #define EPWM_CAPCTL_RCRLDEN1_Pos          (17)
 #define EPWM_CAPCTL_RCRLDEN1_Msk          (0x1ul << EPWM_CAPCTL_RCRLDEN1_Pos)
 #define EPWM_CAPCTL_RCRLDEN2_Pos          (18)
 #define EPWM_CAPCTL_RCRLDEN2_Msk          (0x1ul << EPWM_CAPCTL_RCRLDEN2_Pos)
 #define EPWM_CAPCTL_RCRLDEN3_Pos          (19)
 #define EPWM_CAPCTL_RCRLDEN3_Msk          (0x1ul << EPWM_CAPCTL_RCRLDEN3_Pos)
 #define EPWM_CAPCTL_RCRLDEN4_Pos          (20)
 #define EPWM_CAPCTL_RCRLDEN4_Msk          (0x1ul << EPWM_CAPCTL_RCRLDEN4_Pos)
 #define EPWM_CAPCTL_RCRLDEN5_Pos          (21)
 #define EPWM_CAPCTL_RCRLDEN5_Msk          (0x1ul << EPWM_CAPCTL_RCRLDEN5_Pos)
 #define EPWM_CAPCTL_FCRLDEN0_Pos          (24)
 #define EPWM_CAPCTL_FCRLDEN0_Msk          (0x1ul << EPWM_CAPCTL_FCRLDEN0_Pos)
 #define EPWM_CAPCTL_FCRLDEN1_Pos          (25)
 #define EPWM_CAPCTL_FCRLDEN1_Msk          (0x1ul << EPWM_CAPCTL_FCRLDEN1_Pos)
 #define EPWM_CAPCTL_FCRLDEN2_Pos          (26)
 #define EPWM_CAPCTL_FCRLDEN2_Msk          (0x1ul << EPWM_CAPCTL_FCRLDEN2_Pos)
 #define EPWM_CAPCTL_FCRLDEN3_Pos          (27)
 #define EPWM_CAPCTL_FCRLDEN3_Msk          (0x1ul << EPWM_CAPCTL_FCRLDEN3_Pos)
 #define EPWM_CAPCTL_FCRLDEN4_Pos          (28)
 #define EPWM_CAPCTL_FCRLDEN4_Msk          (0x1ul << EPWM_CAPCTL_FCRLDEN4_Pos)
 #define EPWM_CAPCTL_FCRLDEN5_Pos          (29)
 #define EPWM_CAPCTL_FCRLDEN5_Msk          (0x1ul << EPWM_CAPCTL_FCRLDEN5_Pos)
 #define EPWM_CAPSTS_CRLIFOV0_Pos          (0)
 #define EPWM_CAPSTS_CRLIFOV0_Msk          (0x1ul << EPWM_CAPSTS_CRLIFOV0_Pos)
 #define EPWM_CAPSTS_CRLIFOV1_Pos          (1)
 #define EPWM_CAPSTS_CRLIFOV1_Msk          (0x1ul << EPWM_CAPSTS_CRLIFOV1_Pos)
 #define EPWM_CAPSTS_CRLIFOV2_Pos          (2)
 #define EPWM_CAPSTS_CRLIFOV2_Msk          (0x1ul << EPWM_CAPSTS_CRLIFOV2_Pos)
 #define EPWM_CAPSTS_CRLIFOV3_Pos          (3)
 #define EPWM_CAPSTS_CRLIFOV3_Msk          (0x1ul << EPWM_CAPSTS_CRLIFOV3_Pos)
 #define EPWM_CAPSTS_CRLIFOV4_Pos          (4)
 #define EPWM_CAPSTS_CRLIFOV4_Msk          (0x1ul << EPWM_CAPSTS_CRLIFOV4_Pos)
 #define EPWM_CAPSTS_CRLIFOV5_Pos          (5)
 #define EPWM_CAPSTS_CRLIFOV5_Msk          (0x1ul << EPWM_CAPSTS_CRLIFOV5_Pos)
 #define EPWM_CAPSTS_CFLIFOV0_Pos          (8)
 #define EPWM_CAPSTS_CFLIFOV0_Msk          (0x1ul << EPWM_CAPSTS_CFLIFOV0_Pos)
 #define EPWM_CAPSTS_CFLIFOV1_Pos          (9)
 #define EPWM_CAPSTS_CFLIFOV1_Msk          (0x1ul << EPWM_CAPSTS_CFLIFOV1_Pos)
 #define EPWM_CAPSTS_CFLIFOV2_Pos          (10)
 #define EPWM_CAPSTS_CFLIFOV2_Msk          (0x1ul << EPWM_CAPSTS_CFLIFOV2_Pos)
 #define EPWM_CAPSTS_CFLIFOV3_Pos          (11)
 #define EPWM_CAPSTS_CFLIFOV3_Msk          (0x1ul << EPWM_CAPSTS_CFLIFOV3_Pos)
 #define EPWM_CAPSTS_CFLIFOV4_Pos          (12)
 #define EPWM_CAPSTS_CFLIFOV4_Msk          (0x1ul << EPWM_CAPSTS_CFLIFOV4_Pos)
 #define EPWM_CAPSTS_CFLIFOV5_Pos          (13)
 #define EPWM_CAPSTS_CFLIFOV5_Msk          (0x1ul << EPWM_CAPSTS_CFLIFOV5_Pos)
 #define EPWM_RCAPDAT0_RCAPDAT_Pos         (0)
 #define EPWM_RCAPDAT0_RCAPDAT_Msk         (0xfffful << EPWM_RCAPDAT0_RCAPDAT_Pos)
 #define EPWM_FCAPDAT0_FCAPDAT_Pos         (0)
 #define EPWM_FCAPDAT0_FCAPDAT_Msk         (0xfffful << EPWM_FCAPDAT0_FCAPDAT_Pos)
 #define EPWM_RCAPDAT1_RCAPDAT_Pos         (0)
 #define EPWM_RCAPDAT1_RCAPDAT_Msk         (0xfffful << EPWM_RCAPDAT1_RCAPDAT_Pos)
 #define EPWM_FCAPDAT1_FCAPDAT_Pos         (0)
 #define EPWM_FCAPDAT1_FCAPDAT_Msk         (0xfffful << EPWM_FCAPDAT1_FCAPDAT_Pos)
 #define EPWM_RCAPDAT2_RCAPDAT_Pos         (0)
 #define EPWM_RCAPDAT2_RCAPDAT_Msk         (0xfffful << EPWM_RCAPDAT2_RCAPDAT_Pos)
 #define EPWM_FCAPDAT2_FCAPDAT_Pos         (0)
 #define EPWM_FCAPDAT2_FCAPDAT_Msk         (0xfffful << EPWM_FCAPDAT2_FCAPDAT_Pos)
 #define EPWM_RCAPDAT3_RCAPDAT_Pos         (0)
 #define EPWM_RCAPDAT3_RCAPDAT_Msk         (0xfffful << EPWM_RCAPDAT3_RCAPDAT_Pos)
 #define EPWM_FCAPDAT3_FCAPDAT_Pos         (0)
 #define EPWM_FCAPDAT3_FCAPDAT_Msk         (0xfffful << EPWM_FCAPDAT3_FCAPDAT_Pos)
 #define EPWM_RCAPDAT4_RCAPDAT_Pos         (0)
 #define EPWM_RCAPDAT4_RCAPDAT_Msk         (0xfffful << EPWM_RCAPDAT4_RCAPDAT_Pos)
 #define EPWM_FCAPDAT4_FCAPDAT_Pos         (0)
 #define EPWM_FCAPDAT4_FCAPDAT_Msk         (0xfffful << EPWM_FCAPDAT4_FCAPDAT_Pos)
 #define EPWM_RCAPDAT5_RCAPDAT_Pos         (0)
 #define EPWM_RCAPDAT5_RCAPDAT_Msk         (0xfffful << EPWM_RCAPDAT5_RCAPDAT_Pos)
 #define EPWM_FCAPDAT5_FCAPDAT_Pos         (0)
 #define EPWM_FCAPDAT5_FCAPDAT_Msk         (0xfffful << EPWM_FCAPDAT5_FCAPDAT_Pos)
 #define EPWM_PDMACTL_CHEN0_1_Pos          (0)
 #define EPWM_PDMACTL_CHEN0_1_Msk          (0x1ul << EPWM_PDMACTL_CHEN0_1_Pos)
 #define EPWM_PDMACTL_CAPMOD0_1_Pos        (1)
 #define EPWM_PDMACTL_CAPMOD0_1_Msk        (0x3ul << EPWM_PDMACTL_CAPMOD0_1_Pos)
 #define EPWM_PDMACTL_CAPORD0_1_Pos        (3)
 #define EPWM_PDMACTL_CAPORD0_1_Msk        (0x1ul << EPWM_PDMACTL_CAPORD0_1_Pos)
 #define EPWM_PDMACTL_CHSEL0_1_Pos         (4)
 #define EPWM_PDMACTL_CHSEL0_1_Msk         (0x1ul << EPWM_PDMACTL_CHSEL0_1_Pos)
 #define EPWM_PDMACTL_CHEN2_3_Pos          (8)
 #define EPWM_PDMACTL_CHEN2_3_Msk          (0x1ul << EPWM_PDMACTL_CHEN2_3_Pos)
 #define EPWM_PDMACTL_CAPMOD2_3_Pos        (9)
 #define EPWM_PDMACTL_CAPMOD2_3_Msk        (0x3ul << EPWM_PDMACTL_CAPMOD2_3_Pos)
 #define EPWM_PDMACTL_CAPORD2_3_Pos        (11)
 #define EPWM_PDMACTL_CAPORD2_3_Msk        (0x1ul << EPWM_PDMACTL_CAPORD2_3_Pos)
 #define EPWM_PDMACTL_CHSEL2_3_Pos         (12)
 #define EPWM_PDMACTL_CHSEL2_3_Msk         (0x1ul << EPWM_PDMACTL_CHSEL2_3_Pos)
 #define EPWM_PDMACTL_CHEN4_5_Pos          (16)
 #define EPWM_PDMACTL_CHEN4_5_Msk          (0x1ul << EPWM_PDMACTL_CHEN4_5_Pos)
 #define EPWM_PDMACTL_CAPMOD4_5_Pos        (17)
 #define EPWM_PDMACTL_CAPMOD4_5_Msk        (0x3ul << EPWM_PDMACTL_CAPMOD4_5_Pos)
 #define EPWM_PDMACTL_CAPORD4_5_Pos        (19)
 #define EPWM_PDMACTL_CAPORD4_5_Msk        (0x1ul << EPWM_PDMACTL_CAPORD4_5_Pos)
 #define EPWM_PDMACTL_CHSEL4_5_Pos         (20)
 #define EPWM_PDMACTL_CHSEL4_5_Msk         (0x1ul << EPWM_PDMACTL_CHSEL4_5_Pos)
 #define EPWM_PDMACAP0_1_CAPBUF_Pos        (0)
 #define EPWM_PDMACAP0_1_CAPBUF_Msk        (0xfffful << EPWM_PDMACAP0_1_CAPBUF_Pos)
 #define EPWM_PDMACAP2_3_CAPBUF_Pos        (0)
 #define EPWM_PDMACAP2_3_CAPBUF_Msk        (0xfffful << EPWM_PDMACAP2_3_CAPBUF_Pos)
 #define EPWM_PDMACAP4_5_CAPBUF_Pos        (0)
 #define EPWM_PDMACAP4_5_CAPBUF_Msk        (0xfffful << EPWM_PDMACAP4_5_CAPBUF_Pos)
 #define EPWM_CAPIEN_CAPRIEN0_Pos          (0)
 #define EPWM_CAPIEN_CAPRIEN0_Msk          (0x1ul << EPWM_CAPIEN_CAPRIEN0_Pos)
 #define EPWM_CAPIEN_CAPRIEN1_Pos          (1)
 #define EPWM_CAPIEN_CAPRIEN1_Msk          (0x1ul << EPWM_CAPIEN_CAPRIEN1_Pos)
 #define EPWM_CAPIEN_CAPRIEN2_Pos          (2)
 #define EPWM_CAPIEN_CAPRIEN2_Msk          (0x1ul << EPWM_CAPIEN_CAPRIEN2_Pos)
 #define EPWM_CAPIEN_CAPRIEN3_Pos          (3)
 #define EPWM_CAPIEN_CAPRIEN3_Msk          (0x1ul << EPWM_CAPIEN_CAPRIEN3_Pos)
 #define EPWM_CAPIEN_CAPRIEN4_Pos          (4)
 #define EPWM_CAPIEN_CAPRIEN4_Msk          (0x1ul << EPWM_CAPIEN_CAPRIEN4_Pos)
 #define EPWM_CAPIEN_CAPRIEN5_Pos          (5)
 #define EPWM_CAPIEN_CAPRIEN5_Msk          (0x1ul << EPWM_CAPIEN_CAPRIEN5_Pos)
 #define EPWM_CAPIEN_CAPFIEN0_Pos          (8)
 #define EPWM_CAPIEN_CAPFIEN0_Msk          (0x1ul << EPWM_CAPIEN_CAPFIEN0_Pos)
 #define EPWM_CAPIEN_CAPFIEN1_Pos          (9)
 #define EPWM_CAPIEN_CAPFIEN1_Msk          (0x1ul << EPWM_CAPIEN_CAPFIEN1_Pos)
 #define EPWM_CAPIEN_CAPFIEN2_Pos          (10)
 #define EPWM_CAPIEN_CAPFIEN2_Msk          (0x1ul << EPWM_CAPIEN_CAPFIEN2_Pos)
 #define EPWM_CAPIEN_CAPFIEN3_Pos          (11)
 #define EPWM_CAPIEN_CAPFIEN3_Msk          (0x1ul << EPWM_CAPIEN_CAPFIEN3_Pos)
 #define EPWM_CAPIEN_CAPFIEN4_Pos          (12)
 #define EPWM_CAPIEN_CAPFIEN4_Msk          (0x1ul << EPWM_CAPIEN_CAPFIEN4_Pos)
 #define EPWM_CAPIEN_CAPFIEN5_Pos          (13)
 #define EPWM_CAPIEN_CAPFIEN5_Msk          (0x1ul << EPWM_CAPIEN_CAPFIEN5_Pos)
 #define EPWM_CAPIF_CRLIF0_Pos             (0)
 #define EPWM_CAPIF_CRLIF0_Msk             (0x1ul << EPWM_CAPIF_CRLIF0_Pos)
 #define EPWM_CAPIF_CRLIF1_Pos             (1)
 #define EPWM_CAPIF_CRLIF1_Msk             (0x1ul << EPWM_CAPIF_CRLIF1_Pos)
 #define EPWM_CAPIF_CRLIF2_Pos             (2)
 #define EPWM_CAPIF_CRLIF2_Msk             (0x1ul << EPWM_CAPIF_CRLIF2_Pos)
 #define EPWM_CAPIF_CRLIF3_Pos             (3)
 #define EPWM_CAPIF_CRLIF3_Msk             (0x1ul << EPWM_CAPIF_CRLIF3_Pos)
 #define EPWM_CAPIF_CRLIF4_Pos             (4)
 #define EPWM_CAPIF_CRLIF4_Msk             (0x1ul << EPWM_CAPIF_CRLIF4_Pos)
 #define EPWM_CAPIF_CRLIF5_Pos             (5)
 #define EPWM_CAPIF_CRLIF5_Msk             (0x1ul << EPWM_CAPIF_CRLIF5_Pos)
 #define EPWM_CAPIF_CFLIF0_Pos             (8)
 #define EPWM_CAPIF_CFLIF0_Msk             (0x1ul << EPWM_CAPIF_CFLIF0_Pos)
 #define EPWM_CAPIF_CFLIF1_Pos             (9)
 #define EPWM_CAPIF_CFLIF1_Msk             (0x1ul << EPWM_CAPIF_CFLIF1_Pos)
 #define EPWM_CAPIF_CFLIF2_Pos             (10)
 #define EPWM_CAPIF_CFLIF2_Msk             (0x1ul << EPWM_CAPIF_CFLIF2_Pos)
 #define EPWM_CAPIF_CFLIF3_Pos             (11)
 #define EPWM_CAPIF_CFLIF3_Msk             (0x1ul << EPWM_CAPIF_CFLIF3_Pos)
 #define EPWM_CAPIF_CFLIF4_Pos             (12)
 #define EPWM_CAPIF_CFLIF4_Msk             (0x1ul << EPWM_CAPIF_CFLIF4_Pos)
 #define EPWM_CAPIF_CFLIF5_Pos             (13)
 #define EPWM_CAPIF_CFLIF5_Msk             (0x1ul << EPWM_CAPIF_CFLIF5_Pos)
 #define EPWM_PBUF0_PBUF_Pos               (0)
 #define EPWM_PBUF0_PBUF_Msk               (0xfffful << EPWM_PBUF0_PBUF_Pos)
 #define EPWM_PBUF1_PBUF_Pos               (0)
 #define EPWM_PBUF1_PBUF_Msk               (0xfffful << EPWM_PBUF1_PBUF_Pos)
 #define EPWM_PBUF2_PBUF_Pos               (0)
 #define EPWM_PBUF2_PBUF_Msk               (0xfffful << EPWM_PBUF2_PBUF_Pos)
 #define EPWM_PBUF3_PBUF_Pos               (0)
 #define EPWM_PBUF3_PBUF_Msk               (0xfffful << EPWM_PBUF3_PBUF_Pos)
 #define EPWM_PBUF4_PBUF_Pos               (0)
 #define EPWM_PBUF4_PBUF_Msk               (0xfffful << EPWM_PBUF4_PBUF_Pos)
 #define EPWM_PBUF5_PBUF_Pos               (0)
 #define EPWM_PBUF5_PBUF_Msk               (0xfffful << EPWM_PBUF5_PBUF_Pos)
 #define EPWM_CMPBUF0_CMPBUF_Pos           (0)
 #define EPWM_CMPBUF0_CMPBUF_Msk           (0xfffful << EPWM_CMPBUF0_CMPBUF_Pos)
 #define EPWM_CMPBUF1_CMPBUF_Pos           (0)
 #define EPWM_CMPBUF1_CMPBUF_Msk           (0xfffful << EPWM_CMPBUF1_CMPBUF_Pos)
 #define EPWM_CMPBUF2_CMPBUF_Pos           (0)
 #define EPWM_CMPBUF2_CMPBUF_Msk           (0xfffful << EPWM_CMPBUF2_CMPBUF_Pos)
 #define EPWM_CMPBUF3_CMPBUF_Pos           (0)
 #define EPWM_CMPBUF3_CMPBUF_Msk           (0xfffful << EPWM_CMPBUF3_CMPBUF_Pos)
 #define EPWM_CMPBUF4_CMPBUF_Pos           (0)
 #define EPWM_CMPBUF4_CMPBUF_Msk           (0xfffful << EPWM_CMPBUF4_CMPBUF_Pos)
 #define EPWM_CMPBUF5_CMPBUF_Pos           (0)
 #define EPWM_CMPBUF5_CMPBUF_Msk           (0xfffful << EPWM_CMPBUF5_CMPBUF_Pos)
 #define EPWM_CPSCBUF0_1_CPSCBUF_Pos       (0)
 #define EPWM_CPSCBUF0_1_CPSCBUF_Msk       (0xffful << EPWM_CPSCBUF0_1_CPSCBUF_Pos)
 #define EPWM_CPSCBUF2_3_CPSCBUF_Pos       (0)
 #define EPWM_CPSCBUF2_3_CPSCBUF_Msk       (0xffful << EPWM_CPSCBUF2_3_CPSCBUF_Pos)
 #define EPWM_CPSCBUF4_5_CPSCBUF_Pos       (0)
 #define EPWM_CPSCBUF4_5_CPSCBUF_Msk       (0xffful << EPWM_CPSCBUF4_5_CPSCBUF_Pos)
 #define EPWM_FTCBUF0_1_FTCMPBUF_Pos       (0)
 #define EPWM_FTCBUF0_1_FTCMPBUF_Msk       (0xfffful << EPWM_FTCBUF0_1_FTCMPBUF_Pos)
 #define EPWM_FTCBUF2_3_FTCMPBUF_Pos       (0)
 #define EPWM_FTCBUF2_3_FTCMPBUF_Msk       (0xfffful << EPWM_FTCBUF2_3_FTCMPBUF_Pos)
 #define EPWM_FTCBUF4_5_FTCMPBUF_Pos       (0)
 #define EPWM_FTCBUF4_5_FTCMPBUF_Msk       (0xfffful << EPWM_FTCBUF4_5_FTCMPBUF_Pos)
 #define EPWM_FTCI_FTCMU0_Pos              (0)
 #define EPWM_FTCI_FTCMU0_Msk              (0x1ul << EPWM_FTCI_FTCMU0_Pos)
 #define EPWM_FTCI_FTCMU2_Pos              (1)
 #define EPWM_FTCI_FTCMU2_Msk              (0x1ul << EPWM_FTCI_FTCMU2_Pos)
 #define EPWM_FTCI_FTCMU4_Pos              (2)
 #define EPWM_FTCI_FTCMU4_Msk              (0x1ul << EPWM_FTCI_FTCMU4_Pos)
 #define EPWM_FTCI_FTCMD0_Pos              (8)
 #define EPWM_FTCI_FTCMD0_Msk              (0x1ul << EPWM_FTCI_FTCMD0_Pos)
 #define EPWM_FTCI_FTCMD2_Pos              (9)
 #define EPWM_FTCI_FTCMD2_Msk              (0x1ul << EPWM_FTCI_FTCMD2_Pos)
 #define EPWM_FTCI_FTCMD4_Pos              (10)
 #define EPWM_FTCI_FTCMD4_Msk              (0x1ul << EPWM_FTCI_FTCMD4_Pos)                     /* EPWM_CONST */
  /* end of EPWM register group */ /* end of REGISTER group */

 #if defined ( __CC_ARM   )
 #pragma no_anon_unions
 #endif

 #endif /* __EPWM_REG_H__ */
EPWM_T::APDMACTL
__IO uint32_t APDMACTL
Definition: epwm_reg.h:4787

EPWM_T
Definition: epwm_reg.h:71

EPWM_T::STATUS
__IO uint32_t STATUS
Definition: epwm_reg.h:4777

EPWM_T::EADCPSCNT0
__IO uint32_t EADCPSCNT0
Definition: epwm_reg.h:4798

EPWM_T::CLKSRC
__IO uint32_t CLKSRC
Definition: epwm_reg.h:4721

EPWM_T::INTSTS0
__IO uint32_t INTSTS0
Definition: epwm_reg.h:4761

EPWM_T::LEBCNT
__IO uint32_t LEBCNT
Definition: epwm_reg.h:4776

EPWM_T::CAPIEN
__IO uint32_t CAPIEN
Definition: epwm_reg.h:4812

EPWM_T::INTSTS1
__IO uint32_t INTSTS1
Definition: epwm_reg.h:4762

EPWM_T::SWBRK
__O uint32_t SWBRK
Definition: epwm_reg.h:4758

EPWM_T::EADCTS1
__IO uint32_t EADCTS1
Definition: epwm_reg.h:4768

EPWM_T::CAPINEN
__IO uint32_t CAPINEN
Definition: epwm_reg.h:4803

EPWM_T::CNTCLR
__IO uint32_t CNTCLR
Definition: epwm_reg.h:4724

EPWM_T::SSCTL
__IO uint32_t SSCTL
Definition: epwm_reg.h:4773

EPWM_T::WGCTL0
__IO uint32_t WGCTL0
Definition: epwm_reg.h:4749

EPWM_T::SSTRG
__O uint32_t SSTRG
Definition: epwm_reg.h:4774

EPWM_T::FDIEN
__IO uint32_t FDIEN
Definition: epwm_reg.h:4793

EPWM_T::SYNC
__IO uint32_t SYNC
Definition: epwm_reg.h:4719

EPWM_T::MSKEN
__IO uint32_t MSKEN
Definition: epwm_reg.h:4751

ECAPDAT_T
Definition: epwm_reg.h:26

EPWM_T::EADCPSCCTL
__IO uint32_t EADCPSCCTL
Definition: epwm_reg.h:4795

EPWM_T::PDMACTL
__IO uint32_t PDMACTL
Definition: epwm_reg.h:4807

EPWM_T::FDSTS
__IO uint32_t FDSTS
Definition: epwm_reg.h:4794

EPWM_T::EADCTS0
__IO uint32_t EADCTS0
Definition: epwm_reg.h:4767

EPWM_T::POLCTL
__IO uint32_t POLCTL
Definition: epwm_reg.h:4756

EPWM_T::CNTEN
__IO uint32_t CNTEN
Definition: epwm_reg.h:4723

EPWM_T::DACTRGEN
__IO uint32_t DACTRGEN
Definition: epwm_reg.h:4766

EPWM_T::WGCTL1
__IO uint32_t WGCTL1
Definition: epwm_reg.h:4750

EPWM_T::LEBCTL
__IO uint32_t LEBCTL
Definition: epwm_reg.h:4775

EPWM_T::CAPCTL
__IO uint32_t CAPCTL
Definition: epwm_reg.h:4804

EPWM_T::AINTSTS
__IO uint32_t AINTSTS
Definition: epwm_reg.h:4785

EPWM_T::CAPSTS
__I uint32_t CAPSTS
Definition: epwm_reg.h:4805

EPWM_T::EADCPSC1
__IO uint32_t EADCPSC1
Definition: epwm_reg.h:4797

EPWM_T::INTEN1
__IO uint32_t INTEN1
Definition: epwm_reg.h:4760

EPWM_T::CTL0
__IO uint32_t CTL0
Definition: epwm_reg.h:4717

ECAPDAT_T::FCAPDAT
__IO uint32_t FCAPDAT
Definition: epwm_reg.h:68

EPWM_T::BNF
__IO uint32_t BNF
Definition: epwm_reg.h:4753

EPWM_T::SWSYNC
__IO uint32_t SWSYNC
Definition: epwm_reg.h:4720

ECAPDAT_T::RCAPDAT
__IO uint32_t RCAPDAT
Definition: epwm_reg.h:67

EPWM_T::FAILBRK
__IO uint32_t FAILBRK
Definition: epwm_reg.h:4754

EPWM_T::CTL1
__IO uint32_t CTL1
Definition: epwm_reg.h:4718

EPWM_T::MSK
__IO uint32_t MSK
Definition: epwm_reg.h:4752

EPWM_T::EADCPSC0
__IO uint32_t EADCPSC0
Definition: epwm_reg.h:4796

EPWM_T::LOAD
__IO uint32_t LOAD
Definition: epwm_reg.h:4725

EPWM_T::INTEN0
__IO uint32_t INTEN0
Definition: epwm_reg.h:4759

EPWM_T::AINTEN
__IO uint32_t AINTEN
Definition: epwm_reg.h:4786

EPWM_T::EADCPSCNT1
__IO uint32_t EADCPSCNT1
Definition: epwm_reg.h:4799

EPWM_T::CAPIF
__IO uint32_t CAPIF
Definition: epwm_reg.h:4813

EPWM_T::FTCI
__IO uint32_t FTCI
Definition: epwm_reg.h:4821

EPWM_T::FDEN
__IO uint32_t FDEN
Definition: epwm_reg.h:4791

EPWM_T::POEN
__IO uint32_t POEN
Definition: epwm_reg.h:4757