32 #define EBI_BANK0_BASE_ADDR 0x60000000UL 33 #define EBI_BANK1_BASE_ADDR 0x60100000UL 34 #define EBI_BANK2_BASE_ADDR 0x60200000UL 35 #define EBI_MAX_SIZE 0x00100000UL 47 #define EBI_BUSWIDTH_8BIT 8UL 48 #define EBI_BUSWIDTH_16BIT 16UL 53 #define EBI_CS_ACTIVE_LOW 0UL 54 #define EBI_CS_ACTIVE_HIGH 1UL 59 #define EBI_MCLKDIV_1 0x0UL 60 #define EBI_MCLKDIV_2 0x1UL 61 #define EBI_MCLKDIV_4 0x2UL 62 #define EBI_MCLKDIV_8 0x3UL 63 #define EBI_MCLKDIV_16 0x4UL 64 #define EBI_MCLKDIV_32 0x5UL 65 #define EBI_MCLKDIV_64 0x6UL 66 #define EBI_MCLKDIV_128 0x7UL 68 #define EBI_TIMING_FASTEST 0x0UL 69 #define EBI_TIMING_VERYFAST 0x1UL 70 #define EBI_TIMING_FAST 0x2UL 71 #define EBI_TIMING_NORMAL 0x3UL 72 #define EBI_TIMING_SLOW 0x4UL 73 #define EBI_TIMING_VERYSLOW 0x5UL 74 #define EBI_TIMING_SLOWEST 0x6UL 76 #define EBI_OPMODE_NORMAL 0x0UL 77 #define EBI_OPMODE_CACCESS (EBI_CTL_CACCESS_Msk) 78 #define EBI_OPMODE_ADSEPARATE (EBI_CTL_ADSEPEN_Msk) 97 #define EBI0_READ_DATA8(u32Addr) (*((volatile unsigned char *)(EBI_BANK0_BASE_ADDR+(u32Addr)))) 110 #define EBI0_WRITE_DATA8(u32Addr, u32Data) (*((volatile unsigned char *)(EBI_BANK0_BASE_ADDR+(u32Addr))) = (u32Data)) 122 #define EBI0_READ_DATA16(u32Addr) (*((volatile unsigned short *)(EBI_BANK0_BASE_ADDR+(u32Addr)))) 135 #define EBI0_WRITE_DATA16(u32Addr, u32Data) (*((volatile unsigned short *)(EBI_BANK0_BASE_ADDR+(u32Addr))) = (u32Data)) 147 #define EBI0_READ_DATA32(u32Addr) (*((volatile unsigned int *)(EBI_BANK0_BASE_ADDR+(u32Addr)))) 160 #define EBI0_WRITE_DATA32(u32Addr, u32Data) (*((volatile unsigned int *)(EBI_BANK0_BASE_ADDR+(u32Addr))) = (u32Data)) 172 #define EBI1_READ_DATA8(u32Addr) (*((volatile unsigned char *)(EBI_BANK1_BASE_ADDR+(u32Addr)))) 185 #define EBI1_WRITE_DATA8(u32Addr, u32Data) (*((volatile unsigned char *)(EBI_BANK1_BASE_ADDR+(u32Addr))) = (u32Data)) 197 #define EBI1_READ_DATA16(u32Addr) (*((volatile unsigned short *)(EBI_BANK1_BASE_ADDR+(u32Addr)))) 210 #define EBI1_WRITE_DATA16(u32Addr, u32Data) (*((volatile unsigned short *)(EBI_BANK1_BASE_ADDR+(u32Addr))) = (u32Data)) 222 #define EBI1_READ_DATA32(u32Addr) (*((volatile unsigned int *)(EBI_BANK1_BASE_ADDR+(u32Addr)))) 235 #define EBI1_WRITE_DATA32(u32Addr, u32Data) (*((volatile unsigned int *)(EBI_BANK1_BASE_ADDR+(u32Addr))) = (u32Data)) 247 #define EBI2_READ_DATA8(u32Addr) (*((volatile unsigned char *)(EBI_BANK2_BASE_ADDR+(u32Addr)))) 260 #define EBI2_WRITE_DATA8(u32Addr, u32Data) (*((volatile unsigned char *)(EBI_BANK2_BASE_ADDR+(u32Addr))) = (u32Data)) 272 #define EBI2_READ_DATA16(u32Addr) (*((volatile unsigned short *)(EBI_BANK2_BASE_ADDR+(u32Addr)))) 285 #define EBI2_WRITE_DATA16(u32Addr, u32Data) (*((volatile unsigned short *)(EBI_BANK2_BASE_ADDR+(u32Addr))) = (u32Data)) 297 #define EBI2_READ_DATA32(u32Addr) (*((volatile unsigned int *)(EBI_BANK2_BASE_ADDR+(u32Addr)))) 310 #define EBI2_WRITE_DATA32(u32Addr, u32Data) (*((volatile unsigned int *)(EBI_BANK2_BASE_ADDR+(u32Addr))) = (u32Data)) 322 #define EBI_ENABLE_WRITE_BUFFER() (EBI->CTL0 |= EBI_CTL_WBUFEN_Msk); 334 #define EBI_DISABLE_WRITE_BUFFER() (EBI->CTL0 &= ~EBI_CTL_WBUFEN_Msk); 336 void EBI_Open(uint32_t u32Bank, uint32_t u32DataWidth, uint32_t u32TimingClass, uint32_t u32BusMode, uint32_t u32CSActiveLevel);
338 void EBI_SetBusTiming(uint32_t u32Bank, uint32_t u32TimingConfig, uint32_t u32MclkDiv);
void EBI_Close(uint32_t u32Bank)
Disable EBI on specify Bank.
void EBI_SetBusTiming(uint32_t u32Bank, uint32_t u32TimingConfig, uint32_t u32MclkDiv)
Set EBI Bus Timing for specify Bank.
void EBI_Open(uint32_t u32Bank, uint32_t u32DataWidth, uint32_t u32TimingClass, uint32_t u32BusMode, uint32_t u32CSActiveLevel)
Initialize EBI for specify Bank.