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M480 BSP
V3.05.001
The Board Support Package for M480 Series
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CCAP register definition header file. More...
Go to the source code of this file.
Data Structures | |
| struct | CCAP_T |
Macros | |
| #define | CCAP_CTL_CCAPEN_Pos (0) |
| #define | CCAP_CTL_CCAPEN_Msk (0x1ul << CCAP_CTL_CCAPEN_Pos) |
| #define | CCAP_CTL_ADDRSW_Pos (3) |
| #define | CCAP_CTL_ADDRSW_Msk (0x1ul << CCAP_CTL_ADDRSW_Pos) |
| #define | CCAP_CTL_PLNEN_Pos (5) |
| #define | CCAP_CTL_PLNEN_Msk (0x1ul << CCAP_CTL_PLNEN_Pos) |
| #define | CCAP_CTL_PKTEN_Pos (6) |
| #define | CCAP_CTL_PKTEN_Msk (0x1ul << CCAP_CTL_PKTEN_Pos) |
| #define | CCAP_CTL_MONO_Pos (7) |
| #define | CCAP_CTL_MONO_Msk (0x1ul << CCAP_CTL_MONO_Pos) |
| #define | CCAP_CTL_SHUTTER_Pos (16) |
| #define | CCAP_CTL_SHUTTER_Msk (0x1ul << CCAP_CTL_SHUTTER_Pos) |
| #define | CCAP_CTL_MY4_SWAP_Pos (17) |
| #define | CCAP_CTL_MY4_SWAP_Msk (0x1ul << CCAP_CTL_MY4_SWAP_Pos) |
| #define | CCAP_CTL_MY8_MY4_Pos (18) |
| #define | CCAP_CTL_MY8_MY4_Msk (0x1ul << CCAP_CTL_MY8_MY4_Pos) |
| #define | CCAP_CTL_Luma_Y_One_Pos (19) |
| #define | CCAP_CTL_Luma_Y_One_Msk (0x1ul << CCAP_CTL_Luma_Y_One_Pos) |
| #define | CCAP_CTL_UPDATE_Pos (20) |
| #define | CCAP_CTL_UPDATE_Msk (0x1ul << CCAP_CTL_UPDATE_Pos) |
| #define | CCAP_CTL_VPRST_Pos (24) |
| #define | CCAP_CTL_VPRST_Msk (0x1ul << CCAP_CTL_VPRST_Pos) |
| #define | CCAP_PAR_INFMT_Pos (0) |
| #define | CCAP_PAR_INFMT_Msk (0x1ul << CCAP_PAR_INFMT_Pos) |
| #define | CCAP_PAR_SENTYPE_Pos (1) |
| #define | CCAP_PAR_SENTYPE_Msk (0x1ul << CCAP_PAR_SENTYPE_Pos) |
| #define | CCAP_PAR_INDATORD_Pos (2) |
| #define | CCAP_PAR_INDATORD_Msk (0x3ul << CCAP_PAR_INDATORD_Pos) |
| #define | CCAP_PAR_OUTFMT_Pos (4) |
| #define | CCAP_PAR_OUTFMT_Msk (0x3ul << CCAP_PAR_OUTFMT_Pos) |
| #define | CCAP_PAR_RANGE_Pos (6) |
| #define | CCAP_PAR_RANGE_Msk (0x1ul << CCAP_PAR_RANGE_Pos) |
| #define | CCAP_PAR_PLNFMT_Pos (7) |
| #define | CCAP_PAR_PLNFMT_Msk (0x1ul << CCAP_PAR_PLNFMT_Pos) |
| #define | CCAP_PAR_PCLKP_Pos (8) |
| #define | CCAP_PAR_PCLKP_Msk (0x1ul << CCAP_PAR_PCLKP_Pos) |
| #define | CCAP_PAR_HSP_Pos (9) |
| #define | CCAP_PAR_HSP_Msk (0x1ul << CCAP_PAR_HSP_Pos) |
| #define | CCAP_PAR_VSP_Pos (10) |
| #define | CCAP_PAR_VSP_Msk (0x1ul << CCAP_PAR_VSP_Pos) |
| #define | CCAP_PAR_COLORCTL_Pos (11) |
| #define | CCAP_PAR_COLORCTL_Msk (0x3ul << CCAP_PAR_COLORCTL_Pos) |
| #define | CCAP_PAR_FBB_Pos (18) |
| #define | CCAP_PAR_FBB_Msk (0x1ul << CCAP_PAR_FBB_Pos) |
| #define | CCAP_INT_VINTF_Pos (0) |
| #define | CCAP_INT_VINTF_Msk (0x1ul << CCAP_INT_VINTF_Pos) |
| #define | CCAP_INT_MEINTF_Pos (1) |
| #define | CCAP_INT_MEINTF_Msk (0x1ul << CCAP_INT_MEINTF_Pos) |
| #define | CCAP_INT_ADDRMINTF_Pos (3) |
| #define | CCAP_INT_ADDRMINTF_Msk (0x1ul << CCAP_INT_ADDRMINTF_Pos) |
| #define | CCAP_INT_MDINTF_Pos (4) |
| #define | CCAP_INT_MDINTF_Msk (0x1ul << CCAP_INT_MDINTF_Pos) |
| #define | CCAP_INT_VIEN_Pos (16) |
| #define | CCAP_INT_VIEN_Msk (0x1ul << CCAP_INT_VIEN_Pos) |
| #define | CCAP_INT_MEIEN_Pos (17) |
| #define | CCAP_INT_MEIEN_Msk (0x1ul << CCAP_INT_MEIEN_Pos) |
| #define | CCAP_INT_ADDRMIEN_Pos (19) |
| #define | CCAP_INT_ADDRMIEN_Msk (0x1ul << CCAP_INT_ADDRMIEN_Pos) |
| #define | CCAP_CWSP_CWSADDRH_Pos (0) |
| #define | CCAP_CWSP_CWSADDRH_Msk (0xffful << CCAP_CWSP_CWSADDRH_Pos) |
| #define | CCAP_CWSP_CWSADDRV_Pos (16) |
| #define | CCAP_CWSP_CWSADDRV_Msk (0x7fful << CCAP_CWSP_CWSADDRV_Pos) |
| #define | CCAP_CWS_CWW_Pos (0) |
| #define | CCAP_CWS_CWW_Msk (0xffful << CCAP_CWS_CWW_Pos) |
| #define | CCAP_CWS_CWH_Pos (16) |
| #define | CCAP_CWS_CWH_Msk (0x7fful << CCAP_CWS_CWH_Pos) |
| #define | CCAP_PKTSL_PKTSHML_Pos (0) |
| #define | CCAP_PKTSL_PKTSHML_Msk (0xfful << CCAP_PKTSL_PKTSHML_Pos) |
| #define | CCAP_PKTSL_PKTSHNL_Pos (8) |
| #define | CCAP_PKTSL_PKTSHNL_Msk (0xfful << CCAP_PKTSL_PKTSHNL_Pos) |
| #define | CCAP_PKTSL_PKTSVML_Pos (16) |
| #define | CCAP_PKTSL_PKTSVML_Msk (0xfful << CCAP_PKTSL_PKTSVML_Pos) |
| #define | CCAP_PKTSL_PKTSVNL_Pos (24) |
| #define | CCAP_PKTSL_PKTSVNL_Msk (0xfful << CCAP_PKTSL_PKTSVNL_Pos) |
| #define | CCAP_FRCTL_FRM_Pos (0) |
| #define | CCAP_FRCTL_FRM_Msk (0x3ful << CCAP_FRCTL_FRM_Pos) |
| #define | CCAP_FRCTL_FRN_Pos (8) |
| #define | CCAP_FRCTL_FRN_Msk (0x3ful << CCAP_FRCTL_FRN_Pos) |
| #define | CCAP_STRIDE_PKTSTRIDE_Pos (0) |
| #define | CCAP_STRIDE_PKTSTRIDE_Msk (0x3ffful << CCAP_STRIDE_PKTSTRIDE_Pos) |
| #define | CCAP_STRIDE_PLNSTRIDE_Pos (16) |
| #define | CCAP_STRIDE_PLNSTRIDE_Msk (0x3ffful << CCAP_STRIDE_PLNSTRIDE_Pos) |
| #define | CCAP_FIFOTH_PLNVFTH_Pos (0) |
| #define | CCAP_FIFOTH_PLNVFTH_Msk (0xful << CCAP_FIFOTH_PLNVFTH_Pos) |
| #define | CCAP_FIFOTH_PLNUFTH_Pos (8) |
| #define | CCAP_FIFOTH_PLNUFTH_Msk (0xful << CCAP_FIFOTH_PLNUFTH_Pos) |
| #define | CCAP_FIFOTH_PLNYFTH_Pos (16) |
| #define | CCAP_FIFOTH_PLNYFTH_Msk (0x1ful << CCAP_FIFOTH_PLNYFTH_Pos) |
| #define | CCAP_FIFOTH_PKTFTH_Pos (24) |
| #define | CCAP_FIFOTH_PKTFTH_Msk (0x1ful << CCAP_FIFOTH_PKTFTH_Pos) |
| #define | CCAP_FIFOTH_OVF_Pos (31) |
| #define | CCAP_FIFOTH_OVF_Msk (0x1ul << CCAP_FIFOTH_OVF_Pos) |
| #define | CCAP_CMPADDR_CMPADDR_Pos (0) |
| #define | CCAP_CMPADDR_CMPADDR_Msk (0xfffffffful << CCAP_CMPADDR_CMPADDR_Pos) |
| #define | CCAP_PKTSM_PKTSHMH_Pos (0) |
| #define | CCAP_PKTSM_PKTSHMH_Msk (0xfful << CCAP_PKTSM_PKTSHMH_Pos) |
| #define | CCAP_PKTSM_PKTSHNH_Pos (8) |
| #define | CCAP_PKTSM_PKTSHNH_Msk (0xfful << CCAP_PKTSM_PKTSHNH_Pos) |
| #define | CCAP_PKTSM_PKTSVMH_Pos (16) |
| #define | CCAP_PKTSM_PKTSVMH_Msk (0xfful << CCAP_PKTSM_PKTSVMH_Pos) |
| #define | CCAP_PKTSM_PKTSVNH_Pos (24) |
| #define | CCAP_PKTSM_PKTSVNH_Msk (0xfful << CCAP_PKTSM_PKTSVNH_Pos) |
| #define | CCAP_PKTBA0_BASEADDR_Pos (0) |
| #define | CCAP_PKTBA0_BASEADDR_Msk (0xfffffffful << CCAP_PKTBA0_BASEADDR_Pos) |
CCAP register definition header file.
Definition in file ccap_reg.h.
1.8.15