| M480 BSP V3.05.001 The Board Support Package for M480 Series

can.c
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1 /**************************************************************************/
9 #include "NuMicro.h"
10
25 #if defined(CAN2)
26 static uint8_t gu8LockCanIf[3ul][2ul] = {0ul}; /* The chip has three CANs. */
27 #elif defined(CAN1)
28 static uint8_t gu8LockCanIf[2ul][2ul] = {0ul}; /* The chip has two CANs. */
29 #elif defined(CAN0) || defined(CAN)
30 static uint8_t gu8LockCanIf[1ul][2ul] = {0ul}; /* The chip only has one CAN. */
31 #endif
32
33 #define RETRY_COUNTS (0x10000000ul)
34
35 #define TSEG1_MIN 2ul
36 #define TSEG1_MAX 16ul
37 #define TSEG2_MIN 1ul
38 #define TSEG2_MAX 8ul
39 #define BRP_MIN 1ul
40 #define BRP_MAX 1024ul /* 6-bit BRP field + 4-bit BRPE field*/
41 #define SJW_MAX 4ul
42 #define BRP_INC 1ul
43
44 /* #define DEBUG_PRINTF printf */
45 #define DEBUG_PRINTF(...)
46
47 static uint32_t LockIF(CAN_T *tCAN);
48 static uint32_t LockIF_TL(CAN_T *tCAN);
49 static void ReleaseIF(CAN_T *tCAN, uint32_t u32IfNo);
50 static int can_update_spt(int sampl_pt, int tseg, int *tseg1, int *tseg2);
51
61 static uint32_t LockIF(CAN_T *tCAN)
62 {
63 uint32_t u32CanNo;
64 uint32_t u32FreeIfNo;
65 uint32_t u32IntMask;
66
67 #if defined(CAN1)
68 if(tCAN == CAN0)
69 u32CanNo = 0ul;
70 else if(tCAN == CAN1)
71 u32CanNo = 1ul;
72 #if defined(CAN2)
73 else if(tCAN == CAN2)
74 u32CanNo = 2ul;
75 #endif
76 #else /* defined(CAN0) || defined(CAN) */
77 u32CanNo = 0ul;
78 #endif
79
80 u32FreeIfNo = 2ul;
81
82 /* Disable CAN interrupt */
83 u32IntMask = tCAN->CON & (CAN_CON_IE_Msk | CAN_CON_SIE_Msk | CAN_CON_EIE_Msk);
84 tCAN->CON = tCAN->CON & ~(CAN_CON_IE_Msk | CAN_CON_SIE_Msk | CAN_CON_EIE_Msk);
85
86 /* Check interface 1 is available or not */
87 if((tCAN->IF[0ul].CREQ & CAN_IF_CREQ_BUSY_Msk) == 0ul)
88 {
89 if(gu8LockCanIf[u32CanNo][0ul] == 0ul)
90 {
91 gu8LockCanIf[u32CanNo][0ul] = 1u;
92 u32FreeIfNo = 0ul;
93 }
94 else
95 {
96 }
97 }
98 else
99 {
100 }
101
102 /* Or check interface 2 is available or not */
103 if(u32FreeIfNo == 2ul)
104 {
105 if((tCAN->IF[1ul].CREQ & CAN_IF_CREQ_BUSY_Msk) == 0ul)
106 {
107 if(gu8LockCanIf[u32CanNo][1ul] == 0ul)
108 {
109 gu8LockCanIf[u32CanNo][1ul] = 1u;
110 u32FreeIfNo = 1ul;
111 }
112 else
113 {
114 }
115 }
116 else
117 {
118 }
119 }
120 else
121 {
122 }
123
124 /* Enable CAN interrupt */
125 tCAN->CON |= u32IntMask;
126
127 return u32FreeIfNo;
128 }
129
140 static uint32_t LockIF_TL(CAN_T *tCAN)
141 {
142 uint32_t u32Count;
143 uint32_t u32FreeIfNo;
144
145 for(u32Count = 0ul; u32Count < RETRY_COUNTS; u32Count++)
146 {
147 if((u32FreeIfNo = LockIF(tCAN)) != 2ul)
148 {
149 break;
150 }
151 else
152 {
153 }
154 }
155
156 return u32FreeIfNo;
157 }
158
166 static void ReleaseIF(CAN_T *tCAN, uint32_t u32IfNo)
167 {
168 uint32_t u32IntMask;
169 uint32_t u32CanNo;
170
171 if(u32IfNo >= 2ul)
172 {
173 }
174 else
175 {
176 #if defined(CAN1)
177 if(tCAN == CAN0)
178 u32CanNo = 0ul;
179 else if(tCAN == CAN1)
180 u32CanNo = 1ul;
181 #if defined(CAN2)
182 else if(tCAN == CAN2)
183 u32CanNo = 2ul;
184 #endif
185 #else /* defined(CAN0) || defined(CAN) */
186 u32CanNo = 0ul;
187 #endif
188
189 /* Disable CAN interrupt */
190 u32IntMask = tCAN->CON & (CAN_CON_IE_Msk | CAN_CON_SIE_Msk | CAN_CON_EIE_Msk);
191 tCAN->CON = tCAN->CON & ~(CAN_CON_IE_Msk | CAN_CON_SIE_Msk | CAN_CON_EIE_Msk);
192
193 gu8LockCanIf[u32CanNo][u32IfNo] = 0u;
194
195 /* Enable CAN interrupt */
196 tCAN->CON |= u32IntMask;
197 }
198 }
199
200 static int can_update_spt(int sampl_pt, int tseg, int *tseg1, int *tseg2)
201 {
202 *tseg2 = tseg + 1 - (sampl_pt * (tseg + 1)) / 1000;
203 if (*tseg2 < TSEG2_MIN)
204 {
205 *tseg2 = TSEG2_MIN;
206 }
207 else
208 {
209 }
210
211 if (*tseg2 > TSEG2_MAX)
212 {
213 *tseg2 = TSEG2_MAX;
214 }
215 else
216 {
217 }
218
219 *tseg1 = tseg - *tseg2;
220 if (*tseg1 > TSEG1_MAX)
221 {
222 *tseg1 = TSEG1_MAX;
223 *tseg2 = tseg - *tseg1;
224 }
225 else
226 {
227 }
228
229 return 1000 * (tseg + 1 - *tseg2) / (tseg + 1);
230 }
231
248 void CAN_EnterInitMode(CAN_T *tCAN, uint8_t u8Mask)
249 {
250 tCAN->CON = u8Mask | (CAN_CON_INIT_Msk | CAN_CON_CCE_Msk);
251 }
252
253
261 void CAN_LeaveInitMode(CAN_T *tCAN)
262 {
263 tCAN->CON &= (~(CAN_CON_INIT_Msk | CAN_CON_CCE_Msk));
264 while(tCAN->CON & CAN_CON_INIT_Msk)
265 {
266 /* Check INIT bit is released */
267 }
268 }
269
277 void CAN_WaitMsg(CAN_T *tCAN)
278 {
279 tCAN->STATUS = 0x0ul; /* clr status */
280
281 while(1)
282 {
283 if(tCAN->IF[1].MCON & CAN_IF_MCON_NEWDAT_Msk) /* check new data */
284 {
285 /* New Data IN */
286 break;
287 }
288 else
289 {
290 }
291
292 if(tCAN->STATUS & CAN_STATUS_RXOK_Msk)
293 {
294 /* Rx OK */
295 }
296 else
297 {
298 }
299
300 if(tCAN->STATUS & CAN_STATUS_LEC_Msk)
301 {
302 /* Error */
303 }
304 else
305 {
306 }
307 }
308 }
309
316 uint32_t CAN_GetCANBitRate(CAN_T *tCAN)
317 {
318 uint32_t u32Tseg1, u32Tseg2;
319 uint32_t u32Bpr;
320
321 u32Tseg1 = (tCAN->BTIME & CAN_BTIME_TSEG1_Msk) >> CAN_BTIME_TSEG1_Pos;
322 u32Tseg2 = (tCAN->BTIME & CAN_BTIME_TSEG2_Msk) >> CAN_BTIME_TSEG2_Pos;
323 u32Bpr = (tCAN->BTIME & CAN_BTIME_BRP_Msk) | (tCAN->BRPE << 6ul);
324
325 return (SystemCoreClock / (u32Bpr + 1ul) / (u32Tseg1 + u32Tseg2 + 3ul));
326 }
327
341 void CAN_EnterTestMode(CAN_T *tCAN, uint8_t u8TestMask)
342 {
343 tCAN->CON |= CAN_CON_TEST_Msk;
344 tCAN->TEST = u8TestMask;
345 }
346
347
354 void CAN_LeaveTestMode(CAN_T *tCAN)
355 {
356 tCAN->CON |= CAN_CON_TEST_Msk;
357 tCAN->TEST &= ~(CAN_TEST_LBACK_Msk | CAN_TEST_SILENT_Msk | CAN_TEST_BASIC_Msk);
358 tCAN->CON &= (~CAN_CON_TEST_Msk);
359 }
360
369 uint32_t CAN_IsNewDataReceived(CAN_T *tCAN, uint8_t u8MsgObj)
370 {
371 return (u8MsgObj < 16ul ? tCAN->NDAT1 & (1ul << u8MsgObj) : tCAN->NDAT2 & (1ul << (u8MsgObj - 16ul)));
372 }
373
374
385 int32_t CAN_BasicSendMsg(CAN_T *tCAN, STR_CANMSG_T* pCanMsg)
386 {
387 uint32_t i = 0ul;
388 int32_t rev = 1l;
389
390 while(tCAN->IF[0].CREQ & CAN_IF_CREQ_BUSY_Msk)
391 {
392 }
393
394 tCAN->STATUS &= (~CAN_STATUS_TXOK_Msk);
395
396 if(pCanMsg->IdType == CAN_STD_ID)
397 {
398 /* standard ID*/
399 tCAN->IF[0].ARB1 = 0ul;
400 tCAN->IF[0].ARB2 = (((pCanMsg->Id) & 0x7FFul) << 2ul) ;
401 }
402 else
403 {
404 /* extended ID*/
405 tCAN->IF[0].ARB1 = (pCanMsg->Id) & 0xFFFFul;
406 tCAN->IF[0].ARB2 = ((pCanMsg->Id) & 0x1FFF0000ul) >> 16ul | CAN_IF_ARB2_XTD_Msk;
407
408 }
409
410 if(pCanMsg->FrameType)
411 {
412 tCAN->IF[0].ARB2 |= CAN_IF_ARB2_DIR_Msk;
413 }
414 else
415 {
416 tCAN->IF[0].ARB2 &= (~CAN_IF_ARB2_DIR_Msk);
417 }
418
419 tCAN->IF[0].MCON = (tCAN->IF[0].MCON & (~CAN_IF_MCON_DLC_Msk)) | pCanMsg->DLC;
420 tCAN->IF[0].DAT_A1 = (uint16_t)((uint16_t)((uint16_t)pCanMsg->Data[1] << 8) | pCanMsg->Data[0]);
421 tCAN->IF[0].DAT_A2 = (uint16_t)((uint16_t)((uint16_t)pCanMsg->Data[3] << 8) | pCanMsg->Data[2]);
422 tCAN->IF[0].DAT_B1 = (uint16_t)((uint16_t)((uint16_t)pCanMsg->Data[5] << 8) | pCanMsg->Data[4]);
423 tCAN->IF[0].DAT_B2 = (uint16_t)((uint16_t)((uint16_t)pCanMsg->Data[7] << 8) | pCanMsg->Data[6]);
424
425 /* request transmission*/
426 tCAN->IF[0].CREQ &= (~CAN_IF_CREQ_BUSY_Msk);
427 if(tCAN->IF[0].CREQ & CAN_IF_CREQ_BUSY_Msk)
428 {
429 /* Cannot clear busy for sending ...*/
430 rev = 0l; /* return FALSE */
431 }
432 else
433 {
434 tCAN->IF[0].CREQ |= CAN_IF_CREQ_BUSY_Msk; /* sending */
435
436 for(i = 0ul; i < 0xFFFFFul; i++)
437 {
438 if((tCAN->IF[0].CREQ & CAN_IF_CREQ_BUSY_Msk) == 0ul)
439 {
440 break;
441 }
442 else
443 {
444 }
445 }
446
447 if(i >= 0xFFFFFul)
448 {
449 /* Cannot send out... */
450 rev = 0l; /* return FALSE */
451 }
452 else
453 {
454 }
455 }
456
457 return rev;
458 }
459
470 int32_t CAN_BasicReceiveMsg(CAN_T *tCAN, STR_CANMSG_T* pCanMsg)
471 {
472 int32_t rev = 1l;
473
474 if((tCAN->IF[1].MCON & CAN_IF_MCON_NEWDAT_Msk) == 0ul)
475 {
476 /* In basic mode, receive data always save in IF2 */
477 rev = 0; /* return FALSE */
478 }
479 else
480 {
481
482 tCAN->STATUS &= (~CAN_STATUS_RXOK_Msk);
483
484 tCAN->IF[1].CMASK = CAN_IF_CMASK_ARB_Msk
485 | CAN_IF_CMASK_CONTROL_Msk
486 | CAN_IF_CMASK_DATAA_Msk
487 | CAN_IF_CMASK_DATAB_Msk;
488
489 if((tCAN->IF[1].ARB2 & CAN_IF_ARB2_XTD_Msk) == 0ul)
490 {
491 /* standard ID*/
492 pCanMsg->IdType = CAN_STD_ID;
493 pCanMsg->Id = (tCAN->IF[1].ARB2 >> 2) & 0x07FFul;
494
495 }
496 else
497 {
498 /* extended ID*/
499 pCanMsg->IdType = CAN_EXT_ID;
500 pCanMsg->Id = (tCAN->IF[1].ARB2 & 0x1FFFul) << 16;
501 pCanMsg->Id |= (uint32_t)tCAN->IF[1].ARB1;
502 }
503
504 pCanMsg->FrameType = (((tCAN->IF[1].ARB2 & CAN_IF_ARB2_DIR_Msk) >> CAN_IF_ARB2_DIR_Pos)) ? 0ul : 1ul;
505
506 pCanMsg->DLC = (uint8_t)(tCAN->IF[1].MCON & CAN_IF_MCON_DLC_Msk);
507 pCanMsg->Data[0] = (uint8_t)(tCAN->IF[1].DAT_A1 & CAN_IF_DAT_A1_DATA0_Msk);
508 pCanMsg->Data[1] = (uint8_t)((tCAN->IF[1].DAT_A1 & CAN_IF_DAT_A1_DATA1_Msk) >> CAN_IF_DAT_A1_DATA1_Pos);
509 pCanMsg->Data[2] = (uint8_t)(tCAN->IF[1].DAT_A2 & CAN_IF_DAT_A2_DATA2_Msk);
510 pCanMsg->Data[3] = (uint8_t)((tCAN->IF[1].DAT_A2 & CAN_IF_DAT_A2_DATA3_Msk) >> CAN_IF_DAT_A2_DATA3_Pos);
511 pCanMsg->Data[4] = (uint8_t)(tCAN->IF[1].DAT_B1 & CAN_IF_DAT_B1_DATA4_Msk);
512 pCanMsg->Data[5] = (uint8_t)((tCAN->IF[1].DAT_B1 & CAN_IF_DAT_B1_DATA5_Msk) >> CAN_IF_DAT_B1_DATA5_Pos);
513 pCanMsg->Data[6] = (uint8_t)(tCAN->IF[1].DAT_B2 & CAN_IF_DAT_B2_DATA6_Msk);
514 pCanMsg->Data[7] = (uint8_t)((tCAN->IF[1].DAT_B2 & CAN_IF_DAT_B2_DATA7_Msk) >> CAN_IF_DAT_B2_DATA7_Pos);
515 }
516
517 return rev;
518 }
519
538 int32_t CAN_SetRxMsgObjAndMsk(CAN_T *tCAN, uint8_t u8MsgObj, uint8_t u8idType, uint32_t u32id, uint32_t u32idmask, uint8_t u8singleOrFifoLast)
539 {
540 int32_t rev = 1l;
541 uint32_t u32MsgIfNum;
542
543 /* Get and lock a free interface */
544 if((u32MsgIfNum = LockIF_TL(tCAN)) == 2ul)
545 {
546 rev = 0; /* return FALSE */
547 }
548 else
549 {
550 /* Command Setting */
551 tCAN->IF[u32MsgIfNum].CMASK = CAN_IF_CMASK_WRRD_Msk | CAN_IF_CMASK_MASK_Msk | CAN_IF_CMASK_ARB_Msk |
552 CAN_IF_CMASK_CONTROL_Msk | CAN_IF_CMASK_DATAA_Msk | CAN_IF_CMASK_DATAB_Msk;
553
554 if(u8idType == CAN_STD_ID) /* According STD/EXT ID format,Configure Mask and Arbitration register */
555 {
556 tCAN->IF[u32MsgIfNum].ARB1 = 0ul;
557 tCAN->IF[u32MsgIfNum].ARB2 = CAN_IF_ARB2_MSGVAL_Msk | (u32id & 0x7FFul) << 2;
558 }
559 else
560 {
561 tCAN->IF[u32MsgIfNum].ARB1 = u32id & 0xFFFFul;
562 tCAN->IF[u32MsgIfNum].ARB2 = CAN_IF_ARB2_MSGVAL_Msk | CAN_IF_ARB2_XTD_Msk | (u32id & 0x1FFF0000ul) >> 16;
563 }
564
565 tCAN->IF[u32MsgIfNum].MASK1 = (u32idmask & 0xFFFFul);
566 tCAN->IF[u32MsgIfNum].MASK2 = (u32idmask >> 16) & 0xFFFFul;
567
568 /* tCAN->IF[u32MsgIfNum].MCON |= CAN_IF_MCON_UMASK_Msk | CAN_IF_MCON_RXIE_Msk; */
569 tCAN->IF[u32MsgIfNum].MCON = CAN_IF_MCON_UMASK_Msk | CAN_IF_MCON_RXIE_Msk;
570 if(u8singleOrFifoLast)
571 {
572 tCAN->IF[u32MsgIfNum].MCON |= CAN_IF_MCON_EOB_Msk;
573 }
574 else
575 {
576 tCAN->IF[u32MsgIfNum].MCON &= (~CAN_IF_MCON_EOB_Msk);
577 }
578
579 tCAN->IF[u32MsgIfNum].DAT_A1 = 0ul;
580 tCAN->IF[u32MsgIfNum].DAT_A2 = 0ul;
581 tCAN->IF[u32MsgIfNum].DAT_B1 = 0ul;
582 tCAN->IF[u32MsgIfNum].DAT_B2 = 0ul;
583
584 tCAN->IF[u32MsgIfNum].CREQ = 1ul + u8MsgObj;
585 ReleaseIF(tCAN, u32MsgIfNum);
586 }
587
588 return rev;
589 }
590
608 int32_t CAN_SetRxMsgObj(CAN_T *tCAN, uint8_t u8MsgObj, uint8_t u8idType, uint32_t u32id, uint8_t u8singleOrFifoLast)
609 {
610 int32_t rev = 1l;
611 uint32_t u32MsgIfNum;
612
613 /* Get and lock a free interface */
614 if((u32MsgIfNum = LockIF_TL(tCAN)) == 2ul)
615 {
616 rev = 0; /* return FALSE */
617 }
618 else
619 {
620 /* Command Setting */
621 tCAN->IF[u32MsgIfNum].CMASK = CAN_IF_CMASK_WRRD_Msk | CAN_IF_CMASK_MASK_Msk | CAN_IF_CMASK_ARB_Msk |
622 CAN_IF_CMASK_CONTROL_Msk | CAN_IF_CMASK_DATAA_Msk | CAN_IF_CMASK_DATAB_Msk;
623
624 if(u8idType == CAN_STD_ID) /* According STD/EXT ID format,Configure Mask and Arbitration register */
625 {
626 tCAN->IF[u32MsgIfNum].ARB1 = 0ul;
627 tCAN->IF[u32MsgIfNum].ARB2 = CAN_IF_ARB2_MSGVAL_Msk | (u32id & 0x7FFul) << 2;
628 }
629 else
630 {
631 tCAN->IF[u32MsgIfNum].ARB1 = u32id & 0xFFFFul;
632 tCAN->IF[u32MsgIfNum].ARB2 = CAN_IF_ARB2_MSGVAL_Msk | CAN_IF_ARB2_XTD_Msk | (u32id & 0x1FFF0000ul) >> 16;
633 }
634
635 /* tCAN->IF[u8MsgIfNum].MCON |= CAN_IF_MCON_UMASK_Msk | CAN_IF_MCON_RXIE_Msk; */
636 tCAN->IF[u32MsgIfNum].MCON = CAN_IF_MCON_UMASK_Msk | CAN_IF_MCON_RXIE_Msk;
637 if(u8singleOrFifoLast)
638 {
639 tCAN->IF[u32MsgIfNum].MCON |= CAN_IF_MCON_EOB_Msk;
640 }
641 else
642 {
643 tCAN->IF[u32MsgIfNum].MCON &= (~CAN_IF_MCON_EOB_Msk);
644 }
645
646 tCAN->IF[u32MsgIfNum].DAT_A1 = 0ul;
647 tCAN->IF[u32MsgIfNum].DAT_A2 = 0ul;
648 tCAN->IF[u32MsgIfNum].DAT_B1 = 0ul;
649 tCAN->IF[u32MsgIfNum].DAT_B2 = 0ul;
650
651 tCAN->IF[u32MsgIfNum].CREQ = 1ul + u8MsgObj;
652 ReleaseIF(tCAN, u32MsgIfNum);
653 }
654
655 return rev;
656 }
657
671 int32_t CAN_ReadMsgObj(CAN_T *tCAN, uint8_t u8MsgObj, uint8_t u8Release, STR_CANMSG_T* pCanMsg)
672 {
673 int32_t rev = 1l;
674 uint32_t u32MsgIfNum;
675
676 if(!CAN_IsNewDataReceived(tCAN, u8MsgObj))
677 {
678 rev = 0; /* return FALSE */
679 }
680 else
681 {
682 /* Get and lock a free interface */
683 if((u32MsgIfNum = LockIF_TL(tCAN)) == 2ul)
684 {
685 rev = 0; /* return FALSE */
686 }
687 else
688 {
689 tCAN->STATUS &= (~CAN_STATUS_RXOK_Msk);
690
691 /* read the message contents*/
692 tCAN->IF[u32MsgIfNum].CMASK = CAN_IF_CMASK_MASK_Msk
693 | CAN_IF_CMASK_ARB_Msk
694 | CAN_IF_CMASK_CONTROL_Msk
695 | CAN_IF_CMASK_CLRINTPND_Msk
696 | (u8Release ? CAN_IF_CMASK_TXRQSTNEWDAT_Msk : 0ul)
697 | CAN_IF_CMASK_DATAA_Msk
698 | CAN_IF_CMASK_DATAB_Msk;
699
700 tCAN->IF[u32MsgIfNum].CREQ = 1ul + u8MsgObj;
701
702 while(tCAN->IF[u32MsgIfNum].CREQ & CAN_IF_CREQ_BUSY_Msk)
703 {
704 /*Wait*/
705 }
706
707 if((tCAN->IF[u32MsgIfNum].ARB2 & CAN_IF_ARB2_XTD_Msk) == 0ul)
708 {
709 /* standard ID*/
710 pCanMsg->IdType = CAN_STD_ID;
711 pCanMsg->Id = (tCAN->IF[u32MsgIfNum].ARB2 & CAN_IF_ARB2_ID_Msk) >> 2ul;
712 }
713 else
714 {
715 /* extended ID*/
716 pCanMsg->IdType = CAN_EXT_ID;
717 pCanMsg->Id = (((tCAN->IF[u32MsgIfNum].ARB2) & 0x1FFFul) << 16) | tCAN->IF[u32MsgIfNum].ARB1;
718 }
719
720 pCanMsg->DLC = (uint8_t)(tCAN->IF[u32MsgIfNum].MCON & CAN_IF_MCON_DLC_Msk);
721 pCanMsg->Data[0] = (uint8_t)(tCAN->IF[u32MsgIfNum].DAT_A1 & CAN_IF_DAT_A1_DATA0_Msk);
722 pCanMsg->Data[1] = (uint8_t)((tCAN->IF[u32MsgIfNum].DAT_A1 & CAN_IF_DAT_A1_DATA1_Msk) >> CAN_IF_DAT_A1_DATA1_Pos);
723 pCanMsg->Data[2] = (uint8_t)(tCAN->IF[u32MsgIfNum].DAT_A2 & CAN_IF_DAT_A2_DATA2_Msk);
724 pCanMsg->Data[3] = (uint8_t)((tCAN->IF[u32MsgIfNum].DAT_A2 & CAN_IF_DAT_A2_DATA3_Msk) >> CAN_IF_DAT_A2_DATA3_Pos);
725 pCanMsg->Data[4] = (uint8_t)(tCAN->IF[u32MsgIfNum].DAT_B1 & CAN_IF_DAT_B1_DATA4_Msk);
726 pCanMsg->Data[5] = (uint8_t)((tCAN->IF[u32MsgIfNum].DAT_B1 & CAN_IF_DAT_B1_DATA5_Msk) >> CAN_IF_DAT_B1_DATA5_Pos);
727 pCanMsg->Data[6] = (uint8_t)(tCAN->IF[u32MsgIfNum].DAT_B2 & CAN_IF_DAT_B2_DATA6_Msk);
728 pCanMsg->Data[7] = (uint8_t)((tCAN->IF[u32MsgIfNum].DAT_B2 & CAN_IF_DAT_B2_DATA7_Msk) >> CAN_IF_DAT_B2_DATA7_Pos);
729
730 ReleaseIF(tCAN, u32MsgIfNum);
731 }
732 }
733
734 return rev;
735 }
736
737
748 uint32_t CAN_SetBaudRate(CAN_T *tCAN, uint32_t u32BaudRate)
749 {
750 long rate;
751 long best_error = 1000000000, error = 0;
752 int best_tseg = 0, best_brp = 0, brp = 0;
753 int tsegall, tseg = 0, tseg1 = 0, tseg2 = 0;
754 int spt_error = 1000, spt = 0, sampl_pt;
755 uint64_t clock_freq = (uint64_t)0, u64PCLK_DIV = (uint64_t)1;
756 uint32_t sjw = (uint32_t)1;
757
758 CAN_EnterInitMode(tCAN, (uint8_t)0);
759
760 SystemCoreClockUpdate();
761 if((tCAN == CAN0) || (tCAN == CAN2))
762 {
763 u64PCLK_DIV = (uint64_t)(CLK->PCLKDIV & CLK_PCLKDIV_APB0DIV_Msk);
764 u64PCLK_DIV = (uint64_t)(1 << u64PCLK_DIV);
765 }
766 else if(tCAN == CAN1)
767 {
768 u64PCLK_DIV = (uint64_t)((CLK->PCLKDIV & CLK_PCLKDIV_APB1DIV_Msk) >> CLK_PCLKDIV_APB1DIV_Pos);
769 u64PCLK_DIV = (uint64_t)(1 << u64PCLK_DIV);
770 }
771
772 clock_freq = SystemCoreClock / u64PCLK_DIV;
773
774 if(u32BaudRate >= (uint32_t)1000000)
775 {
776 u32BaudRate = (uint32_t)1000000;
777 }
778
779 /* Use CIA recommended sample points */
780 if (u32BaudRate > (uint32_t)800000)
781 {
782 sampl_pt = (int)750;
783 }
784 else if (u32BaudRate > (uint32_t)500000)
785 {
786 sampl_pt = (int)800;
787 }
788 else
789 {
790 sampl_pt = (int)875;
791 }
792
793 /* tseg even = round down, odd = round up */
794 for (tseg = (TSEG1_MAX + TSEG2_MAX) * 2ul + 1ul; tseg >= (TSEG1_MIN + TSEG2_MIN) * 2ul; tseg--)
795 {
796 tsegall = 1ul + tseg / 2ul;
797 /* Compute all possible tseg choices (tseg=tseg1+tseg2) */
798 brp = clock_freq / (tsegall * u32BaudRate) + tseg % 2;
799 /* chose brp step which is possible in system */
800 brp = (brp / BRP_INC) * BRP_INC;
801
802 if ((brp < BRP_MIN) || (brp > BRP_MAX))
803 {
804 continue;
805 }
806 rate = clock_freq / (brp * tsegall);
807
808 error = u32BaudRate - rate;
809
810 /* tseg brp biterror */
811 if (error < 0)
812 {
813 error = -error;
814 }
815 if (error > best_error)
816 {
817 continue;
818 }
819 best_error = error;
820 if (error == 0)
821 {
822 spt = can_update_spt(sampl_pt, tseg / 2, &tseg1, &tseg2);
823 error = sampl_pt - spt;
824 if (error < 0)
825 {
826 error = -error;
827 }
828 if (error > spt_error)
829 {
830 continue;
831 }
832 spt_error = error;
833 }
834 best_tseg = tseg / 2;
835 best_brp = brp;
836
837 if (error == 0)
838 {
839 break;
840 }
841 }
842
843 spt = can_update_spt(sampl_pt, best_tseg, &tseg1, &tseg2);
844
845 /* check for sjw user settings */
846 /* bt->sjw is at least 1 -> sanitize upper bound to sjw_max */
847 if (sjw > SJW_MAX)
848 {
849 sjw = SJW_MAX;
850 }
851 /* bt->sjw must not be higher than tseg2 */
852 if (tseg2 < sjw)
853 {
854 sjw = tseg2;
855 }
856
857 /* real bit-rate */
858 u32BaudRate = clock_freq / (best_brp * (tseg1 + tseg2 + 1));
859
860 tCAN->BTIME = ((uint32_t)(tseg2 - 1ul) << CAN_BTIME_TSEG2_Pos) | ((uint32_t)(tseg1 - 1ul) << CAN_BTIME_TSEG1_Pos) |
861 ((uint32_t)(best_brp - 1ul) & CAN_BTIME_BRP_Msk) | (sjw << CAN_BTIME_SJW_Pos);
862 tCAN->BRPE = ((uint32_t)(best_brp - 1ul) >> 6) & 0x0Ful;
863
864 /* printf("\n bitrate = %d \n", CAN_GetCANBitRate(tCAN)); */
865
866 CAN_LeaveInitMode(tCAN);
867
868 return u32BaudRate;
869 }
870
880 void CAN_Close(CAN_T *tCAN)
881 {
882 CAN_DisableInt(tCAN, (CAN_CON_IE_Msk | CAN_CON_SIE_Msk | CAN_CON_EIE_Msk));
883 }
884
898 uint32_t CAN_Open(CAN_T *tCAN, uint32_t u32BaudRate, uint32_t u32Mode)
899 {
900 uint32_t u32CurrentBitRate;
901
902 u32CurrentBitRate = CAN_SetBaudRate(tCAN, u32BaudRate);
903
904 if(u32Mode == CAN_BASIC_MODE)
905 {
906 CAN_EnterTestMode(tCAN, (uint8_t)CAN_TEST_BASIC_Msk);
907 }
908 else
909 {
910 }
911
912 return u32CurrentBitRate;
913 }
914
928 int32_t CAN_SetTxMsg(CAN_T *tCAN, uint32_t u32MsgNum, STR_CANMSG_T* pCanMsg)
929 {
930 int32_t rev = 1l;
931 uint32_t u32MsgIfNum;
932
933 if((u32MsgIfNum = LockIF_TL(tCAN)) == 2ul)
934 {
935 rev = 0; /* return FALSE */
936 }
937 else
938 {
939 /* update the contents needed for transmission*/
940 tCAN->IF[u32MsgIfNum].CMASK = CAN_IF_CMASK_WRRD_Msk | CAN_IF_CMASK_MASK_Msk | CAN_IF_CMASK_ARB_Msk |
941 CAN_IF_CMASK_CONTROL_Msk | CAN_IF_CMASK_DATAA_Msk | CAN_IF_CMASK_DATAB_Msk;
942
943 if(pCanMsg->IdType == CAN_STD_ID)
944 {
945 /* standard ID*/
946 tCAN->IF[u32MsgIfNum].ARB1 = 0ul;
947 tCAN->IF[u32MsgIfNum].ARB2 = (((pCanMsg->Id) & 0x7FFul) << 2) | CAN_IF_ARB2_DIR_Msk | CAN_IF_ARB2_MSGVAL_Msk;
948 }
949 else
950 {
951 /* extended ID*/
952 tCAN->IF[u32MsgIfNum].ARB1 = (pCanMsg->Id) & 0xFFFFul;
953 tCAN->IF[u32MsgIfNum].ARB2 = ((pCanMsg->Id) & 0x1FFF0000ul) >> 16 |
954 CAN_IF_ARB2_DIR_Msk | CAN_IF_ARB2_XTD_Msk | CAN_IF_ARB2_MSGVAL_Msk;
955 }
956
957 if(pCanMsg->FrameType)
958 {
959 tCAN->IF[u32MsgIfNum].ARB2 |= CAN_IF_ARB2_DIR_Msk;
960 }
961 else
962 {
963 tCAN->IF[u32MsgIfNum].ARB2 &= (~CAN_IF_ARB2_DIR_Msk);
964 }
965
966 tCAN->IF[u32MsgIfNum].DAT_A1 = (uint16_t)((uint16_t)(((uint16_t)pCanMsg->Data[1] << 8)) | pCanMsg->Data[0]);
967 tCAN->IF[u32MsgIfNum].DAT_A2 = (uint16_t)((uint16_t)(((uint16_t)pCanMsg->Data[3] << 8)) | pCanMsg->Data[2]);
968 tCAN->IF[u32MsgIfNum].DAT_B1 = (uint16_t)((uint16_t)(((uint16_t)pCanMsg->Data[5] << 8)) | pCanMsg->Data[4]);
969 tCAN->IF[u32MsgIfNum].DAT_B2 = (uint16_t)((uint16_t)(((uint16_t)pCanMsg->Data[7] << 8)) | pCanMsg->Data[6]);
970
971 tCAN->IF[u32MsgIfNum].MCON = CAN_IF_MCON_NEWDAT_Msk | pCanMsg->DLC | CAN_IF_MCON_TXIE_Msk | CAN_IF_MCON_EOB_Msk;
972 tCAN->IF[u32MsgIfNum].CREQ = 1ul + u32MsgNum;
973
974 ReleaseIF(tCAN, u32MsgIfNum);
975 }
976
977 return rev;
978 }
979
990 int32_t CAN_TriggerTxMsg(CAN_T *tCAN, uint32_t u32MsgNum)
991 {
992 int32_t rev = 1l;
993 uint32_t u32MsgIfNum;
994
995 if((u32MsgIfNum = LockIF_TL(tCAN)) == 2ul)
996 {
997 rev = 0; /* return FALSE */
998 }
999 else
1000 {
1001 tCAN->STATUS &= (~CAN_STATUS_TXOK_Msk);
1002
1003 /* read the message contents*/
1004 tCAN->IF[u32MsgIfNum].CMASK = CAN_IF_CMASK_CLRINTPND_Msk
1005 | CAN_IF_CMASK_TXRQSTNEWDAT_Msk;
1006
1007 tCAN->IF[u32MsgIfNum].CREQ = 1ul + u32MsgNum;
1008
1009 while(tCAN->IF[u32MsgIfNum].CREQ & CAN_IF_CREQ_BUSY_Msk)
1010 {
1011 /*Wait*/
1012 }
1013 tCAN->IF[u32MsgIfNum].CMASK = CAN_IF_CMASK_WRRD_Msk | CAN_IF_CMASK_TXRQSTNEWDAT_Msk;
1014 tCAN->IF[u32MsgIfNum].CREQ = 1ul + u32MsgNum;
1015
1016 ReleaseIF(tCAN, u32MsgIfNum);
1017 }
1018
1019 return rev;
1020 }
1021
1036 void CAN_EnableInt(CAN_T *tCAN, uint32_t u32Mask)
1037 {
1038 tCAN->CON = (tCAN->CON & ~(CAN_CON_IE_Msk | CAN_CON_SIE_Msk | CAN_CON_EIE_Msk)) |
1039 (u32Mask & (CAN_CON_IE_Msk | CAN_CON_SIE_Msk | CAN_CON_EIE_Msk));
1040 }
1041
1052 void CAN_DisableInt(CAN_T *tCAN, uint32_t u32Mask)
1053 {
1054 tCAN->CON = tCAN->CON & ~((u32Mask & (CAN_CON_IE_Msk | CAN_CON_SIE_Msk | CAN_CON_EIE_Msk)));
1055 }
1056
1057
1074 int32_t CAN_SetRxMsg(CAN_T *tCAN, uint32_t u32MsgNum, uint32_t u32IDType, uint32_t u32ID)
1075 {
1076 int32_t rev = (int32_t)TRUE;
1077 uint32_t u32TimeOutCount = 0ul;
1078
1079 while(CAN_SetRxMsgObj(tCAN, (uint8_t)u32MsgNum, (uint8_t)u32IDType, u32ID, (uint8_t)TRUE) == (int32_t)FALSE)
1080 {
1081 if(++u32TimeOutCount >= RETRY_COUNTS)
1082 {
1083 rev = (int32_t)(FALSE); /* return FALSE */
1084 break;
1085 }
1086 else
1087 {
1088 }
1089 }
1090
1091 return rev;
1092 }
1093
1111 int32_t CAN_SetRxMsgAndMsk(CAN_T *tCAN, uint32_t u32MsgNum, uint32_t u32IDType, uint32_t u32ID, uint32_t u32IDMask)
1112 {
1113 int32_t rev = (int32_t)TRUE;
1114 uint32_t u32TimeOutCount = 0ul;
1115
1116 while(CAN_SetRxMsgObjAndMsk(tCAN, (uint8_t)u32MsgNum, (uint8_t)u32IDType, u32ID, u32IDMask, (uint8_t)TRUE) == (int32_t)FALSE)
1117 {
1118 if(++u32TimeOutCount >= RETRY_COUNTS)
1119 {
1120 rev = (int32_t)FALSE;
1121 break;
1122 }
1123 else
1124 {
1125 }
1126 }
1127
1128 return rev;
1129 }
1130
1148 int32_t CAN_SetMultiRxMsg(CAN_T *tCAN, uint32_t u32MsgNum, uint32_t u32MsgCount, uint32_t u32IDType, uint32_t u32ID)
1149 {
1150 int32_t rev = (int32_t)TRUE;
1151 uint32_t i = 0ul;
1152 uint32_t u32TimeOutCount;
1153 uint32_t u32EOB_Flag = 0ul;
1154
1155 for(i = 1ul; i < u32MsgCount; i++)
1156 {
1157 u32TimeOutCount = 0ul;
1158
1159 u32MsgNum += (i - 1ul);
1160
1161 if(i == u32MsgCount)
1162 {
1163 u32EOB_Flag = 1ul;
1164 }
1165 else
1166 {
1167 }
1168
1169 while(CAN_SetRxMsgObj(tCAN, (uint8_t)u32MsgNum, (uint8_t)u32IDType, u32ID, (uint8_t)u32EOB_Flag) == (int32_t)FALSE)
1170 {
1171 if(++u32TimeOutCount >= RETRY_COUNTS)
1172 {
1173 rev = (int32_t)FALSE;
1174 break;
1175 }
1176 else
1177 {
1178 }
1179 }
1180 }
1181
1182 return rev;
1183 }
1184
1185
1199 int32_t CAN_Transmit(CAN_T *tCAN, uint32_t u32MsgNum, STR_CANMSG_T* pCanMsg)
1200 {
1201 int32_t rev = (int32_t)TRUE;
1202 uint32_t u32Tmp;
1203
1204 u32Tmp = (tCAN->TEST & CAN_TEST_BASIC_Msk);
1205
1206 if((tCAN->CON & CAN_CON_TEST_Msk) && u32Tmp)
1207 {
1208 rev = CAN_BasicSendMsg(tCAN, pCanMsg);
1209 }
1210 else
1211 {
1212 if(CAN_SetTxMsg(tCAN, u32MsgNum, pCanMsg) == FALSE)
1213 {
1214 rev = (int32_t)FALSE;
1215 }
1216 else
1217 {
1218 CAN_TriggerTxMsg(tCAN, u32MsgNum);
1219 }
1220 }
1221
1222 return rev;
1223 }
1224
1225
1238 int32_t CAN_Receive(CAN_T *tCAN, uint32_t u32MsgNum, STR_CANMSG_T* pCanMsg)
1239 {
1240 int32_t rev = (int32_t)TRUE;
1241 uint32_t u32Tmp;
1242
1243 u32Tmp = (tCAN->TEST & CAN_TEST_BASIC_Msk);
1244
1245 if((tCAN->CON & CAN_CON_TEST_Msk) && u32Tmp)
1246 {
1247 rev = CAN_BasicReceiveMsg(tCAN, pCanMsg);
1248 }
1249 else
1250 {
1251 rev = CAN_ReadMsgObj(tCAN, (uint8_t)u32MsgNum, (uint8_t)TRUE, pCanMsg);
1252 }
1253
1254 return rev;
1255 }
1256
1266 void CAN_CLR_INT_PENDING_BIT(CAN_T *tCAN, uint8_t u32MsgNum)
1267 {
1268 uint32_t u32MsgIfNum;
1269
1270 if((u32MsgIfNum = LockIF_TL(tCAN)) == 2ul)
1271 {
1272 u32MsgIfNum = 0ul;
1273 }
1274 else
1275 {
1276 }
1277
1278 tCAN->IF[u32MsgIfNum].CMASK = CAN_IF_CMASK_CLRINTPND_Msk | CAN_IF_CMASK_TXRQSTNEWDAT_Msk;
1279 tCAN->IF[u32MsgIfNum].CREQ = 1ul + u32MsgNum;
1280
1281 ReleaseIF(tCAN, u32MsgIfNum);
1282 }
1283
1284 /* end of group CAN_EXPORTED_FUNCTIONS */
1286 /* end of group CAN_Driver */
1288 /* end of group Standard_Driver */
1290
1291 /*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/
1292
CAN_IF_CMASK_DATAB_Msk
#define CAN_IF_CMASK_DATAB_Msk
Definition: can_reg.h:1210
CAN_T::NDAT2
__I uint32_t NDAT2
Definition: can_reg.h:1101
CAN_IF_DAT_B1_DATA4_Msk
#define CAN_IF_DAT_B1_DATA4_Msk
Definition: can_reg.h:1303
CAN_IF_CMASK_ARB_Msk
#define CAN_IF_CMASK_ARB_Msk
Definition: can_reg.h:1225
CAN_IF_MCON_DLC_Msk
#define CAN_IF_MCON_DLC_Msk
Definition: can_reg.h:1261
CLK_PCLKDIV_APB1DIV_Msk
#define CLK_PCLKDIV_APB1DIV_Msk
Definition: clk_reg.h:2682
CAN_IF_DAT_B2_DATA6_Msk
#define CAN_IF_DAT_B2_DATA6_Msk
Definition: can_reg.h:1309
CAN_SetRxMsgObjAndMsk
int32_t CAN_SetRxMsgObjAndMsk(CAN_T *tCAN, uint8_t u8MsgObj, uint8_t u8idType, uint32_t u32id, uint32_t u32idmask, uint8_t u8singleOrFifoLast)
Set Rx message object, include ID mask.
Definition: can.c:538
CAN_TEST_SILENT_Msk
#define CAN_TEST_SILENT_Msk
Definition: can_reg.h:1189
CLK
#define CLK
Definition: M480.h:368
CAN_Receive
int32_t CAN_Receive(CAN_T *tCAN, uint32_t u32MsgNum, STR_CANMSG_T *pCanMsg)
Gets the message, if received.
Definition: can.c:1238
CAN_T::BTIME
__IO uint32_t BTIME
Definition: can_reg.h:1084
CAN_IF_MCON_RXIE_Msk
#define CAN_IF_MCON_RXIE_Msk
Definition: can_reg.h:1273
CAN_IF_DAT_A2_DATA2_Msk
#define CAN_IF_DAT_A2_DATA2_Msk
Definition: can_reg.h:1297
CAN_IF_CMASK_DATAA_Msk
#define CAN_IF_CMASK_DATAA_Msk
Definition: can_reg.h:1213
CAN_DisableInt
void CAN_DisableInt(CAN_T *tCAN, uint32_t u32Mask)
Disable CAN interrupt.
Definition: can.c:1052
CAN_IF_T::DAT_B1
__IO uint32_t DAT_B1
Definition: can_reg.h:542
CAN_SetMultiRxMsg
int32_t CAN_SetMultiRxMsg(CAN_T *tCAN, uint32_t u32MsgNum, uint32_t u32MsgCount, uint32_t u32IDType, uint32_t u32ID)
The function is used to configure several receive message objects.
Definition: can.c:1148
CAN_SetRxMsgObj
int32_t CAN_SetRxMsgObj(CAN_T *tCAN, uint8_t u8MsgObj, uint8_t u8idType, uint32_t u32id, uint8_t u8singleOrFifoLast)
Set Rx message object.
Definition: can.c:608
CAN_STATUS_RXOK_Msk
#define CAN_STATUS_RXOK_Msk
Definition: can_reg.h:1150
CAN_SetRxMsg
int32_t CAN_SetRxMsg(CAN_T *tCAN, uint32_t u32MsgNum, uint32_t u32IDType, uint32_t u32ID)
The function is used to configure a receive message object.
Definition: can.c:1074
CAN_T::TEST
__IO uint32_t TEST
Definition: can_reg.h:1086
CAN1
#define CAN1
Definition: M480.h:444
CAN_IF_T::CREQ
__IO uint32_t CREQ
Definition: can_reg.h:533
CAN_IF_MCON_EOB_Msk
#define CAN_IF_MCON_EOB_Msk
Definition: can_reg.h:1264
CAN_IF_CMASK_CLRINTPND_Msk
#define CAN_IF_CMASK_CLRINTPND_Msk
Definition: can_reg.h:1219
CAN_T::STATUS
__IO uint32_t STATUS
Definition: can_reg.h:1082
CAN_Transmit
int32_t CAN_Transmit(CAN_T *tCAN, uint32_t u32MsgNum, STR_CANMSG_T *pCanMsg)
Send CAN message.
Definition: can.c:1199
CAN_EnterInitMode
void CAN_EnterInitMode(CAN_T *tCAN, uint8_t u8Mask)
Enter initialization mode.
Definition: can.c:248
CAN_EXT_ID
#define CAN_EXT_ID
Definition: can.h:39
TRUE
#define TRUE
Boolean true, define to use in API parameters or return value.
Definition: M480.h:607
CLK_PCLKDIV_APB0DIV_Msk
#define CLK_PCLKDIV_APB0DIV_Msk
Definition: clk_reg.h:2679
CAN2
#define CAN2
Definition: M480.h:445
CAN_CON_INIT_Msk
#define CAN_CON_INIT_Msk
Definition: can_reg.h:1123
CAN_CLR_INT_PENDING_BIT
void CAN_CLR_INT_PENDING_BIT(CAN_T *tCAN, uint8_t u32MsgNum)
Clear interrupt pending bit.
Definition: can.c:1266
CAN_SetTxMsg
int32_t CAN_SetTxMsg(CAN_T *tCAN, uint32_t u32MsgNum, STR_CANMSG_T *pCanMsg)
The function is used to configure a transmit object.
Definition: can.c:928
NuMicro.h
NuMicro peripheral access layer header file.
STR_CANMSG_T::Id
uint32_t Id
Definition: can.h:60
CAN_STD_ID
#define CAN_STD_ID
Definition: can.h:38
STR_CANMSG_T
Definition: can.h:56
CAN_IF_ARB2_MSGVAL_Msk
#define CAN_IF_ARB2_MSGVAL_Msk
Definition: can_reg.h:1258
CAN_BTIME_TSEG1_Pos
#define CAN_BTIME_TSEG1_Pos
Definition: can_reg.h:1176
CAN_BasicSendMsg
int32_t CAN_BasicSendMsg(CAN_T *tCAN, STR_CANMSG_T *pCanMsg)
Send CAN message in BASIC mode of test mode.
Definition: can.c:385
CAN_Close
void CAN_Close(CAN_T *tCAN)
The function is used to disable all CAN interrupt.
Definition: can.c:880
FALSE
#define FALSE
Boolean false, define to use in API parameters or return value.
Definition: M480.h:608
CAN_IF_CMASK_TXRQSTNEWDAT_Msk
#define CAN_IF_CMASK_TXRQSTNEWDAT_Msk
Definition: can_reg.h:1216
CAN_IF_ARB2_ID_Msk
#define CAN_IF_ARB2_ID_Msk
Definition: can_reg.h:1249
SystemCoreClock
uint32_t SystemCoreClock
Definition: system_M480.c:21
CAN_BTIME_TSEG2_Pos
#define CAN_BTIME_TSEG2_Pos
Definition: can_reg.h:1179
STR_CANMSG_T::IdType
uint32_t IdType
Definition: can.h:58
CAN_Open
uint32_t CAN_Open(CAN_T *tCAN, uint32_t u32BaudRate, uint32_t u32Mode)
Set CAN operation mode and target baud-rate.
Definition: can.c:898
CAN_IF_CMASK_WRRD_Msk
#define CAN_IF_CMASK_WRRD_Msk
Definition: can_reg.h:1231
CAN_BTIME_SJW_Pos
#define CAN_BTIME_SJW_Pos
Definition: can_reg.h:1173
CAN_TEST_LBACK_Msk
#define CAN_TEST_LBACK_Msk
Definition: can_reg.h:1192
CAN_LeaveInitMode
void CAN_LeaveInitMode(CAN_T *tCAN)
Leave initialization mode.
Definition: can.c:261
CAN_IF_ARB2_DIR_Msk
#define CAN_IF_ARB2_DIR_Msk
Definition: can_reg.h:1252
CAN_IF_T::DAT_A2
__IO uint32_t DAT_A2
Definition: can_reg.h:541
CAN_BTIME_TSEG2_Msk
#define CAN_BTIME_TSEG2_Msk
Definition: can_reg.h:1180
CAN_LeaveTestMode
void CAN_LeaveTestMode(CAN_T *tCAN)
Leave the test mode.
Definition: can.c:354
CAN_IF_DAT_A1_DATA1_Pos
#define CAN_IF_DAT_A1_DATA1_Pos
Definition: can_reg.h:1293
CAN_BASIC_MODE
#define CAN_BASIC_MODE
Definition: can.h:33
CAN_TriggerTxMsg
int32_t CAN_TriggerTxMsg(CAN_T *tCAN, uint32_t u32MsgNum)
Set transmit request bit.
Definition: can.c:990
CAN_IF_T::MCON
__IO uint32_t MCON
Definition: can_reg.h:539
CAN_IF_DAT_A1_DATA1_Msk
#define CAN_IF_DAT_A1_DATA1_Msk
Definition: can_reg.h:1294
CAN_IF_T::DAT_A1
__IO uint32_t DAT_A1
Definition: can_reg.h:540
CAN_IF_DAT_A2_DATA3_Pos
#define CAN_IF_DAT_A2_DATA3_Pos
Definition: can_reg.h:1299
CAN_IF_DAT_B2_DATA7_Pos
#define CAN_IF_DAT_B2_DATA7_Pos
Definition: can_reg.h:1311
CAN_CON_CCE_Msk
#define CAN_CON_CCE_Msk
Definition: can_reg.h:1138
CAN_IF_ARB2_XTD_Msk
#define CAN_IF_ARB2_XTD_Msk
Definition: can_reg.h:1255
CLK_PCLKDIV_APB1DIV_Pos
#define CLK_PCLKDIV_APB1DIV_Pos
Definition: clk_reg.h:2681
CAN0
#define CAN0
Definition: M480.h:443
CAN_CON_IE_Msk
#define CAN_CON_IE_Msk
Definition: can_reg.h:1126
CAN_SetRxMsgAndMsk
int32_t CAN_SetRxMsgAndMsk(CAN_T *tCAN, uint32_t u32MsgNum, uint32_t u32IDType, uint32_t u32ID, uint32_t u32IDMask)
The function is used to configure a receive message object.
Definition: can.c:1111
CAN_CON_TEST_Msk
#define CAN_CON_TEST_Msk
Definition: can_reg.h:1141
CAN_IF_T::DAT_B2
__IO uint32_t DAT_B2
Definition: can_reg.h:543
CAN_IF_T::MASK2
__IO uint32_t MASK2
Definition: can_reg.h:536
STR_CANMSG_T::Data
uint8_t Data[8]
Definition: can.h:62
CAN_IF_T::CMASK
__IO uint32_t CMASK
Definition: can_reg.h:534
CAN_CON_EIE_Msk
#define CAN_CON_EIE_Msk
Definition: can_reg.h:1132
SystemCoreClockUpdate
void SystemCoreClockUpdate(void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
Definition: system_M480.c:29
CAN_IF_CREQ_BUSY_Msk
#define CAN_IF_CREQ_BUSY_Msk
Definition: can_reg.h:1207
CAN_IsNewDataReceived
uint32_t CAN_IsNewDataReceived(CAN_T *tCAN, uint8_t u8MsgObj)
Get the waiting status of a received message.
Definition: can.c:369
CAN_IF_MCON_NEWDAT_Msk
#define CAN_IF_MCON_NEWDAT_Msk
Definition: can_reg.h:1288
CAN_IF_MCON_UMASK_Msk
#define CAN_IF_MCON_UMASK_Msk
Definition: can_reg.h:1279
CAN_T
Definition: can_reg.h:550
CAN_IF_DAT_A2_DATA3_Msk
#define CAN_IF_DAT_A2_DATA3_Msk
Definition: can_reg.h:1300
CAN_EnableInt
void CAN_EnableInt(CAN_T *tCAN, uint32_t u32Mask)
Enable CAN interrupt.
Definition: can.c:1036
STR_CANMSG_T::DLC
uint8_t DLC
Definition: can.h:61
CAN_EnterTestMode
void CAN_EnterTestMode(CAN_T *tCAN, uint8_t u8TestMask)
Switch the CAN into test mode.
Definition: can.c:341
CAN_IF_CMASK_CONTROL_Msk
#define CAN_IF_CMASK_CONTROL_Msk
Definition: can_reg.h:1222
CAN_CON_SIE_Msk
#define CAN_CON_SIE_Msk
Definition: can_reg.h:1129
CAN_T::IF
__IO CAN_IF_T IF[2]
Definition: can_reg.h:1091
CAN_WaitMsg
void CAN_WaitMsg(CAN_T *tCAN)
Wait message into message buffer in basic mode.
Definition: can.c:277
CAN_IF_DAT_B1_DATA5_Msk
#define CAN_IF_DAT_B1_DATA5_Msk
Definition: can_reg.h:1306
CAN_SetBaudRate
uint32_t CAN_SetBaudRate(CAN_T *tCAN, uint32_t u32BaudRate)
Set bus baud-rate.
Definition: can.c:748
CAN_STATUS_LEC_Msk
#define CAN_STATUS_LEC_Msk
Definition: can_reg.h:1144
STR_CANMSG_T::FrameType
uint32_t FrameType
Definition: can.h:59
CAN_BTIME_BRP_Msk
#define CAN_BTIME_BRP_Msk
Definition: can_reg.h:1171
CAN_BasicReceiveMsg
int32_t CAN_BasicReceiveMsg(CAN_T *tCAN, STR_CANMSG_T *pCanMsg)
Get a message information in BASIC mode.
Definition: can.c:470
CAN_GetCANBitRate
uint32_t CAN_GetCANBitRate(CAN_T *tCAN)
Get current bit rate.
Definition: can.c:316
CAN_IF_CMASK_MASK_Msk
#define CAN_IF_CMASK_MASK_Msk
Definition: can_reg.h:1228
CAN_IF_DAT_B1_DATA5_Pos
#define CAN_IF_DAT_B1_DATA5_Pos
Definition: can_reg.h:1305
CAN_IF_T::ARB1
__IO uint32_t ARB1
Definition: can_reg.h:537
CAN_IF_ARB2_DIR_Pos
#define CAN_IF_ARB2_DIR_Pos
Definition: can_reg.h:1251
CAN_IF_MCON_TXIE_Msk
#define CAN_IF_MCON_TXIE_Msk
Definition: can_reg.h:1276
CAN_TEST_BASIC_Msk
#define CAN_TEST_BASIC_Msk
Definition: can_reg.h:1186
CAN_T::BRPE
__IO uint32_t BRPE
Definition: can_reg.h:1087
CAN_IF_T::MASK1
__IO uint32_t MASK1
Definition: can_reg.h:535
CAN_STATUS_TXOK_Msk
#define CAN_STATUS_TXOK_Msk
Definition: can_reg.h:1147
CAN_IF_T::ARB2
__IO uint32_t ARB2
Definition: can_reg.h:538
CAN_ReadMsgObj
int32_t CAN_ReadMsgObj(CAN_T *tCAN, uint8_t u8MsgObj, uint8_t u8Release, STR_CANMSG_T *pCanMsg)
Gets the message.
Definition: can.c:671
CAN_IF_DAT_B2_DATA7_Msk
#define CAN_IF_DAT_B2_DATA7_Msk
Definition: can_reg.h:1312
CAN_IF_DAT_A1_DATA0_Msk
#define CAN_IF_DAT_A1_DATA0_Msk
Definition: can_reg.h:1291
CAN_T::CON
__IO uint32_t CON
Definition: can_reg.h:1081
CAN_BTIME_TSEG1_Msk
#define CAN_BTIME_TSEG1_Msk
Definition: can_reg.h:1177