| M480 BSP V3.05.001 The Board Support Package for M480 Series

wdt_reg.h
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1 /**************************************************************************/
9 #ifndef __WDT_REG_H__
10 #define __WDT_REG_H__
11
12 #if defined ( __CC_ARM )
13 #pragma anon_unions
14 #endif
15
26 typedef struct
27 {
28
29
241 __IO uint32_t CTL;
242 __IO uint32_t ALTCTL;
243 __O uint32_t RSTCNT;
245 } WDT_T;
246
252 #define WDT_CTL_RSTCNT_Pos (0)
253 #define WDT_CTL_RSTCNT_Msk (0x1ul << WDT_CTL_RSTCNT_Pos)
255 #define WDT_CTL_RSTEN_Pos (1)
256 #define WDT_CTL_RSTEN_Msk (0x1ul << WDT_CTL_RSTEN_Pos)
258 #define WDT_CTL_RSTF_Pos (2)
259 #define WDT_CTL_RSTF_Msk (0x1ul << WDT_CTL_RSTF_Pos)
261 #define WDT_CTL_IF_Pos (3)
262 #define WDT_CTL_IF_Msk (0x1ul << WDT_CTL_IF_Pos)
264 #define WDT_CTL_WKEN_Pos (4)
265 #define WDT_CTL_WKEN_Msk (0x1ul << WDT_CTL_WKEN_Pos)
267 #define WDT_CTL_WKF_Pos (5)
268 #define WDT_CTL_WKF_Msk (0x1ul << WDT_CTL_WKF_Pos)
270 #define WDT_CTL_INTEN_Pos (6)
271 #define WDT_CTL_INTEN_Msk (0x1ul << WDT_CTL_INTEN_Pos)
273 #define WDT_CTL_WDTEN_Pos (7)
274 #define WDT_CTL_WDTEN_Msk (0x1ul << WDT_CTL_WDTEN_Pos)
276 #define WDT_CTL_TOUTSEL_Pos (8)
277 #define WDT_CTL_TOUTSEL_Msk (0x7ul << WDT_CTL_TOUTSEL_Pos)
279 #define WDT_CTL_SYNC_Pos (30)
280 #define WDT_CTL_SYNC_Msk (0x1ul << WDT_CTL_SYNC_Pos)
282 #define WDT_CTL_ICEDEBUG_Pos (31)
283 #define WDT_CTL_ICEDEBUG_Msk (0x1ul << WDT_CTL_ICEDEBUG_Pos)
285 #define WDT_ALTCTL_RSTDSEL_Pos (0)
286 #define WDT_ALTCTL_RSTDSEL_Msk (0x3ul << WDT_ALTCTL_RSTDSEL_Pos)
288 #define WDT_RSTCNT_RSTCNT_Pos (0)
289 #define WDT_RSTCNT_RSTCNT_Msk (0xfffffffful << WDT_RSTCNT_RSTCNT_Pos) /* WDT_CONST */
292 /* end of WDT register group */ /* end of REGISTER group */
294
295 #if defined ( __CC_ARM )
296 #pragma no_anon_unions
297 #endif
298
299 #endif /* __WDT_REG_H__ */
WDT_T::RSTCNT
__O uint32_t RSTCNT
Definition: wdt_reg.h:243
WDT_T
Definition: wdt_reg.h:26
WDT_T::CTL
__IO uint32_t CTL
Definition: wdt_reg.h:241
WDT_T::ALTCTL
__IO uint32_t ALTCTL
Definition: wdt_reg.h:242