| M480 BSP V3.05.001 The Board Support Package for M480 Series

hsotg_reg.h
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1 /**************************************************************************/
9 #ifndef __HSOTG_REG_H__
10 #define __HSOTG_REG_H__
11
12 #if defined ( __CC_ARM )
13 #pragma anon_unions
14 #endif
15
26 typedef struct
27 {
28
29
523 __IO uint32_t CTL;
524 __IO uint32_t PHYCTL;
525 __IO uint32_t INTEN;
526 __IO uint32_t INTSTS;
527 __I uint32_t STATUS;
529 } HSOTG_T;
530
536 #define HSOTG_CTL_VBUSDROP_Pos (0)
537 #define HSOTG_CTL_VBUSDROP_Msk (0x1ul << HSOTG_CTL_VBUSDROP_Pos)
539 #define HSOTG_CTL_BUSREQ_Pos (1)
540 #define HSOTG_CTL_BUSREQ_Msk (0x1ul << HSOTG_CTL_BUSREQ_Pos)
542 #define HSOTG_CTL_HNPREQEN_Pos (2)
543 #define HSOTG_CTL_HNPREQEN_Msk (0x1ul << HSOTG_CTL_HNPREQEN_Pos)
545 #define HSOTG_CTL_OTGEN_Pos (4)
546 #define HSOTG_CTL_OTGEN_Msk (0x1ul << HSOTG_CTL_OTGEN_Pos)
548 #define HSOTG_CTL_WKEN_Pos (5)
549 #define HSOTG_CTL_WKEN_Msk (0x1ul << HSOTG_CTL_WKEN_Pos)
551 #define HSOTG_PHYCTL_OTGPHYEN_Pos (0)
552 #define HSOTG_PHYCTL_OTGPHYEN_Msk (0x1ul << HSOTG_PHYCTL_OTGPHYEN_Pos)
554 #define HSOTG_PHYCTL_IDDETEN_Pos (1)
555 #define HSOTG_PHYCTL_IDDETEN_Msk (0x1ul << HSOTG_PHYCTL_IDDETEN_Pos)
557 #define HSOTG_PHYCTL_VBENPOL_Pos (4)
558 #define HSOTG_PHYCTL_VBENPOL_Msk (0x1ul << HSOTG_PHYCTL_VBENPOL_Pos)
560 #define HSOTG_PHYCTL_VBSTSPOL_Pos (5)
561 #define HSOTG_PHYCTL_VBSTSPOL_Msk (0x1ul << HSOTG_PHYCTL_VBSTSPOL_Pos)
563 #define HSOTG_INTEN_ROLECHGIEN_Pos (0)
564 #define HSOTG_INTEN_ROLECHGIEN_Msk (0x1ul << HSOTG_INTEN_ROLECHGIEN_Pos)
566 #define HSOTG_INTEN_VBEIEN_Pos (1)
567 #define HSOTG_INTEN_VBEIEN_Msk (0x1ul << HSOTG_INTEN_VBEIEN_Pos)
569 #define HSOTG_INTEN_SRPFIEN_Pos (2)
570 #define HSOTG_INTEN_SRPFIEN_Msk (0x1ul << HSOTG_INTEN_SRPFIEN_Pos)
572 #define HSOTG_INTEN_HNPFIEN_Pos (3)
573 #define HSOTG_INTEN_HNPFIEN_Msk (0x1ul << HSOTG_INTEN_HNPFIEN_Pos)
575 #define HSOTG_INTEN_GOIDLEIEN_Pos (4)
576 #define HSOTG_INTEN_GOIDLEIEN_Msk (0x1ul << HSOTG_INTEN_GOIDLEIEN_Pos)
578 #define HSOTG_INTEN_IDCHGIEN_Pos (5)
579 #define HSOTG_INTEN_IDCHGIEN_Msk (0x1ul << HSOTG_INTEN_IDCHGIEN_Pos)
581 #define HSOTG_INTEN_PDEVIEN_Pos (6)
582 #define HSOTG_INTEN_PDEVIEN_Msk (0x1ul << HSOTG_INTEN_PDEVIEN_Pos)
584 #define HSOTG_INTEN_HOSTIEN_Pos (7)
585 #define HSOTG_INTEN_HOSTIEN_Msk (0x1ul << HSOTG_INTEN_HOSTIEN_Pos)
587 #define HSOTG_INTEN_BVLDCHGIEN_Pos (8)
588 #define HSOTG_INTEN_BVLDCHGIEN_Msk (0x1ul << HSOTG_INTEN_BVLDCHGIEN_Pos)
590 #define HSOTG_INTEN_AVLDCHGIEN_Pos (9)
591 #define HSOTG_INTEN_AVLDCHGIEN_Msk (0x1ul << HSOTG_INTEN_AVLDCHGIEN_Pos)
593 #define HSOTG_INTEN_VBCHGIEN_Pos (10)
594 #define HSOTG_INTEN_VBCHGIEN_Msk (0x1ul << HSOTG_INTEN_VBCHGIEN_Pos)
596 #define HSOTG_INTEN_SECHGIEN_Pos (11)
597 #define HSOTG_INTEN_SECHGIEN_Msk (0x1ul << HSOTG_INTEN_SECHGIEN_Pos)
599 #define HSOTG_INTEN_SRPDETIEN_Pos (13)
600 #define HSOTG_INTEN_SRPDETIEN_Msk (0x1ul << HSOTG_INTEN_SRPDETIEN_Pos)
602 #define HSOTG_INTSTS_ROLECHGIF_Pos (0)
603 #define HSOTG_INTSTS_ROLECHGIF_Msk (0x1ul << HSOTG_INTSTS_ROLECHGIF_Pos)
605 #define HSOTG_INTSTS_VBEIF_Pos (1)
606 #define HSOTG_INTSTS_VBEIF_Msk (0x1ul << HSOTG_INTSTS_VBEIF_Pos)
608 #define HSOTG_INTSTS_SRPFIF_Pos (2)
609 #define HSOTG_INTSTS_SRPFIF_Msk (0x1ul << HSOTG_INTSTS_SRPFIF_Pos)
611 #define HSOTG_INTSTS_HNPFIF_Pos (3)
612 #define HSOTG_INTSTS_HNPFIF_Msk (0x1ul << HSOTG_INTSTS_HNPFIF_Pos)
614 #define HSOTG_INTSTS_GOIDLEIF_Pos (4)
615 #define HSOTG_INTSTS_GOIDLEIF_Msk (0x1ul << HSOTG_INTSTS_GOIDLEIF_Pos)
617 #define HSOTG_INTSTS_IDCHGIF_Pos (5)
618 #define HSOTG_INTSTS_IDCHGIF_Msk (0x1ul << HSOTG_INTSTS_IDCHGIF_Pos)
620 #define HSOTG_INTSTS_PDEVIF_Pos (6)
621 #define HSOTG_INTSTS_PDEVIF_Msk (0x1ul << HSOTG_INTSTS_PDEVIF_Pos)
623 #define HSOTG_INTSTS_HOSTIF_Pos (7)
624 #define HSOTG_INTSTS_HOSTIF_Msk (0x1ul << HSOTG_INTSTS_HOSTIF_Pos)
626 #define HSOTG_INTSTS_BVLDCHGIF_Pos (8)
627 #define HSOTG_INTSTS_BVLDCHGIF_Msk (0x1ul << HSOTG_INTSTS_BVLDCHGIF_Pos)
629 #define HSOTG_INTSTS_AVLDCHGIF_Pos (9)
630 #define HSOTG_INTSTS_AVLDCHGIF_Msk (0x1ul << HSOTG_INTSTS_AVLDCHGIF_Pos)
632 #define HSOTG_INTSTS_VBCHGIF_Pos (10)
633 #define HSOTG_INTSTS_VBCHGIF_Msk (0x1ul << HSOTG_INTSTS_VBCHGIF_Pos)
635 #define HSOTG_INTSTS_SECHGIF_Pos (11)
636 #define HSOTG_INTSTS_SECHGIF_Msk (0x1ul << HSOTG_INTSTS_SECHGIF_Pos)
638 #define HSOTG_INTSTS_SRPDETIF_Pos (13)
639 #define HSOTG_INTSTS_SRPDETIF_Msk (0x1ul << HSOTG_INTSTS_SRPDETIF_Pos)
641 #define HSOTG_STATUS_OVERCUR_Pos (0)
642 #define HSOTG_STATUS_OVERCUR_Msk (0x1ul << HSOTG_STATUS_OVERCUR_Pos)
644 #define HSOTG_STATUS_IDSTS_Pos (1)
645 #define HSOTG_STATUS_IDSTS_Msk (0x1ul << HSOTG_STATUS_IDSTS_Pos)
647 #define HSOTG_STATUS_SESSEND_Pos (2)
648 #define HSOTG_STATUS_SESSEND_Msk (0x1ul << HSOTG_STATUS_SESSEND_Pos)
650 #define HSOTG_STATUS_BVLD_Pos (3)
651 #define HSOTG_STATUS_BVLD_Msk (0x1ul << HSOTG_STATUS_BVLD_Pos)
653 #define HSOTG_STATUS_AVLD_Pos (4)
654 #define HSOTG_STATUS_AVLD_Msk (0x1ul << HSOTG_STATUS_AVLD_Pos)
656 #define HSOTG_STATUS_VBUSVLD_Pos (5)
657 #define HSOTG_STATUS_VBUSVLD_Msk (0x1ul << HSOTG_STATUS_VBUSVLD_Pos)
659 #define HSOTG_STATUS_ASPERI_Pos (6)
660 #define HSOTG_STATUS_ASPERI_Msk (0x1ul << HSOTG_STATUS_ASPERI_Pos)
662 #define HSOTG_STATUS_ASHOST_Pos (7)
663 #define HSOTG_STATUS_ASHOST_Msk (0x1ul << HSOTG_STATUS_ASHOST_Pos) /* HSOTG_CONST */
666 /* end of HSOTG register group */ /* end of REGISTER group */
668
669 #if defined ( __CC_ARM )
670 #pragma no_anon_unions
671 #endif
672
673 #endif /* __HSOTG_REG_H__ */
HSOTG_T::CTL
__IO uint32_t CTL
Definition: hsotg_reg.h:523
HSOTG_T::INTSTS
__IO uint32_t INTSTS
Definition: hsotg_reg.h:526
HSOTG_T::STATUS
__I uint32_t STATUS
Definition: hsotg_reg.h:527
HSOTG_T::PHYCTL
__IO uint32_t PHYCTL
Definition: hsotg_reg.h:524
HSOTG_T::INTEN
__IO uint32_t INTEN
Definition: hsotg_reg.h:525
HSOTG_T
Definition: hsotg_reg.h:26