| M480 BSP V3.05.001 The Board Support Package for M480 Series

ecap_reg.h
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1 /**************************************************************************/
9 #ifndef __ECAP_REG_H__
10 #define __ECAP_REG_H__
11
12 #if defined ( __CC_ARM )
13 #pragma anon_unions
14 #endif
15
26 typedef struct
27 {
28
516 __IO uint32_t CNT;
517 __IO uint32_t HLD0;
518 __IO uint32_t HLD1;
519 __IO uint32_t HLD2;
520 __IO uint32_t CNTCMP;
521 __IO uint32_t CTL0;
522 __IO uint32_t CTL1;
523 __IO uint32_t STATUS;
525 } ECAP_T;
526
532 #define ECAP_CNT_CNT_Pos (0)
533 #define ECAP_CNT_CNT_Msk (0xfffffful << ECAP_CNT_CNT_Pos)
535 #define ECAP_HLD0_HOLD_Pos (0)
536 #define ECAP_HLD0_HOLD_Msk (0xfffffful << ECAP_HLD0_HOLD_Pos)
538 #define ECAP_HLD1_HOLD_Pos (0)
539 #define ECAP_HLD1_HOLD_Msk (0xfffffful << ECAP_HLD1_HOLD_Pos)
541 #define ECAP_HLD2_HOLD_Pos (0)
542 #define ECAP_HLD2_HOLD_Msk (0xfffffful << ECAP_HLD2_HOLD_Pos)
544 #define ECAP_CNTCMP_CNTCMP_Pos (0)
545 #define ECAP_CNTCMP_CNTCMP_Msk (0xfffffful << ECAP_CNTCMP_CNTCMP_Pos)
547 #define ECAP_CTL0_NFCLKSEL_Pos (0)
548 #define ECAP_CTL0_NFCLKSEL_Msk (0x7ul << ECAP_CTL0_NFCLKSEL_Pos)
550 #define ECAP_CTL0_CAPNFDIS_Pos (3)
551 #define ECAP_CTL0_CAPNFDIS_Msk (0x1ul << ECAP_CTL0_CAPNFDIS_Pos)
553 #define ECAP_CTL0_IC0EN_Pos (4)
554 #define ECAP_CTL0_IC0EN_Msk (0x1ul << ECAP_CTL0_IC0EN_Pos)
556 #define ECAP_CTL0_IC1EN_Pos (5)
557 #define ECAP_CTL0_IC1EN_Msk (0x1ul << ECAP_CTL0_IC1EN_Pos)
559 #define ECAP_CTL0_IC2EN_Pos (6)
560 #define ECAP_CTL0_IC2EN_Msk (0x1ul << ECAP_CTL0_IC2EN_Pos)
562 #define ECAP_CTL0_CAPSEL0_Pos (8)
563 #define ECAP_CTL0_CAPSEL0_Msk (0x3ul << ECAP_CTL0_CAPSEL0_Pos)
565 #define ECAP_CTL0_CAPSEL1_Pos (10)
566 #define ECAP_CTL0_CAPSEL1_Msk (0x3ul << ECAP_CTL0_CAPSEL1_Pos)
568 #define ECAP_CTL0_CAPSEL2_Pos (12)
569 #define ECAP_CTL0_CAPSEL2_Msk (0x3ul << ECAP_CTL0_CAPSEL2_Pos)
571 #define ECAP_CTL0_CAPIEN0_Pos (16)
572 #define ECAP_CTL0_CAPIEN0_Msk (0x1ul << ECAP_CTL0_CAPIEN0_Pos)
574 #define ECAP_CTL0_CAPIEN1_Pos (17)
575 #define ECAP_CTL0_CAPIEN1_Msk (0x1ul << ECAP_CTL0_CAPIEN1_Pos)
577 #define ECAP_CTL0_CAPIEN2_Pos (18)
578 #define ECAP_CTL0_CAPIEN2_Msk (0x1ul << ECAP_CTL0_CAPIEN2_Pos)
580 #define ECAP_CTL0_OVIEN_Pos (20)
581 #define ECAP_CTL0_OVIEN_Msk (0x1ul << ECAP_CTL0_OVIEN_Pos)
583 #define ECAP_CTL0_CMPIEN_Pos (21)
584 #define ECAP_CTL0_CMPIEN_Msk (0x1ul << ECAP_CTL0_CMPIEN_Pos)
586 #define ECAP_CTL0_CNTEN_Pos (24)
587 #define ECAP_CTL0_CNTEN_Msk (0x1ul << ECAP_CTL0_CNTEN_Pos)
589 #define ECAP_CTL0_CMPCLREN_Pos (25)
590 #define ECAP_CTL0_CMPCLREN_Msk (0x1ul << ECAP_CTL0_CMPCLREN_Pos)
592 #define ECAP_CTL0_CMPEN_Pos (28)
593 #define ECAP_CTL0_CMPEN_Msk (0x1ul << ECAP_CTL0_CMPEN_Pos)
595 #define ECAP_CTL0_CAPEN_Pos (29)
596 #define ECAP_CTL0_CAPEN_Msk (0x1ul << ECAP_CTL0_CAPEN_Pos)
598 #define ECAP_CTL1_EDGESEL0_Pos (0)
599 #define ECAP_CTL1_EDGESEL0_Msk (0x3ul << ECAP_CTL1_EDGESEL0_Pos)
601 #define ECAP_CTL1_EDGESEL1_Pos (2)
602 #define ECAP_CTL1_EDGESEL1_Msk (0x3ul << ECAP_CTL1_EDGESEL1_Pos)
604 #define ECAP_CTL1_EDGESEL2_Pos (4)
605 #define ECAP_CTL1_EDGESEL2_Msk (0x3ul << ECAP_CTL1_EDGESEL2_Pos)
607 #define ECAP_CTL1_CAP0RLDEN_Pos (8)
608 #define ECAP_CTL1_CAP0RLDEN_Msk (0x1ul << ECAP_CTL1_CAP0RLDEN_Pos)
610 #define ECAP_CTL1_CAP1RLDEN_Pos (9)
611 #define ECAP_CTL1_CAP1RLDEN_Msk (0x1ul << ECAP_CTL1_CAP1RLDEN_Pos)
613 #define ECAP_CTL1_CAP2RLDEN_Pos (10)
614 #define ECAP_CTL1_CAP2RLDEN_Msk (0x1ul << ECAP_CTL1_CAP2RLDEN_Pos)
616 #define ECAP_CTL1_OVRLDEN_Pos (11)
617 #define ECAP_CTL1_OVRLDEN_Msk (0x1ul << ECAP_CTL1_OVRLDEN_Pos)
619 #define ECAP_CTL1_CLKSEL_Pos (12)
620 #define ECAP_CTL1_CLKSEL_Msk (0x7ul << ECAP_CTL1_CLKSEL_Pos)
622 #define ECAP_CTL1_CNTSRCSEL_Pos (16)
623 #define ECAP_CTL1_CNTSRCSEL_Msk (0x3ul << ECAP_CTL1_CNTSRCSEL_Pos)
625 #define ECAP_CTL1_CAP0CLREN_Pos (20)
626 #define ECAP_CTL1_CAP0CLREN_Msk (0x1ul << ECAP_CTL1_CAP0CLREN_Pos)
628 #define ECAP_CTL1_CAP1CLREN_Pos (21)
629 #define ECAP_CTL1_CAP1CLREN_Msk (0x1ul << ECAP_CTL1_CAP1CLREN_Pos)
631 #define ECAP_CTL1_CAP2CLREN_Pos (22)
632 #define ECAP_CTL1_CAP2CLREN_Msk (0x1ul << ECAP_CTL1_CAP2CLREN_Pos)
634 #define ECAP_STATUS_CAPTF0_Pos (0)
635 #define ECAP_STATUS_CAPTF0_Msk (0x1ul << ECAP_STATUS_CAPTF0_Pos)
637 #define ECAP_STATUS_CAPTF1_Pos (1)
638 #define ECAP_STATUS_CAPTF1_Msk (0x1ul << ECAP_STATUS_CAPTF1_Pos)
640 #define ECAP_STATUS_CAPTF2_Pos (2)
641 #define ECAP_STATUS_CAPTF2_Msk (0x1ul << ECAP_STATUS_CAPTF2_Pos)
643 #define ECAP_STATUS_CAPCMPF_Pos (4)
644 #define ECAP_STATUS_CAPCMPF_Msk (0x1ul << ECAP_STATUS_CAPCMPF_Pos)
646 #define ECAP_STATUS_CAPOVF_Pos (5)
647 #define ECAP_STATUS_CAPOVF_Msk (0x1ul << ECAP_STATUS_CAPOVF_Pos)
649 #define ECAP_STATUS_CAP0_Pos (8)
650 #define ECAP_STATUS_CAP0_Msk (0x1ul << ECAP_STATUS_CAP0_Pos)
652 #define ECAP_STATUS_CAP1_Pos (9)
653 #define ECAP_STATUS_CAP1_Msk (0x1ul << ECAP_STATUS_CAP1_Pos)
655 #define ECAP_STATUS_CAP2_Pos (10)
656 #define ECAP_STATUS_CAP2_Msk (0x1ul << ECAP_STATUS_CAP2_Pos) /* ECAP_CONST */
659 /* end of ECAP register group */ /* end of REGISTER group */
661
662 #if defined ( __CC_ARM )
663 #pragma no_anon_unions
664 #endif
665
666 #endif /* __ECAP_REG_H__ */
ECAP_T::CNTCMP
__IO uint32_t CNTCMP
Definition: ecap_reg.h:520
ECAP_T::STATUS
__IO uint32_t STATUS
Definition: ecap_reg.h:523
ECAP_T::CTL0
__IO uint32_t CTL0
Definition: ecap_reg.h:521
ECAP_T::HLD1
__IO uint32_t HLD1
Definition: ecap_reg.h:518
ECAP_T
Definition: ecap_reg.h:26
ECAP_T::HLD2
__IO uint32_t HLD2
Definition: ecap_reg.h:519
ECAP_T::CTL1
__IO uint32_t CTL1
Definition: ecap_reg.h:522
ECAP_T::HLD0
__IO uint32_t HLD0
Definition: ecap_reg.h:517
ECAP_T::CNT
__IO uint32_t CNT
Definition: ecap_reg.h:516