| M480 BSP V3.05.001 The Board Support Package for M480 Series

timer_pwm.h
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1 /**************************************************************************/
9 #ifndef __TIMER_PWM_H__
10 #define __TIMER_PWM_H__
11
12 #ifdef __cplusplus
13 extern "C"
14 {
15 #endif
16
17
18
29 /*---------------------------------------------------------------------------------------------------------*/
30 /* Output Channel Constant Definitions */
31 /*---------------------------------------------------------------------------------------------------------*/
32 #define TPWM_CH0 (BIT0)
33 #define TPWM_CH1 (BIT1)
35 /*---------------------------------------------------------------------------------------------------------*/
36 /* Counter Type Constant Definitions */
37 /*---------------------------------------------------------------------------------------------------------*/
38 #define TPWM_UP_COUNT (0UL << TIMER_PWMCTL_CNTTYPE_Pos)
39 #define TPWM_DOWN_COUNT (1UL << TIMER_PWMCTL_CNTTYPE_Pos)
40 #define TPWM_UP_DOWN_COUNT (2UL << TIMER_PWMCTL_CNTTYPE_Pos)
42 /*---------------------------------------------------------------------------------------------------------*/
43 /* Counter Mode Constant Definitions */
44 /*---------------------------------------------------------------------------------------------------------*/
45 #define TPWM_AUTO_RELOAD_MODE (0UL)
46 #define TPWM_ONE_SHOT_MODE (TIMER_PWMCTL_CNTMODE_Msk)
48 /*---------------------------------------------------------------------------------------------------------*/
49 /* Output Level Constant Definitions */
50 /*---------------------------------------------------------------------------------------------------------*/
51 #define TPWM_OUTPUT_TOGGLE (0UL)
52 #define TPWM_OUTPUT_NOTHING (1UL)
53 #define TPWM_OUTPUT_LOW (2UL)
54 #define TPWM_OUTPUT_HIGH (3UL)
56 /*---------------------------------------------------------------------------------------------------------*/
57 /* Trigger ADC Source Select Constant Definitions */
58 /*---------------------------------------------------------------------------------------------------------*/
59 #define TPWM_TRIGGER_ADC_AT_ZERO_POINT (0UL << TIMER_PWMEADCTS_TRGSEL_Pos)
60 #define TPWM_TRIGGER_ADC_AT_PERIOD_POINT (1UL << TIMER_PWMEADCTS_TRGSEL_Pos)
61 #define TPWM_TRIGGER_ADC_AT_ZERO_OR_PERIOD_POINT (2UL << TIMER_PWMEADCTS_TRGSEL_Pos)
62 #define TPWM_TRIGGER_ADC_AT_COMPARE_UP_COUNT_POINT (3UL << TIMER_PWMEADCTS_TRGSEL_Pos)
63 #define TPWM_TRIGGER_ADC_AT_COMPARE_DOWN_COUNT_POINT (4UL << TIMER_PWMEADCTS_TRGSEL_Pos)
65 /*---------------------------------------------------------------------------------------------------------*/
66 /* Brake Control Constant Definitions */
67 /*---------------------------------------------------------------------------------------------------------*/
68 #define TPWM_BRAKE_SOURCE_EDGE_ACMP0 (TIMER_PWMBRKCTL_CPO0EBEN_Msk)
69 #define TPWM_BRAKE_SOURCE_EDGE_ACMP1 (TIMER_PWMBRKCTL_CPO1EBEN_Msk)
70 #define TPWM_BRAKE_SOURCE_EDGE_BKPIN (TIMER_PWMBRKCTL_BRKPEEN_Msk)
71 #define TPWM_BRAKE_SOURCE_EDGE_SYS_CSS (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_CSSBRKEN_Msk << 16))
72 #define TPWM_BRAKE_SOURCE_EDGE_SYS_BOD (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_BODBRKEN_Msk << 16))
73 #define TPWM_BRAKE_SOURCE_EDGE_SYS_COR (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_CORBRKEN_Msk << 16))
74 #define TPWM_BRAKE_SOURCE_EDGE_SYS_RAM (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_RAMBRKEN_Msk << 16))
77 #define TPWM_BRAKE_SOURCE_LEVEL_ACMP0 (TIMER_PWMBRKCTL_CPO0LBEN_Msk)
78 #define TPWM_BRAKE_SOURCE_LEVEL_ACMP1 (TIMER_PWMBRKCTL_CPO1LBEN_Msk)
79 #define TPWM_BRAKE_SOURCE_LEVEL_BKPIN (TIMER_PWMBRKCTL_BRKPLEN_Msk)
80 #define TPWM_BRAKE_SOURCE_LEVEL_SYS_CSS (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_CSSBRKEN_Msk << 16))
81 #define TPWM_BRAKE_SOURCE_LEVEL_SYS_BOD (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_BODBRKEN_Msk << 16))
82 #define TPWM_BRAKE_SOURCE_LEVEL_SYS_COR (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_CORBRKEN_Msk << 16))
83 #define TPWM_BRAKE_SOURCE_LEVEL_SYS_RAM (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_RAMBRKEN_Msk << 16))
85 #define TPWM_BRAKE_EDGE (TIMER_PWMSWBRK_BRKETRG_Msk)
86 #define TPWM_BRAKE_LEVEL (TIMER_PWMSWBRK_BRKLTRG_Msk)
88 /*---------------------------------------------------------------------------------------------------------*/
89 /* Load Mode Constant Definitions */
90 /*---------------------------------------------------------------------------------------------------------*/
91 #define TPWM_LOAD_MODE_PERIOD (0UL)
92 #define TPWM_LOAD_MODE_IMMEDIATE (TIMER_PWMCTL_IMMLDEN_Msk)
93 #define TPWM_LOAD_MODE_CENTER (TIMER_PWMCTL_CTRLD_Msk)
95 /*---------------------------------------------------------------------------------------------------------*/
96 /* Brake Pin De-bounce Clock Source Select Constant Definitions */
97 /*---------------------------------------------------------------------------------------------------------*/
98 #define TPWM_BKP_DBCLK_PCLK_DIV_1 (0UL)
99 #define TPWM_BKP_DBCLK_PCLK_DIV_2 (1UL)
100 #define TPWM_BKP_DBCLK_PCLK_DIV_4 (2UL)
101 #define TPWM_BKP_DBCLK_PCLK_DIV_8 (3UL)
102 #define TPWM_BKP_DBCLK_PCLK_DIV_16 (4UL)
103 #define TPWM_BKP_DBCLK_PCLK_DIV_32 (5UL)
104 #define TPWM_BKP_DBCLK_PCLK_DIV_64 (6UL)
105 #define TPWM_BKP_DBCLK_PCLK_DIV_128 (7UL)
107 /*---------------------------------------------------------------------------------------------------------*/
108 /* Brake Pin Source Select Constant Definitions */
109 /*---------------------------------------------------------------------------------------------------------*/
110 #define TPWM_TM_BRAKE0 (0UL)
111 #define TPWM_TM_BRAKE1 (1UL)
112 #define TPWM_TM_BRAKE2 (2UL)
113 #define TPWM_TM_BRAKE3 (3UL)
115 /*---------------------------------------------------------------------------------------------------------*/
116 /* Counter Clock Source Select Constant Definitions */
117 /*---------------------------------------------------------------------------------------------------------*/
118 #define TPWM_CNTR_CLKSRC_TMR_CLK (0UL)
119 #define TPWM_CNTR_CLKSRC_TIMER0_INT (1UL)
120 #define TPWM_CNTR_CLKSRC_TIMER1_INT (2UL)
121 #define TPWM_CNTR_CLKSRC_TIMER2_INT (3UL)
122 #define TPWM_CNTR_CLKSRC_TIMER3_INT (4UL)
124 /*---------------------------------------------------------------------------------------------------------*/
125 /* Counter Synchronous Mode Constant Definitions */
126 /*---------------------------------------------------------------------------------------------------------*/
127 #define TPWM_CNTR_SYNC_DISABLE (0UL)
128 #define TPWM_CNTR_SYNC_START_BY_TIMER0 ((0<<TIMER_PWMSCTL_SYNCSRC_Pos) | (1<<TIMER_PWMSCTL_SYNCMODE_Pos))
129 #define TPWM_CNTR_SYNC_CLEAR_BY_TIMER0 ((0<<TIMER_PWMSCTL_SYNCSRC_Pos) | (3<<TIMER_PWMSCTL_SYNCMODE_Pos))
130 #define TPWM_CNTR_SYNC_START_BY_TIMER2 ((1<<TIMER_PWMSCTL_SYNCSRC_Pos) | (1<<TIMER_PWMSCTL_SYNCMODE_Pos))
131 #define TPWM_CNTR_SYNC_CLEAR_BY_TIMER2 ((1<<TIMER_PWMSCTL_SYNCSRC_Pos) | (3<<TIMER_PWMSCTL_SYNCMODE_Pos))
133 /* end of group TIMER_PWM_EXPORTED_CONSTANTS */
134
135
151 #define TPWM_ENABLE_PWM_MODE(timer) ((timer)->ALTCTL = (1 << TIMER_ALTCTL_FUNCSEL_Pos))
152
164 #define TPWM_DISABLE_PWM_MODE(timer) ((timer)->ALTCTL = (0 << TIMER_ALTCTL_FUNCSEL_Pos))
165
176 #define TPWM_ENABLE_INDEPENDENT_MODE(timer) ((timer)->PWMCTL &= ~(1 << TIMER_PWMCTL_OUTMODE_Pos))
177
188 #define TPWM_ENABLE_COMPLEMENTARY_MODE(timer) ((timer)->PWMCTL |= (1 << TIMER_PWMCTL_OUTMODE_Pos))
189
204 #define TPWM_SET_COUNTER_TYPE(timer, type) ((timer)->PWMCTL = ((timer)->PWMCTL & ~TIMER_PWMCTL_CNTTYPE_Msk) | (type))
205
216 #define TPWM_START_COUNTER(timer) ((timer)->PWMCTL |= TIMER_PWMCTL_CNTEN_Msk)
217
228 #define TPWM_STOP_COUNTER(timer) ((timer)->PWMPERIOD = 0x0)
229
243 #define TPWM_SET_PRESCALER(timer, prescaler) ((timer)->PWMCLKPSC = (prescaler))
244
255 #define TPWM_GET_PRESCALER(timer) ((timer)->PWMCLKPSC)
256
269 #define TPWM_SET_PERIOD(timer, period) ((timer)->PWMPERIOD = (period))
270
281 #define TPWM_GET_PERIOD(timer) ((timer)->PWMPERIOD)
282
295 #define TPWM_SET_CMPDAT(timer, cmp) ((timer)->PWMCMPDAT = (cmp))
296
307 #define TPWM_GET_CMPDAT(timer) ((timer)->PWMCMPDAT)
308
319 #define TPWM_CLEAR_COUNTER(timer) ((timer)->PWMCNTCLR = TIMER_PWMCNTCLR_CNTCLR_Msk)
320
335 #define TPWM_SW_TRIGGER_BRAKE(timer, type) ((timer)->PWMSWBRK = (type))
336
352 #define TPWM_ENABLE_OUTPUT(timer, ch) ((timer)->PWMPOEN = (ch))
353
369 #define TPWM_SET_OUTPUT_INVERSE(timer, ch) ((timer)->PWMPOLCTL = (ch))
370
388 #define TPWM_SET_MASK_OUTPUT(timer, ch, level) do {(timer)->PWMMSKEN = (ch); (timer)->PWMMSK = (level); }while(0)
389
409 #define TPWM_SET_COUNTER_SYNC_MODE(timer, mode) ((timer)->PWMSCTL = (mode))
410
423 #define TPWM_TRIGGER_COUNTER_SYNC(timer) ((timer)->PWMSTRG = TIMER_PWMSTRG_STRGEN_Msk)
424
435 #define TPWM_ENABLE_ZERO_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_ZIEN_Msk)
436
447 #define TPWM_DISABLE_ZERO_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_ZIEN_Msk)
448
460 #define TPWM_GET_ZERO_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_ZIF_Msk)? 1 : 0)
461
472 #define TPWM_CLEAR_ZERO_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_ZIF_Msk)
473
484 #define TPWM_ENABLE_PERIOD_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_PIEN_Msk)
485
496 #define TPWM_DISABLE_PERIOD_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_PIEN_Msk)
497
509 #define TPWM_GET_PERIOD_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_PIF_Msk)? 1 : 0)
510
521 #define TPWM_CLEAR_PERIOD_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_PIF_Msk)
522
533 #define TPWM_ENABLE_CMP_UP_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_CMPUIEN_Msk)
534
545 #define TPWM_DISABLE_CMP_UP_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_CMPUIEN_Msk)
546
558 #define TPWM_GET_CMP_UP_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_CMPUIF_Msk)? 1 : 0)
559
570 #define TPWM_CLEAR_CMP_UP_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_CMPUIF_Msk)
571
582 #define TPWM_ENABLE_CMP_DOWN_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_CMPDIEN_Msk)
583
594 #define TPWM_DISABLE_CMP_DOWN_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_CMPDIEN_Msk)
595
607 #define TPWM_GET_CMP_DOWN_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_CMPDIF_Msk)? 1 : 0)
608
619 #define TPWM_CLEAR_CMP_DOWN_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_CMPDIF_Msk)
620
632 #define TPWM_GET_REACH_MAX_CNT_STATUS(timer) (((timer)->PWMSTATUS & TIMER_PWMSTATUS_CNTMAXF_Msk)? 1 : 0)
633
644 #define TPWM_CLEAR_REACH_MAX_CNT_STATUS(timer) ((timer)->PWMSTATUS = TIMER_PWMSTATUS_CNTMAXF_Msk)
645
657 #define TPWM_GET_TRG_ADC_STATUS(timer) (((timer)->PWMSTATUS & TIMER_PWMSTATUS_EADCTRGF_Msk)? 1 : 0)
658
669 #define TPWM_CLEAR_TRG_ADC_STATUS(timer) ((timer)->PWMSTATUS = TIMER_PWMSTATUS_EADCTRGF_Msk)
670
682 #define TPWM_SET_BRAKE_PIN_HIGH_DETECT(timer) ((timer)->PWMBNF &= ~TIMER_PWMBNF_BRKPINV_Msk)
683
694 #define TPWM_SET_BRAKE_PIN_LOW_DETECT(timer) ((timer)->PWMBNF |= TIMER_PWMBNF_BRKPINV_Msk)
695
711 #define TPWM_SET_BRAKE_PIN_SOURCE(timer, pin) ((timer)->PWMBNF = ((timer)->PWMBNF & ~TIMER_PWMBNF_BKPINSRC_Msk) | ((pin)<<TIMER_PWMBNF_BKPINSRC_Pos))
712
713
714 void TPWM_SetCounterClockSource(TIMER_T *timer, uint32_t u32CntClkSrc);
715 uint32_t TPWM_ConfigOutputFreqAndDuty(TIMER_T *timer, uint32_t u32Frequency, uint32_t u32DutyCycle);
716 void TPWM_EnableDeadTime(TIMER_T *timer, uint32_t u32DTCount);
717 void TPWM_EnableDeadTimeWithPrescale(TIMER_T *timer, uint32_t u32DTCount);
718 void TPWM_DisableDeadTime(TIMER_T *timer);
719 void TPWM_EnableCounter(TIMER_T *timer);
720 void TPWM_DisableCounter(TIMER_T *timer);
721 void TPWM_EnableTriggerADC(TIMER_T *timer, uint32_t u32Condition);
722 void TPWM_DisableTriggerADC(TIMER_T *timer);
723 void TPWM_EnableFaultBrake(TIMER_T *timer, uint32_t u32CH0Level, uint32_t u32CH1Level, uint32_t u32BrakeSource);
724 void TPWM_EnableFaultBrakeInt(TIMER_T *timer, uint32_t u32IntSource);
725 void TPWM_DisableFaultBrakeInt(TIMER_T *timer, uint32_t u32IntSource);
726 uint32_t TPWM_GetFaultBrakeIntFlag(TIMER_T *timer, uint32_t u32IntSource);
727 void TPWM_ClearFaultBrakeIntFlag(TIMER_T *timer, uint32_t u32IntSource);
728 void TPWM_SetLoadMode(TIMER_T *timer, uint32_t u32LoadMode);
729 void TPWM_EnableBrakePinDebounce(TIMER_T *timer, uint32_t u32BrakePinSrc, uint32_t u32DebounceCnt, uint32_t u32ClkSrcSel);
730 void TPWM_DisableBrakePinDebounce(TIMER_T *timer);
731 void TPWM_EnableBrakePinInverse(TIMER_T *timer);
732 void TPWM_DisableBrakePinInverse(TIMER_T *timer);
733 void TPWM_SetBrakePinSource(TIMER_T *timer, uint32_t u32BrakePinNum);
734 /* end of group TIMER_PWM_EXPORTED_FUNCTIONS */
736 /* end of group TIMER_PWM_Driver */
738 /* end of group Standard_Driver */
740
741 #ifdef __cplusplus
742 }
743 #endif
744
745 #endif /* __TIMER_PWM_H__ */
746
TPWM_DisableBrakePinInverse
void TPWM_DisableBrakePinInverse(TIMER_T *timer)
Disable brake pin inverse function.
Definition: timer_pwm.c:415
TPWM_EnableTriggerADC
void TPWM_EnableTriggerADC(TIMER_T *timer, uint32_t u32Condition)
Enable Trigger ADC.
Definition: timer_pwm.c:197
TPWM_DisableTriggerADC
void TPWM_DisableTriggerADC(TIMER_T *timer)
Disable Trigger ADC.
Definition: timer_pwm.c:211
TPWM_DisableDeadTime
void TPWM_DisableDeadTime(TIMER_T *timer)
Disable Dead-Time Function.
Definition: timer_pwm.c:149
TPWM_SetCounterClockSource
void TPWM_SetCounterClockSource(TIMER_T *timer, uint32_t u32CntClkSrc)
Set PWM Counter Clock Source.
Definition: timer_pwm.c:38
TPWM_DisableBrakePinDebounce
void TPWM_DisableBrakePinDebounce(TIMER_T *timer)
Disable brake pin noise filter function.
Definition: timer_pwm.c:392
TPWM_SetBrakePinSource
void TPWM_SetBrakePinSource(TIMER_T *timer, uint32_t u32BrakePinNum)
Set brake pin source.
Definition: timer_pwm.c:431
TPWM_DisableFaultBrakeInt
void TPWM_DisableFaultBrakeInt(TIMER_T *timer, uint32_t u32IntSource)
Disable Fault Brake Interrupt.
Definition: timer_pwm.c:289
TPWM_EnableFaultBrake
void TPWM_EnableFaultBrake(TIMER_T *timer, uint32_t u32CH0Level, uint32_t u32CH1Level, uint32_t u32BrakeSource)
Enable Fault Brake Function.
Definition: timer_pwm.c:251
TPWM_SetLoadMode
void TPWM_SetLoadMode(TIMER_T *timer, uint32_t u32LoadMode)
Enable load mode of selected channel.
Definition: timer_pwm.c:345
TPWM_EnableBrakePinInverse
void TPWM_EnableBrakePinInverse(TIMER_T *timer)
Enable brake pin inverse function.
Definition: timer_pwm.c:404
TPWM_ClearFaultBrakeIntFlag
void TPWM_ClearFaultBrakeIntFlag(TIMER_T *timer, uint32_t u32IntSource)
Clear Fault Brake Interrupt Flags.
Definition: timer_pwm.c:326
TPWM_EnableCounter
void TPWM_EnableCounter(TIMER_T *timer)
Enable PWM Counter.
Definition: timer_pwm.c:163
TPWM_ConfigOutputFreqAndDuty
uint32_t TPWM_ConfigOutputFreqAndDuty(TIMER_T *timer, uint32_t u32Frequency, uint32_t u32DutyCycle)
Configure PWM Output Frequency and Duty Cycle.
Definition: timer_pwm.c:55
TPWM_GetFaultBrakeIntFlag
uint32_t TPWM_GetFaultBrakeIntFlag(TIMER_T *timer, uint32_t u32IntSource)
Indicate Fault Brake Interrupt Flag.
Definition: timer_pwm.c:308
TPWM_DisableCounter
void TPWM_DisableCounter(TIMER_T *timer)
Disable PWM Generator.
Definition: timer_pwm.c:177
TPWM_EnableDeadTimeWithPrescale
void TPWM_EnableDeadTimeWithPrescale(TIMER_T *timer, uint32_t u32DTCount)
Enable Dead-Time Function.
Definition: timer_pwm.c:134
TIMER_T
Definition: timer_reg.h:26
TPWM_EnableDeadTime
void TPWM_EnableDeadTime(TIMER_T *timer, uint32_t u32DTCount)
Enable Dead-Time Function.
Definition: timer_pwm.c:118
TPWM_EnableFaultBrakeInt
void TPWM_EnableFaultBrakeInt(TIMER_T *timer, uint32_t u32IntSource)
Enable Fault Brake Interrupt.
Definition: timer_pwm.c:271
TPWM_EnableBrakePinDebounce
void TPWM_EnableBrakePinDebounce(TIMER_T *timer, uint32_t u32BrakePinSrc, uint32_t u32DebounceCnt, uint32_t u32ClkSrcSel)
Enable brake pin noise filter function.
Definition: timer_pwm.c:375