| M480 BSP V3.05.001 The Board Support Package for M480 Series

can_reg.h
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1 /**************************************************************************/
9 #ifndef __CAN_REG_H__
10 #define __CAN_REG_H__
11
12 #if defined ( __CC_ARM )
13 #pragma anon_unions
14 #endif
15
27 typedef struct
28 {
29
533 __IO uint32_t CREQ;
534 __IO uint32_t CMASK;
535 __IO uint32_t MASK1;
536 __IO uint32_t MASK2;
537 __IO uint32_t ARB1;
538 __IO uint32_t ARB2;
539 __IO uint32_t MCON;
540 __IO uint32_t DAT_A1;
541 __IO uint32_t DAT_A2;
542 __IO uint32_t DAT_B1;
543 __IO uint32_t DAT_B2;
544 __I uint32_t RESERVE0[13];
547 } CAN_IF_T;
548
549
550 typedef struct
551 {
552
553
1081 __IO uint32_t CON;
1082 __IO uint32_t STATUS;
1083 __I uint32_t ERR;
1084 __IO uint32_t BTIME;
1085 __I uint32_t IIDR;
1086 __IO uint32_t TEST;
1087 __IO uint32_t BRPE;
1088 __I uint32_t RESERVE0[1];
1091 __IO CAN_IF_T IF[2];
1093 __I uint32_t RESERVE2[8];
1095 __I uint32_t TXREQ1;
1096 __I uint32_t TXREQ2;
1097 __I uint32_t RESERVE3[6];
1100 __I uint32_t NDAT1;
1101 __I uint32_t NDAT2;
1102 __I uint32_t RESERVE4[6];
1105 __I uint32_t IPND1;
1106 __I uint32_t IPND2;
1107 __I uint32_t RESERVE5[6];
1110 __I uint32_t MVLD1;
1111 __I uint32_t MVLD2;
1112 __IO uint32_t WU_EN;
1113 __IO uint32_t WU_STATUS;
1115 } CAN_T;
1116
1122 #define CAN_CON_INIT_Pos (0)
1123 #define CAN_CON_INIT_Msk (0x1ul << CAN_CON_INIT_Pos)
1125 #define CAN_CON_IE_Pos (1)
1126 #define CAN_CON_IE_Msk (0x1ul << CAN_CON_IE_Pos)
1128 #define CAN_CON_SIE_Pos (2)
1129 #define CAN_CON_SIE_Msk (0x1ul << CAN_CON_SIE_Pos)
1131 #define CAN_CON_EIE_Pos (3)
1132 #define CAN_CON_EIE_Msk (0x1ul << CAN_CON_EIE_Pos)
1134 #define CAN_CON_DAR_Pos (5)
1135 #define CAN_CON_DAR_Msk (0x1ul << CAN_CON_DAR_Pos)
1137 #define CAN_CON_CCE_Pos (6)
1138 #define CAN_CON_CCE_Msk (0x1ul << CAN_CON_CCE_Pos)
1140 #define CAN_CON_TEST_Pos (7)
1141 #define CAN_CON_TEST_Msk (0x1ul << CAN_CON_TEST_Pos)
1143 #define CAN_STATUS_LEC_Pos (0)
1144 #define CAN_STATUS_LEC_Msk (0x7ul << CAN_STATUS_LEC_Pos)
1146 #define CAN_STATUS_TXOK_Pos (3)
1147 #define CAN_STATUS_TXOK_Msk (0x1ul << CAN_STATUS_TXOK_Pos)
1149 #define CAN_STATUS_RXOK_Pos (4)
1150 #define CAN_STATUS_RXOK_Msk (0x1ul << CAN_STATUS_RXOK_Pos)
1152 #define CAN_STATUS_EPASS_Pos (5)
1153 #define CAN_STATUS_EPASS_Msk (0x1ul << CAN_STATUS_EPASS_Pos)
1155 #define CAN_STATUS_EWARN_Pos (6)
1156 #define CAN_STATUS_EWARN_Msk (0x1ul << CAN_STATUS_EWARN_Pos)
1158 #define CAN_STATUS_BOFF_Pos (7)
1159 #define CAN_STATUS_BOFF_Msk (0x1ul << CAN_STATUS_BOFF_Pos)
1161 #define CAN_ERR_TEC_Pos (0)
1162 #define CAN_ERR_TEC_Msk (0xfful << CAN_ERR_TEC_Pos)
1164 #define CAN_ERR_REC_Pos (8)
1165 #define CAN_ERR_REC_Msk (0x7ful << CAN_ERR_REC_Pos)
1167 #define CAN_ERR_RP_Pos (15)
1168 #define CAN_ERR_RP_Msk (0x1ul << CAN_ERR_RP_Pos)
1170 #define CAN_BTIME_BRP_Pos (0)
1171 #define CAN_BTIME_BRP_Msk (0x3ful << CAN_BTIME_BRP_Pos)
1173 #define CAN_BTIME_SJW_Pos (6)
1174 #define CAN_BTIME_SJW_Msk (0x3ul << CAN_BTIME_SJW_Pos)
1176 #define CAN_BTIME_TSEG1_Pos (8)
1177 #define CAN_BTIME_TSEG1_Msk (0xful << CAN_BTIME_TSEG1_Pos)
1179 #define CAN_BTIME_TSEG2_Pos (12)
1180 #define CAN_BTIME_TSEG2_Msk (0x7ul << CAN_BTIME_TSEG2_Pos)
1182 #define CAN_IIDR_IntId_Pos (0)
1183 #define CAN_IIDR_IntId_Msk (0xfffful << CAN_IIDR_IntId_Pos)
1185 #define CAN_TEST_BASIC_Pos (2)
1186 #define CAN_TEST_BASIC_Msk (0x1ul << CAN_TEST_BASIC_Pos)
1188 #define CAN_TEST_SILENT_Pos (3)
1189 #define CAN_TEST_SILENT_Msk (0x1ul << CAN_TEST_SILENT_Pos)
1191 #define CAN_TEST_LBACK_Pos (4)
1192 #define CAN_TEST_LBACK_Msk (0x1ul << CAN_TEST_LBACK_Pos)
1194 #define CAN_TEST_Tx_Pos (5)
1195 #define CAN_TEST_Tx_Msk (0x3ul << CAN_TEST_Tx_Pos)
1197 #define CAN_TEST_Rx_Pos (7)
1198 #define CAN_TEST_Rx_Msk (0x1ul << CAN_TEST_Rx_Pos)
1200 #define CAN_BRPE_BRPE_Pos (0)
1201 #define CAN_BRPE_BRPE_Msk (0xful << CAN_BRPE_BRPE_Pos)
1203 #define CAN_IF_CREQ_MSGNUM_Pos (0)
1204 #define CAN_IF_CREQ_MSGNUM_Msk (0x3ful << CAN_IF_CREQ_MSGNUM_Pos)
1206 #define CAN_IF_CREQ_BUSY_Pos (15)
1207 #define CAN_IF_CREQ_BUSY_Msk (0x1ul << CAN_IF_CREQ_BUSY_Pos)
1209 #define CAN_IF_CMASK_DATAB_Pos (0)
1210 #define CAN_IF_CMASK_DATAB_Msk (0x1ul << CAN_IF_CMASK_DATAB_Pos)
1212 #define CAN_IF_CMASK_DATAA_Pos (1)
1213 #define CAN_IF_CMASK_DATAA_Msk (0x1ul << CAN_IF_CMASK_DATAA_Pos)
1215 #define CAN_IF_CMASK_TXRQSTNEWDAT_Pos (2)
1216 #define CAN_IF_CMASK_TXRQSTNEWDAT_Msk (0x1ul << CAN_IF_CMASK_TXRQSTNEWDAT_Pos)
1218 #define CAN_IF_CMASK_CLRINTPND_Pos (3)
1219 #define CAN_IF_CMASK_CLRINTPND_Msk (0x1ul << CAN_IF_CMASK_CLRINTPND_Pos)
1221 #define CAN_IF_CMASK_CONTROL_Pos (4)
1222 #define CAN_IF_CMASK_CONTROL_Msk (0x1ul << CAN_IF_CMASK_CONTROL_Pos)
1224 #define CAN_IF_CMASK_ARB_Pos (5)
1225 #define CAN_IF_CMASK_ARB_Msk (0x1ul << CAN_IF_CMASK_ARB_Pos)
1227 #define CAN_IF_CMASK_MASK_Pos (6)
1228 #define CAN_IF_CMASK_MASK_Msk (0x1ul << CAN_IF_CMASK_MASK_Pos)
1230 #define CAN_IF_CMASK_WRRD_Pos (7)
1231 #define CAN_IF_CMASK_WRRD_Msk (0x1ul << CAN_IF_CMASK_WRRD_Pos)
1233 #define CAN_IF_MASK1_Msk_Pos (0)
1234 #define CAN_IF_MASK1_Msk_Msk (0xfffful << CAN_IF_MASK1_Msk_Pos)
1236 #define CAN_IF_MASK2_Msk_Pos (0)
1237 #define CAN_IF_MASK2_Msk_Msk (0x1ffful << CAN_IF_MASK2_Msk_Pos)
1239 #define CAN_IF_MASK2_MDIR_Pos (14)
1240 #define CAN_IF_MASK2_MDIR_Msk (0x1ul << CAN_IF_MASK2_MDIR_Pos)
1242 #define CAN_IF_MASK2_MXTD_Pos (15)
1243 #define CAN_IF_MASK2_MXTD_Msk (0x1ul << CAN_IF_MASK2_MXTD_Pos)
1245 #define CAN_IF_ARB1_ID_Pos (0)
1246 #define CAN_IF_ARB1_ID_Msk (0xfffful << CAN_IF_ARB1_ID_Pos)
1248 #define CAN_IF_ARB2_ID_Pos (0)
1249 #define CAN_IF_ARB2_ID_Msk (0x1ffful << CAN_IF_ARB2_ID_Pos)
1251 #define CAN_IF_ARB2_DIR_Pos (13)
1252 #define CAN_IF_ARB2_DIR_Msk (0x1ul << CAN_IF_ARB2_DIR_Pos)
1254 #define CAN_IF_ARB2_XTD_Pos (14)
1255 #define CAN_IF_ARB2_XTD_Msk (0x1ul << CAN_IF_ARB2_XTD_Pos)
1257 #define CAN_IF_ARB2_MSGVAL_Pos (15)
1258 #define CAN_IF_ARB2_MSGVAL_Msk (0x1ul << CAN_IF_ARB2_MSGVAL_Pos)
1260 #define CAN_IF_MCON_DLC_Pos (0)
1261 #define CAN_IF_MCON_DLC_Msk (0xful << CAN_IF_MCON_DLC_Pos)
1263 #define CAN_IF_MCON_EOB_Pos (7)
1264 #define CAN_IF_MCON_EOB_Msk (0x1ul << CAN_IF_MCON_EOB_Pos)
1266 #define CAN_IF_MCON_TxRqst_Pos (8)
1267 #define CAN_IF_MCON_TxRqst_Msk (0x1ul << CAN_IF_MCON_TxRqst_Pos)
1269 #define CAN_IF_MCON_RmtEn_Pos (9)
1270 #define CAN_IF_MCON_RmtEn_Msk (0x1ul << CAN_IF_MCON_RmtEn_Pos)
1272 #define CAN_IF_MCON_RXIE_Pos (10)
1273 #define CAN_IF_MCON_RXIE_Msk (0x1ul << CAN_IF_MCON_RXIE_Pos)
1275 #define CAN_IF_MCON_TXIE_Pos (11)
1276 #define CAN_IF_MCON_TXIE_Msk (0x1ul << CAN_IF_MCON_TXIE_Pos)
1278 #define CAN_IF_MCON_UMASK_Pos (12)
1279 #define CAN_IF_MCON_UMASK_Msk (0x1ul << CAN_IF_MCON_UMASK_Pos)
1281 #define CAN_IF_MCON_IntPnd_Pos (13)
1282 #define CAN_IF_MCON_IntPnd_Msk (0x1ul << CAN_IF_MCON_IntPnd_Pos)
1284 #define CAN_IF_MCON_MsgLst_Pos (14)
1285 #define CAN_IF_MCON_MsgLst_Msk (0x1ul << CAN_IF_MCON_MsgLst_Pos)
1287 #define CAN_IF_MCON_NEWDAT_Pos (15)
1288 #define CAN_IF_MCON_NEWDAT_Msk (0x1ul << CAN_IF_MCON_NEWDAT_Pos)
1290 #define CAN_IF_DAT_A1_DATA0_Pos (0)
1291 #define CAN_IF_DAT_A1_DATA0_Msk (0xfful << CAN_IF_DAT_A1_DATA0_Pos)
1293 #define CAN_IF_DAT_A1_DATA1_Pos (8)
1294 #define CAN_IF_DAT_A1_DATA1_Msk (0xfful << CAN_IF_DAT_A1_DATA1_Pos)
1296 #define CAN_IF_DAT_A2_DATA2_Pos (0)
1297 #define CAN_IF_DAT_A2_DATA2_Msk (0xfful << CAN_IF_DAT_A2_DATA2_Pos)
1299 #define CAN_IF_DAT_A2_DATA3_Pos (8)
1300 #define CAN_IF_DAT_A2_DATA3_Msk (0xfful << CAN_IF_DAT_A2_DATA3_Pos)
1302 #define CAN_IF_DAT_B1_DATA4_Pos (0)
1303 #define CAN_IF_DAT_B1_DATA4_Msk (0xfful << CAN_IF_DAT_B1_DATA4_Pos)
1305 #define CAN_IF_DAT_B1_DATA5_Pos (8)
1306 #define CAN_IF_DAT_B1_DATA5_Msk (0xfful << CAN_IF_DAT_B1_DATA5_Pos)
1308 #define CAN_IF_DAT_B2_DATA6_Pos (0)
1309 #define CAN_IF_DAT_B2_DATA6_Msk (0xfful << CAN_IF_DAT_B2_DATA6_Pos)
1311 #define CAN_IF_DAT_B2_DATA7_Pos (8)
1312 #define CAN_IF_DAT_B2_DATA7_Msk (0xfful << CAN_IF_DAT_B2_DATA7_Pos)
1314 #define CAN_TXREQ1_TXRQST16_1_Pos (0)
1315 #define CAN_TXREQ1_TXRQST16_1_Msk (0xfffful << CAN_TXREQ1_TXRQST16_1_Pos)
1317 #define CAN_TXREQ2_TXRQST32_17_Pos (0)
1318 #define CAN_TXREQ2_TXRQST32_17_Msk (0xfffful << CAN_TXREQ2_TXRQST32_17_Pos)
1320 #define CAN_NDAT1_NewData16_1_Pos (0)
1321 #define CAN_NDAT1_NewData16_1_Msk (0xfffful << CAN_NDAT1_NewData16_1_Pos)
1323 #define CAN_NDAT2_NewData32_17_Pos (0)
1324 #define CAN_NDAT2_NewData32_17_Msk (0xfffful << CAN_NDAT2_NewData32_17_Pos)
1326 #define CAN_IPND1_IntPnd16_1_Pos (0)
1327 #define CAN_IPND1_IntPnd16_1_Msk (0xfffful << CAN_IPND1_IntPnd16_1_Pos)
1329 #define CAN_IPND2_IntPnd32_17_Pos (0)
1330 #define CAN_IPND2_IntPnd32_17_Msk (0xfffful << CAN_IPND2_IntPnd32_17_Pos)
1332 #define CAN_MVLD1_MsgVal16_1_Pos (0)
1333 #define CAN_MVLD1_MsgVal16_1_Msk (0xfffful << CAN_MVLD1_MsgVal16_1_Pos)
1335 #define CAN_MVLD2_MsgVal32_17_Pos (0)
1336 #define CAN_MVLD2_MsgVal32_17_Msk (0xfffful << CAN_MVLD2_MsgVal32_17_Pos)
1338 #define CAN_WU_EN_WAKUP_EN_Pos (0)
1339 #define CAN_WU_EN_WAKUP_EN_Msk (0x1ul << CAN_WU_EN_WAKUP_EN_Pos)
1341 #define CAN_WU_STATUS_WAKUP_STS_Pos (0)
1342 #define CAN_WU_STATUS_WAKUP_STS_Msk (0x1ul << CAN_WU_STATUS_WAKUP_STS_Pos) /* CAN_CONST */
1345 /* end of CAN register group */ /* end of REGISTER group */
1347
1348 #if defined ( __CC_ARM )
1349 #pragma no_anon_unions
1350 #endif
1351
1352 #endif /* __CAN_REG_H__ */
CAN_T::NDAT2
__I uint32_t NDAT2
Definition: can_reg.h:1101
CAN_IF_T
Definition: can_reg.h:27
CAN_T::ERR
__I uint32_t ERR
Definition: can_reg.h:1083
CAN_T::BTIME
__IO uint32_t BTIME
Definition: can_reg.h:1084
CAN_T::MVLD2
__I uint32_t MVLD2
Definition: can_reg.h:1111
CAN_IF_T::DAT_B1
__IO uint32_t DAT_B1
Definition: can_reg.h:542
CAN_T::TEST
__IO uint32_t TEST
Definition: can_reg.h:1086
CAN_IF_T::CREQ
__IO uint32_t CREQ
Definition: can_reg.h:533
CAN_T::STATUS
__IO uint32_t STATUS
Definition: can_reg.h:1082
CAN_T::NDAT1
__I uint32_t NDAT1
Definition: can_reg.h:1100
CAN_T::WU_STATUS
__IO uint32_t WU_STATUS
Definition: can_reg.h:1113
CAN_T::MVLD1
__I uint32_t MVLD1
Definition: can_reg.h:1110
CAN_IF_T::DAT_A2
__IO uint32_t DAT_A2
Definition: can_reg.h:541
CAN_IF_T::MCON
__IO uint32_t MCON
Definition: can_reg.h:539
CAN_IF_T::DAT_A1
__IO uint32_t DAT_A1
Definition: can_reg.h:540
CAN_T::IPND1
__I uint32_t IPND1
Definition: can_reg.h:1105
CAN_IF_T::DAT_B2
__IO uint32_t DAT_B2
Definition: can_reg.h:543
CAN_IF_T::MASK2
__IO uint32_t MASK2
Definition: can_reg.h:536
CAN_T::TXREQ2
__I uint32_t TXREQ2
Definition: can_reg.h:1096
CAN_IF_T::CMASK
__IO uint32_t CMASK
Definition: can_reg.h:534
CAN_T::WU_EN
__IO uint32_t WU_EN
Definition: can_reg.h:1112
CAN_T
Definition: can_reg.h:550
CAN_T::IIDR
__I uint32_t IIDR
Definition: can_reg.h:1085
CAN_IF_T::ARB1
__IO uint32_t ARB1
Definition: can_reg.h:537
CAN_T::TXREQ1
__I uint32_t TXREQ1
Definition: can_reg.h:1095
CAN_T::BRPE
__IO uint32_t BRPE
Definition: can_reg.h:1087
CAN_IF_T::MASK1
__IO uint32_t MASK1
Definition: can_reg.h:535
CAN_T::IPND2
__I uint32_t IPND2
Definition: can_reg.h:1106
CAN_IF_T::ARB2
__IO uint32_t ARB2
Definition: can_reg.h:538
CAN_T::CON
__IO uint32_t CON
Definition: can_reg.h:1081