| M480 BSP V3.05.001 The Board Support Package for M480 Series

Data Fields
CCAP_T Struct Reference
Control Register

`#include <ccap_reg.h>`

## Data Fields
__IO uint32_t | CTL
__IO uint32_t | PAR
__IO uint32_t | INT
__IO uint32_t | POSTERIZE
__IO uint32_t | MD
__IO uint32_t | MDADDR
__IO uint32_t | MDYADDR
__IO uint32_t | SEPIA
__IO uint32_t | CWSP
__IO uint32_t | CWS
__IO uint32_t | PKTSL
__IO uint32_t | PLNSL
__IO uint32_t | FRCTL
__IO uint32_t | STRIDE
__IO uint32_t | FIFOTH
__IO uint32_t | CMPADDR
__IO uint32_t | LUMA_Y1_THD
__IO uint32_t | PKTSM
__IO uint32_t | PKTBA0

## Detailed Description

    @addtogroup CCAP Camera Capture Interface Controller (CCAP)
    Memory Mapped Structure for CCAP Controller

Definition at line 27 of file ccap_reg.h.

## Field Documentation

## ◆ CMPADDR

CCAP_T::CMPADDR

CMPADDR

Offset: 0x40 Compare Memory Base Address Register

Bits | Field | Descriptions
[0:31] | CMPADDR | Compare Memory Base Address Word aligns address; ignore the bits [1:0].

Definition at line 709 of file ccap_reg.h.

## ◆ CTL

CCAP_T::CTL

CTL

Offset: 0x00 Camera Capture Interface Control Register

Bits | Field | Descriptions
[0] | CCAPEN | Camera Capture Interface Enable 0 = Camera Capture Interface Disabled. 1 = Camera Capture Interface Enabled.
[3] | ADDRSW | Packet Buffer Address Switch 0 = Packet buffer address switch Disabled. 1 = Packet buffer address switch Enabled.
[6] | PKTEN | Packet Output Enable 0 = Packet output Disabled. 1 = Packet output Enabled.
[7] | MONO | Monochrome CMOS Sensor Select 0 = Color CMOS Sensor. 1 = Monochrome CMOS Sensor. The U/V components are ignored when the MONO is enabled.
[16] | SHUTTER | Image Capture Interface Automatically Disable The Capture Interface After A Frame Had Been Captured 0 = Shutter Disabled. 1 = Shutter Enabled.
[20] | UPDATE | Update Register At New Frame 0 = Update register at new frame Disabled. 1 = Update register at new frame Enabled (Auto clear to 0 when register updated).
[24] | VPRST | Capture Interface Reset 0 = Capture interface reset Disabled. 1 = Capture interface reset Enabled.

Definition at line 691 of file ccap_reg.h.

## ◆ CWS

CCAP_T::CWS

CWS

Offset: 0x24 Cropping Window Size Register

Bits | Field | Descriptions
[0:11] | CIWW | Cropping Image Window Width
[16:26] | CIWH | Cropping Image Window Height

Definition at line 700 of file ccap_reg.h.

## ◆ CWSP

CCAP_T::CWSP

CWSP

Offset: 0x20 Cropping Window Starting Address Register

Bits | Field | Descriptions
[0:11] | CWSADDRH | Cropping Window Horizontal Starting Address
[16:26] | CWSADDRV | Cropping Window Vertical Starting Address

Definition at line 699 of file ccap_reg.h.

## ◆ FIFOTH

CCAP_T::FIFOTH

FIFOTH

Offset: 0x3C FIFO Threshold Register

Bits | Field | Descriptions
[0:3] | PLNVFTH | Planar V FIFO Threshold
[8:11] | PLNUFTH | Planar U FIFO Threshold
[16:20] | PLNYFTH | Planar Y FIFO Threshold
[24:28] | PKTFTH | Packet FIFO Threshold
[31] | OVF | FIFO Overflow Flag

Definition at line 708 of file ccap_reg.h.

## ◆ FRCTL

CCAP_T::FRCTL

FRCTL

Offset: 0x30 Scaling Frame Rate Factor Register

Bits | Field | Descriptions
[0:5] | FRM | Scaling Frame Rate Factor M Specify the denominator part (M) of the frame rate scaling factor. The output image frame rate will be equal to input image frame rate * (N/M). Note: The value of N must be equal to or less than M.
[8:13] | FRN | Scaling Frame Rate Factor N Specify the denominator part (N) of the frame rate scaling factor.

Definition at line 703 of file ccap_reg.h.

## ◆ INT

CCAP_T::INT

INT

Offset: 0x08 Camera Capture Interface Interrupt Register

Bits | Field | Descriptions
[0] | VINTF | Video Frame End Interrupt If this bit shows 1, receiving a frame completed. Write 1 to clear it.
[1] | MEINTF | Bus Master Transfer Error Interrupt If this bit shows 1, Transfer Error occurred. Write 1 to clear it.
[3] | ADDRMINTF | Memory Address Match Interrupt If this bit shows 1, Memory Address Match Interrupt occurred. Write 1 to clear it.
[4] | MDINTF | Motion Detection Output Finish Interrupt If this bit shows 1, Motion Detection Output Finish Interrupt occurred. Write 1 to clear it.
[16] | VIEN | Video Frame End Interrupt Enable 0 = Video frame end interrupt Disabled. 1 = Video frame end interrupt Enabled.
[17] | MEIEN | System Memory Error Interrupt Enable 0 = System memory error interrupt Disabled. 1 = System memory error interrupt Enabled.
[19] | ADDRMIEN | Address Match Interrupt Enable 0 = Address match interrupt Disabled. 1 = Address match interrupt Enabled.

Definition at line 693 of file ccap_reg.h.

## ◆ LUMA_Y1_THD

CCAP_T::LUMA_Y1_THD

LUMA_Y1_THD

Offset: 0x44 Luminance Y8 to Y1 Threshold Value Register

Bits | Field | Descriptions
[0:8] | LUMA_Y1_THRESH | Luminance Y8 to Y1 Threshold Value |Specify the 8-bit threshold value for the luminance Y bit-8 to the luminance Y 1-bit conversion.

Definition at line 710 of file ccap_reg.h.

## ◆ MD

CCAP_T::MD

MD

Offset: 0x10 Motion Detection Register

Bits | Field | Descriptions
[0] | MDEN | Motion Detection Enable 0 = CCAP_MD Disabled. 1 = CCAP_MD Enabled.
[8] | MDBS | Motion Detection Block Size 0 = 16x16. 1 = 8x8.
[9] | MDSM | Motion Detection Save Mode 0 = 1 bit DIFF + 7 bit Y Differential. 1 = 1 bit DIFF only.
[10:11] | MDDF | Motion Detection Detect Frequency 00 = Each frame. 01 = Every 2 frame. 10 = Every 3 frame. 11 = Every 4 frame.
[16:20] | MDTHR | Motion Detection Differential Threshold

Definition at line 695 of file ccap_reg.h.

## ◆ MDADDR

CCAP_T::MDADDR

MDADDR

Offset: 0x14 Motion Detection Output Address Register

Bits | Field | Descriptions
[0:31] | MDADDR | Motion Detection Output Address Register (Word Alignment)

Definition at line 696 of file ccap_reg.h.

## ◆ MDYADDR

CCAP_T::MDYADDR

MDYADDR

Offset: 0x18 Motion Detection Temp Y Output Address Register

Bits | Field | Descriptions
[0:31] | MDYADDR | Motion Detection Temp Y Output Address Register (Word Alignment)

Definition at line 697 of file ccap_reg.h.

## ◆ PAR

CCAP_T::PAR

PAR

Offset: 0x04 Camera Capture Interface Parameter Register

Bits | Field | Descriptions
[0] | INFMT | Sensor Input Data Format 0 = YCbCr422. 1 = RGB565.
[1] | SENTYPE | Sensor Input Type 0 = CCIR601. 1 = CCIR656, VSync & Hsync embedded in the data signal.
[2:3] | INDATORD | Sensor Input Data Order If INFMT = 0 (YCbCr),. Byte 0 1 2 3 00 = Y0 U0 Y1 V0. 01 = Y0 V0 Y1 U0. 10 = U0 Y0 V0 Y1. 11 = V0 Y0 U0 Y1. If INFMT = 1 (RGB565),. 00 = Byte0[R[4:0] G[5:3]] Byte1[G[2:0] B[4:0]] 01 = Byte0[B[4:0] G[5:3]] Byte1[G[2:0] R[4:0]] 10 = Byte0[G[2:0] B[4:0]] Byte1[R[4:0] G[5:3]] 11 = Byte0[G[2:0] R[4:0]] Byte1[B[4:0] G[5:3]]
[4:5] | OUTFMT | Image Data Format Output To System Memory 00 = YCbCr422. 01 = Only output Y. 10 = RGB555. 11 = RGB565.
[6] | RANGE | Scale Input YUV CCIR601 Color Range To Full Range 0 = default. 1 = Scale to full range.
[8] | PCLKP | Sensor Pixel Clock Polarity 0 = Input video data and signals are latched by falling edge of Pixel Clock. 1 = Input video data and signals are latched by rising edge of Pixel Clock.
[9] | HSP | Sensor Hsync Polarity 0 = Sync Low. 1 = Sync High.
[10] | VSP | Sensor Vsync Polarity 0 = Sync Low. 1 = Sync High.
[18] | FBB | Field By Blank Hardware will tag field0 or field1 by vertical blanking instead of FIELD flag in CCIR-656 mode. 0 = Field by blank Disabled. 1 = Field by blank Enabled.

Definition at line 692 of file ccap_reg.h.

## ◆ PKTBA0

CCAP_T::PKTBA0

PKTBA0

Offset: 0x60 System Memory Packet Base Address 0 Register

Bits | Field | Descriptions
[0:31] | BASEADDR | System Memory Packet Base Address 0 Word aligns address; ignore the bits [1:0].

Definition at line 715 of file ccap_reg.h.

## ◆ PKTSL

CCAP_T::PKTSL

PKTSL

Offset: 0x28 Packet Scaling Vertical/Horizontal Factor Register (LSB)

Bits | Field | Descriptions
[0:7] | PKTSHML | Packet Scaling Horizontal Factor M (Lower 8-Bit) Specifies the lower 8-bit of denominator part (M) of the horizontal scaling factor. The lower 8-bit will be cascaded with higher 8-bit (PKDSHMH) to form a 16-bit denominator (M) of vertical factor. The output image width will be equal to the image width * N/M. Note: The value of N must be equal to or less than M.
[8:15] | PKTSHNL | Packet Scaling Horizontal Factor N (Lower 8-Bit) Specify the lower 8-bit of numerator part (N) of the horizontal scaling factor. The lower 8-bit will be cascaded with higher 8-bit (PKDSHNH) to form a 16-bit numerator of horizontal factor.
[16:23] | PKTSVML | Packet Scaling Vertical Factor M (Lower 8-Bit) Specify the lower 8-bit of denominator part (M) of the vertical scaling factor. The lower 8-bit will be cascaded with higher 8-bit (PKDSVMH) to form a 16-bit denominator (M) of vertical factor. The output image width will be equal to the image height * N/M. Note: The value of N must be equal to or less than M.
[24:31] | PKTSVNL | Packet Scaling Vertical Factor N (Lower 8-Bit) Specify the lower 8-bit of numerator part (N) of the vertical scaling factor. The lower 8-bit will be cascaded with higher 8-bit (PKDSVNH) to form a 16-bit numerator of vertical factor

Definition at line 701 of file ccap_reg.h.

## ◆ PKTSM

CCAP_T::PKTSM

PKTSM

Offset: 0x48 Packet Scaling Vertical/Horizontal Factor Register (MSB)

Bits | Field | Descriptions
[0:7] | PKTSHMH | Packet Scaling Horizontal Factor M (Higher 8-Bit) Specify the lower 8-bit of denominator part (M) of the horizontal scaling factor. Please refer to the register CCAP_PKTSL?for the detailed operation.
[8:15] | PKTSHNH | Packet Scaling Horizontal Factor N (Higher 8-Bit) Specify the lower 8-bit of numerator part (N) of the horizontal scaling factor. Please refer to the register CCAP_PKTSL for the detailed operation.
[16:23] | PKTSVMH | Packet Scaling Vertical Factor M (Higher 8-Bit) Specify the lower 8-bit of denominator part (M) of the vertical scaling factor. Please refer to the register CCAP_PKTSL to check the cooperation between these two registers.
[24:31] | PKTSVNH | Packet Scaling Vertical Factor N (Higher 8-Bit) Specify the higher 8-bit of numerator part (N) of the vertical scaling factor. Please refer to the register CCAP_PKTSL?to check the cooperation between these two registers.

Definition at line 711 of file ccap_reg.h.

## ◆ PLNSL

CCAP_T::PLNSL

PLNSL

Offset: 0x2C Planar Scaling Vertical/Horizontal Factor Register (LSB)

Bits | Field | Descriptions
[0:7] | PLNSHML | Planar Scaling Horizontal Factor M (Lower 8-Bit) Specify the lower 8-bit of denominator part (M) of the horizontal scaling factor. The lower 8-bit will be cascaded with higher 8-bit (PNDSHMH) to form a 16-bit denominator (M) of vertical factor. The output image width will be equal to the image width * N/M. Note: The value of N must be equal to or less than M.
[8:15] | PLNSHNL | Planar Scaling Horizontal Factor N (Lower 8-Bit) Specify the lower 8-bit of numerator part (N) of the horizontal scaling factor. The lower 8-bit will be cascaded with higher 8-bit (PNDSHNH) to form a 16-bit numerator of horizontal factor.
[16:23] | PLNSVML | Planar Scaling Vertical Factor M (Lower 8-Bit) Specify the lower 8-bit of denominator part (M) of the vertical scaling factor. The lower 8-bit will be cascaded with higher 8-bit (PNDSVMH) to form a 16-bit denominator (M) of vertical factor. The output image width will be equal to the image height * N/M. Note: The value of N must be equal to or less than M.
[24:31] | PLNSVNL | Planar Scaling Vertical Factor N (Lower 8-Bit) Specify the lower 8-bit of numerator part (N) of the vertical scaling factor. The lower 8-bit will be cascaded with higher 8-bit (PNDSVNH) to form a 16-bit numerator of vertical factor.

Definition at line 702 of file ccap_reg.h.

## ◆ POSTERIZE

CCAP_T::POSTERIZE

POSTERIZE

Offset: 0x0C YUV Component Posterizing Factor Register

Bits | Field | Descriptions
[0:7] | VCOMP | V Component Posterizing Factor Final_V_Out = Original_V[7:0] & V_Posterizing_Factor.
[8:15] | UCOMP | U Component Posterizing Factor Final_U_Out = Original_U[7:0] & U_Posterizing_Factor.
[16:23] | YCOMP | Y Component Posterizing Factor Final_Y_Out = Original_Y[7:0] & Y_Posterizing_Factor.

Definition at line 694 of file ccap_reg.h.

## ◆ SEPIA

CCAP_T::SEPIA

SEPIA

Offset: 0x1C Sepia Effect Control Register

Bits | Field | Descriptions
[0:7] | VCOMP | Define the constant V component while Sepia color effect is turned on.
[8:15] | UCOMP | Define the constant U component while Sepia color effect is turned on.

Definition at line 698 of file ccap_reg.h.

## ◆ STRIDE

CCAP_T::STRIDE

STRIDE

Offset: 0x34 Frame Output Pixel Stride Width Register

Bits | Field | Descriptions
[0:13] | PKTSTRIDE | Packet Frame Output Pixel Stride Width The output pixel stride size of packet pipe.
[16:29] | PLNSTRIDE | Planar Frame Output Pixel Stride Width The output pixel stride size of planar pipe.

Definition at line 704 of file ccap_reg.h.

The documentation for this struct was generated from the following file:

- Device/Nuvoton/M480/Include/ccap_reg.h