| M480 BSP V3.05.001 The Board Support Package for M480 Series

Data Structures
rtc_reg.h File Reference

RTC register definition header file. More...

Go to the source code of this file.

## Data Structures
struct | RTC_T

## Macros
#define | RTC_INIT_ACTIVE_Pos (0)
#define | RTC_INIT_ACTIVE_Msk (0x1ul << RTC_INIT_ACTIVE_Pos)
#define | RTC_INIT_INIT_Pos (1)
#define | RTC_INIT_INIT_Msk (0x7ffffffful << RTC_INIT_INIT_Pos)
#define | RTC_RWEN_RWENF_Pos (16)
#define | RTC_RWEN_RWENF_Msk (0x1ul << RTC_RWEN_RWENF_Pos)
#define | RTC_RWEN_RTCBUSY_Pos (24)
#define | RTC_RWEN_RTCBUSY_Msk (0x1ul << RTC_RWEN_RTCBUSY_Pos)
#define | RTC_FREQADJ_FREQADJ_Pos (0)
#define | RTC_FREQADJ_FREQADJ_Msk (0x3ffffful << RTC_FREQADJ_FREQADJ_Pos)
#define | RTC_FREQADJ_FRACTION_Pos (0)
#define | RTC_FREQADJ_FRACTION_Msk (0x3ful << RTC_FREQADJ_FRACTION_Pos)
#define | RTC_FREQADJ_INTEGER_Pos (8)
#define | RTC_FREQADJ_INTEGER_Msk (0x1ful << RTC_FREQADJ_INTEGER_Pos)
#define | RTC_FREQADJ_FCR_BUSY_Pos (31)
#define | RTC_FREQADJ_FCR_BUSY_Msk (0x1ul << RTC_FREQADJ_FCR_BUSY_Pos)
#define | RTC_TIME_SEC_Pos (0)
#define | RTC_TIME_SEC_Msk (0xful << RTC_TIME_SEC_Pos)
#define | RTC_TIME_TENSEC_Pos (4)
#define | RTC_TIME_TENSEC_Msk (0x7ul << RTC_TIME_TENSEC_Pos)
#define | RTC_TIME_MIN_Pos (8)
#define | RTC_TIME_MIN_Msk (0xful << RTC_TIME_MIN_Pos)
#define | RTC_TIME_TENMIN_Pos (12)
#define | RTC_TIME_TENMIN_Msk (0x7ul << RTC_TIME_TENMIN_Pos)
#define | RTC_TIME_HR_Pos (16)
#define | RTC_TIME_HR_Msk (0xful << RTC_TIME_HR_Pos)
#define | RTC_TIME_TENHR_Pos (20)
#define | RTC_TIME_TENHR_Msk (0x3ul << RTC_TIME_TENHR_Pos)
#define | RTC_CAL_DAY_Pos (0)
#define | RTC_CAL_DAY_Msk (0xful << RTC_CAL_DAY_Pos)
#define | RTC_CAL_TENDAY_Pos (4)
#define | RTC_CAL_TENDAY_Msk (0x3ul << RTC_CAL_TENDAY_Pos)
#define | RTC_CAL_MON_Pos (8)
#define | RTC_CAL_MON_Msk (0xful << RTC_CAL_MON_Pos)
#define | RTC_CAL_TENMON_Pos (12)
#define | RTC_CAL_TENMON_Msk (0x1ul << RTC_CAL_TENMON_Pos)
#define | RTC_CAL_YEAR_Pos (16)
#define | RTC_CAL_YEAR_Msk (0xful << RTC_CAL_YEAR_Pos)
#define | RTC_CAL_TENYEAR_Pos (20)
#define | RTC_CAL_TENYEAR_Msk (0xful << RTC_CAL_TENYEAR_Pos)
#define | RTC_CLKFMT_24HEN_Pos (0)
#define | RTC_CLKFMT_24HEN_Msk (0x1ul << RTC_CLKFMT_24HEN_Pos)
#define | RTC_WEEKDAY_WEEKDAY_Pos (0)
#define | RTC_WEEKDAY_WEEKDAY_Msk (0x7ul << RTC_WEEKDAY_WEEKDAY_Pos)
#define | RTC_TALM_SEC_Pos (0)
#define | RTC_TALM_SEC_Msk (0xful << RTC_TALM_SEC_Pos)
#define | RTC_TALM_TENSEC_Pos (4)
#define | RTC_TALM_TENSEC_Msk (0x7ul << RTC_TALM_TENSEC_Pos)
#define | RTC_TALM_MIN_Pos (8)
#define | RTC_TALM_MIN_Msk (0xful << RTC_TALM_MIN_Pos)
#define | RTC_TALM_TENMIN_Pos (12)
#define | RTC_TALM_TENMIN_Msk (0x7ul << RTC_TALM_TENMIN_Pos)
#define | RTC_TALM_HR_Pos (16)
#define | RTC_TALM_HR_Msk (0xful << RTC_TALM_HR_Pos)
#define | RTC_TALM_TENHR_Pos (20)
#define | RTC_TALM_TENHR_Msk (0x3ul << RTC_TALM_TENHR_Pos)
#define | RTC_CALM_DAY_Pos (0)
#define | RTC_CALM_DAY_Msk (0xful << RTC_CALM_DAY_Pos)
#define | RTC_CALM_TENDAY_Pos (4)
#define | RTC_CALM_TENDAY_Msk (0x3ul << RTC_CALM_TENDAY_Pos)
#define | RTC_CALM_MON_Pos (8)
#define | RTC_CALM_MON_Msk (0xful << RTC_CALM_MON_Pos)
#define | RTC_CALM_TENMON_Pos (12)
#define | RTC_CALM_TENMON_Msk (0x1ul << RTC_CALM_TENMON_Pos)
#define | RTC_CALM_YEAR_Pos (16)
#define | RTC_CALM_YEAR_Msk (0xful << RTC_CALM_YEAR_Pos)
#define | RTC_CALM_TENYEAR_Pos (20)
#define | RTC_CALM_TENYEAR_Msk (0xful << RTC_CALM_TENYEAR_Pos)
#define | RTC_LEAPYEAR_LEAPYEAR_Pos (0)
#define | RTC_LEAPYEAR_LEAPYEAR_Msk (0x1ul << RTC_LEAPYEAR_LEAPYEAR_Pos)
#define | RTC_INTEN_ALMIEN_Pos (0)
#define | RTC_INTEN_ALMIEN_Msk (0x1ul << RTC_INTEN_ALMIEN_Pos)
#define | RTC_INTEN_TICKIEN_Pos (1)
#define | RTC_INTEN_TICKIEN_Msk (0x1ul << RTC_INTEN_TICKIEN_Pos)
#define | RTC_INTEN_TAMP0IEN_Pos (8)
#define | RTC_INTEN_TAMP0IEN_Msk (0x1ul << RTC_INTEN_TAMP0IEN_Pos)
#define | RTC_INTEN_TAMP1IEN_Pos (9)
#define | RTC_INTEN_TAMP1IEN_Msk (0x1ul << RTC_INTEN_TAMP1IEN_Pos)
#define | RTC_INTEN_TAMP2IEN_Pos (10)
#define | RTC_INTEN_TAMP2IEN_Msk (0x1ul << RTC_INTEN_TAMP2IEN_Pos)
#define | RTC_INTEN_TAMP3IEN_Pos (11)
#define | RTC_INTEN_TAMP3IEN_Msk (0x1ul << RTC_INTEN_TAMP3IEN_Pos)
#define | RTC_INTEN_TAMP4IEN_Pos (12)
#define | RTC_INTEN_TAMP4IEN_Msk (0x1ul << RTC_INTEN_TAMP4IEN_Pos)
#define | RTC_INTEN_TAMP5IEN_Pos (13)
#define | RTC_INTEN_TAMP5IEN_Msk (0x1ul << RTC_INTEN_TAMP5IEN_Pos)
#define | RTC_INTSTS_ALMIF_Pos (0)
#define | RTC_INTSTS_ALMIF_Msk (0x1ul << RTC_INTSTS_ALMIF_Pos)
#define | RTC_INTSTS_TICKIF_Pos (1)
#define | RTC_INTSTS_TICKIF_Msk (0x1ul << RTC_INTSTS_TICKIF_Pos)
#define | RTC_INTSTS_TAMP0IF_Pos (8)
#define | RTC_INTSTS_TAMP0IF_Msk (0x1ul << RTC_INTSTS_TAMP0IF_Pos)
#define | RTC_INTSTS_TAMP1IF_Pos (9)
#define | RTC_INTSTS_TAMP1IF_Msk (0x1ul << RTC_INTSTS_TAMP1IF_Pos)
#define | RTC_INTSTS_TAMP2IF_Pos (10)
#define | RTC_INTSTS_TAMP2IF_Msk (0x1ul << RTC_INTSTS_TAMP2IF_Pos)
#define | RTC_INTSTS_TAMP3IF_Pos (11)
#define | RTC_INTSTS_TAMP3IF_Msk (0x1ul << RTC_INTSTS_TAMP3IF_Pos)
#define | RTC_INTSTS_TAMP4IF_Pos (12)
#define | RTC_INTSTS_TAMP4IF_Msk (0x1ul << RTC_INTSTS_TAMP4IF_Pos)
#define | RTC_INTSTS_TAMP5IF_Pos (13)
#define | RTC_INTSTS_TAMP5IF_Msk (0x1ul << RTC_INTSTS_TAMP5IF_Pos)
#define | RTC_TICK_TICK_Pos (0)
#define | RTC_TICK_TICK_Msk (0x7ul << RTC_TICK_TICK_Pos)
#define | RTC_TAMSK_MSEC_Pos (0)
#define | RTC_TAMSK_MSEC_Msk (0x1ul << RTC_TAMSK_MSEC_Pos)
#define | RTC_TAMSK_MTENSEC_Pos (1)
#define | RTC_TAMSK_MTENSEC_Msk (0x1ul << RTC_TAMSK_MTENSEC_Pos)
#define | RTC_TAMSK_MMIN_Pos (2)
#define | RTC_TAMSK_MMIN_Msk (0x1ul << RTC_TAMSK_MMIN_Pos)
#define | RTC_TAMSK_MTENMIN_Pos (3)
#define | RTC_TAMSK_MTENMIN_Msk (0x1ul << RTC_TAMSK_MTENMIN_Pos)
#define | RTC_TAMSK_MHR_Pos (4)
#define | RTC_TAMSK_MHR_Msk (0x1ul << RTC_TAMSK_MHR_Pos)
#define | RTC_TAMSK_MTENHR_Pos (5)
#define | RTC_TAMSK_MTENHR_Msk (0x1ul << RTC_TAMSK_MTENHR_Pos)
#define | RTC_CAMSK_MDAY_Pos (0)
#define | RTC_CAMSK_MDAY_Msk (0x1ul << RTC_CAMSK_MDAY_Pos)
#define | RTC_CAMSK_MTENDAY_Pos (1)
#define | RTC_CAMSK_MTENDAY_Msk (0x1ul << RTC_CAMSK_MTENDAY_Pos)
#define | RTC_CAMSK_MMON_Pos (2)
#define | RTC_CAMSK_MMON_Msk (0x1ul << RTC_CAMSK_MMON_Pos)
#define | RTC_CAMSK_MTENMON_Pos (3)
#define | RTC_CAMSK_MTENMON_Msk (0x1ul << RTC_CAMSK_MTENMON_Pos)
#define | RTC_CAMSK_MYEAR_Pos (4)
#define | RTC_CAMSK_MYEAR_Msk (0x1ul << RTC_CAMSK_MYEAR_Pos)
#define | RTC_CAMSK_MTENYEAR_Pos (5)
#define | RTC_CAMSK_MTENYEAR_Msk (0x1ul << RTC_CAMSK_MTENYEAR_Pos)
#define | RTC_SPRCTL_SPRRWEN_Pos (2)
#define | RTC_SPRCTL_SPRRWEN_Msk (0x1ul << RTC_SPRCTL_SPRRWEN_Pos)
#define | RTC_SPRCTL_SPRCSTS_Pos (5)
#define | RTC_SPRCTL_SPRCSTS_Msk (0x1ul << RTC_SPRCTL_SPRCSTS_Pos)
#define | RTC_SPR0_SPARE_Pos (0)
#define | RTC_SPR0_SPARE_Msk (0xfffffffful << RTC_SPR0_SPARE_Pos)
#define | RTC_SPR1_SPARE_Pos (0)
#define | RTC_SPR1_SPARE_Msk (0xfffffffful << RTC_SPR1_SPARE_Pos)
#define | RTC_SPR2_SPARE_Pos (0)
#define | RTC_SPR2_SPARE_Msk (0xfffffffful << RTC_SPR2_SPARE_Pos)
#define | RTC_SPR3_SPARE_Pos (0)
#define | RTC_SPR3_SPARE_Msk (0xfffffffful << RTC_SPR3_SPARE_Pos)
#define | RTC_SPR4_SPARE_Pos (0)
#define | RTC_SPR4_SPARE_Msk (0xfffffffful << RTC_SPR4_SPARE_Pos)
#define | RTC_SPR5_SPARE_Pos (0)
#define | RTC_SPR5_SPARE_Msk (0xfffffffful << RTC_SPR5_SPARE_Pos)
#define | RTC_SPR6_SPARE_Pos (0)
#define | RTC_SPR6_SPARE_Msk (0xfffffffful << RTC_SPR6_SPARE_Pos)
#define | RTC_SPR7_SPARE_Pos (0)
#define | RTC_SPR7_SPARE_Msk (0xfffffffful << RTC_SPR7_SPARE_Pos)
#define | RTC_SPR8_SPARE_Pos (0)
#define | RTC_SPR8_SPARE_Msk (0xfffffffful << RTC_SPR8_SPARE_Pos)
#define | RTC_SPR9_SPARE_Pos (0)
#define | RTC_SPR9_SPARE_Msk (0xfffffffful << RTC_SPR9_SPARE_Pos)
#define | RTC_SPR10_SPARE_Pos (0)
#define | RTC_SPR10_SPARE_Msk (0xfffffffful << RTC_SPR10_SPARE_Pos)
#define | RTC_SPR11_SPARE_Pos (0)
#define | RTC_SPR11_SPARE_Msk (0xfffffffful << RTC_SPR11_SPARE_Pos)
#define | RTC_SPR12_SPARE_Pos (0)
#define | RTC_SPR12_SPARE_Msk (0xfffffffful << RTC_SPR12_SPARE_Pos)
#define | RTC_SPR13_SPARE_Pos (0)
#define | RTC_SPR13_SPARE_Msk (0xfffffffful << RTC_SPR13_SPARE_Pos)
#define | RTC_SPR14_SPARE_Pos (0)
#define | RTC_SPR14_SPARE_Msk (0xfffffffful << RTC_SPR14_SPARE_Pos)
#define | RTC_SPR15_SPARE_Pos (0)
#define | RTC_SPR15_SPARE_Msk (0xfffffffful << RTC_SPR15_SPARE_Pos)
#define | RTC_SPR16_SPARE_Pos (0)
#define | RTC_SPR16_SPARE_Msk (0xfffffffful << RTC_SPR16_SPARE_Pos)
#define | RTC_SPR17_SPARE_Pos (0)
#define | RTC_SPR17_SPARE_Msk (0xfffffffful << RTC_SPR17_SPARE_Pos)
#define | RTC_SPR18_SPARE_Pos (0)
#define | RTC_SPR18_SPARE_Msk (0xfffffffful << RTC_SPR18_SPARE_Pos)
#define | RTC_SPR19_SPARE_Pos (0)
#define | RTC_SPR19_SPARE_Msk (0xfffffffful << RTC_SPR19_SPARE_Pos)
#define | RTC_LXTCTL_GAIN_Pos (1)
#define | RTC_LXTCTL_GAIN_Msk (0x3ul << RTC_LXTCTL_GAIN_Pos)
#define | RTC_GPIOCTL0_OPMODE0_Pos (0)
#define | RTC_GPIOCTL0_OPMODE0_Msk (0x3ul << RTC_GPIOCTL0_OPMODE0_Pos)
#define | RTC_GPIOCTL0_DOUT0_Pos (2)
#define | RTC_GPIOCTL0_DOUT0_Msk (0x1ul << RTC_GPIOCTL0_DOUT0_Pos)
#define | RTC_GPIOCTL0_CTLSEL0_Pos (3)
#define | RTC_GPIOCTL0_CTLSEL0_Msk (0x1ul << RTC_GPIOCTL0_CTLSEL0_Pos)
#define | RTC_GPIOCTL0_PUSEL0_Pos (4)
#define | RTC_GPIOCTL0_PUSEL0_Msk (0x3ul << RTC_GPIOCTL0_PUSEL0_Pos)
#define | RTC_GPIOCTL0_OPMODE1_Pos (8)
#define | RTC_GPIOCTL0_OPMODE1_Msk (0x3ul << RTC_GPIOCTL0_OPMODE1_Pos)
#define | RTC_GPIOCTL0_DOUT1_Pos (10)
#define | RTC_GPIOCTL0_DOUT1_Msk (0x1ul << RTC_GPIOCTL0_DOUT1_Pos)
#define | RTC_GPIOCTL0_CTLSEL1_Pos (11)
#define | RTC_GPIOCTL0_CTLSEL1_Msk (0x1ul << RTC_GPIOCTL0_CTLSEL1_Pos)
#define | RTC_GPIOCTL0_PUSEL1_Pos (12)
#define | RTC_GPIOCTL0_PUSEL1_Msk (0x3ul << RTC_GPIOCTL0_PUSEL1_Pos)
#define | RTC_GPIOCTL0_OPMODE2_Pos (16)
#define | RTC_GPIOCTL0_OPMODE2_Msk (0x3ul << RTC_GPIOCTL0_OPMODE2_Pos)
#define | RTC_GPIOCTL0_DOUT2_Pos (18)
#define | RTC_GPIOCTL0_DOUT2_Msk (0x1ul << RTC_GPIOCTL0_DOUT2_Pos)
#define | RTC_GPIOCTL0_CTLSEL2_Pos (19)
#define | RTC_GPIOCTL0_CTLSEL2_Msk (0x1ul << RTC_GPIOCTL0_CTLSEL2_Pos)
#define | RTC_GPIOCTL0_PUSEL2_Pos (20)
#define | RTC_GPIOCTL0_PUSEL2_Msk (0x3ul << RTC_GPIOCTL0_PUSEL2_Pos)
#define | RTC_GPIOCTL0_OPMODE3_Pos (24)
#define | RTC_GPIOCTL0_OPMODE3_Msk (0x3ul << RTC_GPIOCTL0_OPMODE3_Pos)
#define | RTC_GPIOCTL0_DOUT3_Pos (26)
#define | RTC_GPIOCTL0_DOUT3_Msk (0x1ul << RTC_GPIOCTL0_DOUT3_Pos)
#define | RTC_GPIOCTL0_CTLSEL3_Pos (27)
#define | RTC_GPIOCTL0_CTLSEL3_Msk (0x1ul << RTC_GPIOCTL0_CTLSEL3_Pos)
#define | RTC_GPIOCTL0_PUSEL3_Pos (28)
#define | RTC_GPIOCTL0_PUSEL3_Msk (0x3ul << RTC_GPIOCTL0_PUSEL3_Pos)
#define | RTC_GPIOCTL1_OPMODE4_Pos (0)
#define | RTC_GPIOCTL1_OPMODE4_Msk (0x3ul << RTC_GPIOCTL1_OPMODE4_Pos)
#define | RTC_GPIOCTL1_DOUT4_Pos (2)
#define | RTC_GPIOCTL1_DOUT4_Msk (0x1ul << RTC_GPIOCTL1_DOUT4_Pos)
#define | RTC_GPIOCTL1_CTLSEL4_Pos (3)
#define | RTC_GPIOCTL1_CTLSEL4_Msk (0x1ul << RTC_GPIOCTL1_CTLSEL4_Pos)
#define | RTC_GPIOCTL1_PUSEL4_Pos (4)
#define | RTC_GPIOCTL1_PUSEL4_Msk (0x3ul << RTC_GPIOCTL1_PUSEL4_Pos)
#define | RTC_GPIOCTL1_OPMODE5_Pos (8)
#define | RTC_GPIOCTL1_OPMODE5_Msk (0x3ul << RTC_GPIOCTL1_OPMODE5_Pos)
#define | RTC_GPIOCTL1_DOUT5_Pos (10)
#define | RTC_GPIOCTL1_DOUT5_Msk (0x1ul << RTC_GPIOCTL1_DOUT5_Pos)
#define | RTC_GPIOCTL1_CTLSEL5_Pos (11)
#define | RTC_GPIOCTL1_CTLSEL5_Msk (0x1ul << RTC_GPIOCTL1_CTLSEL5_Pos)
#define | RTC_GPIOCTL1_PUSEL5_Pos (12)
#define | RTC_GPIOCTL1_PUSEL5_Msk (0x3ul << RTC_GPIOCTL1_PUSEL5_Pos)
#define | RTC_GPIOCTL1_OPMODE6_Pos (16)
#define | RTC_GPIOCTL1_OPMODE6_Msk (0x3ul << RTC_GPIOCTL1_OPMODE6_Pos)
#define | RTC_GPIOCTL1_DOUT6_Pos (18)
#define | RTC_GPIOCTL1_DOUT6_Msk (0x1ul << RTC_GPIOCTL1_DOUT6_Pos)
#define | RTC_GPIOCTL1_CTLSEL6_Pos (19)
#define | RTC_GPIOCTL1_CTLSEL6_Msk (0x1ul << RTC_GPIOCTL1_CTLSEL6_Pos)
#define | RTC_GPIOCTL1_PUSEL6_Pos (20)
#define | RTC_GPIOCTL1_PUSEL6_Msk (0x3ul << RTC_GPIOCTL1_PUSEL6_Pos)
#define | RTC_GPIOCTL1_OPMODE7_Pos (24)
#define | RTC_GPIOCTL1_OPMODE7_Msk (0x3ul << RTC_GPIOCTL1_OPMODE7_Pos)
#define | RTC_GPIOCTL1_DOUT7_Pos (26)
#define | RTC_GPIOCTL1_DOUT7_Msk (0x1ul << RTC_GPIOCTL1_DOUT7_Pos)
#define | RTC_GPIOCTL1_CTLSEL7_Pos (27)
#define | RTC_GPIOCTL1_CTLSEL7_Msk (0x1ul << RTC_GPIOCTL1_CTLSEL7_Pos)
#define | RTC_GPIOCTL1_PUSEL7_Pos (28)
#define | RTC_GPIOCTL1_PUSEL7_Msk (0x3ul << RTC_GPIOCTL1_PUSEL7_Pos)
#define | RTC_DSTCTL_ADDHR_Pos (0)
#define | RTC_DSTCTL_ADDHR_Msk (0x1ul << RTC_DSTCTL_ADDHR_Pos)
#define | RTC_DSTCTL_SUBHR_Pos (1)
#define | RTC_DSTCTL_SUBHR_Msk (0x1ul << RTC_DSTCTL_SUBHR_Pos)
#define | RTC_DSTCTL_DSBAK_Pos (2)
#define | RTC_DSTCTL_DSBAK_Msk (0x1ul << RTC_DSTCTL_DSBAK_Pos)
#define | RTC_TAMPCTL_DYN1ISS_Pos (0)
#define | RTC_TAMPCTL_DYN1ISS_Msk (0x1ul << RTC_TAMPCTL_DYN1ISS_Pos)
#define | RTC_TAMPCTL_DYN2ISS_Pos (1)
#define | RTC_TAMPCTL_DYN2ISS_Msk (0x1ul << RTC_TAMPCTL_DYN2ISS_Pos)
#define | RTC_TAMPCTL_DYNSRC_Pos (2)
#define | RTC_TAMPCTL_DYNSRC_Msk (0x3ul << RTC_TAMPCTL_DYNSRC_Pos)
#define | RTC_TAMPCTL_SEEDRLD_Pos (4)
#define | RTC_TAMPCTL_SEEDRLD_Msk (0x1ul << RTC_TAMPCTL_SEEDRLD_Pos)
#define | RTC_TAMPCTL_DYNRATE_Pos (5)
#define | RTC_TAMPCTL_DYNRATE_Msk (0x7ul << RTC_TAMPCTL_DYNRATE_Pos)
#define | RTC_TAMPCTL_TAMP0EN_Pos (8)
#define | RTC_TAMPCTL_TAMP0EN_Msk (0x1ul << RTC_TAMPCTL_TAMP0EN_Pos)
#define | RTC_TAMPCTL_TAMP0LV_Pos (9)
#define | RTC_TAMPCTL_TAMP0LV_Msk (0x1ul << RTC_TAMPCTL_TAMP0LV_Pos)
#define | RTC_TAMPCTL_TAMP0DBEN_Pos (10)
#define | RTC_TAMPCTL_TAMP0DBEN_Msk (0x1ul << RTC_TAMPCTL_TAMP0DBEN_Pos)
#define | RTC_TAMPCTL_TAMP1EN_Pos (12)
#define | RTC_TAMPCTL_TAMP1EN_Msk (0x1ul << RTC_TAMPCTL_TAMP1EN_Pos)
#define | RTC_TAMPCTL_TAMP1LV_Pos (13)
#define | RTC_TAMPCTL_TAMP1LV_Msk (0x1ul << RTC_TAMPCTL_TAMP1LV_Pos)
#define | RTC_TAMPCTL_TAMP1DBEN_Pos (14)
#define | RTC_TAMPCTL_TAMP1DBEN_Msk (0x1ul << RTC_TAMPCTL_TAMP1DBEN_Pos)
#define | RTC_TAMPCTL_DYNPR0EN_Pos (15)
#define | RTC_TAMPCTL_DYNPR0EN_Msk (0x1ul << RTC_TAMPCTL_DYNPR0EN_Pos)
#define | RTC_TAMPCTL_TAMP2EN_Pos (16)
#define | RTC_TAMPCTL_TAMP2EN_Msk (0x1ul << RTC_TAMPCTL_TAMP2EN_Pos)
#define | RTC_TAMPCTL_TAMP2LV_Pos (17)
#define | RTC_TAMPCTL_TAMP2LV_Msk (0x1ul << RTC_TAMPCTL_TAMP2LV_Pos)
#define | RTC_TAMPCTL_TAMP2DBEN_Pos (18)
#define | RTC_TAMPCTL_TAMP2DBEN_Msk (0x1ul << RTC_TAMPCTL_TAMP2DBEN_Pos)
#define | RTC_TAMPCTL_TAMP3EN_Pos (20)
#define | RTC_TAMPCTL_TAMP3EN_Msk (0x1ul << RTC_TAMPCTL_TAMP3EN_Pos)
#define | RTC_TAMPCTL_TAMP3LV_Pos (21)
#define | RTC_TAMPCTL_TAMP3LV_Msk (0x1ul << RTC_TAMPCTL_TAMP3LV_Pos)
#define | RTC_TAMPCTL_TAMP3DBEN_Pos (22)
#define | RTC_TAMPCTL_TAMP3DBEN_Msk (0x1ul << RTC_TAMPCTL_TAMP3DBEN_Pos)
#define | RTC_TAMPCTL_DYNPR1EN_Pos (23)
#define | RTC_TAMPCTL_DYNPR1EN_Msk (0x1ul << RTC_TAMPCTL_DYNPR1EN_Pos)
#define | RTC_TAMPCTL_TAMP4EN_Pos (24)
#define | RTC_TAMPCTL_TAMP4EN_Msk (0x1ul << RTC_TAMPCTL_TAMP4EN_Pos)
#define | RTC_TAMPCTL_TAMP4LV_Pos (25)
#define | RTC_TAMPCTL_TAMP4LV_Msk (0x1ul << RTC_TAMPCTL_TAMP4LV_Pos)
#define | RTC_TAMPCTL_TAMP4DBEN_Pos (26)
#define | RTC_TAMPCTL_TAMP4DBEN_Msk (0x1ul << RTC_TAMPCTL_TAMP4DBEN_Pos)
#define | RTC_TAMPCTL_TAMP5EN_Pos (28)
#define | RTC_TAMPCTL_TAMP5EN_Msk (0x1ul << RTC_TAMPCTL_TAMP5EN_Pos)
#define | RTC_TAMPCTL_TAMP5LV_Pos (29)
#define | RTC_TAMPCTL_TAMP5LV_Msk (0x1ul << RTC_TAMPCTL_TAMP5LV_Pos)
#define | RTC_TAMPCTL_TAMP5DBEN_Pos (30)
#define | RTC_TAMPCTL_TAMP5DBEN_Msk (0x1ul << RTC_TAMPCTL_TAMP5DBEN_Pos)
#define | RTC_TAMPCTL_DYNPR2EN_Pos (31)
#define | RTC_TAMPCTL_DYNPR2EN_Msk (0x1ul << RTC_TAMPCTL_DYNPR2EN_Pos)
#define | RTC_TAMPSEED_SEED_Pos (0)
#define | RTC_TAMPSEED_SEED_Msk (0xfffffffful << RTC_TAMPSEED_SEED_Pos)
#define | RTC_TAMPTIME_SEC_Pos (0)
#define | RTC_TAMPTIME_SEC_Msk (0xful << RTC_TAMPTIME_SEC_Pos)
#define | RTC_TAMPTIME_TENSEC_Pos (4)
#define | RTC_TAMPTIME_TENSEC_Msk (0x7ul << RTC_TAMPTIME_TENSEC_Pos)
#define | RTC_TAMPTIME_MIN_Pos (8)
#define | RTC_TAMPTIME_MIN_Msk (0xful << RTC_TAMPTIME_MIN_Pos)
#define | RTC_TAMPTIME_TENMIN_Pos (12)
#define | RTC_TAMPTIME_TENMIN_Msk (0x7ul << RTC_TAMPTIME_TENMIN_Pos)
#define | RTC_TAMPTIME_HR_Pos (16)
#define | RTC_TAMPTIME_HR_Msk (0xful << RTC_TAMPTIME_HR_Pos)
#define | RTC_TAMPTIME_TENHR_Pos (20)
#define | RTC_TAMPTIME_TENHR_Msk (0x3ul << RTC_TAMPTIME_TENHR_Pos)
#define | RTC_TAMPCAL_DAY_Pos (0)
#define | RTC_TAMPCAL_DAY_Msk (0xful << RTC_TAMPCAL_DAY_Pos)
#define | RTC_TAMPCAL_TENDAY_Pos (4)
#define | RTC_TAMPCAL_TENDAY_Msk (0x3ul << RTC_TAMPCAL_TENDAY_Pos)
#define | RTC_TAMPCAL_MON_Pos (8)
#define | RTC_TAMPCAL_MON_Msk (0xful << RTC_TAMPCAL_MON_Pos)
#define | RTC_TAMPCAL_TENMON_Pos (12)
#define | RTC_TAMPCAL_TENMON_Msk (0x1ul << RTC_TAMPCAL_TENMON_Pos)
#define | RTC_TAMPCAL_YEAR_Pos (16)
#define | RTC_TAMPCAL_YEAR_Msk (0xful << RTC_TAMPCAL_YEAR_Pos)
#define | RTC_TAMPCAL_TENYEAR_Pos (20)
#define | RTC_TAMPCAL_TENYEAR_Msk (0xful << RTC_TAMPCAL_TENYEAR_Pos)

## Detailed Description

RTC register definition header file.

Version
  V1.00 SPDX-License-Identifier: Apache-2.0

Copyright
  (C) 2017-2020 Nuvoton Technology Corp. All rights reserved.

Definition in file rtc_reg.h.