| M480 BSP V3.05.001 The Board Support Package for M480 Series

crc_reg.h
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1 /**************************************************************************/
9 #ifndef __CRC_REG_H__
10 #define __CRC_REG_H__
11
12 #if defined ( __CC_ARM )
13 #pragma anon_unions
14 #endif
15
26 typedef struct
27 {
28
29
186 __IO uint32_t CTL;
187 __IO uint32_t DAT;
188 __IO uint32_t SEED;
189 __I uint32_t CHECKSUM;
191 } CRC_T;
192
198 #define CRC_CTL_CRCEN_Pos (0)
199 #define CRC_CTL_CRCEN_Msk (0x1ul << CRC_CTL_CRCEN_Pos)
201 #define CRC_CTL_CHKSINIT_Pos (1)
202 #define CRC_CTL_CHKSINIT_Msk (0x1ul << CRC_CTL_CHKSINIT_Pos)
204 #define CRC_CTL_DATREV_Pos (24)
205 #define CRC_CTL_DATREV_Msk (0x1ul << CRC_CTL_DATREV_Pos)
207 #define CRC_CTL_CHKSREV_Pos (25)
208 #define CRC_CTL_CHKSREV_Msk (0x1ul << CRC_CTL_CHKSREV_Pos)
210 #define CRC_CTL_DATFMT_Pos (26)
211 #define CRC_CTL_DATFMT_Msk (0x1ul << CRC_CTL_DATFMT_Pos)
213 #define CRC_CTL_CHKSFMT_Pos (27)
214 #define CRC_CTL_CHKSFMT_Msk (0x1ul << CRC_CTL_CHKSFMT_Pos)
216 #define CRC_CTL_DATLEN_Pos (28)
217 #define CRC_CTL_DATLEN_Msk (0x3ul << CRC_CTL_DATLEN_Pos)
219 #define CRC_CTL_CRCMODE_Pos (30)
220 #define CRC_CTL_CRCMODE_Msk (0x3ul << CRC_CTL_CRCMODE_Pos)
222 #define CRC_DAT_DATA_Pos (0)
223 #define CRC_DAT_DATA_Msk (0xfffffffful << CRC_DAT_DATA_Pos)
225 #define CRC_SEED_SEED_Pos (0)
226 #define CRC_SEED_SEED_Msk (0xfffffffful << CRC_SEED_SEED_Pos)
228 #define CRC_CHECKSUM_CHECKSUM_Pos (0)
229 #define CRC_CHECKSUM_CHECKSUM_Msk (0xfffffffful << CRC_CHECKSUM_CHECKSUM_Pos) /* CRC_CONST */
232 /* end of CRC register group */ /* end of REGISTER group */
234
235 #if defined ( __CC_ARM )
236 #pragma no_anon_unions
237 #endif
238
239 #endif /* __CRC_REG_H__ */
CRC_T::SEED
__IO uint32_t SEED
Definition: crc_reg.h:188
CRC_T::CTL
__IO uint32_t CTL
Definition: crc_reg.h:186
CRC_T
Definition: crc_reg.h:26
CRC_T::DAT
__IO uint32_t DAT
Definition: crc_reg.h:187
CRC_T::CHECKSUM
__I uint32_t CHECKSUM
Definition: crc_reg.h:189