| M480 BSP V3.05.001 The Board Support Package for M480 Series

eadc_reg.h
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1 /**************************************************************************/
9 #ifndef __EADC_REG_H__
10 #define __EADC_REG_H__
11
12 #if defined ( __CC_ARM )
13 #pragma anon_unions
14 #endif
15
26 typedef struct
27 {
28
29
1198 __I uint32_t DAT[19];
1199 __I uint32_t CURDAT;
1200 __IO uint32_t CTL;
1201 __O uint32_t SWTRG;
1202 __IO uint32_t PENDSTS;
1203 __IO uint32_t OVSTS;
1204 __I uint32_t RESERVE0[8];
1207 __IO uint32_t SCTL[19];
1208 __I uint32_t RESERVE1[1];
1211 __IO uint32_t INTSRC[4];
1212 __IO uint32_t CMP[4];
1213 __I uint32_t STATUS0;
1214 __I uint32_t STATUS1;
1215 __IO uint32_t STATUS2;
1216 __I uint32_t STATUS3;
1217 __I uint32_t DDAT[4];
1218 __IO uint32_t PWRM;
1219 __IO uint32_t CALCTL;
1220 __IO uint32_t CALDWRD;
1221 __I uint32_t RESERVE2[5];
1224 __IO uint32_t PDMACTL;
1225 } EADC_T;
1226
1232 #define EADC_DAT_RESULT_Pos (0)
1233 #define EADC_DAT_RESULT_Msk (0xfffful << EADC_DAT_RESULT_Pos)
1235 #define EADC_DAT_OV_Pos (16)
1236 #define EADC_DAT_OV_Msk (0x1ul << EADC_DAT_OV_Pos)
1238 #define EADC_DAT_VALID_Pos (17)
1239 #define EADC_DAT_VALID_Msk (0x1ul << EADC_DAT_VALID_Pos)
1241 #define EADC_DAT0_RESULT_Pos (0)
1242 #define EADC_DAT0_RESULT_Msk (0xfffful << EADC_DAT0_RESULT_Pos)
1244 #define EADC_DAT0_OV_Pos (16)
1245 #define EADC_DAT0_OV_Msk (0x1ul << EADC_DAT0_OV_Pos)
1247 #define EADC_DAT0_VALID_Pos (17)
1248 #define EADC_DAT0_VALID_Msk (0x1ul << EADC_DAT0_VALID_Pos)
1250 #define EADC_DAT1_RESULT_Pos (0)
1251 #define EADC_DAT1_RESULT_Msk (0xfffful << EADC_DAT1_RESULT_Pos)
1253 #define EADC_DAT1_OV_Pos (16)
1254 #define EADC_DAT1_OV_Msk (0x1ul << EADC_DAT1_OV_Pos)
1256 #define EADC_DAT1_VALID_Pos (17)
1257 #define EADC_DAT1_VALID_Msk (0x1ul << EADC_DAT1_VALID_Pos)
1259 #define EADC_DAT2_RESULT_Pos (0)
1260 #define EADC_DAT2_RESULT_Msk (0xfffful << EADC_DAT2_RESULT_Pos)
1262 #define EADC_DAT2_OV_Pos (16)
1263 #define EADC_DAT2_OV_Msk (0x1ul << EADC_DAT2_OV_Pos)
1265 #define EADC_DAT2_VALID_Pos (17)
1266 #define EADC_DAT2_VALID_Msk (0x1ul << EADC_DAT2_VALID_Pos)
1268 #define EADC_DAT3_RESULT_Pos (0)
1269 #define EADC_DAT3_RESULT_Msk (0xfffful << EADC_DAT3_RESULT_Pos)
1271 #define EADC_DAT3_OV_Pos (16)
1272 #define EADC_DAT3_OV_Msk (0x1ul << EADC_DAT3_OV_Pos)
1274 #define EADC_DAT3_VALID_Pos (17)
1275 #define EADC_DAT3_VALID_Msk (0x1ul << EADC_DAT3_VALID_Pos)
1277 #define EADC_DAT4_RESULT_Pos (0)
1278 #define EADC_DAT4_RESULT_Msk (0xfffful << EADC_DAT4_RESULT_Pos)
1280 #define EADC_DAT4_OV_Pos (16)
1281 #define EADC_DAT4_OV_Msk (0x1ul << EADC_DAT4_OV_Pos)
1283 #define EADC_DAT4_VALID_Pos (17)
1284 #define EADC_DAT4_VALID_Msk (0x1ul << EADC_DAT4_VALID_Pos)
1286 #define EADC_DAT5_RESULT_Pos (0)
1287 #define EADC_DAT5_RESULT_Msk (0xfffful << EADC_DAT5_RESULT_Pos)
1289 #define EADC_DAT5_OV_Pos (16)
1290 #define EADC_DAT5_OV_Msk (0x1ul << EADC_DAT5_OV_Pos)
1292 #define EADC_DAT5_VALID_Pos (17)
1293 #define EADC_DAT5_VALID_Msk (0x1ul << EADC_DAT5_VALID_Pos)
1295 #define EADC_DAT6_RESULT_Pos (0)
1296 #define EADC_DAT6_RESULT_Msk (0xfffful << EADC_DAT6_RESULT_Pos)
1298 #define EADC_DAT6_OV_Pos (16)
1299 #define EADC_DAT6_OV_Msk (0x1ul << EADC_DAT6_OV_Pos)
1301 #define EADC_DAT6_VALID_Pos (17)
1302 #define EADC_DAT6_VALID_Msk (0x1ul << EADC_DAT6_VALID_Pos)
1304 #define EADC_DAT7_RESULT_Pos (0)
1305 #define EADC_DAT7_RESULT_Msk (0xfffful << EADC_DAT7_RESULT_Pos)
1307 #define EADC_DAT7_OV_Pos (16)
1308 #define EADC_DAT7_OV_Msk (0x1ul << EADC_DAT7_OV_Pos)
1310 #define EADC_DAT7_VALID_Pos (17)
1311 #define EADC_DAT7_VALID_Msk (0x1ul << EADC_DAT7_VALID_Pos)
1313 #define EADC_DAT8_RESULT_Pos (0)
1314 #define EADC_DAT8_RESULT_Msk (0xfffful << EADC_DAT8_RESULT_Pos)
1316 #define EADC_DAT8_OV_Pos (16)
1317 #define EADC_DAT8_OV_Msk (0x1ul << EADC_DAT8_OV_Pos)
1319 #define EADC_DAT8_VALID_Pos (17)
1320 #define EADC_DAT8_VALID_Msk (0x1ul << EADC_DAT8_VALID_Pos)
1322 #define EADC_DAT9_RESULT_Pos (0)
1323 #define EADC_DAT9_RESULT_Msk (0xfffful << EADC_DAT9_RESULT_Pos)
1325 #define EADC_DAT9_OV_Pos (16)
1326 #define EADC_DAT9_OV_Msk (0x1ul << EADC_DAT9_OV_Pos)
1328 #define EADC_DAT9_VALID_Pos (17)
1329 #define EADC_DAT9_VALID_Msk (0x1ul << EADC_DAT9_VALID_Pos)
1331 #define EADC_DAT10_RESULT_Pos (0)
1332 #define EADC_DAT10_RESULT_Msk (0xfffful << EADC_DAT10_RESULT_Pos)
1334 #define EADC_DAT10_OV_Pos (16)
1335 #define EADC_DAT10_OV_Msk (0x1ul << EADC_DAT10_OV_Pos)
1337 #define EADC_DAT10_VALID_Pos (17)
1338 #define EADC_DAT10_VALID_Msk (0x1ul << EADC_DAT10_VALID_Pos)
1340 #define EADC_DAT11_RESULT_Pos (0)
1341 #define EADC_DAT11_RESULT_Msk (0xfffful << EADC_DAT11_RESULT_Pos)
1343 #define EADC_DAT11_OV_Pos (16)
1344 #define EADC_DAT11_OV_Msk (0x1ul << EADC_DAT11_OV_Pos)
1346 #define EADC_DAT11_VALID_Pos (17)
1347 #define EADC_DAT11_VALID_Msk (0x1ul << EADC_DAT11_VALID_Pos)
1349 #define EADC_DAT12_RESULT_Pos (0)
1350 #define EADC_DAT12_RESULT_Msk (0xfffful << EADC_DAT12_RESULT_Pos)
1352 #define EADC_DAT12_OV_Pos (16)
1353 #define EADC_DAT12_OV_Msk (0x1ul << EADC_DAT12_OV_Pos)
1355 #define EADC_DAT12_VALID_Pos (17)
1356 #define EADC_DAT12_VALID_Msk (0x1ul << EADC_DAT12_VALID_Pos)
1358 #define EADC_DAT13_RESULT_Pos (0)
1359 #define EADC_DAT13_RESULT_Msk (0xfffful << EADC_DAT13_RESULT_Pos)
1361 #define EADC_DAT13_OV_Pos (16)
1362 #define EADC_DAT13_OV_Msk (0x1ul << EADC_DAT13_OV_Pos)
1364 #define EADC_DAT13_VALID_Pos (17)
1365 #define EADC_DAT13_VALID_Msk (0x1ul << EADC_DAT13_VALID_Pos)
1367 #define EADC_DAT14_RESULT_Pos (0)
1368 #define EADC_DAT14_RESULT_Msk (0xfffful << EADC_DAT14_RESULT_Pos)
1370 #define EADC_DAT14_OV_Pos (16)
1371 #define EADC_DAT14_OV_Msk (0x1ul << EADC_DAT14_OV_Pos)
1373 #define EADC_DAT14_VALID_Pos (17)
1374 #define EADC_DAT14_VALID_Msk (0x1ul << EADC_DAT14_VALID_Pos)
1376 #define EADC_DAT15_RESULT_Pos (0)
1377 #define EADC_DAT15_RESULT_Msk (0xfffful << EADC_DAT15_RESULT_Pos)
1379 #define EADC_DAT15_OV_Pos (16)
1380 #define EADC_DAT15_OV_Msk (0x1ul << EADC_DAT15_OV_Pos)
1382 #define EADC_DAT15_VALID_Pos (17)
1383 #define EADC_DAT15_VALID_Msk (0x1ul << EADC_DAT15_VALID_Pos)
1385 #define EADC_DAT16_RESULT_Pos (0)
1386 #define EADC_DAT16_RESULT_Msk (0xfffful << EADC_DAT16_RESULT_Pos)
1388 #define EADC_DAT16_OV_Pos (16)
1389 #define EADC_DAT16_OV_Msk (0x1ul << EADC_DAT16_OV_Pos)
1391 #define EADC_DAT16_VALID_Pos (17)
1392 #define EADC_DAT16_VALID_Msk (0x1ul << EADC_DAT16_VALID_Pos)
1394 #define EADC_DAT17_RESULT_Pos (0)
1395 #define EADC_DAT17_RESULT_Msk (0xfffful << EADC_DAT17_RESULT_Pos)
1397 #define EADC_DAT17_OV_Pos (16)
1398 #define EADC_DAT17_OV_Msk (0x1ul << EADC_DAT17_OV_Pos)
1400 #define EADC_DAT17_VALID_Pos (17)
1401 #define EADC_DAT17_VALID_Msk (0x1ul << EADC_DAT17_VALID_Pos)
1403 #define EADC_DAT18_RESULT_Pos (0)
1404 #define EADC_DAT18_RESULT_Msk (0xfffful << EADC_DAT18_RESULT_Pos)
1406 #define EADC_DAT18_OV_Pos (16)
1407 #define EADC_DAT18_OV_Msk (0x1ul << EADC_DAT18_OV_Pos)
1409 #define EADC_DAT18_VALID_Pos (17)
1410 #define EADC_DAT18_VALID_Msk (0x1ul << EADC_DAT18_VALID_Pos)
1412 #define EADC_CURDAT_CURDAT_Pos (0)
1413 #define EADC_CURDAT_CURDAT_Msk (0x3fffful << EADC_CURDAT_CURDAT_Pos)
1415 #define EADC_CTL_ADCEN_Pos (0)
1416 #define EADC_CTL_ADCEN_Msk (0x1ul << EADC_CTL_ADCEN_Pos)
1418 #define EADC_CTL_ADCRST_Pos (1)
1419 #define EADC_CTL_ADCRST_Msk (0x1ul << EADC_CTL_ADCRST_Pos)
1421 #define EADC_CTL_ADCIEN0_Pos (2)
1422 #define EADC_CTL_ADCIEN0_Msk (0x1ul << EADC_CTL_ADCIEN0_Pos)
1424 #define EADC_CTL_ADCIEN1_Pos (3)
1425 #define EADC_CTL_ADCIEN1_Msk (0x1ul << EADC_CTL_ADCIEN1_Pos)
1427 #define EADC_CTL_ADCIEN2_Pos (4)
1428 #define EADC_CTL_ADCIEN2_Msk (0x1ul << EADC_CTL_ADCIEN2_Pos)
1430 #define EADC_CTL_ADCIEN3_Pos (5)
1431 #define EADC_CTL_ADCIEN3_Msk (0x1ul << EADC_CTL_ADCIEN3_Pos)
1433 #define EADC_CTL_RESSEL_Pos (6)
1434 #define EADC_CTL_RESSEL_Msk (0x3ul << EADC_CTL_RESSEL_Pos)
1436 #define EADC_CTL_DIFFEN_Pos (8)
1437 #define EADC_CTL_DIFFEN_Msk (0x1ul << EADC_CTL_DIFFEN_Pos)
1439 #define EADC_CTL_DMOF_Pos (9)
1440 #define EADC_CTL_DMOF_Msk (0x1ul << EADC_CTL_DMOF_Pos)
1442 #define EADC_CTL_PDMAEN_Pos (11)
1443 #define EADC_CTL_PDMAEN_Msk (0x1ul << EADC_CTL_PDMAEN_Pos)
1445 #define EADC_SWTRG_SWTRG_Pos (0)
1446 #define EADC_SWTRG_SWTRG_Msk (0x7fffful << EADC_SWTRG_SWTRG_Pos)
1448 #define EADC_PENDSTS_STPF_Pos (0)
1449 #define EADC_PENDSTS_STPF_Msk (0x7fffful << EADC_PENDSTS_STPF_Pos)
1451 #define EADC_OVSTS_SPOVF_Pos (0)
1452 #define EADC_OVSTS_SPOVF_Msk (0x7fffful << EADC_OVSTS_SPOVF_Pos)
1454 #define EADC_SCTL_CHSEL_Pos (0)
1455 #define EADC_SCTL_CHSEL_Msk (0xful << EADC_SCTL_CHSEL_Pos)
1457 #define EADC_SCTL_EXTREN_Pos (4)
1458 #define EADC_SCTL_EXTREN_Msk (0x1ul << EADC_SCTL_EXTREN_Pos)
1460 #define EADC_SCTL_EXTFEN_Pos (5)
1461 #define EADC_SCTL_EXTFEN_Msk (0x1ul << EADC_SCTL_EXTFEN_Pos)
1463 #define EADC_SCTL_TRGDLYDIV_Pos (6)
1464 #define EADC_SCTL_TRGDLYDIV_Msk (0x3ul << EADC_SCTL_TRGDLYDIV_Pos)
1466 #define EADC_SCTL_TRGDLYCNT_Pos (8)
1467 #define EADC_SCTL_TRGDLYCNT_Msk (0xfful << EADC_SCTL_TRGDLYCNT_Pos)
1469 #define EADC_SCTL_TRGSEL_Pos (16)
1470 #define EADC_SCTL_TRGSEL_Msk (0x1ful << EADC_SCTL_TRGSEL_Pos)
1472 #define EADC_SCTL_INTPOS_Pos (22)
1473 #define EADC_SCTL_INTPOS_Msk (0x1ul << EADC_SCTL_INTPOS_Pos)
1475 #define EADC_SCTL_DBMEN_Pos (23)
1476 #define EADC_SCTL_DBMEN_Msk (0x1ul << EADC_SCTL_DBMEN_Pos)
1478 #define EADC_SCTL_EXTSMPT_Pos (24)
1479 #define EADC_SCTL_EXTSMPT_Msk (0xfful << EADC_SCTL_EXTSMPT_Pos)
1481 #define EADC_SCTL0_CHSEL_Pos (0)
1482 #define EADC_SCTL0_CHSEL_Msk (0xful << EADC_SCTL0_CHSEL_Pos)
1484 #define EADC_SCTL0_EXTREN_Pos (4)
1485 #define EADC_SCTL0_EXTREN_Msk (0x1ul << EADC_SCTL0_EXTREN_Pos)
1487 #define EADC_SCTL0_EXTFEN_Pos (5)
1488 #define EADC_SCTL0_EXTFEN_Msk (0x1ul << EADC_SCTL0_EXTFEN_Pos)
1490 #define EADC_SCTL0_TRGDLYDIV_Pos (6)
1491 #define EADC_SCTL0_TRGDLYDIV_Msk (0x3ul << EADC_SCTL0_TRGDLYDIV_Pos)
1493 #define EADC_SCTL0_TRGDLYCNT_Pos (8)
1494 #define EADC_SCTL0_TRGDLYCNT_Msk (0xfful << EADC_SCTL0_TRGDLYCNT_Pos)
1496 #define EADC_SCTL0_TRGSEL_Pos (16)
1497 #define EADC_SCTL0_TRGSEL_Msk (0x1ful << EADC_SCTL0_TRGSEL_Pos)
1499 #define EADC_SCTL0_INTPOS_Pos (22)
1500 #define EADC_SCTL0_INTPOS_Msk (0x1ul << EADC_SCTL0_INTPOS_Pos)
1502 #define EADC_SCTL0_DBMEN_Pos (23)
1503 #define EADC_SCTL0_DBMEN_Msk (0x1ul << EADC_SCTL0_DBMEN_Pos)
1505 #define EADC_SCTL0_EXTSMPT_Pos (24)
1506 #define EADC_SCTL0_EXTSMPT_Msk (0xfful << EADC_SCTL0_EXTSMPT_Pos)
1508 #define EADC_SCTL1_CHSEL_Pos (0)
1509 #define EADC_SCTL1_CHSEL_Msk (0xful << EADC_SCTL1_CHSEL_Pos)
1511 #define EADC_SCTL1_EXTREN_Pos (4)
1512 #define EADC_SCTL1_EXTREN_Msk (0x1ul << EADC_SCTL1_EXTREN_Pos)
1514 #define EADC_SCTL1_EXTFEN_Pos (5)
1515 #define EADC_SCTL1_EXTFEN_Msk (0x1ul << EADC_SCTL1_EXTFEN_Pos)
1517 #define EADC_SCTL1_TRGDLYDIV_Pos (6)
1518 #define EADC_SCTL1_TRGDLYDIV_Msk (0x3ul << EADC_SCTL1_TRGDLYDIV_Pos)
1520 #define EADC_SCTL1_TRGDLYCNT_Pos (8)
1521 #define EADC_SCTL1_TRGDLYCNT_Msk (0xfful << EADC_SCTL1_TRGDLYCNT_Pos)
1523 #define EADC_SCTL1_TRGSEL_Pos (16)
1524 #define EADC_SCTL1_TRGSEL_Msk (0x1ful << EADC_SCTL1_TRGSEL_Pos)
1526 #define EADC_SCTL1_INTPOS_Pos (22)
1527 #define EADC_SCTL1_INTPOS_Msk (0x1ul << EADC_SCTL1_INTPOS_Pos)
1529 #define EADC_SCTL1_DBMEN_Pos (23)
1530 #define EADC_SCTL1_DBMEN_Msk (0x1ul << EADC_SCTL1_DBMEN_Pos)
1532 #define EADC_SCTL1_EXTSMPT_Pos (24)
1533 #define EADC_SCTL1_EXTSMPT_Msk (0xfful << EADC_SCTL1_EXTSMPT_Pos)
1535 #define EADC_SCTL2_CHSEL_Pos (0)
1536 #define EADC_SCTL2_CHSEL_Msk (0xful << EADC_SCTL2_CHSEL_Pos)
1538 #define EADC_SCTL2_EXTREN_Pos (4)
1539 #define EADC_SCTL2_EXTREN_Msk (0x1ul << EADC_SCTL2_EXTREN_Pos)
1541 #define EADC_SCTL2_EXTFEN_Pos (5)
1542 #define EADC_SCTL2_EXTFEN_Msk (0x1ul << EADC_SCTL2_EXTFEN_Pos)
1544 #define EADC_SCTL2_TRGDLYDIV_Pos (6)
1545 #define EADC_SCTL2_TRGDLYDIV_Msk (0x3ul << EADC_SCTL2_TRGDLYDIV_Pos)
1547 #define EADC_SCTL2_TRGDLYCNT_Pos (8)
1548 #define EADC_SCTL2_TRGDLYCNT_Msk (0xfful << EADC_SCTL2_TRGDLYCNT_Pos)
1550 #define EADC_SCTL2_TRGSEL_Pos (16)
1551 #define EADC_SCTL2_TRGSEL_Msk (0x1ful << EADC_SCTL2_TRGSEL_Pos)
1553 #define EADC_SCTL2_INTPOS_Pos (22)
1554 #define EADC_SCTL2_INTPOS_Msk (0x1ul << EADC_SCTL2_INTPOS_Pos)
1556 #define EADC_SCTL2_DBMEN_Pos (23)
1557 #define EADC_SCTL2_DBMEN_Msk (0x1ul << EADC_SCTL2_DBMEN_Pos)
1559 #define EADC_SCTL2_EXTSMPT_Pos (24)
1560 #define EADC_SCTL2_EXTSMPT_Msk (0xfful << EADC_SCTL2_EXTSMPT_Pos)
1562 #define EADC_SCTL3_CHSEL_Pos (0)
1563 #define EADC_SCTL3_CHSEL_Msk (0xful << EADC_SCTL3_CHSEL_Pos)
1565 #define EADC_SCTL3_EXTREN_Pos (4)
1566 #define EADC_SCTL3_EXTREN_Msk (0x1ul << EADC_SCTL3_EXTREN_Pos)
1568 #define EADC_SCTL3_EXTFEN_Pos (5)
1569 #define EADC_SCTL3_EXTFEN_Msk (0x1ul << EADC_SCTL3_EXTFEN_Pos)
1571 #define EADC_SCTL3_TRGDLYDIV_Pos (6)
1572 #define EADC_SCTL3_TRGDLYDIV_Msk (0x3ul << EADC_SCTL3_TRGDLYDIV_Pos)
1574 #define EADC_SCTL3_TRGDLYCNT_Pos (8)
1575 #define EADC_SCTL3_TRGDLYCNT_Msk (0xfful << EADC_SCTL3_TRGDLYCNT_Pos)
1577 #define EADC_SCTL3_TRGSEL_Pos (16)
1578 #define EADC_SCTL3_TRGSEL_Msk (0x1ful << EADC_SCTL3_TRGSEL_Pos)
1580 #define EADC_SCTL3_INTPOS_Pos (22)
1581 #define EADC_SCTL3_INTPOS_Msk (0x1ul << EADC_SCTL3_INTPOS_Pos)
1583 #define EADC_SCTL3_DBMEN_Pos (23)
1584 #define EADC_SCTL3_DBMEN_Msk (0x1ul << EADC_SCTL3_DBMEN_Pos)
1586 #define EADC_SCTL3_EXTSMPT_Pos (24)
1587 #define EADC_SCTL3_EXTSMPT_Msk (0xfful << EADC_SCTL3_EXTSMPT_Pos)
1589 #define EADC_SCTL4_CHSEL_Pos (0)
1590 #define EADC_SCTL4_CHSEL_Msk (0xful << EADC_SCTL4_CHSEL_Pos)
1592 #define EADC_SCTL4_EXTREN_Pos (4)
1593 #define EADC_SCTL4_EXTREN_Msk (0x1ul << EADC_SCTL4_EXTREN_Pos)
1595 #define EADC_SCTL4_EXTFEN_Pos (5)
1596 #define EADC_SCTL4_EXTFEN_Msk (0x1ul << EADC_SCTL4_EXTFEN_Pos)
1598 #define EADC_SCTL4_TRGDLYDIV_Pos (6)
1599 #define EADC_SCTL4_TRGDLYDIV_Msk (0x3ul << EADC_SCTL4_TRGDLYDIV_Pos)
1601 #define EADC_SCTL4_TRGDLYCNT_Pos (8)
1602 #define EADC_SCTL4_TRGDLYCNT_Msk (0xfful << EADC_SCTL4_TRGDLYCNT_Pos)
1604 #define EADC_SCTL4_TRGSEL_Pos (16)
1605 #define EADC_SCTL4_TRGSEL_Msk (0x1ful << EADC_SCTL4_TRGSEL_Pos)
1607 #define EADC_SCTL4_INTPOS_Pos (22)
1608 #define EADC_SCTL4_INTPOS_Msk (0x1ul << EADC_SCTL4_INTPOS_Pos)
1610 #define EADC_SCTL4_EXTSMPT_Pos (24)
1611 #define EADC_SCTL4_EXTSMPT_Msk (0xfful << EADC_SCTL4_EXTSMPT_Pos)
1613 #define EADC_SCTL5_CHSEL_Pos (0)
1614 #define EADC_SCTL5_CHSEL_Msk (0xful << EADC_SCTL5_CHSEL_Pos)
1616 #define EADC_SCTL5_EXTREN_Pos (4)
1617 #define EADC_SCTL5_EXTREN_Msk (0x1ul << EADC_SCTL5_EXTREN_Pos)
1619 #define EADC_SCTL5_EXTFEN_Pos (5)
1620 #define EADC_SCTL5_EXTFEN_Msk (0x1ul << EADC_SCTL5_EXTFEN_Pos)
1622 #define EADC_SCTL5_TRGDLYDIV_Pos (6)
1623 #define EADC_SCTL5_TRGDLYDIV_Msk (0x3ul << EADC_SCTL5_TRGDLYDIV_Pos)
1625 #define EADC_SCTL5_TRGDLYCNT_Pos (8)
1626 #define EADC_SCTL5_TRGDLYCNT_Msk (0xfful << EADC_SCTL5_TRGDLYCNT_Pos)
1628 #define EADC_SCTL5_TRGSEL_Pos (16)
1629 #define EADC_SCTL5_TRGSEL_Msk (0x1ful << EADC_SCTL5_TRGSEL_Pos)
1631 #define EADC_SCTL5_INTPOS_Pos (22)
1632 #define EADC_SCTL5_INTPOS_Msk (0x1ul << EADC_SCTL5_INTPOS_Pos)
1634 #define EADC_SCTL5_EXTSMPT_Pos (24)
1635 #define EADC_SCTL5_EXTSMPT_Msk (0xfful << EADC_SCTL5_EXTSMPT_Pos)
1637 #define EADC_SCTL6_CHSEL_Pos (0)
1638 #define EADC_SCTL6_CHSEL_Msk (0xful << EADC_SCTL6_CHSEL_Pos)
1640 #define EADC_SCTL6_EXTREN_Pos (4)
1641 #define EADC_SCTL6_EXTREN_Msk (0x1ul << EADC_SCTL6_EXTREN_Pos)
1643 #define EADC_SCTL6_EXTFEN_Pos (5)
1644 #define EADC_SCTL6_EXTFEN_Msk (0x1ul << EADC_SCTL6_EXTFEN_Pos)
1646 #define EADC_SCTL6_TRGDLYDIV_Pos (6)
1647 #define EADC_SCTL6_TRGDLYDIV_Msk (0x3ul << EADC_SCTL6_TRGDLYDIV_Pos)
1649 #define EADC_SCTL6_TRGDLYCNT_Pos (8)
1650 #define EADC_SCTL6_TRGDLYCNT_Msk (0xfful << EADC_SCTL6_TRGDLYCNT_Pos)
1652 #define EADC_SCTL6_TRGSEL_Pos (16)
1653 #define EADC_SCTL6_TRGSEL_Msk (0x1ful << EADC_SCTL6_TRGSEL_Pos)
1655 #define EADC_SCTL6_INTPOS_Pos (22)
1656 #define EADC_SCTL6_INTPOS_Msk (0x1ul << EADC_SCTL6_INTPOS_Pos)
1658 #define EADC_SCTL6_EXTSMPT_Pos (24)
1659 #define EADC_SCTL6_EXTSMPT_Msk (0xfful << EADC_SCTL6_EXTSMPT_Pos)
1661 #define EADC_SCTL7_CHSEL_Pos (0)
1662 #define EADC_SCTL7_CHSEL_Msk (0xful << EADC_SCTL7_CHSEL_Pos)
1664 #define EADC_SCTL7_EXTREN_Pos (4)
1665 #define EADC_SCTL7_EXTREN_Msk (0x1ul << EADC_SCTL7_EXTREN_Pos)
1667 #define EADC_SCTL7_EXTFEN_Pos (5)
1668 #define EADC_SCTL7_EXTFEN_Msk (0x1ul << EADC_SCTL7_EXTFEN_Pos)
1670 #define EADC_SCTL7_TRGDLYDIV_Pos (6)
1671 #define EADC_SCTL7_TRGDLYDIV_Msk (0x3ul << EADC_SCTL7_TRGDLYDIV_Pos)
1673 #define EADC_SCTL7_TRGDLYCNT_Pos (8)
1674 #define EADC_SCTL7_TRGDLYCNT_Msk (0xfful << EADC_SCTL7_TRGDLYCNT_Pos)
1676 #define EADC_SCTL7_TRGSEL_Pos (16)
1677 #define EADC_SCTL7_TRGSEL_Msk (0x1ful << EADC_SCTL7_TRGSEL_Pos)
1679 #define EADC_SCTL7_INTPOS_Pos (22)
1680 #define EADC_SCTL7_INTPOS_Msk (0x1ul << EADC_SCTL7_INTPOS_Pos)
1682 #define EADC_SCTL7_EXTSMPT_Pos (24)
1683 #define EADC_SCTL7_EXTSMPT_Msk (0xfful << EADC_SCTL7_EXTSMPT_Pos)
1685 #define EADC_SCTL8_CHSEL_Pos (0)
1686 #define EADC_SCTL8_CHSEL_Msk (0xful << EADC_SCTL8_CHSEL_Pos)
1688 #define EADC_SCTL8_EXTREN_Pos (4)
1689 #define EADC_SCTL8_EXTREN_Msk (0x1ul << EADC_SCTL8_EXTREN_Pos)
1691 #define EADC_SCTL8_EXTFEN_Pos (5)
1692 #define EADC_SCTL8_EXTFEN_Msk (0x1ul << EADC_SCTL8_EXTFEN_Pos)
1694 #define EADC_SCTL8_TRGDLYDIV_Pos (6)
1695 #define EADC_SCTL8_TRGDLYDIV_Msk (0x3ul << EADC_SCTL8_TRGDLYDIV_Pos)
1697 #define EADC_SCTL8_TRGDLYCNT_Pos (8)
1698 #define EADC_SCTL8_TRGDLYCNT_Msk (0xfful << EADC_SCTL8_TRGDLYCNT_Pos)
1700 #define EADC_SCTL8_TRGSEL_Pos (16)
1701 #define EADC_SCTL8_TRGSEL_Msk (0x1ful << EADC_SCTL8_TRGSEL_Pos)
1703 #define EADC_SCTL8_INTPOS_Pos (22)
1704 #define EADC_SCTL8_INTPOS_Msk (0x1ul << EADC_SCTL8_INTPOS_Pos)
1706 #define EADC_SCTL8_EXTSMPT_Pos (24)
1707 #define EADC_SCTL8_EXTSMPT_Msk (0xfful << EADC_SCTL8_EXTSMPT_Pos)
1709 #define EADC_SCTL9_CHSEL_Pos (0)
1710 #define EADC_SCTL9_CHSEL_Msk (0xful << EADC_SCTL9_CHSEL_Pos)
1712 #define EADC_SCTL9_EXTREN_Pos (4)
1713 #define EADC_SCTL9_EXTREN_Msk (0x1ul << EADC_SCTL9_EXTREN_Pos)
1715 #define EADC_SCTL9_EXTFEN_Pos (5)
1716 #define EADC_SCTL9_EXTFEN_Msk (0x1ul << EADC_SCTL9_EXTFEN_Pos)
1718 #define EADC_SCTL9_TRGDLYDIV_Pos (6)
1719 #define EADC_SCTL9_TRGDLYDIV_Msk (0x3ul << EADC_SCTL9_TRGDLYDIV_Pos)
1721 #define EADC_SCTL9_TRGDLYCNT_Pos (8)
1722 #define EADC_SCTL9_TRGDLYCNT_Msk (0xfful << EADC_SCTL9_TRGDLYCNT_Pos)
1724 #define EADC_SCTL9_TRGSEL_Pos (16)
1725 #define EADC_SCTL9_TRGSEL_Msk (0x1ful << EADC_SCTL9_TRGSEL_Pos)
1727 #define EADC_SCTL9_INTPOS_Pos (22)
1728 #define EADC_SCTL9_INTPOS_Msk (0x1ul << EADC_SCTL9_INTPOS_Pos)
1730 #define EADC_SCTL9_EXTSMPT_Pos (24)
1731 #define EADC_SCTL9_EXTSMPT_Msk (0xfful << EADC_SCTL9_EXTSMPT_Pos)
1733 #define EADC_SCTL10_CHSEL_Pos (0)
1734 #define EADC_SCTL10_CHSEL_Msk (0xful << EADC_SCTL10_CHSEL_Pos)
1736 #define EADC_SCTL10_EXTREN_Pos (4)
1737 #define EADC_SCTL10_EXTREN_Msk (0x1ul << EADC_SCTL10_EXTREN_Pos)
1739 #define EADC_SCTL10_EXTFEN_Pos (5)
1740 #define EADC_SCTL10_EXTFEN_Msk (0x1ul << EADC_SCTL10_EXTFEN_Pos)
1742 #define EADC_SCTL10_TRGDLYDIV_Pos (6)
1743 #define EADC_SCTL10_TRGDLYDIV_Msk (0x3ul << EADC_SCTL10_TRGDLYDIV_Pos)
1745 #define EADC_SCTL10_TRGDLYCNT_Pos (8)
1746 #define EADC_SCTL10_TRGDLYCNT_Msk (0xfful << EADC_SCTL10_TRGDLYCNT_Pos)
1748 #define EADC_SCTL10_TRGSEL_Pos (16)
1749 #define EADC_SCTL10_TRGSEL_Msk (0x1ful << EADC_SCTL10_TRGSEL_Pos)
1751 #define EADC_SCTL10_INTPOS_Pos (22)
1752 #define EADC_SCTL10_INTPOS_Msk (0x1ul << EADC_SCTL10_INTPOS_Pos)
1754 #define EADC_SCTL10_EXTSMPT_Pos (24)
1755 #define EADC_SCTL10_EXTSMPT_Msk (0xfful << EADC_SCTL10_EXTSMPT_Pos)
1757 #define EADC_SCTL11_CHSEL_Pos (0)
1758 #define EADC_SCTL11_CHSEL_Msk (0xful << EADC_SCTL11_CHSEL_Pos)
1760 #define EADC_SCTL11_EXTREN_Pos (4)
1761 #define EADC_SCTL11_EXTREN_Msk (0x1ul << EADC_SCTL11_EXTREN_Pos)
1763 #define EADC_SCTL11_EXTFEN_Pos (5)
1764 #define EADC_SCTL11_EXTFEN_Msk (0x1ul << EADC_SCTL11_EXTFEN_Pos)
1766 #define EADC_SCTL11_TRGDLYDIV_Pos (6)
1767 #define EADC_SCTL11_TRGDLYDIV_Msk (0x3ul << EADC_SCTL11_TRGDLYDIV_Pos)
1769 #define EADC_SCTL11_TRGDLYCNT_Pos (8)
1770 #define EADC_SCTL11_TRGDLYCNT_Msk (0xfful << EADC_SCTL11_TRGDLYCNT_Pos)
1772 #define EADC_SCTL11_TRGSEL_Pos (16)
1773 #define EADC_SCTL11_TRGSEL_Msk (0x1ful << EADC_SCTL11_TRGSEL_Pos)
1775 #define EADC_SCTL11_INTPOS_Pos (22)
1776 #define EADC_SCTL11_INTPOS_Msk (0x1ul << EADC_SCTL11_INTPOS_Pos)
1778 #define EADC_SCTL11_EXTSMPT_Pos (24)
1779 #define EADC_SCTL11_EXTSMPT_Msk (0xfful << EADC_SCTL11_EXTSMPT_Pos)
1781 #define EADC_SCTL12_CHSEL_Pos (0)
1782 #define EADC_SCTL12_CHSEL_Msk (0xful << EADC_SCTL12_CHSEL_Pos)
1784 #define EADC_SCTL12_EXTREN_Pos (4)
1785 #define EADC_SCTL12_EXTREN_Msk (0x1ul << EADC_SCTL12_EXTREN_Pos)
1787 #define EADC_SCTL12_EXTFEN_Pos (5)
1788 #define EADC_SCTL12_EXTFEN_Msk (0x1ul << EADC_SCTL12_EXTFEN_Pos)
1790 #define EADC_SCTL12_TRGDLYDIV_Pos (6)
1791 #define EADC_SCTL12_TRGDLYDIV_Msk (0x3ul << EADC_SCTL12_TRGDLYDIV_Pos)
1793 #define EADC_SCTL12_TRGDLYCNT_Pos (8)
1794 #define EADC_SCTL12_TRGDLYCNT_Msk (0xfful << EADC_SCTL12_TRGDLYCNT_Pos)
1796 #define EADC_SCTL12_TRGSEL_Pos (16)
1797 #define EADC_SCTL12_TRGSEL_Msk (0x1ful << EADC_SCTL12_TRGSEL_Pos)
1799 #define EADC_SCTL12_INTPOS_Pos (22)
1800 #define EADC_SCTL12_INTPOS_Msk (0x1ul << EADC_SCTL12_INTPOS_Pos)
1802 #define EADC_SCTL12_EXTSMPT_Pos (24)
1803 #define EADC_SCTL12_EXTSMPT_Msk (0xfful << EADC_SCTL12_EXTSMPT_Pos)
1805 #define EADC_SCTL13_CHSEL_Pos (0)
1806 #define EADC_SCTL13_CHSEL_Msk (0xful << EADC_SCTL13_CHSEL_Pos)
1808 #define EADC_SCTL13_EXTREN_Pos (4)
1809 #define EADC_SCTL13_EXTREN_Msk (0x1ul << EADC_SCTL13_EXTREN_Pos)
1811 #define EADC_SCTL13_EXTFEN_Pos (5)
1812 #define EADC_SCTL13_EXTFEN_Msk (0x1ul << EADC_SCTL13_EXTFEN_Pos)
1814 #define EADC_SCTL13_TRGDLYDIV_Pos (6)
1815 #define EADC_SCTL13_TRGDLYDIV_Msk (0x3ul << EADC_SCTL13_TRGDLYDIV_Pos)
1817 #define EADC_SCTL13_TRGDLYCNT_Pos (8)
1818 #define EADC_SCTL13_TRGDLYCNT_Msk (0xfful << EADC_SCTL13_TRGDLYCNT_Pos)
1820 #define EADC_SCTL13_TRGSEL_Pos (16)
1821 #define EADC_SCTL13_TRGSEL_Msk (0x1ful << EADC_SCTL13_TRGSEL_Pos)
1823 #define EADC_SCTL13_INTPOS_Pos (22)
1824 #define EADC_SCTL13_INTPOS_Msk (0x1ul << EADC_SCTL13_INTPOS_Pos)
1826 #define EADC_SCTL13_EXTSMPT_Pos (24)
1827 #define EADC_SCTL13_EXTSMPT_Msk (0xfful << EADC_SCTL13_EXTSMPT_Pos)
1829 #define EADC_SCTL14_CHSEL_Pos (0)
1830 #define EADC_SCTL14_CHSEL_Msk (0xful << EADC_SCTL14_CHSEL_Pos)
1832 #define EADC_SCTL14_EXTREN_Pos (4)
1833 #define EADC_SCTL14_EXTREN_Msk (0x1ul << EADC_SCTL14_EXTREN_Pos)
1835 #define EADC_SCTL14_EXTFEN_Pos (5)
1836 #define EADC_SCTL14_EXTFEN_Msk (0x1ul << EADC_SCTL14_EXTFEN_Pos)
1838 #define EADC_SCTL14_TRGDLYDIV_Pos (6)
1839 #define EADC_SCTL14_TRGDLYDIV_Msk (0x3ul << EADC_SCTL14_TRGDLYDIV_Pos)
1841 #define EADC_SCTL14_TRGDLYCNT_Pos (8)
1842 #define EADC_SCTL14_TRGDLYCNT_Msk (0xfful << EADC_SCTL14_TRGDLYCNT_Pos)
1844 #define EADC_SCTL14_TRGSEL_Pos (16)
1845 #define EADC_SCTL14_TRGSEL_Msk (0x1ful << EADC_SCTL14_TRGSEL_Pos)
1847 #define EADC_SCTL14_INTPOS_Pos (22)
1848 #define EADC_SCTL14_INTPOS_Msk (0x1ul << EADC_SCTL14_INTPOS_Pos)
1850 #define EADC_SCTL14_EXTSMPT_Pos (24)
1851 #define EADC_SCTL14_EXTSMPT_Msk (0xfful << EADC_SCTL14_EXTSMPT_Pos)
1853 #define EADC_SCTL15_CHSEL_Pos (0)
1854 #define EADC_SCTL15_CHSEL_Msk (0xful << EADC_SCTL15_CHSEL_Pos)
1856 #define EADC_SCTL15_EXTREN_Pos (4)
1857 #define EADC_SCTL15_EXTREN_Msk (0x1ul << EADC_SCTL15_EXTREN_Pos)
1859 #define EADC_SCTL15_EXTFEN_Pos (5)
1860 #define EADC_SCTL15_EXTFEN_Msk (0x1ul << EADC_SCTL15_EXTFEN_Pos)
1862 #define EADC_SCTL15_TRGDLYDIV_Pos (6)
1863 #define EADC_SCTL15_TRGDLYDIV_Msk (0x3ul << EADC_SCTL15_TRGDLYDIV_Pos)
1865 #define EADC_SCTL15_TRGDLYCNT_Pos (8)
1866 #define EADC_SCTL15_TRGDLYCNT_Msk (0xfful << EADC_SCTL15_TRGDLYCNT_Pos)
1868 #define EADC_SCTL15_TRGSEL_Pos (16)
1869 #define EADC_SCTL15_TRGSEL_Msk (0x1ful << EADC_SCTL15_TRGSEL_Pos)
1871 #define EADC_SCTL15_INTPOS_Pos (22)
1872 #define EADC_SCTL15_INTPOS_Msk (0x1ul << EADC_SCTL15_INTPOS_Pos)
1874 #define EADC_SCTL15_EXTSMPT_Pos (24)
1875 #define EADC_SCTL15_EXTSMPT_Msk (0xfful << EADC_SCTL15_EXTSMPT_Pos)
1877 #define EADC_SCTL16_EXTSMPT_Pos (24)
1878 #define EADC_SCTL16_EXTSMPT_Msk (0xfful << EADC_SCTL16_EXTSMPT_Pos)
1880 #define EADC_SCTL17_EXTSMPT_Pos (24)
1881 #define EADC_SCTL17_EXTSMPT_Msk (0xfful << EADC_SCTL17_EXTSMPT_Pos)
1883 #define EADC_SCTL18_EXTSMPT_Pos (24)
1884 #define EADC_SCTL18_EXTSMPT_Msk (0xfful << EADC_SCTL18_EXTSMPT_Pos)
1886 #define EADC_INTSRC0_SPLIE0_Pos (0)
1887 #define EADC_INTSRC0_SPLIE0_Msk (0x1ul << EADC_INTSRC0_SPLIE0_Pos)
1889 #define EADC_INTSRC0_SPLIE1_Pos (1)
1890 #define EADC_INTSRC0_SPLIE1_Msk (0x1ul << EADC_INTSRC0_SPLIE1_Pos)
1892 #define EADC_INTSRC0_SPLIE2_Pos (2)
1893 #define EADC_INTSRC0_SPLIE2_Msk (0x1ul << EADC_INTSRC0_SPLIE2_Pos)
1895 #define EADC_INTSRC0_SPLIE3_Pos (3)
1896 #define EADC_INTSRC0_SPLIE3_Msk (0x1ul << EADC_INTSRC0_SPLIE3_Pos)
1898 #define EADC_INTSRC0_SPLIE4_Pos (4)
1899 #define EADC_INTSRC0_SPLIE4_Msk (0x1ul << EADC_INTSRC0_SPLIE4_Pos)
1901 #define EADC_INTSRC0_SPLIE5_Pos (5)
1902 #define EADC_INTSRC0_SPLIE5_Msk (0x1ul << EADC_INTSRC0_SPLIE5_Pos)
1904 #define EADC_INTSRC0_SPLIE6_Pos (6)
1905 #define EADC_INTSRC0_SPLIE6_Msk (0x1ul << EADC_INTSRC0_SPLIE6_Pos)
1907 #define EADC_INTSRC0_SPLIE7_Pos (7)
1908 #define EADC_INTSRC0_SPLIE7_Msk (0x1ul << EADC_INTSRC0_SPLIE7_Pos)
1910 #define EADC_INTSRC0_SPLIE8_Pos (8)
1911 #define EADC_INTSRC0_SPLIE8_Msk (0x1ul << EADC_INTSRC0_SPLIE8_Pos)
1913 #define EADC_INTSRC0_SPLIE9_Pos (9)
1914 #define EADC_INTSRC0_SPLIE9_Msk (0x1ul << EADC_INTSRC0_SPLIE9_Pos)
1916 #define EADC_INTSRC0_SPLIE10_Pos (10)
1917 #define EADC_INTSRC0_SPLIE10_Msk (0x1ul << EADC_INTSRC0_SPLIE10_Pos)
1919 #define EADC_INTSRC0_SPLIE11_Pos (11)
1920 #define EADC_INTSRC0_SPLIE11_Msk (0x1ul << EADC_INTSRC0_SPLIE11_Pos)
1922 #define EADC_INTSRC0_SPLIE12_Pos (12)
1923 #define EADC_INTSRC0_SPLIE12_Msk (0x1ul << EADC_INTSRC0_SPLIE12_Pos)
1925 #define EADC_INTSRC0_SPLIE13_Pos (13)
1926 #define EADC_INTSRC0_SPLIE13_Msk (0x1ul << EADC_INTSRC0_SPLIE13_Pos)
1928 #define EADC_INTSRC0_SPLIE14_Pos (14)
1929 #define EADC_INTSRC0_SPLIE14_Msk (0x1ul << EADC_INTSRC0_SPLIE14_Pos)
1931 #define EADC_INTSRC0_SPLIE15_Pos (15)
1932 #define EADC_INTSRC0_SPLIE15_Msk (0x1ul << EADC_INTSRC0_SPLIE15_Pos)
1934 #define EADC_INTSRC0_SPLIE16_Pos (16)
1935 #define EADC_INTSRC0_SPLIE16_Msk (0x1ul << EADC_INTSRC0_SPLIE16_Pos)
1937 #define EADC_INTSRC0_SPLIE17_Pos (17)
1938 #define EADC_INTSRC0_SPLIE17_Msk (0x1ul << EADC_INTSRC0_SPLIE17_Pos)
1940 #define EADC_INTSRC0_SPLIE18_Pos (18)
1941 #define EADC_INTSRC0_SPLIE18_Msk (0x1ul << EADC_INTSRC0_SPLIE18_Pos)
1943 #define EADC_INTSRC1_SPLIE0_Pos (0)
1944 #define EADC_INTSRC1_SPLIE0_Msk (0x1ul << EADC_INTSRC1_SPLIE0_Pos)
1946 #define EADC_INTSRC1_SPLIE1_Pos (1)
1947 #define EADC_INTSRC1_SPLIE1_Msk (0x1ul << EADC_INTSRC1_SPLIE1_Pos)
1949 #define EADC_INTSRC1_SPLIE2_Pos (2)
1950 #define EADC_INTSRC1_SPLIE2_Msk (0x1ul << EADC_INTSRC1_SPLIE2_Pos)
1952 #define EADC_INTSRC1_SPLIE3_Pos (3)
1953 #define EADC_INTSRC1_SPLIE3_Msk (0x1ul << EADC_INTSRC1_SPLIE3_Pos)
1955 #define EADC_INTSRC1_SPLIE4_Pos (4)
1956 #define EADC_INTSRC1_SPLIE4_Msk (0x1ul << EADC_INTSRC1_SPLIE4_Pos)
1958 #define EADC_INTSRC1_SPLIE5_Pos (5)
1959 #define EADC_INTSRC1_SPLIE5_Msk (0x1ul << EADC_INTSRC1_SPLIE5_Pos)
1961 #define EADC_INTSRC1_SPLIE6_Pos (6)
1962 #define EADC_INTSRC1_SPLIE6_Msk (0x1ul << EADC_INTSRC1_SPLIE6_Pos)
1964 #define EADC_INTSRC1_SPLIE7_Pos (7)
1965 #define EADC_INTSRC1_SPLIE7_Msk (0x1ul << EADC_INTSRC1_SPLIE7_Pos)
1967 #define EADC_INTSRC1_SPLIE8_Pos (8)
1968 #define EADC_INTSRC1_SPLIE8_Msk (0x1ul << EADC_INTSRC1_SPLIE8_Pos)
1970 #define EADC_INTSRC1_SPLIE9_Pos (9)
1971 #define EADC_INTSRC1_SPLIE9_Msk (0x1ul << EADC_INTSRC1_SPLIE9_Pos)
1973 #define EADC_INTSRC1_SPLIE10_Pos (10)
1974 #define EADC_INTSRC1_SPLIE10_Msk (0x1ul << EADC_INTSRC1_SPLIE10_Pos)
1976 #define EADC_INTSRC1_SPLIE11_Pos (11)
1977 #define EADC_INTSRC1_SPLIE11_Msk (0x1ul << EADC_INTSRC1_SPLIE11_Pos)
1979 #define EADC_INTSRC1_SPLIE12_Pos (12)
1980 #define EADC_INTSRC1_SPLIE12_Msk (0x1ul << EADC_INTSRC1_SPLIE12_Pos)
1982 #define EADC_INTSRC1_SPLIE13_Pos (13)
1983 #define EADC_INTSRC1_SPLIE13_Msk (0x1ul << EADC_INTSRC1_SPLIE13_Pos)
1985 #define EADC_INTSRC1_SPLIE14_Pos (14)
1986 #define EADC_INTSRC1_SPLIE14_Msk (0x1ul << EADC_INTSRC1_SPLIE14_Pos)
1988 #define EADC_INTSRC1_SPLIE15_Pos (15)
1989 #define EADC_INTSRC1_SPLIE15_Msk (0x1ul << EADC_INTSRC1_SPLIE15_Pos)
1991 #define EADC_INTSRC1_SPLIE16_Pos (16)
1992 #define EADC_INTSRC1_SPLIE16_Msk (0x1ul << EADC_INTSRC1_SPLIE16_Pos)
1994 #define EADC_INTSRC1_SPLIE17_Pos (17)
1995 #define EADC_INTSRC1_SPLIE17_Msk (0x1ul << EADC_INTSRC1_SPLIE17_Pos)
1997 #define EADC_INTSRC1_SPLIE18_Pos (18)
1998 #define EADC_INTSRC1_SPLIE18_Msk (0x1ul << EADC_INTSRC1_SPLIE18_Pos)
2000 #define EADC_INTSRC2_SPLIE0_Pos (0)
2001 #define EADC_INTSRC2_SPLIE0_Msk (0x1ul << EADC_INTSRC2_SPLIE0_Pos)
2003 #define EADC_INTSRC2_SPLIE1_Pos (1)
2004 #define EADC_INTSRC2_SPLIE1_Msk (0x1ul << EADC_INTSRC2_SPLIE1_Pos)
2006 #define EADC_INTSRC2_SPLIE2_Pos (2)
2007 #define EADC_INTSRC2_SPLIE2_Msk (0x1ul << EADC_INTSRC2_SPLIE2_Pos)
2009 #define EADC_INTSRC2_SPLIE3_Pos (3)
2010 #define EADC_INTSRC2_SPLIE3_Msk (0x1ul << EADC_INTSRC2_SPLIE3_Pos)
2012 #define EADC_INTSRC2_SPLIE4_Pos (4)
2013 #define EADC_INTSRC2_SPLIE4_Msk (0x1ul << EADC_INTSRC2_SPLIE4_Pos)
2015 #define EADC_INTSRC2_SPLIE5_Pos (5)
2016 #define EADC_INTSRC2_SPLIE5_Msk (0x1ul << EADC_INTSRC2_SPLIE5_Pos)
2018 #define EADC_INTSRC2_SPLIE6_Pos (6)
2019 #define EADC_INTSRC2_SPLIE6_Msk (0x1ul << EADC_INTSRC2_SPLIE6_Pos)
2021 #define EADC_INTSRC2_SPLIE7_Pos (7)
2022 #define EADC_INTSRC2_SPLIE7_Msk (0x1ul << EADC_INTSRC2_SPLIE7_Pos)
2024 #define EADC_INTSRC2_SPLIE8_Pos (8)
2025 #define EADC_INTSRC2_SPLIE8_Msk (0x1ul << EADC_INTSRC2_SPLIE8_Pos)
2027 #define EADC_INTSRC2_SPLIE9_Pos (9)
2028 #define EADC_INTSRC2_SPLIE9_Msk (0x1ul << EADC_INTSRC2_SPLIE9_Pos)
2030 #define EADC_INTSRC2_SPLIE10_Pos (10)
2031 #define EADC_INTSRC2_SPLIE10_Msk (0x1ul << EADC_INTSRC2_SPLIE10_Pos)
2033 #define EADC_INTSRC2_SPLIE11_Pos (11)
2034 #define EADC_INTSRC2_SPLIE11_Msk (0x1ul << EADC_INTSRC2_SPLIE11_Pos)
2036 #define EADC_INTSRC2_SPLIE12_Pos (12)
2037 #define EADC_INTSRC2_SPLIE12_Msk (0x1ul << EADC_INTSRC2_SPLIE12_Pos)
2039 #define EADC_INTSRC2_SPLIE13_Pos (13)
2040 #define EADC_INTSRC2_SPLIE13_Msk (0x1ul << EADC_INTSRC2_SPLIE13_Pos)
2042 #define EADC_INTSRC2_SPLIE14_Pos (14)
2043 #define EADC_INTSRC2_SPLIE14_Msk (0x1ul << EADC_INTSRC2_SPLIE14_Pos)
2045 #define EADC_INTSRC2_SPLIE15_Pos (15)
2046 #define EADC_INTSRC2_SPLIE15_Msk (0x1ul << EADC_INTSRC2_SPLIE15_Pos)
2048 #define EADC_INTSRC2_SPLIE16_Pos (16)
2049 #define EADC_INTSRC2_SPLIE16_Msk (0x1ul << EADC_INTSRC2_SPLIE16_Pos)
2051 #define EADC_INTSRC2_SPLIE17_Pos (17)
2052 #define EADC_INTSRC2_SPLIE17_Msk (0x1ul << EADC_INTSRC2_SPLIE17_Pos)
2054 #define EADC_INTSRC2_SPLIE18_Pos (18)
2055 #define EADC_INTSRC2_SPLIE18_Msk (0x1ul << EADC_INTSRC2_SPLIE18_Pos)
2057 #define EADC_INTSRC3_SPLIE0_Pos (0)
2058 #define EADC_INTSRC3_SPLIE0_Msk (0x1ul << EADC_INTSRC3_SPLIE0_Pos)
2060 #define EADC_INTSRC3_SPLIE1_Pos (1)
2061 #define EADC_INTSRC3_SPLIE1_Msk (0x1ul << EADC_INTSRC3_SPLIE1_Pos)
2063 #define EADC_INTSRC3_SPLIE2_Pos (2)
2064 #define EADC_INTSRC3_SPLIE2_Msk (0x1ul << EADC_INTSRC3_SPLIE2_Pos)
2066 #define EADC_INTSRC3_SPLIE3_Pos (3)
2067 #define EADC_INTSRC3_SPLIE3_Msk (0x1ul << EADC_INTSRC3_SPLIE3_Pos)
2069 #define EADC_INTSRC3_SPLIE4_Pos (4)
2070 #define EADC_INTSRC3_SPLIE4_Msk (0x1ul << EADC_INTSRC3_SPLIE4_Pos)
2072 #define EADC_INTSRC3_SPLIE5_Pos (5)
2073 #define EADC_INTSRC3_SPLIE5_Msk (0x1ul << EADC_INTSRC3_SPLIE5_Pos)
2075 #define EADC_INTSRC3_SPLIE6_Pos (6)
2076 #define EADC_INTSRC3_SPLIE6_Msk (0x1ul << EADC_INTSRC3_SPLIE6_Pos)
2078 #define EADC_INTSRC3_SPLIE7_Pos (7)
2079 #define EADC_INTSRC3_SPLIE7_Msk (0x1ul << EADC_INTSRC3_SPLIE7_Pos)
2081 #define EADC_INTSRC3_SPLIE8_Pos (8)
2082 #define EADC_INTSRC3_SPLIE8_Msk (0x1ul << EADC_INTSRC3_SPLIE8_Pos)
2084 #define EADC_INTSRC3_SPLIE9_Pos (9)
2085 #define EADC_INTSRC3_SPLIE9_Msk (0x1ul << EADC_INTSRC3_SPLIE9_Pos)
2087 #define EADC_INTSRC3_SPLIE10_Pos (10)
2088 #define EADC_INTSRC3_SPLIE10_Msk (0x1ul << EADC_INTSRC3_SPLIE10_Pos)
2090 #define EADC_INTSRC3_SPLIE11_Pos (11)
2091 #define EADC_INTSRC3_SPLIE11_Msk (0x1ul << EADC_INTSRC3_SPLIE11_Pos)
2093 #define EADC_INTSRC3_SPLIE12_Pos (12)
2094 #define EADC_INTSRC3_SPLIE12_Msk (0x1ul << EADC_INTSRC3_SPLIE12_Pos)
2096 #define EADC_INTSRC3_SPLIE13_Pos (13)
2097 #define EADC_INTSRC3_SPLIE13_Msk (0x1ul << EADC_INTSRC3_SPLIE13_Pos)
2099 #define EADC_INTSRC3_SPLIE14_Pos (14)
2100 #define EADC_INTSRC3_SPLIE14_Msk (0x1ul << EADC_INTSRC3_SPLIE14_Pos)
2102 #define EADC_INTSRC3_SPLIE15_Pos (15)
2103 #define EADC_INTSRC3_SPLIE15_Msk (0x1ul << EADC_INTSRC3_SPLIE15_Pos)
2105 #define EADC_INTSRC3_SPLIE16_Pos (16)
2106 #define EADC_INTSRC3_SPLIE16_Msk (0x1ul << EADC_INTSRC3_SPLIE16_Pos)
2108 #define EADC_INTSRC3_SPLIE17_Pos (17)
2109 #define EADC_INTSRC3_SPLIE17_Msk (0x1ul << EADC_INTSRC3_SPLIE17_Pos)
2111 #define EADC_INTSRC3_SPLIE18_Pos (18)
2112 #define EADC_INTSRC3_SPLIE18_Msk (0x1ul << EADC_INTSRC3_SPLIE18_Pos)
2114 #define EADC_CMP_ADCMPEN_Pos (0)
2115 #define EADC_CMP_ADCMPEN_Msk (0x1ul << EADC_CMP_ADCMPEN_Pos)
2117 #define EADC_CMP_ADCMPIE_Pos (1)
2118 #define EADC_CMP_ADCMPIE_Msk (0x1ul << EADC_CMP_ADCMPIE_Pos)
2120 #define EADC_CMP_CMPCOND_Pos (2)
2121 #define EADC_CMP_CMPCOND_Msk (0x1ul << EADC_CMP_CMPCOND_Pos)
2123 #define EADC_CMP_CMPSPL_Pos (3)
2124 #define EADC_CMP_CMPSPL_Msk (0x1ful << EADC_CMP_CMPSPL_Pos)
2126 #define EADC_CMP_CMPMCNT_Pos (8)
2127 #define EADC_CMP_CMPMCNT_Msk (0xful << EADC_CMP_CMPMCNT_Pos)
2129 #define EADC_CMP_CMPWEN_Pos (15)
2130 #define EADC_CMP_CMPWEN_Msk (0x1ul << EADC_CMP_CMPWEN_Pos)
2132 #define EADC_CMP_CMPDAT_Pos (16)
2133 #define EADC_CMP_CMPDAT_Msk (0xffful << EADC_CMP_CMPDAT_Pos)
2135 #define EADC_CMP0_ADCMPEN_Pos (0)
2136 #define EADC_CMP0_ADCMPEN_Msk (0x1ul << EADC_CMP0_ADCMPEN_Pos)
2138 #define EADC_CMP0_ADCMPIE_Pos (1)
2139 #define EADC_CMP0_ADCMPIE_Msk (0x1ul << EADC_CMP0_ADCMPIE_Pos)
2141 #define EADC_CMP0_CMPCOND_Pos (2)
2142 #define EADC_CMP0_CMPCOND_Msk (0x1ul << EADC_CMP0_CMPCOND_Pos)
2144 #define EADC_CMP0_CMPSPL_Pos (3)
2145 #define EADC_CMP0_CMPSPL_Msk (0x1ful << EADC_CMP0_CMPSPL_Pos)
2147 #define EADC_CMP0_CMPMCNT_Pos (8)
2148 #define EADC_CMP0_CMPMCNT_Msk (0xful << EADC_CMP0_CMPMCNT_Pos)
2150 #define EADC_CMP0_CMPWEN_Pos (15)
2151 #define EADC_CMP0_CMPWEN_Msk (0x1ul << EADC_CMP0_CMPWEN_Pos)
2153 #define EADC_CMP0_CMPDAT_Pos (16)
2154 #define EADC_CMP0_CMPDAT_Msk (0xffful << EADC_CMP0_CMPDAT_Pos)
2156 #define EADC_CMP1_ADCMPEN_Pos (0)
2157 #define EADC_CMP1_ADCMPEN_Msk (0x1ul << EADC_CMP1_ADCMPEN_Pos)
2159 #define EADC_CMP1_ADCMPIE_Pos (1)
2160 #define EADC_CMP1_ADCMPIE_Msk (0x1ul << EADC_CMP1_ADCMPIE_Pos)
2162 #define EADC_CMP1_CMPCOND_Pos (2)
2163 #define EADC_CMP1_CMPCOND_Msk (0x1ul << EADC_CMP1_CMPCOND_Pos)
2165 #define EADC_CMP1_CMPSPL_Pos (3)
2166 #define EADC_CMP1_CMPSPL_Msk (0x1ful << EADC_CMP1_CMPSPL_Pos)
2168 #define EADC_CMP1_CMPMCNT_Pos (8)
2169 #define EADC_CMP1_CMPMCNT_Msk (0xful << EADC_CMP1_CMPMCNT_Pos)
2171 #define EADC_CMP1_CMPWEN_Pos (15)
2172 #define EADC_CMP1_CMPWEN_Msk (0x1ul << EADC_CMP1_CMPWEN_Pos)
2174 #define EADC_CMP1_CMPDAT_Pos (16)
2175 #define EADC_CMP1_CMPDAT_Msk (0xffful << EADC_CMP1_CMPDAT_Pos)
2177 #define EADC_CMP2_ADCMPEN_Pos (0)
2178 #define EADC_CMP2_ADCMPEN_Msk (0x1ul << EADC_CMP2_ADCMPEN_Pos)
2180 #define EADC_CMP2_ADCMPIE_Pos (1)
2181 #define EADC_CMP2_ADCMPIE_Msk (0x1ul << EADC_CMP2_ADCMPIE_Pos)
2183 #define EADC_CMP2_CMPCOND_Pos (2)
2184 #define EADC_CMP2_CMPCOND_Msk (0x1ul << EADC_CMP2_CMPCOND_Pos)
2186 #define EADC_CMP2_CMPSPL_Pos (3)
2187 #define EADC_CMP2_CMPSPL_Msk (0x1ful << EADC_CMP2_CMPSPL_Pos)
2189 #define EADC_CMP2_CMPMCNT_Pos (8)
2190 #define EADC_CMP2_CMPMCNT_Msk (0xful << EADC_CMP2_CMPMCNT_Pos)
2192 #define EADC_CMP2_CMPWEN_Pos (15)
2193 #define EADC_CMP2_CMPWEN_Msk (0x1ul << EADC_CMP2_CMPWEN_Pos)
2195 #define EADC_CMP2_CMPDAT_Pos (16)
2196 #define EADC_CMP2_CMPDAT_Msk (0xffful << EADC_CMP2_CMPDAT_Pos)
2198 #define EADC_CMP3_ADCMPEN_Pos (0)
2199 #define EADC_CMP3_ADCMPEN_Msk (0x1ul << EADC_CMP3_ADCMPEN_Pos)
2201 #define EADC_CMP3_ADCMPIE_Pos (1)
2202 #define EADC_CMP3_ADCMPIE_Msk (0x1ul << EADC_CMP3_ADCMPIE_Pos)
2204 #define EADC_CMP3_CMPCOND_Pos (2)
2205 #define EADC_CMP3_CMPCOND_Msk (0x1ul << EADC_CMP3_CMPCOND_Pos)
2207 #define EADC_CMP3_CMPSPL_Pos (3)
2208 #define EADC_CMP3_CMPSPL_Msk (0x1ful << EADC_CMP3_CMPSPL_Pos)
2210 #define EADC_CMP3_CMPMCNT_Pos (8)
2211 #define EADC_CMP3_CMPMCNT_Msk (0xful << EADC_CMP3_CMPMCNT_Pos)
2213 #define EADC_CMP3_CMPWEN_Pos (15)
2214 #define EADC_CMP3_CMPWEN_Msk (0x1ul << EADC_CMP3_CMPWEN_Pos)
2216 #define EADC_CMP3_CMPDAT_Pos (16)
2217 #define EADC_CMP3_CMPDAT_Msk (0xffful << EADC_CMP3_CMPDAT_Pos)
2219 #define EADC_STATUS0_VALID_Pos (0)
2220 #define EADC_STATUS0_VALID_Msk (0xfffful << EADC_STATUS0_VALID_Pos)
2222 #define EADC_STATUS0_OV_Pos (16)
2223 #define EADC_STATUS0_OV_Msk (0xfffful << EADC_STATUS0_OV_Pos)
2225 #define EADC_STATUS1_VALID_Pos (0)
2226 #define EADC_STATUS1_VALID_Msk (0x7ul << EADC_STATUS1_VALID_Pos)
2228 #define EADC_STATUS1_OV_Pos (16)
2229 #define EADC_STATUS1_OV_Msk (0x7ul << EADC_STATUS1_OV_Pos)
2231 #define EADC_STATUS2_ADIF0_Pos (0)
2232 #define EADC_STATUS2_ADIF0_Msk (0x1ul << EADC_STATUS2_ADIF0_Pos)
2234 #define EADC_STATUS2_ADIF1_Pos (1)
2235 #define EADC_STATUS2_ADIF1_Msk (0x1ul << EADC_STATUS2_ADIF1_Pos)
2237 #define EADC_STATUS2_ADIF2_Pos (2)
2238 #define EADC_STATUS2_ADIF2_Msk (0x1ul << EADC_STATUS2_ADIF2_Pos)
2240 #define EADC_STATUS2_ADIF3_Pos (3)
2241 #define EADC_STATUS2_ADIF3_Msk (0x1ul << EADC_STATUS2_ADIF3_Pos)
2243 #define EADC_STATUS2_ADCMPF0_Pos (4)
2244 #define EADC_STATUS2_ADCMPF0_Msk (0x1ul << EADC_STATUS2_ADCMPF0_Pos)
2246 #define EADC_STATUS2_ADCMPF1_Pos (5)
2247 #define EADC_STATUS2_ADCMPF1_Msk (0x1ul << EADC_STATUS2_ADCMPF1_Pos)
2249 #define EADC_STATUS2_ADCMPF2_Pos (6)
2250 #define EADC_STATUS2_ADCMPF2_Msk (0x1ul << EADC_STATUS2_ADCMPF2_Pos)
2252 #define EADC_STATUS2_ADCMPF3_Pos (7)
2253 #define EADC_STATUS2_ADCMPF3_Msk (0x1ul << EADC_STATUS2_ADCMPF3_Pos)
2255 #define EADC_STATUS2_ADOVIF0_Pos (8)
2256 #define EADC_STATUS2_ADOVIF0_Msk (0x1ul << EADC_STATUS2_ADOVIF0_Pos)
2258 #define EADC_STATUS2_ADOVIF1_Pos (9)
2259 #define EADC_STATUS2_ADOVIF1_Msk (0x1ul << EADC_STATUS2_ADOVIF1_Pos)
2261 #define EADC_STATUS2_ADOVIF2_Pos (10)
2262 #define EADC_STATUS2_ADOVIF2_Msk (0x1ul << EADC_STATUS2_ADOVIF2_Pos)
2264 #define EADC_STATUS2_ADOVIF3_Pos (11)
2265 #define EADC_STATUS2_ADOVIF3_Msk (0x1ul << EADC_STATUS2_ADOVIF3_Pos)
2267 #define EADC_STATUS2_ADCMPO0_Pos (12)
2268 #define EADC_STATUS2_ADCMPO0_Msk (0x1ul << EADC_STATUS2_ADCMPO0_Pos)
2270 #define EADC_STATUS2_ADCMPO1_Pos (13)
2271 #define EADC_STATUS2_ADCMPO1_Msk (0x1ul << EADC_STATUS2_ADCMPO1_Pos)
2273 #define EADC_STATUS2_ADCMPO2_Pos (14)
2274 #define EADC_STATUS2_ADCMPO2_Msk (0x1ul << EADC_STATUS2_ADCMPO2_Pos)
2276 #define EADC_STATUS2_ADCMPO3_Pos (15)
2277 #define EADC_STATUS2_ADCMPO3_Msk (0x1ul << EADC_STATUS2_ADCMPO3_Pos)
2279 #define EADC_STATUS2_CHANNEL_Pos (16)
2280 #define EADC_STATUS2_CHANNEL_Msk (0x1ful << EADC_STATUS2_CHANNEL_Pos)
2282 #define EADC_STATUS2_BUSY_Pos (23)
2283 #define EADC_STATUS2_BUSY_Msk (0x1ul << EADC_STATUS2_BUSY_Pos)
2285 #define EADC_STATUS2_ADOVIF_Pos (24)
2286 #define EADC_STATUS2_ADOVIF_Msk (0x1ul << EADC_STATUS2_ADOVIF_Pos)
2288 #define EADC_STATUS2_STOVF_Pos (25)
2289 #define EADC_STATUS2_STOVF_Msk (0x1ul << EADC_STATUS2_STOVF_Pos)
2291 #define EADC_STATUS2_AVALID_Pos (26)
2292 #define EADC_STATUS2_AVALID_Msk (0x1ul << EADC_STATUS2_AVALID_Pos)
2294 #define EADC_STATUS2_AOV_Pos (27)
2295 #define EADC_STATUS2_AOV_Msk (0x1ul << EADC_STATUS2_AOV_Pos)
2297 #define EADC_STATUS3_CURSPL_Pos (0)
2298 #define EADC_STATUS3_CURSPL_Msk (0x1ful << EADC_STATUS3_CURSPL_Pos)
2300 #define EADC_DDAT0_RESULT_Pos (0)
2301 #define EADC_DDAT0_RESULT_Msk (0xfffful << EADC_DDAT0_RESULT_Pos)
2303 #define EADC_DDAT0_OV_Pos (16)
2304 #define EADC_DDAT0_OV_Msk (0x1ul << EADC_DDAT0_OV_Pos)
2306 #define EADC_DDAT0_VALID_Pos (17)
2307 #define EADC_DDAT0_VALID_Msk (0x1ul << EADC_DDAT0_VALID_Pos)
2309 #define EADC_DDAT1_RESULT_Pos (0)
2310 #define EADC_DDAT1_RESULT_Msk (0xfffful << EADC_DDAT1_RESULT_Pos)
2312 #define EADC_DDAT1_OV_Pos (16)
2313 #define EADC_DDAT1_OV_Msk (0x1ul << EADC_DDAT1_OV_Pos)
2315 #define EADC_DDAT1_VALID_Pos (17)
2316 #define EADC_DDAT1_VALID_Msk (0x1ul << EADC_DDAT1_VALID_Pos)
2318 #define EADC_DDAT2_RESULT_Pos (0)
2319 #define EADC_DDAT2_RESULT_Msk (0xfffful << EADC_DDAT2_RESULT_Pos)
2321 #define EADC_DDAT2_OV_Pos (16)
2322 #define EADC_DDAT2_OV_Msk (0x1ul << EADC_DDAT2_OV_Pos)
2324 #define EADC_DDAT2_VALID_Pos (17)
2325 #define EADC_DDAT2_VALID_Msk (0x1ul << EADC_DDAT2_VALID_Pos)
2327 #define EADC_DDAT3_RESULT_Pos (0)
2328 #define EADC_DDAT3_RESULT_Msk (0xfffful << EADC_DDAT3_RESULT_Pos)
2330 #define EADC_DDAT3_OV_Pos (16)
2331 #define EADC_DDAT3_OV_Msk (0x1ul << EADC_DDAT3_OV_Pos)
2333 #define EADC_DDAT3_VALID_Pos (17)
2334 #define EADC_DDAT3_VALID_Msk (0x1ul << EADC_DDAT3_VALID_Pos)
2336 #define EADC_PWRM_PWUPRDY_Pos (0)
2337 #define EADC_PWRM_PWUPRDY_Msk (0x1ul << EADC_PWRM_PWUPRDY_Pos)
2339 #define EADC_PWRM_PWUCALEN_Pos (1)
2340 #define EADC_PWRM_PWUCALEN_Msk (0x1ul << EADC_PWRM_PWUCALEN_Pos)
2342 #define EADC_PWRM_PWDMOD_Pos (2)
2343 #define EADC_PWRM_PWDMOD_Msk (0x3ul << EADC_PWRM_PWDMOD_Pos)
2345 #define EADC_PWRM_LDOSUT_Pos (8)
2346 #define EADC_PWRM_LDOSUT_Msk (0xffful << EADC_PWRM_LDOSUT_Pos)
2348 #define EADC_CALCTL_CALSTART_Pos (1)
2349 #define EADC_CALCTL_CALSTART_Msk (0x1ul << EADC_CALCTL_CALSTART_Pos)
2351 #define EADC_CALCTL_CALDONE_Pos (2)
2352 #define EADC_CALCTL_CALDONE_Msk (0x1ul << EADC_CALCTL_CALDONE_Pos)
2354 #define EADC_CALCTL_CALSEL_Pos (3)
2355 #define EADC_CALCTL_CALSEL_Msk (0x1ul << EADC_CALCTL_CALSEL_Pos)
2357 #define EADC_CALDWRD_CALWORD_Pos (0)
2358 #define EADC_CALDWRD_CALWORD_Msk (0x7ful << EADC_CALDWRD_CALWORD_Pos) /* EADC_CONST */
2361 /* end of EADC register group */ /* end of REGISTER group */
2363
2364 #if defined ( __CC_ARM )
2365 #pragma no_anon_unions
2366 #endif
2367
2368 #endif /* __EADC_REG_H__ */
EADC_T::OVSTS
__IO uint32_t OVSTS
Definition: eadc_reg.h:1203
EADC_T::CALDWRD
__IO uint32_t CALDWRD
Definition: eadc_reg.h:1220
EADC_T::CURDAT
__I uint32_t CURDAT
Definition: eadc_reg.h:1199
EADC_T::STATUS0
__I uint32_t STATUS0
Definition: eadc_reg.h:1213
EADC_T::PENDSTS
__IO uint32_t PENDSTS
Definition: eadc_reg.h:1202
EADC_T::SWTRG
__O uint32_t SWTRG
Definition: eadc_reg.h:1201
EADC_T::STATUS3
__I uint32_t STATUS3
Definition: eadc_reg.h:1216
EADC_T::STATUS2
__IO uint32_t STATUS2
Definition: eadc_reg.h:1215
EADC_T::CALCTL
__IO uint32_t CALCTL
Definition: eadc_reg.h:1219
EADC_T::STATUS1
__I uint32_t STATUS1
Definition: eadc_reg.h:1214
EADC_T::PWRM
__IO uint32_t PWRM
Definition: eadc_reg.h:1218
EADC_T::PDMACTL
__IO uint32_t PDMACTL
Definition: eadc_reg.h:1224
EADC_T
Definition: eadc_reg.h:26
EADC_T::CTL
__IO uint32_t CTL
Definition: eadc_reg.h:1200