| M480 BSP V3.05.001 The Board Support Package for M480 Series

hsusbd.c
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1 /**************************************************************************/
9 #include <stdio.h>
10 #include "NuMicro.h"
11
24 /*--------------------------------------------------------------------------*/
26 /* Global variables for Control Pipe */
27 S_HSUSBD_CMD_T gUsbCmd;
28 S_HSUSBD_INFO_T *g_hsusbd_sInfo;
29
30 HSUSBD_VENDOR_REQ g_hsusbd_pfnVendorRequest = NULL;
31 HSUSBD_CLASS_REQ g_hsusbd_pfnClassRequest = NULL;
32 HSUSBD_SET_INTERFACE_REQ g_hsusbd_pfnSetInterface = NULL;
33 uint32_t g_u32HsEpStallLock = 0ul; /* Bit map flag to lock specified EP when SET_FEATURE */
34
35 static uint8_t *g_hsusbd_CtrlInPointer = 0;
36 static uint32_t g_hsusbd_CtrlMaxPktSize = 64ul;
37 static uint8_t g_hsusbd_UsbConfig = 0ul;
38 static uint8_t g_hsusbd_UsbAltInterface = 0ul;
39 static uint8_t g_hsusbd_EnableTestMode = 0ul;
40 static uint8_t g_hsusbd_TestSelector = 0ul;
41
42 #ifdef __ICCARM__
43 #pragma data_alignment=4
44 static uint8_t g_hsusbd_buf[12];
45 #else
46 static uint8_t g_hsusbd_buf[12] __attribute__((aligned(4)));
47 #endif
48
49 uint8_t volatile g_hsusbd_Configured = 0ul;
50 uint8_t g_hsusbd_CtrlZero = 0ul;
51 uint8_t g_hsusbd_UsbAddr = 0ul;
52 uint8_t g_hsusbd_ShortPacket = 0ul;
53 uint32_t volatile g_hsusbd_DmaDone = 0ul;
54 uint32_t g_hsusbd_CtrlInSize = 0ul;
68 void HSUSBD_Open(S_HSUSBD_INFO_T *param, HSUSBD_CLASS_REQ pfnClassReq, HSUSBD_SET_INTERFACE_REQ pfnSetInterface)
69 {
70 g_hsusbd_sInfo = param;
71 g_hsusbd_pfnClassRequest = pfnClassReq;
72 g_hsusbd_pfnSetInterface = pfnSetInterface;
73
74 /* get EP0 maximum packet size */
75 g_hsusbd_CtrlMaxPktSize = g_hsusbd_sInfo->gu8DevDesc[7];
76
77 /* Initial USB engine */
78 //HSUSBD->PHYCTL |= (HSUSBD_PHYCTL_PHYEN_Msk | HSUSBD_PHYCTL_DPPUEN_Msk);
79 HSUSBD_ENABLE_PHY();
80 while((HSUSBD->BUSINTSTS & HSUSBD_BUSINTEN_PHYCLKVLDIEN_Msk) != HSUSBD_BUSINTEN_PHYCLKVLDIEN_Msk ){}
81 HSUSBD_CLR_SE0();
82
83 /* wait PHY clock ready */
84 while (1)
85 {
86 HSUSBD->EP[EPA].EPMPS = 0x20ul;
87 if (HSUSBD->EP[EPA].EPMPS == 0x20ul)
88 {
89 HSUSBD->EP[EPA].EPMPS = 0x0ul;
90 break;
91 }
92 }
93 /* Force SE0, and then clear it to connect*/
94 HSUSBD_SET_SE0();
95 }
96
106 void HSUSBD_Start(void)
107 {
108 HSUSBD_CLR_SE0();
109 }
110
120 void HSUSBD_ProcessSetupPacket(void)
121 {
122 /* Setup packet process */
123 gUsbCmd.bmRequestType = (uint8_t)(HSUSBD->SETUP1_0 & 0xfful);
124 gUsbCmd.bRequest = (uint8_t)((HSUSBD->SETUP1_0 >> 8) & 0xfful);
125 gUsbCmd.wValue = (uint16_t)HSUSBD->SETUP3_2;
126 gUsbCmd.wIndex = (uint16_t)HSUSBD->SETUP5_4;
127 gUsbCmd.wLength = (uint16_t)HSUSBD->SETUP7_6;
128
129 /* USB device request in setup packet: offset 0, D[6..5]: 0=Standard, 1=Class, 2=Vendor, 3=Reserved */
130 switch (gUsbCmd.bmRequestType & 0x60ul)
131 {
132 case REQ_STANDARD:
133 {
134 HSUSBD_StandardRequest();
135 break;
136 }
137 case REQ_CLASS:
138 {
139 if (g_hsusbd_pfnClassRequest != NULL)
140 {
141 g_hsusbd_pfnClassRequest();
142 }
143 break;
144 }
145 case REQ_VENDOR:
146 {
147 if (g_hsusbd_pfnVendorRequest != NULL)
148 {
149 g_hsusbd_pfnVendorRequest();
150 }
151 break;
152 }
153 default:
154 {
155 /* Setup error, stall the device */
156 HSUSBD_SET_CEP_STATE(HSUSBD_CEPCTL_STALLEN_Msk);
157 break;
158 }
159 }
160 }
161
171 int HSUSBD_GetDescriptor(void)
172 {
173 uint32_t u32Len;
174 int val = 0;
175
176 u32Len = gUsbCmd.wLength;
177 g_hsusbd_CtrlZero = (uint8_t)0ul;
178
179 switch ((gUsbCmd.wValue & 0xff00ul) >> 8)
180 {
181 /* Get Device Descriptor */
182 case DESC_DEVICE:
183 {
184 u32Len = Minimum(u32Len, LEN_DEVICE);
185 HSUSBD_PrepareCtrlIn((uint8_t *)g_hsusbd_sInfo->gu8DevDesc, u32Len);
186 break;
187 }
188 /* Get Configuration Descriptor */
189 case DESC_CONFIG:
190 {
191 uint32_t u32TotalLen;
192 if ((HSUSBD->OPER & 0x04ul) == 0x04ul)
193 {
194 u32TotalLen = g_hsusbd_sInfo->gu8ConfigDesc[3];
195 u32TotalLen = g_hsusbd_sInfo->gu8ConfigDesc[2] + (u32TotalLen << 8);
196
197 if (u32Len > u32TotalLen)
198 {
199 u32Len = u32TotalLen;
200 if ((u32Len % g_hsusbd_CtrlMaxPktSize) == 0ul)
201 {
202 g_hsusbd_CtrlZero = (uint8_t)1ul;
203 }
204 }
205 HSUSBD_PrepareCtrlIn((uint8_t *)g_hsusbd_sInfo->gu8ConfigDesc, u32Len);
206 }
207 else
208 {
209 u32TotalLen = g_hsusbd_sInfo->gu8FullConfigDesc[3];
210 u32TotalLen = g_hsusbd_sInfo->gu8FullConfigDesc[2] + (u32TotalLen << 8);
211
212 if (u32Len > u32TotalLen)
213 {
214 u32Len = u32TotalLen;
215 if ((u32Len % g_hsusbd_CtrlMaxPktSize) == 0ul)
216 {
217 g_hsusbd_CtrlZero = (uint8_t)1ul;
218 }
219 }
220 HSUSBD_PrepareCtrlIn((uint8_t *)g_hsusbd_sInfo->gu8FullConfigDesc, u32Len);
221 }
222
223 break;
224 }
225 /* Get Qualifier Descriptor */
226 case DESC_QUALIFIER:
227 {
228 u32Len = Minimum(u32Len, LEN_QUALIFIER);
229 HSUSBD_PrepareCtrlIn((uint8_t *)g_hsusbd_sInfo->gu8QualDesc, u32Len);
230 break;
231 }
232 /* Get Other Speed Descriptor - Full speed */
233 case DESC_OTHERSPEED:
234 {
235 uint32_t u32TotalLen;
236 if ((HSUSBD->OPER & 0x04ul) == 0x04ul)
237 {
238 u32TotalLen = g_hsusbd_sInfo->gu8HSOtherConfigDesc[3];
239 u32TotalLen = g_hsusbd_sInfo->gu8HSOtherConfigDesc[2] + (u32TotalLen << 8);
240
241 if (u32Len > u32TotalLen)
242 {
243 u32Len = u32TotalLen;
244 if ((u32Len % g_hsusbd_CtrlMaxPktSize) == 0ul)
245 {
246 g_hsusbd_CtrlZero = (uint8_t)1ul;
247 }
248 }
249 HSUSBD_PrepareCtrlIn((uint8_t *)g_hsusbd_sInfo->gu8HSOtherConfigDesc, u32Len);
250 }
251 else
252 {
253 u32TotalLen = g_hsusbd_sInfo->gu8FSOtherConfigDesc[3];
254 u32TotalLen = g_hsusbd_sInfo->gu8FSOtherConfigDesc[2] + (u32TotalLen << 8);
255
256 if (u32Len > u32TotalLen)
257 {
258 u32Len = u32TotalLen;
259 if ((u32Len % g_hsusbd_CtrlMaxPktSize) == 0ul)
260 {
261 g_hsusbd_CtrlZero = (uint8_t)1ul;
262 }
263 }
264 HSUSBD_PrepareCtrlIn((uint8_t *)g_hsusbd_sInfo->gu8FSOtherConfigDesc, u32Len);
265 }
266
267 break;
268 }
269 /* Get HID Descriptor */
270 case DESC_HID:
271 {
272 uint32_t u32ConfigDescOffset; /* u32ConfigDescOffset is configuration descriptor offset (HID descriptor start index) */
273 u32Len = Minimum(u32Len, LEN_HID);
274 u32ConfigDescOffset = g_hsusbd_sInfo->gu32ConfigHidDescIdx[gUsbCmd.wIndex & 0xfful];
275 HSUSBD_PrepareCtrlIn((uint8_t *)&g_hsusbd_sInfo->gu8ConfigDesc[u32ConfigDescOffset], u32Len);
276 break;
277 }
278 /* Get Report Descriptor */
279 case DESC_HID_RPT:
280 {
281 if (u32Len > g_hsusbd_sInfo->gu32HidReportSize[gUsbCmd.wIndex & 0xfful])
282 {
283 u32Len = g_hsusbd_sInfo->gu32HidReportSize[gUsbCmd.wIndex & 0xfful];
284 if ((u32Len % g_hsusbd_CtrlMaxPktSize) == 0ul)
285 {
286 g_hsusbd_CtrlZero = (uint8_t)1ul;
287 }
288 }
289 HSUSBD_PrepareCtrlIn((uint8_t *)g_hsusbd_sInfo->gu8HidReportDesc[gUsbCmd.wIndex & 0xfful], u32Len);
290 break;
291 }
292 /* Get String Descriptor */
293 case DESC_STRING:
294 {
295 if((gUsbCmd.wValue & 0xfful) < 8ul)
296 {
297 if (u32Len > g_hsusbd_sInfo->gu8StringDesc[gUsbCmd.wValue & 0xfful][0])
298 {
299 u32Len = g_hsusbd_sInfo->gu8StringDesc[gUsbCmd.wValue & 0xfful][0];
300 if ((u32Len % g_hsusbd_CtrlMaxPktSize) == 0ul)
301 {
302 g_hsusbd_CtrlZero = (uint8_t)1ul;
303 }
304 }
305 HSUSBD_PrepareCtrlIn((uint8_t *)g_hsusbd_sInfo->gu8StringDesc[gUsbCmd.wValue & 0xfful], u32Len);
306 }
307 else
308 {
309 HSUSBD_SET_CEP_STATE(HSUSBD_CEPCTL_STALLEN_Msk);
310 val = 1;
311 }
312 break;
313 }
314 default:
315 /* Not support. Reply STALL. */
316 HSUSBD_SET_CEP_STATE(HSUSBD_CEPCTL_STALLEN_Msk);
317 val = 1;
318 break;
319 }
320 return val;
321 }
322
323
333 void HSUSBD_StandardRequest(void)
334 {
335 /* clear global variables for new request */
336 g_hsusbd_CtrlInPointer = 0;
337 g_hsusbd_CtrlInSize = 0ul;
338
339 if ((gUsbCmd.bmRequestType & 0x80ul) == 0x80ul) /* request data transfer direction */
340 {
341 /* Device to host */
342 switch (gUsbCmd.bRequest)
343 {
344 case GET_CONFIGURATION:
345 {
346 /* Return current configuration setting */
347 HSUSBD_PrepareCtrlIn((uint8_t *)&g_hsusbd_UsbConfig, 1ul);
348
349 HSUSBD_CLR_CEP_INT_FLAG(HSUSBD_CEPINTSTS_INTKIF_Msk);
350 HSUSBD_ENABLE_CEP_INT(HSUSBD_CEPINTEN_INTKIEN_Msk);
351 break;
352 }
353 case GET_DESCRIPTOR:
354 {
355 if (!HSUSBD_GetDescriptor())
356 {
357 HSUSBD_CLR_CEP_INT_FLAG(HSUSBD_CEPINTSTS_INTKIF_Msk);
358 HSUSBD_ENABLE_CEP_INT(HSUSBD_CEPINTEN_INTKIEN_Msk);
359 }
360 break;
361 }
362 case GET_INTERFACE:
363 {
364 /* Return current interface setting */
365 HSUSBD_PrepareCtrlIn((uint8_t *)&g_hsusbd_UsbAltInterface, 1ul);
366
367 HSUSBD_CLR_CEP_INT_FLAG(HSUSBD_CEPINTSTS_INTKIF_Msk);
368 HSUSBD_ENABLE_CEP_INT(HSUSBD_CEPINTEN_INTKIEN_Msk);
369 break;
370 }
371 case GET_STATUS:
372 {
373 /* Device */
374 if (gUsbCmd.bmRequestType == 0x80ul)
375 {
376 if ((g_hsusbd_sInfo->gu8ConfigDesc[7] & 0x40ul) == 0x40ul)
377 {
378 g_hsusbd_buf[0] = (uint8_t)1ul; /* Self-Powered */
379 }
380 else
381 {
382 g_hsusbd_buf[0] = (uint8_t)0ul; /* bus-Powered */
383 }
384 }
385 /* Interface */
386 else if (gUsbCmd.bmRequestType == 0x81ul)
387 {
388 g_hsusbd_buf[0] = (uint8_t)0ul;
389 }
390 /* Endpoint */
391 else if (gUsbCmd.bmRequestType == 0x82ul)
392 {
393 uint8_t ep = (uint8_t)(gUsbCmd.wIndex & 0xFul);
394 g_hsusbd_buf[0] = (uint8_t)HSUSBD_GetStall((uint32_t)ep)? (uint8_t)1 : (uint8_t)0;
395 }
396 g_hsusbd_buf[1] = (uint8_t)0ul;
397 HSUSBD_PrepareCtrlIn(g_hsusbd_buf, 2ul);
398 HSUSBD_CLR_CEP_INT_FLAG(HSUSBD_CEPINTSTS_INTKIF_Msk);
399 HSUSBD_ENABLE_CEP_INT(HSUSBD_CEPINTEN_INTKIEN_Msk);
400 break;
401 }
402 default:
403 {
404 /* Setup error, stall the device */
405 HSUSBD_SET_CEP_STATE(HSUSBD_CEPCTL_STALLEN_Msk);
406 break;
407 }
408 }
409 }
410 else
411 {
412 /* Host to device */
413 switch (gUsbCmd.bRequest)
414 {
415 case CLEAR_FEATURE:
416 {
417 if((gUsbCmd.wValue & 0xfful) == FEATURE_ENDPOINT_HALT)
418 {
419
420 uint32_t epNum, i;
421
422 /* EP number stall is not allow to be clear in MSC class "Error Recovery Test".
423 a flag: g_u32HsEpStallLock is added to support it */
424 epNum = (uint32_t)(gUsbCmd.wIndex & 0xFul);
425 for (i=0ul; i<HSUSBD_MAX_EP; i++)
426 {
427 if ((((HSUSBD->EP[i].EPCFG & 0xf0ul) >> 4) == epNum) && ((g_u32HsEpStallLock & (1ul << i)) == 0ul))
428 {
429 HSUSBD->EP[i].EPRSPCTL = (HSUSBD->EP[i].EPRSPCTL & 0xeful) | HSUSBD_EP_RSPCTL_TOGGLE;
430 }
431 }
432 }
433 /* Status stage */
434 HSUSBD_CLR_CEP_INT_FLAG(HSUSBD_CEPINTSTS_STSDONEIF_Msk);
435 HSUSBD_SET_CEP_STATE(HSUSBD_CEPCTL_NAKCLR);
436 HSUSBD_ENABLE_CEP_INT(HSUSBD_CEPINTEN_STSDONEIEN_Msk);
437 break;
438 }
439 case SET_ADDRESS:
440 {
441 g_hsusbd_UsbAddr = (uint8_t)gUsbCmd.wValue;
442 /* Status Stage */
443 HSUSBD_CLR_CEP_INT_FLAG(HSUSBD_CEPINTSTS_STSDONEIF_Msk);
444 HSUSBD_SET_CEP_STATE(HSUSBD_CEPCTL_NAKCLR);
445 HSUSBD_ENABLE_CEP_INT(HSUSBD_CEPINTEN_STSDONEIEN_Msk);
446 break;
447 }
448 case SET_CONFIGURATION:
449 {
450 g_hsusbd_UsbConfig = (uint8_t)gUsbCmd.wValue;
451 g_hsusbd_Configured = (uint8_t)1ul;
452 /* Status stage */
453 HSUSBD_CLR_CEP_INT_FLAG(HSUSBD_CEPINTSTS_STSDONEIF_Msk);
454 HSUSBD_SET_CEP_STATE(HSUSBD_CEPCTL_NAKCLR);
455 HSUSBD_ENABLE_CEP_INT(HSUSBD_CEPINTEN_STSDONEIEN_Msk);
456 break;
457 }
458 case SET_FEATURE:
459 {
460 if ((gUsbCmd.wValue & 0x3ul) == 2ul) /* TEST_MODE */
461 {
462 g_hsusbd_EnableTestMode = (uint8_t)1ul;
463 g_hsusbd_TestSelector = (uint8_t)(gUsbCmd.wIndex >> 8);
464 }
465 if ((gUsbCmd.wValue & 0x3ul) == 3ul) /* HNP ebable */
466 {
467 HSOTG->CTL |= (HSOTG_CTL_HNPREQEN_Msk | HSOTG_CTL_BUSREQ_Msk);
468 }
469
470 /* Status stage */
471 HSUSBD_CLR_CEP_INT_FLAG(HSUSBD_CEPINTSTS_STSDONEIF_Msk);
472 HSUSBD_SET_CEP_STATE(HSUSBD_CEPCTL_NAKCLR);
473 HSUSBD_ENABLE_CEP_INT(HSUSBD_CEPINTEN_STSDONEIEN_Msk);
474 break;
475 }
476 case SET_INTERFACE:
477 {
478 g_hsusbd_UsbAltInterface = (uint8_t)gUsbCmd.wValue;
479 if (g_hsusbd_pfnSetInterface != NULL)
480 {
481 g_hsusbd_pfnSetInterface((uint32_t)g_hsusbd_UsbAltInterface);
482 }
483 /* Status stage */
484 HSUSBD_CLR_CEP_INT_FLAG(HSUSBD_CEPINTSTS_STSDONEIF_Msk);
485 HSUSBD_SET_CEP_STATE(HSUSBD_CEPCTL_NAKCLR);
486 HSUSBD_ENABLE_CEP_INT(HSUSBD_CEPINTEN_STSDONEIEN_Msk);
487 break;
488 }
489 default:
490 {
491 /* Setup error, stall the device */
492 HSUSBD_SET_CEP_STATE(HSUSBD_CEPCTL_STALLEN_Msk);
493 break;
494 }
495 }
496 }
497 }
498
509 #define TEST_J 0x01ul
510 #define TEST_K 0x02ul
511 #define TEST_SE0_NAK 0x03ul
512 #define TEST_PACKET 0x04ul
513 #define TEST_FORCE_ENABLE 0x05ul
514
516 void HSUSBD_UpdateDeviceState(void)
517 {
518 switch (gUsbCmd.bRequest)
519 {
520 case SET_ADDRESS:
521 {
522 HSUSBD_SET_ADDR(g_hsusbd_UsbAddr);
523 break;
524 }
525 case SET_CONFIGURATION:
526 {
527 if (g_hsusbd_UsbConfig == 0ul)
528 {
529 uint32_t volatile i;
530 /* Reset PID DATA0 */
531 for (i=0ul; i<HSUSBD_MAX_EP; i++)
532 {
533 if ((HSUSBD->EP[i].EPCFG & 0x1ul) == 0x1ul)
534 {
535 HSUSBD->EP[i].EPRSPCTL = HSUSBD_EP_RSPCTL_TOGGLE;
536 }
537 }
538 }
539 break;
540 }
541 case SET_FEATURE:
542 {
543 if(gUsbCmd.wValue == FEATURE_ENDPOINT_HALT)
544 {
545 uint32_t idx;
546 idx = (uint32_t)(gUsbCmd.wIndex & 0xFul);
547 HSUSBD_SetStall(idx);
548 }
549 else if (g_hsusbd_EnableTestMode)
550 {
551 g_hsusbd_EnableTestMode = (uint8_t)0ul;
552 if (g_hsusbd_TestSelector == TEST_J)
553 {
554 HSUSBD->TEST = TEST_J;
555 }
556 else if (g_hsusbd_TestSelector == TEST_K)
557 {
558 HSUSBD->TEST = TEST_K;
559 }
560 else if (g_hsusbd_TestSelector == TEST_SE0_NAK)
561 {
562 HSUSBD->TEST = TEST_SE0_NAK;
563 }
564 else if (g_hsusbd_TestSelector == TEST_PACKET)
565 {
566 HSUSBD->TEST = TEST_PACKET;
567 }
568 else if (g_hsusbd_TestSelector == TEST_FORCE_ENABLE)
569 {
570 HSUSBD->TEST = TEST_FORCE_ENABLE;
571 }
572 }
573 break;
574 }
575 case CLEAR_FEATURE:
576 {
577 if(gUsbCmd.wValue == FEATURE_ENDPOINT_HALT)
578 {
579 uint32_t idx;
580 idx = (uint32_t)(gUsbCmd.wIndex & 0xFul);
581 HSUSBD_ClearStall(idx);
582 }
583 break;
584 }
585 default:
586 break;
587 }
588 }
589
590
601 void HSUSBD_PrepareCtrlIn(uint8_t pu8Buf[], uint32_t u32Size)
602 {
603 g_hsusbd_CtrlInPointer = pu8Buf;
604 g_hsusbd_CtrlInSize = u32Size;
605 }
606
607
608
618 void HSUSBD_CtrlIn(void)
619 {
620 uint32_t volatile i, cnt;
621 uint8_t u8Value;
622 if(g_hsusbd_CtrlInSize >= g_hsusbd_CtrlMaxPktSize)
623 {
624 /* Data size > MXPLD */
625 cnt = g_hsusbd_CtrlMaxPktSize >> 2;
626 for (i=0ul; i<cnt; i++)
627 {
628 HSUSBD->CEPDAT = *(uint32_t *)g_hsusbd_CtrlInPointer;
629 g_hsusbd_CtrlInPointer = (uint8_t *)(g_hsusbd_CtrlInPointer + 4ul);
630 }
631 HSUSBD_START_CEP_IN(g_hsusbd_CtrlMaxPktSize);
632 g_hsusbd_CtrlInSize -= g_hsusbd_CtrlMaxPktSize;
633 }
634 else
635 {
636 /* Data size <= MXPLD */
637 cnt = g_hsusbd_CtrlInSize >> 2;
638 for (i=0ul; i<cnt; i++)
639 {
640 HSUSBD->CEPDAT = *(uint32_t *)g_hsusbd_CtrlInPointer;
641 g_hsusbd_CtrlInPointer += 4ul;
642 }
643
644 for (i=0ul; i<(g_hsusbd_CtrlInSize % 4ul); i++)
645 {
646 u8Value = *(uint8_t *)(g_hsusbd_CtrlInPointer+i);
647 outpb(&HSUSBD->CEPDAT, u8Value);
648 }
649
650 HSUSBD_START_CEP_IN(g_hsusbd_CtrlInSize);
651 g_hsusbd_CtrlInPointer = 0;
652 g_hsusbd_CtrlInSize = 0ul;
653 }
654 }
655
666 void HSUSBD_CtrlOut(uint8_t pu8Buf[], uint32_t u32Size)
667 {
668 uint32_t volatile i;
669 while(1)
670 {
671 if ((HSUSBD->CEPINTSTS & HSUSBD_CEPINTSTS_RXPKIF_Msk) == HSUSBD_CEPINTSTS_RXPKIF_Msk)
672 {
673 for (i=0ul; i<u32Size; i++)
674 {
675 pu8Buf[i] = inpb(&HSUSBD->CEPDAT);
676 }
677 HSUSBD->CEPINTSTS = HSUSBD_CEPINTSTS_RXPKIF_Msk;
678 break;
679 }
680 }
681 }
682
692 void HSUSBD_SwReset(void)
693 {
694 /* Reset all variables for protocol */
695 g_hsusbd_UsbAddr = (uint8_t)0ul;
696 g_hsusbd_DmaDone = 0ul;
697 g_hsusbd_ShortPacket = (uint8_t)0ul;
698 g_hsusbd_Configured = (uint8_t)0ul;
699
700 /* Reset USB device address */
701 HSUSBD_SET_ADDR(0ul);
702 }
703
713 void HSUSBD_SetVendorRequest(HSUSBD_VENDOR_REQ pfnVendorReq)
714 {
715 g_hsusbd_pfnVendorRequest = pfnVendorReq;
716 }
717
718 /* end of group HSUSBD_EXPORTED_FUNCTIONS */
720 /* end of group HSUSBD_Driver */
722 /* end of group Standard_Driver */
724
725 /*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/
HSUSBD_CEPCTL_STALLEN_Msk
#define HSUSBD_CEPCTL_STALLEN_Msk
Definition: hsusbd_reg.h:2157
HSUSBD_CEPCTL_NAKCLR
#define HSUSBD_CEPCTL_NAKCLR
Definition: hsusbd.h:52
HSUSBD_StandardRequest
void HSUSBD_StandardRequest(void)
Process USB standard request.
Definition: hsusbd.c:333
s_hsusbd_info::gu32ConfigHidDescIdx
uint32_t * gu32ConfigHidDescIdx
Definition: hsusbd.h:110
HSUSBD_CMD_STRUCT::wValue
uint16_t wValue
Definition: hsusbd.h:90
s_hsusbd_info::gu8ConfigDesc
uint8_t * gu8ConfigDesc
Definition: hsusbd.h:102
HSUSBD_CEPINTEN_INTKIEN_Msk
#define HSUSBD_CEPINTEN_INTKIEN_Msk
Definition: hsusbd_reg.h:2175
HSUSBD_CtrlIn
void HSUSBD_CtrlIn(void)
Start Control IN transfer.
Definition: hsusbd.c:618
HSUSBD_SET_CEP_STATE
#define HSUSBD_SET_CEP_STATE(flag)
Definition: hsusbd.h:147
s_hsusbd_info::gu8QualDesc
uint8_t * gu8QualDesc
Definition: hsusbd.h:104
HSUSBD_CMD_STRUCT::wIndex
uint16_t wIndex
Definition: hsusbd.h:91
s_hsusbd_info::gu8DevDesc
uint8_t * gu8DevDesc
Definition: hsusbd.h:101
HSUSBD_ENABLE_CEP_INT
#define HSUSBD_ENABLE_CEP_INT(intr)
Definition: hsusbd.h:145
HSUSBD_START_CEP_IN
#define HSUSBD_START_CEP_IN(size)
Definition: hsusbd.h:148
HSOTG_CTL_HNPREQEN_Msk
#define HSOTG_CTL_HNPREQEN_Msk
Definition: hsotg_reg.h:543
HSUSBD_SET_SE0
#define HSUSBD_SET_SE0()
Definition: hsusbd.h:137
HSUSBD_SetVendorRequest
void HSUSBD_SetVendorRequest(HSUSBD_VENDOR_REQ pfnVendorReq)
HSUSBD Set Vendor Request.
Definition: hsusbd.c:713
HSUSBD_ProcessSetupPacket
void HSUSBD_ProcessSetupPacket(void)
Process Setup Packet.
Definition: hsusbd.c:120
outpb
#define outpb(port, value)
Set a 8-bit unsigned value to specified I/O port.
Definition: M480.h:534
HSUSBD_ENABLE_PHY
#define HSUSBD_ENABLE_PHY()
Definition: hsusbd.h:135
HSOTG_CTL_BUSREQ_Msk
#define HSOTG_CTL_BUSREQ_Msk
Definition: hsotg_reg.h:540
s_hsusbd_info
Definition: hsusbd.h:99
HSUSBD_UpdateDeviceState
void HSUSBD_UpdateDeviceState(void)
Update Device State.
Definition: hsusbd.c:516
NuMicro.h
NuMicro peripheral access layer header file.
HSUSBD_CEPINTSTS_RXPKIF_Msk
#define HSUSBD_CEPINTSTS_RXPKIF_Msk
Definition: hsusbd_reg.h:2223
HSUSBD_GetDescriptor
int HSUSBD_GetDescriptor(void)
Get Descriptor request.
Definition: hsusbd.c:171
__attribute__
void *__dso_handle __attribute__((weak))
Definition: _syscalls.c:35
HSUSBD
#define HSUSBD
Definition: M480.h:409
HSUSBD_SwReset
void HSUSBD_SwReset(void)
Clear all software flags.
Definition: hsusbd.c:692
HSOTG
#define HSOTG
Definition: M480.h:410
HSUSBD_ClearStall
__STATIC_INLINE void HSUSBD_ClearStall(uint32_t u32EpNum)
Clear USB endpoint stall state.
Definition: hsusbd.h:301
s_hsusbd_info::gu8StringDesc
uint8_t ** gu8StringDesc
Definition: hsusbd.h:103
HSUSBD_CLR_SE0
#define HSUSBD_CLR_SE0()
Definition: hsusbd.h:138
HSUSBD_CMD_STRUCT::bmRequestType
uint8_t bmRequestType
Definition: hsusbd.h:88
s_hsusbd_info::gu8HidReportDesc
uint8_t ** gu8HidReportDesc
Definition: hsusbd.h:108
s_hsusbd_info::gu8HSOtherConfigDesc
uint8_t * gu8HSOtherConfigDesc
Definition: hsusbd.h:106
HSUSBD_CEPINTEN_STSDONEIEN_Msk
#define HSUSBD_CEPINTEN_STSDONEIEN_Msk
Definition: hsusbd_reg.h:2196
HSUSBD_SET_INTERFACE_REQ
void(* HSUSBD_SET_INTERFACE_REQ)(uint32_t u32AltInterface)
Definition: hsusbd.h:355
HSUSBD_SetStall
__STATIC_INLINE void HSUSBD_SetStall(uint32_t u32EpNum)
Set USB endpoint stall state.
Definition: hsusbd.h:262
HSUSBD_CEPINTSTS_STSDONEIF_Msk
#define HSUSBD_CEPINTSTS_STSDONEIF_Msk
Definition: hsusbd_reg.h:2235
inpb
#define inpb(port)
Get a 8-bit unsigned value from specified I/O port.
Definition: M480.h:541
HSUSBD_CMD_STRUCT
Definition: hsusbd.h:86
HSUSBD_Open
void HSUSBD_Open(S_HSUSBD_INFO_T *param, HSUSBD_CLASS_REQ pfnClassReq, HSUSBD_SET_INTERFACE_REQ pfnSetInterface)
HSUSBD Initial.
Definition: hsusbd.c:68
HSUSBD_CMD_STRUCT::bRequest
uint8_t bRequest
Definition: hsusbd.h:89
HSUSBD_EP_RSPCTL_TOGGLE
#define HSUSBD_EP_RSPCTL_TOGGLE
Definition: hsusbd.h:63
HSUSBD_PrepareCtrlIn
void HSUSBD_PrepareCtrlIn(uint8_t pu8Buf[], uint32_t u32Size)
Prepare Control IN transaction.
Definition: hsusbd.c:601
HSUSBD_CtrlOut
void HSUSBD_CtrlOut(uint8_t pu8Buf[], uint32_t u32Size)
Start Control OUT transaction.
Definition: hsusbd.c:666
HSUSBD_CEPINTSTS_INTKIF_Msk
#define HSUSBD_CEPINTSTS_INTKIF_Msk
Definition: hsusbd_reg.h:2214
HSUSBD_CLR_CEP_INT_FLAG
#define HSUSBD_CLR_CEP_INT_FLAG(flag)
Definition: hsusbd.h:146
HSUSBD_BUSINTEN_PHYCLKVLDIEN_Msk
#define HSUSBD_BUSINTEN_PHYCLKVLDIEN_Msk
Definition: hsusbd_reg.h:2124
HSUSBD_VENDOR_REQ
void(* HSUSBD_VENDOR_REQ)(void)
Definition: hsusbd.h:353
HSUSBD_Start
void HSUSBD_Start(void)
HSUSBD Start.
Definition: hsusbd.c:106
HSUSBD_GetStall
__STATIC_INLINE uint32_t HSUSBD_GetStall(uint32_t u32EpNum)
Get USB endpoint stall state.
Definition: hsusbd.h:335
HSUSBD_CMD_STRUCT::wLength
uint16_t wLength
Definition: hsusbd.h:92
HSUSBD_SET_ADDR
#define HSUSBD_SET_ADDR(addr)
Definition: hsusbd.h:139
s_hsusbd_info::gu32HidReportSize
uint32_t * gu32HidReportSize
Definition: hsusbd.h:109
HSUSBD_CLASS_REQ
void(* HSUSBD_CLASS_REQ)(void)
Definition: hsusbd.h:354
s_hsusbd_info::gu8FullConfigDesc
uint8_t * gu8FullConfigDesc
Definition: hsusbd.h:105
NULL
#define NULL
NULL pointer.
Definition: M480.h:604
s_hsusbd_info::gu8FSOtherConfigDesc
uint8_t * gu8FSOtherConfigDesc
Definition: hsusbd.h:107