| M480 BSP V3.05.001 The Board Support Package for M480 Series

Macros | Functions
EADC Exported Functions
Standard Driver » EADC Driver

## Macros
#define | EADC_CONV_RESET(eadc)
| A/D Converter Control Circuits Reset. More...
#define | EADC_ENABLE_PDMA(eadc)
| Enable PDMA transfer. More...
#define | EADC_DISABLE_PDMA(eadc)
| Disable PDMA transfer. More...
#define | EADC_ENABLE_SAMPLE_MODULE_PDMA(eadc, u32ModuleMask)
| Enable Sample Module PDMA transfer. More...
#define | EADC_DISABLE_SAMPLE_MODULE_PDMA(eadc, u32ModuleMask)
| Disable Sample Module PDMA transfer. More...
#define | EADC_ENABLE_DOUBLE_BUFFER(eadc, u32ModuleNum)
| Enable double buffer mode. More...
#define | EADC_DISABLE_DOUBLE_BUFFER(eadc, u32ModuleNum)
| Disable double buffer mode. More...
#define | EADC_ENABLE_INT_POSITION(eadc, u32ModuleNum)
| Set ADIFn at A/D end of conversion. More...
#define | EADC_DISABLE_INT_POSITION(eadc, u32ModuleNum)
| Set ADIFn at A/D start of conversion. More...
#define | EADC_ENABLE_INT(eadc, u32Mask)
| Enable the interrupt. More...
#define | EADC_DISABLE_INT(eadc, u32Mask)
| Disable the interrupt. More...
#define | EADC_ENABLE_SAMPLE_MODULE_INT(eadc, u32IntSel, u32ModuleMask)
| Enable the sample module interrupt. More...
#define | EADC_DISABLE_SAMPLE_MODULE_INT(eadc, u32IntSel, u32ModuleMask)
| Disable the sample module interrupt. More...
#define | EADC_SET_DMOF(eadc, u32Format)
| Set the input mode output format. More...
#define | EADC_START_CONV(eadc, u32ModuleMask)
| Start the A/D conversion. More...
#define | EADC_STOP_CONV(eadc, u32ModuleMask)
| Cancel the conversion for sample module. More...
#define | EADC_GET_PENDING_CONV(eadc)
| Get the conversion pending flag. More...
#define | EADC_GET_CONV_DATA(eadc, u32ModuleNum)
| Get the conversion data of the user-specified sample module. More...
#define | EADC_GET_DATA_OVERRUN_FLAG(eadc, u32ModuleMask)
| Get the data overrun flag of the user-specified sample module. More...
#define | EADC_GET_DATA_VALID_FLAG(eadc, u32ModuleMask)
| Get the data valid flag of the user-specified sample module. More...
#define | EADC_GET_DOUBLE_DATA(eadc, u32ModuleNum)
| Get the double data of the user-specified sample module. More...
#define | EADC_GET_INT_FLAG(eadc, u32Mask)
| Get the user-specified interrupt flags. More...
#define | EADC_GET_SAMPLE_MODULE_OV_FLAG(eadc, u32ModuleMask)
| Get the user-specified sample module overrun flags. More...
#define | EADC_CLR_INT_FLAG(eadc, u32Mask)
| Clear the selected interrupt status bits. More...
#define | EADC_CLR_SAMPLE_MODULE_OV_FLAG(eadc, u32ModuleMask)
| Clear the selected sample module overrun status bits. More...
#define | EADC_IS_DATA_OV(eadc)
| Check all sample module A/D result data register overrun flags. More...
#define | EADC_IS_DATA_VALID(eadc)
| Check all sample module A/D result data register valid flags. More...
#define | EADC_IS_SAMPLE_MODULE_OV(eadc)
| Check all A/D sample module start of conversion overrun flags. More...
#define | EADC_IS_INT_FLAG_OV(eadc)
| Check all A/D interrupt flag overrun bits. More...
#define | EADC_IS_BUSY(eadc)
| Get the busy state of EADC. More...
#define | EADC_ENABLE_CMP0(eadc, u32ModuleNum, u32Condition, u16CMPData, u32MatchCount)
| Configure the comparator 0 and enable it. More...
#define | EADC_ENABLE_CMP1(eadc, u32ModuleNum, u32Condition, u16CMPData, u32MatchCount)
| Configure the comparator 1 and enable it. More...
#define | EADC_ENABLE_CMP2(eadc, u32ModuleNum, u32Condition, u16CMPData, u32MatchCount)
| Configure the comparator 2 and enable it. More...
#define | EADC_ENABLE_CMP3(eadc, u32ModuleNum, u32Condition, u16CMPData, u32MatchCount)
| Configure the comparator 3 and enable it. More...
#define | EADC_ENABLE_CMP_WINDOW_MODE(eadc, u32CMP)
| Enable the compare window mode. More...
#define | EADC_DISABLE_CMP_WINDOW_MODE(eadc, u32CMP)
| Disable the compare window mode. More...
#define | EADC_ENABLE_CMP_INT(eadc, u32CMP)
| Enable the compare interrupt. More...
#define | EADC_DISABLE_CMP_INT(eadc, u32CMP)
| Disable the compare interrupt. More...
#define | EADC_DISABLE_CMP0(eadc)
| Disable comparator 0. More...
#define | EADC_DISABLE_CMP1(eadc)
| Disable comparator 1. More...
#define | EADC_DISABLE_CMP2(eadc)
| Disable comparator 2. More...
#define | EADC_DISABLE_CMP3(eadc)
| Disable comparator 3. More...

## Functions
void | EADC_Open (EADC_T *eadc, uint32_t u32InputMode)
| This function make EADC_module be ready to convert. More...
void | EADC_Close (EADC_T *eadc)
| Disable EADC_module. More...
void | EADC_ConfigSampleModule (EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32TriggerSrc, uint32_t u32Channel)
| Configure the sample control logic module. More...
void | EADC_SetTriggerDelayTime (EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32TriggerDelayTime, uint32_t u32DelayClockDivider)
| Set trigger delay time. More...
void | EADC_SetExtendSampleTime (EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32ExtendSampleTime)
| Set ADC extend sample time. More...

## Detailed Description

## Macro Definition Documentation

## ◆ EADC_CLR_INT_FLAG

#define EADC_CLR_INT_FLAG | ( |  | eadc,
|  |  | u32Mask
| ) |  |

Clear the selected interrupt status bits.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32Mask | The combination of compare interrupt status bits. Each bit corresponds to a compare interrupt status. Bit 0 is ADIF0, bit 1 is ADIF1..., bit 3 is ADIF3. Bit 4 is ADCMPF0, bit 5 is ADCMPF1..., bit 7 is ADCMPF3.

Returns
  None

This macro is used to clear clear the selected interrupt status bits.

Definition at line 354 of file eadc.h.

## ◆ EADC_CLR_SAMPLE_MODULE_OV_FLAG

#define EADC_CLR_SAMPLE_MODULE_OV_FLAG | ( |  | eadc,
|  |  | u32ModuleMask
| ) |  |

Clear the selected sample module overrun status bits.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleMask | The combination of sample module overrun status bits. Each bit corresponds to a sample module overrun status. Bit 0 is SPOVF0, bit 1 is SPOVF1..., bit 18 is SPOVF18.

Returns
  None

This macro is used to clear the selected sample module overrun status bits.

Definition at line 365 of file eadc.h.

## ◆ EADC_CONV_RESET

#define EADC_CONV_RESET | ( |  | eadc | ) |

A/D Converter Control Circuits Reset.

Parameters

  [in] | eadc | The pointer of the specified EADC module.

Returns
  None

ADCRST bit (EADC_CT[1]) remains 1 during ADC reset, when ADC reset end, the ADCRST bit is automatically cleared to 0.

Definition at line 103 of file eadc.h.

## ◆ EADC_DISABLE_CMP0

#define EADC_DISABLE_CMP0 | ( |  | eadc | ) |

Disable comparator 0.

Parameters

  [in] | eadc | The pointer of the specified EADC module.

Returns
  None

This macro is used to disable comparator 0.

Definition at line 570 of file eadc.h.

## ◆ EADC_DISABLE_CMP1

#define EADC_DISABLE_CMP1 | ( |  | eadc | ) |

Disable comparator 1.

Parameters

  [in] | eadc | The pointer of the specified EADC module.

Returns
  None

This macro is used to disable comparator 1.

Definition at line 579 of file eadc.h.

## ◆ EADC_DISABLE_CMP2

#define EADC_DISABLE_CMP2 | ( |  | eadc | ) |

Disable comparator 2.

Parameters

  [in] | eadc | The pointer of the specified EADC module.

Returns
  None

This macro is used to disable comparator 2.

Definition at line 588 of file eadc.h.

## ◆ EADC_DISABLE_CMP3

#define EADC_DISABLE_CMP3 | ( |  | eadc | ) |

Disable comparator 3.

Parameters

  [in] | eadc | The pointer of the specified EADC module.

Returns
  None

This macro is used to disable comparator 3.

Definition at line 597 of file eadc.h.

## ◆ EADC_DISABLE_CMP_INT

#define EADC_DISABLE_CMP_INT | ( |  | eadc,
|  |  | u32CMP
| ) |  |

Disable the compare interrupt.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32CMP | Specifies the compare register, valid value are from 0 to 3.

Returns
  None

This macro is used to disable the compare interrupt.

Definition at line 561 of file eadc.h.

## ◆ EADC_DISABLE_CMP_WINDOW_MODE

#define EADC_DISABLE_CMP_WINDOW_MODE | ( |  | eadc,
|  |  | u32CMP
| ) |  |

Disable the compare window mode.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32CMP | Specifies the compare register, valid value are 0 and 2.

Returns
  None

ADCMPF2 (EADC_STATUS2[6]) will be set when both EADC_CMP2 and EADC_CMP3 compared condition matched.

Definition at line 539 of file eadc.h.

## ◆ EADC_DISABLE_DOUBLE_BUFFER

#define EADC_DISABLE_DOUBLE_BUFFER | ( |  | eadc,
|  |  | u32ModuleNum
| ) |  |

Disable double buffer mode.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleNum | Decides the sample module number, valid value are from 0 to 3.

Returns
  None

Sample has one sample result register.

Definition at line 167 of file eadc.h.

## ◆ EADC_DISABLE_INT

#define EADC_DISABLE_INT | ( |  | eadc,
|  |  | u32Mask
| ) |  |

Disable the interrupt.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32Mask | Decides the combination of interrupt status bits. Each bit corresponds to a interrupt status. This parameter decides which interrupts will be disabled. Bit 0 is ADCIEN0, bit 1 is ADCIEN1..., bit 3 is ADCIEN3.

Returns
  None

Specific sample module A/D ADINT0 interrupt function Disabled.

Definition at line 210 of file eadc.h.

## ◆ EADC_DISABLE_INT_POSITION

#define EADC_DISABLE_INT_POSITION | ( |  | eadc,
|  |  | u32ModuleNum
| ) |  |

Set ADIFn at A/D start of conversion.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleNum | Decides the sample module number, valid value are from 0 to 15.

Returns
  None

The A/D converter generates ADIFn (EADC_STATUS2[3:0], n=0~3) at the end of conversion.

Definition at line 187 of file eadc.h.

## ◆ EADC_DISABLE_PDMA

#define EADC_DISABLE_PDMA | ( |  | eadc | ) |

Disable PDMA transfer.

Parameters

  [in] | eadc | The pointer of the specified EADC module.

Returns
  None

This macro is used to disable PDMA transfer.

Definition at line 123 of file eadc.h.

## ◆ EADC_DISABLE_SAMPLE_MODULE_INT

#define EADC_DISABLE_SAMPLE_MODULE_INT | ( |  | eadc,
|  |  | u32IntSel,
|  |  | u32ModuleMask
| ) |  |

Disable the sample module interrupt.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32IntSel | Decides which interrupt source will be used, valid value are from 0 to 3.
  [in] | u32ModuleMask | the combination of sample module interrupt status bits. Each bit corresponds to a sample module interrupt status. This parameter decides which sample module interrupts will be disabled, valid range are between 1~0x7FFFF.

Returns
  None

There are 4 ADC interrupts ADINT0~3, and each of these interrupts has its own interrupt vector address.

Definition at line 234 of file eadc.h.

## ◆ EADC_DISABLE_SAMPLE_MODULE_PDMA

#define EADC_DISABLE_SAMPLE_MODULE_PDMA | ( |  | eadc,
|  |  | u32ModuleMask
| ) |  |

Disable Sample Module PDMA transfer.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleMask | the combination of sample module interrupt status bits. Each bit corresponds to a sample module interrupt status. This parameter decides which sample module interrupts will be disabled, valid range are between 1~0x7FFFF.

Returns
  None

This macro is used to disable sample module PDMA transfer.

Definition at line 146 of file eadc.h.

## ◆ EADC_ENABLE_CMP0

#define EADC_ENABLE_CMP0 | ( |  | eadc,
|  |  | u32ModuleNum,
|  |  | u32Condition,
|  |  | u16CMPData,
|  |  | u32MatchCount
| ) |  |

Configure the comparator 0 and enable it.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleNum | specifies the compare sample module, valid value are from 0 to 18.
  [in] | u32Condition | specifies the compare condition. Valid values are: EADC_CMP_CMPCOND_LESS_THAN :The compare condition is "less than the compare value" EADC_CMP_CMPCOND_GREATER_OR_EQUAL :The compare condition is "greater than or equal to the compare value
  [in] | u16CMPData | specifies the compare value, valid range are between 0~0xFFF.
  [in] | u32MatchCount | specifies the match count setting, valid range are between 0~0xF.

Returns
  None

For example, ADC_ENABLE_CMP0(EADC, 5, ADC_ADCMPR_CMPCOND_GREATER_OR_EQUAL, 0x800, 10, EADC_CMP_CMPWEN_DISABLE, EADC_CMP_ADCMPIE_ENABLE); Means EADC will assert comparator 0 flag if sample module 5 conversion result is greater or equal to 0x800 for 10 times continuously, and a compare interrupt request is generated.

Definition at line 432 of file eadc.h.

## ◆ EADC_ENABLE_CMP1

#define EADC_ENABLE_CMP1 | ( |  | eadc,
|  |  | u32ModuleNum,
|  |  | u32Condition,
|  |  | u16CMPData,
|  |  | u32MatchCount
| ) |  |

Configure the comparator 1 and enable it.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleNum | specifies the compare sample module, valid value are from 0 to 18.
  [in] | u32Condition | specifies the compare condition. Valid values are: EADC_CMP_CMPCOND_LESS_THAN :The compare condition is "less than the compare value" EADC_CMP_CMPCOND_GREATER_OR_EQUAL :The compare condition is "greater than or equal to the compare value
  [in] | u16CMPData | specifies the compare value, valid range are between 0~0xFFF.
  [in] | u32MatchCount | specifies the match count setting, valid range are between 0~0xF.

Returns
  None

For example, ADC_ENABLE_CMP1(EADC, 5, ADC_ADCMPR_CMPCOND_GREATER_OR_EQUAL, 0x800, 10, EADC_CMP_ADCMPIE_ENABLE); Means EADC will assert comparator 1 flag if sample module 5 conversion result is greater or equal to 0x800 for 10 times continuously, and a compare interrupt request is generated.

Definition at line 458 of file eadc.h.

## ◆ EADC_ENABLE_CMP2

#define EADC_ENABLE_CMP2 | ( |  | eadc,
|  |  | u32ModuleNum,
|  |  | u32Condition,
|  |  | u16CMPData,
|  |  | u32MatchCount
| ) |  |

Configure the comparator 2 and enable it.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleNum | specifies the compare sample module, valid value are from 0 to 18.
  [in] | u32Condition | specifies the compare condition. Valid values are: EADC_CMP_CMPCOND_LESS_THAN :The compare condition is "less than the compare value" EADC_CMP_CMPCOND_GREATER_OR_EQUAL :The compare condition is "greater than or equal to the compare value
  [in] | u16CMPData | specifies the compare value, valid range are between 0~0xFFF.
  [in] | u32MatchCount | specifies the match count setting, valid range are between 0~0xF.

Returns
  None

For example, ADC_ENABLE_CMP2(EADC, 5, ADC_ADCMPR_CMPCOND_GREATER_OR_EQUAL, 0x800, 10, EADC_CMP_CMPWEN_DISABLE, EADC_CMP_ADCMPIE_ENABLE); Means EADC will assert comparator 2 flag if sample module 5 conversion result is greater or equal to 0x800 for 10 times continuously, and a compare interrupt request is generated.

Definition at line 484 of file eadc.h.

## ◆ EADC_ENABLE_CMP3

#define EADC_ENABLE_CMP3 | ( |  | eadc,
|  |  | u32ModuleNum,
|  |  | u32Condition,
|  |  | u16CMPData,
|  |  | u32MatchCount
| ) |  |

Configure the comparator 3 and enable it.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleNum | specifies the compare sample module, valid value are from 0 to 18.
  [in] | u32Condition | specifies the compare condition. Valid values are: EADC_CMP_CMPCOND_LESS_THAN :The compare condition is "less than the compare value" EADC_CMP_CMPCOND_GREATER_OR_EQUAL :The compare condition is "greater than or equal to the compare value
  [in] | u16CMPData | specifies the compare value, valid range are between 0~0xFFF.
  [in] | u32MatchCount | specifies the match count setting, valid range are between 1~0xF.

Returns
  None

For example, ADC_ENABLE_CMP3(EADC, 5, ADC_ADCMPR_CMPCOND_GREATER_OR_EQUAL, 0x800, 10, EADC_CMP_ADCMPIE_ENABLE); Means EADC will assert comparator 3 flag if sample module 5 conversion result is greater or equal to 0x800 for 10 times continuously, and a compare interrupt request is generated.

Definition at line 510 of file eadc.h.

## ◆ EADC_ENABLE_CMP_INT

#define EADC_ENABLE_CMP_INT | ( |  | eadc,
|  |  | u32CMP
| ) |  |

Enable the compare interrupt.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32CMP | Specifies the compare register, valid value are from 0 to 3.

Returns
  None

If the compare function is enabled and the compare condition matches the setting of CMPCOND (EADC_CMPn[2], n=0~3) and CMPMCNT (EADC_CMPn[11:8], n=0~3), ADCMPFn (EADC_STATUS2[7:4], n=0~3) will be asserted, in the meanwhile, if ADCMPIE is set to 1, a compare interrupt request is generated.

Definition at line 551 of file eadc.h.

## ◆ EADC_ENABLE_CMP_WINDOW_MODE

#define EADC_ENABLE_CMP_WINDOW_MODE | ( |  | eadc,
|  |  | u32CMP
| ) |  |

Enable the compare window mode.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32CMP | Specifies the compare register, valid value are 0 and 2.

Returns
  None

ADCMPF0 (EADC_STATUS2[4]) will be set when both EADC_CMP0 and EADC_CMP1 compared condition matched.

Definition at line 529 of file eadc.h.

## ◆ EADC_ENABLE_DOUBLE_BUFFER

#define EADC_ENABLE_DOUBLE_BUFFER | ( |  | eadc,
|  |  | u32ModuleNum
| ) |  |

Enable double buffer mode.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleNum | Decides the sample module number, valid value are from 0 to 3.

Returns
  None

The ADC controller supports a double buffer mode in sample module 0~3. If user enable DBMEN (EADC_SCTLn[23], n=0~3), the double buffer mode will enable.

Definition at line 157 of file eadc.h.

## ◆ EADC_ENABLE_INT

#define EADC_ENABLE_INT | ( |  | eadc,
|  |  | u32Mask
| ) |  |

Enable the interrupt.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32Mask | Decides the combination of interrupt status bits. Each bit corresponds to a interrupt status. This parameter decides which interrupts will be enabled. Bit 0 is ADCIEN0, bit 1 is ADCIEN1..., bit 3 is ADCIEN3.

Returns
  None

The A/D converter generates a conversion end ADIFn (EADC_STATUS2[n]) upon the end of specific sample module A/D conversion. If ADCIENn bit (EADC_CTL[n+2]) is set then conversion end interrupt request ADINTn is generated (n=0~3).

Definition at line 199 of file eadc.h.

## ◆ EADC_ENABLE_INT_POSITION

#define EADC_ENABLE_INT_POSITION | ( |  | eadc,
|  |  | u32ModuleNum
| ) |  |

Set ADIFn at A/D end of conversion.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleNum | Decides the sample module number, valid value are from 0 to 15.

Returns
  None

The A/D converter generates ADIFn (EADC_STATUS2[3:0], n=0~3) at the start of conversion.

Definition at line 177 of file eadc.h.

## ◆ EADC_ENABLE_PDMA

#define EADC_ENABLE_PDMA | ( |  | eadc | ) |

Enable PDMA transfer.

Parameters

  [in] | eadc | The pointer of the specified EADC module.

Returns
  None

When A/D conversion is completed, the converted data is loaded into EADC_DATn (n: 0 ~ 18) register, user can enable this bit to generate a PDMA data transfer request.

Note
  When set PDMAEN bit (EADC_CTL[11]), user must set ADINTENn (EADC_CTL[5:2], n=0~3) = 0 to disable interrupt.

Definition at line 114 of file eadc.h.

## ◆ EADC_ENABLE_SAMPLE_MODULE_INT

#define EADC_ENABLE_SAMPLE_MODULE_INT | ( |  | eadc,
|  |  | u32IntSel,
|  |  | u32ModuleMask
| ) |  |

Enable the sample module interrupt.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32IntSel | Decides which interrupt source will be used, valid value are from 0 to 3.
  [in] | u32ModuleMask | the combination of sample module interrupt status bits. Each bit corresponds to a sample module interrupt status. This parameter decides which sample module interrupts will be enabled, valid range are between 1~0x7FFFF.

Returns
  None

There are 4 ADC interrupts ADINT0~3, and each of these interrupts has its own interrupt vector address.

Definition at line 222 of file eadc.h.

## ◆ EADC_ENABLE_SAMPLE_MODULE_PDMA

#define EADC_ENABLE_SAMPLE_MODULE_PDMA | ( |  | eadc,
|  |  | u32ModuleMask
| ) |  |

Enable Sample Module PDMA transfer.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleMask | the combination of sample module interrupt status bits. Each bit corresponds to a sample module interrupt status. This parameter decides which sample module interrupts will be disabled, valid range are between 1~0x7FFFF.

Returns
  None

When A/D conversion is completed, the converted data is loaded into EADC_DATn (n: 0 ~ 18) register, user can enable this bit to generate a PDMA data transfer request.

Definition at line 135 of file eadc.h.

## ◆ EADC_GET_CONV_DATA

#define EADC_GET_CONV_DATA | ( |  | eadc,
|  |  | u32ModuleNum
| ) |  |

Get the conversion data of the user-specified sample module.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleNum | Decides the sample module number, valid value are from 0 to 18.

Returns
  Return the conversion data of the user-specified sample module.

This macro is used to read RESULT bit (EADC_DATn[15:0], n=0~18) field to get conversion data.

Definition at line 290 of file eadc.h.

## ◆ EADC_GET_DATA_OVERRUN_FLAG

#define EADC_GET_DATA_OVERRUN_FLAG | ( |  | eadc,
|  |  | u32ModuleMask
| ) |  |

Get the data overrun flag of the user-specified sample module.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleMask | The combination of data overrun status bits. Each bit corresponds to a data overrun status, valid range are between 1~0x7FFFF.

Returns
  Return the data overrun flag of the user-specified sample module.

This macro is used to read OV bit (EADC_STATUS0[31:16], EADC_STATUS1[18:16]) field to get data overrun status.

Definition at line 300 of file eadc.h.

## ◆ EADC_GET_DATA_VALID_FLAG

#define EADC_GET_DATA_VALID_FLAG | ( |  | eadc,
|  |  | u32ModuleMask
| ) |  |

Get the data valid flag of the user-specified sample module.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleMask | The combination of data valid status bits. Each bit corresponds to a data valid status, valid range are between 1~0x7FFFF.

Returns
  Return the data valid flag of the user-specified sample module.

This macro is used to read VALID bit (EADC_STATUS0[15:0], EADC_STATUS1[2:0]) field to get data valid status.

Definition at line 310 of file eadc.h.

## ◆ EADC_GET_DOUBLE_DATA

#define EADC_GET_DOUBLE_DATA | ( |  | eadc,
|  |  | u32ModuleNum
| ) |  |

Get the double data of the user-specified sample module.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleNum | Decides the sample module number, valid value are from 0 to 18.

Returns
  Return the double data of the user-specified sample module.

This macro is used to read RESULT bit (EADC_DDATn[15:0], n=0~3) field to get conversion data.

Definition at line 320 of file eadc.h.

## ◆ EADC_GET_INT_FLAG

#define EADC_GET_INT_FLAG | ( |  | eadc,
|  |  | u32Mask
| ) |  |

Get the user-specified interrupt flags.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32Mask | The combination of interrupt status bits. Each bit corresponds to a interrupt status. Bit 0 is ADIF0, bit 1 is ADIF1..., bit 3 is ADIF3. Bit 4 is ADCMPF0, bit 5 is ADCMPF1..., bit 7 is ADCMPF3.

Returns
  Return the user-specified interrupt flags.

This macro is used to get the user-specified interrupt flags.

Definition at line 332 of file eadc.h.

## ◆ EADC_GET_PENDING_CONV

#define EADC_GET_PENDING_CONV | ( |  | eadc | ) |

Get the conversion pending flag.

Parameters

  [in] | eadc | The pointer of the specified EADC module.

Returns
  Return the conversion pending sample module.

This STPFn(EADC_PENDSTS[18:0]) bit remains 1 during pending state, when the respective ADC conversion is end, the STPFn (n=0~18) bit is automatically cleared to 0.

Definition at line 280 of file eadc.h.

## ◆ EADC_GET_SAMPLE_MODULE_OV_FLAG

#define EADC_GET_SAMPLE_MODULE_OV_FLAG | ( |  | eadc,
|  |  | u32ModuleMask
| ) |  |

Get the user-specified sample module overrun flags.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleMask | The combination of sample module overrun status bits. Each bit corresponds to a sample module overrun status, valid range are between 1~0x7FFFF.

Returns
  Return the user-specified sample module overrun flags.

This macro is used to get the user-specified sample module overrun flags.

Definition at line 342 of file eadc.h.

## ◆ EADC_IS_BUSY

#define EADC_IS_BUSY | ( |  | eadc | ) |

Get the busy state of EADC.

Parameters

  [in] | eadc | The pointer of the specified EADC module.

Return values

  0 | Idle state.
  1 | Busy state.

This macro is used to read BUSY bit (EADC_STATUS2[23]) to get busy state.

Definition at line 415 of file eadc.h.

## ◆ EADC_IS_DATA_OV

#define EADC_IS_DATA_OV | ( |  | eadc | ) |

Check all sample module A/D result data register overrun flags.

Parameters

  [in] | eadc | The pointer of the specified EADC module.

Return values

  0 | None of sample module data register overrun flag is set to 1.
  1 | Any one of sample module data register overrun flag is set to 1.

The AOV bit (EADC_STATUS2[27]) will keep 1 when any one of sample module data register overrun flag OVn (EADC_DATn[16]) is set to 1.

Definition at line 375 of file eadc.h.

## ◆ EADC_IS_DATA_VALID

#define EADC_IS_DATA_VALID | ( |  | eadc | ) |

Check all sample module A/D result data register valid flags.

Parameters

  [in] | eadc | The pointer of the specified EADC module.

Return values

  0 | None of sample module data register valid flag is set to 1.
  1 | Any one of sample module data register valid flag is set to 1.

The AVALID bit (EADC_STATUS2[26]) will keep 1 when any one of sample module data register valid flag VALIDn (EADC_DATn[17]) is set to 1.

Definition at line 385 of file eadc.h.

## ◆ EADC_IS_INT_FLAG_OV

#define EADC_IS_INT_FLAG_OV | ( |  | eadc | ) |

Check all A/D interrupt flag overrun bits.

Parameters

  [in] | eadc | The pointer of the specified EADC module.

Return values

  0 | None of ADINT interrupt flag is overwritten to 1.
  1 | Any one of ADINT interrupt flag is overwritten to 1.

The ADOVIF bit (EADC_STATUS2[24]) will keep 1 when any one of ADINT interrupt flag ADOVIFn (EADC_STATUS2[11:8]) is overwritten to 1.

Definition at line 405 of file eadc.h.

## ◆ EADC_IS_SAMPLE_MODULE_OV

#define EADC_IS_SAMPLE_MODULE_OV | ( |  | eadc | ) |

Check all A/D sample module start of conversion overrun flags.

Parameters

  [in] | eadc | The pointer of the specified EADC module.

Return values

  0 | None of sample module event overrun flag is set to 1.
  1 | Any one of sample module event overrun flag is set to 1.

The STOVF bit (EADC_STATUS2[25]) will keep 1 when any one of sample module event overrun flag SPOVFn (EADC_OVSTS[n]) is set to 1.

Definition at line 395 of file eadc.h.

## ◆ EADC_SET_DMOF

#define EADC_SET_DMOF | ( |  | eadc,
|  |  | u32Format
| ) |  |

Set the input mode output format.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32Format | Decides the output format. Valid values are: EADC_CTL_DMOF_STRAIGHT_BINARY :Select the straight binary format as the output format of the conversion result. EADC_CTL_DMOF_TWOS_COMPLEMENT :Select the 2's complement format as the output format of the conversion result.

Returns
  None

The macro is used to set A/D input mode output format.

Definition at line 246 of file eadc.h.

## ◆ EADC_START_CONV

#define EADC_START_CONV | ( |  | eadc,
|  |  | u32ModuleMask
| ) |  |

Start the A/D conversion.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleMask | The combination of sample module. Each bit corresponds to a sample module. This parameter decides which sample module will be conversion, valid range are between 1~0x7FFFF. Bit 0 is sample module 0, bit 1 is sample module 1..., bit 18 is sample module 18.

Returns
  None

After write EADC_SWTRG register to start ADC conversion, the EADC_PENDSTS register will show which SAMPLE will conversion.

Definition at line 258 of file eadc.h.

## ◆ EADC_STOP_CONV

#define EADC_STOP_CONV | ( |  | eadc,
|  |  | u32ModuleMask
| ) |  |

Cancel the conversion for sample module.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleMask | The combination of sample module. Each bit corresponds to a sample module. This parameter decides which sample module will stop the conversion, valid range are between 1~0x7FFFF. Bit 0 is sample module 0, bit 1 is sample module 1..., bit 18 is sample module18.

Returns
  None

If user want to disable the conversion of the sample module, user can write EADC_PENDSTS register to clear it.

Definition at line 270 of file eadc.h.

## Function Documentation

## ◆ EADC_Close()

void EADC_Close | ( | EADC_T * | eadc | ) |

Disable EADC_module.

Parameters

  [in] | eadc | The pointer of the specified EADC module..

Returns
  None

Clear ADCEN bit (EADC_CTL[0]) to disable A/D converter analog circuit power consumption.

Definition at line 48 of file eadc.c.

## ◆ EADC_ConfigSampleModule()

void EADC_ConfigSampleModule | ( | EADC_T * | eadc,
|  | uint32_t | u32ModuleNum,
|  | uint32_t | u32TriggerSrc,
|  | uint32_t | u32Channel
| ) |  |

Configure the sample control logic module.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleNum | Decides the sample module number, valid value are from 0 to 15.
  [in] | u32TriggerSrc | Decides the trigger source. Valid values are: EADC_SOFTWARE_TRIGGER : Disable trigger EADC_FALLING_EDGE_TRIGGER : STADC pin falling edge trigger EADC_RISING_EDGE_TRIGGER : STADC pin rising edge trigger EADC_FALLING_RISING_EDGE_TRIGGER : STADC pin both falling and rising edge trigger EADC_ADINT0_TRIGGER : EADC ADINT0 interrupt EOC pulse trigger EADC_ADINT1_TRIGGER : EADC ADINT1 interrupt EOC pulse trigger EADC_TIMER0_TRIGGER : Timer0 overflow pulse trigger EADC_TIMER1_TRIGGER : Timer1 overflow pulse trigger EADC_TIMER2_TRIGGER : Timer2 overflow pulse trigger EADC_TIMER3_TRIGGER : Timer3 overflow pulse trigger EADC_EPWM0TG0_TRIGGER : EPWM0TG0 trigger EADC_EPWM0TG1_TRIGGER : EPWM0TG1 trigger EADC_EPWM0TG2_TRIGGER : EPWM0TG2 trigger EADC_EPWM0TG3_TRIGGER : EPWM0TG3 trigger EADC_EPWM0TG4_TRIGGER : EPWM0TG4 trigger EADC_EPWM0TG5_TRIGGER : EPWM0TG5 trigger EADC_EPWM1TG0_TRIGGER : EPWM1TG0 trigger EADC_EPWM1TG1_TRIGGER : EPWM1TG1 trigger EADC_EPWM1TG2_TRIGGER : EPWM1TG2 trigger EADC_EPWM1TG3_TRIGGER : EPWM1TG3 trigger EADC_EPWM1TG4_TRIGGER : EPWM1TG4 trigger EADC_EPWM1TG5_TRIGGER : EPWM1TG5 trigger EADC_BPWM0TG_TRIGGER : BPWM0TG trigger EADC_BPWM1TG_TRIGGER : BPWM1TG trigger
  [in] | u32Channel | Specifies the sample module channel, valid value are from 0 to 15.

Returns
  None

Each of ADC control logic modules 0~15 which is configurable for ADC converter channel EADC_CH0~15 and trigger source. sample module 16~18 is fixed for ADC channel 16, 17, 18 input sources as band-gap voltage, temperature sensor, and battery power (VBAT).

Definition at line 87 of file eadc.c.

## ◆ EADC_Open()

void EADC_Open | ( | EADC_T * | eadc,
|  | uint32_t | u32InputMode
| ) |  |

This function make EADC_module be ready to convert.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32InputMode | Decides the input mode. EADC_CTL_DIFFEN_SINGLE_END :Single end input mode. EADC_CTL_DIFFEN_DIFFERENTIAL :Differential input type.

Returns
  None

This function is used to set analog input mode and enable A/D Converter. Before starting A/D conversion function, ADCEN bit (EADC_CTL[0]) should be set to 1.

Note

Definition at line 34 of file eadc.c.

## ◆ EADC_SetExtendSampleTime()

void EADC_SetExtendSampleTime | ( | EADC_T * | eadc,
|  | uint32_t | u32ModuleNum,
|  | uint32_t | u32ExtendSampleTime
| ) |  |

Set ADC extend sample time.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleNum | Decides the sample module number, valid value are from 0 to 18.
  [in] | u32ExtendSampleTime | Decides the extend sampling time, the range is from 0~255 ADC clock. Valid value are from 0 to 0xFF.

Returns
  None

When A/D converting at high conversion rate, the sampling time of analog input voltage may not enough if input channel loading is heavy, user can extend A/D sampling time after trigger source is coming to get enough sampling time.

Definition at line 129 of file eadc.c.

## ◆ EADC_SetTriggerDelayTime()

void EADC_SetTriggerDelayTime | ( | EADC_T * | eadc,
|  | uint32_t | u32ModuleNum,
|  | uint32_t | u32TriggerDelayTime,
|  | uint32_t | u32DelayClockDivider
| ) |  |

Set trigger delay time.

Parameters

  [in] | eadc | The pointer of the specified EADC module.
  [in] | u32ModuleNum | Decides the sample module number, valid value are from 0 to 15.
  [in] | u32TriggerDelayTime | Decides the trigger delay time, valid range are between 0~0xFF.
  [in] | u32DelayClockDivider | Decides the trigger delay clock divider. Valid values are: EADC_SCTL_TRGDLYDIV_DIVIDER_1 : Trigger delay clock frequency is ADC_CLK/1 EADC_SCTL_TRGDLYDIV_DIVIDER_2 : Trigger delay clock frequency is ADC_CLK/2 EADC_SCTL_TRGDLYDIV_DIVIDER_4 : Trigger delay clock frequency is ADC_CLK/4 EADC_SCTL_TRGDLYDIV_DIVIDER_16 : Trigger delay clock frequency is ADC_CLK/16

Returns
  None

User can configure the trigger delay time by setting TRGDLYCNT (EADC_SCTLn[15:8], n=0~15) and TRGDLYDIV (EADC_SCTLn[7:6], n=0~15). Trigger delay time = (u32TriggerDelayTime) x Trigger delay clock period.

Definition at line 111 of file eadc.c.