| M480 BSP V3.05.001 The Board Support Package for M480 Series

Data Structures
sc_reg.h File Reference

SC register definition header file. More...

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## Data Structures
struct | SC_T

## Macros
#define | SC_DAT_DAT_Pos (0)
#define | SC_DAT_DAT_Msk (0xfful << SC_DAT_DAT_Pos)
#define | SC_CTL_SCEN_Pos (0)
#define | SC_CTL_SCEN_Msk (0x1ul << SC_CTL_SCEN_Pos)
#define | SC_CTL_RXOFF_Pos (1)
#define | SC_CTL_RXOFF_Msk (0x1ul << SC_CTL_RXOFF_Pos)
#define | SC_CTL_TXOFF_Pos (2)
#define | SC_CTL_TXOFF_Msk (0x1ul << SC_CTL_TXOFF_Pos)
#define | SC_CTL_AUTOCEN_Pos (3)
#define | SC_CTL_AUTOCEN_Msk (0x1ul << SC_CTL_AUTOCEN_Pos)
#define | SC_CTL_CONSEL_Pos (4)
#define | SC_CTL_CONSEL_Msk (0x3ul << SC_CTL_CONSEL_Pos)
#define | SC_CTL_RXTRGLV_Pos (6)
#define | SC_CTL_RXTRGLV_Msk (0x3ul << SC_CTL_RXTRGLV_Pos)
#define | SC_CTL_BGT_Pos (8)
#define | SC_CTL_BGT_Msk (0x1ful << SC_CTL_BGT_Pos)
#define | SC_CTL_TMRSEL_Pos (13)
#define | SC_CTL_TMRSEL_Msk (0x3ul << SC_CTL_TMRSEL_Pos)
#define | SC_CTL_NSB_Pos (15)
#define | SC_CTL_NSB_Msk (0x1ul << SC_CTL_NSB_Pos)
#define | SC_CTL_RXRTY_Pos (16)
#define | SC_CTL_RXRTY_Msk (0x7ul << SC_CTL_RXRTY_Pos)
#define | SC_CTL_RXRTYEN_Pos (19)
#define | SC_CTL_RXRTYEN_Msk (0x1ul << SC_CTL_RXRTYEN_Pos)
#define | SC_CTL_TXRTY_Pos (20)
#define | SC_CTL_TXRTY_Msk (0x7ul << SC_CTL_TXRTY_Pos)
#define | SC_CTL_TXRTYEN_Pos (23)
#define | SC_CTL_TXRTYEN_Msk (0x1ul << SC_CTL_TXRTYEN_Pos)
#define | SC_CTL_CDDBSEL_Pos (24)
#define | SC_CTL_CDDBSEL_Msk (0x3ul << SC_CTL_CDDBSEL_Pos)
#define | SC_CTL_CDLV_Pos (26)
#define | SC_CTL_CDLV_Msk (0x1ul << SC_CTL_CDLV_Pos)
#define | SC_CTL_SYNC_Pos (30)
#define | SC_CTL_SYNC_Msk (0x1ul << SC_CTL_SYNC_Pos)
#define | SC_ALTCTL_TXRST_Pos (0)
#define | SC_ALTCTL_TXRST_Msk (0x1ul << SC_ALTCTL_TXRST_Pos)
#define | SC_ALTCTL_RXRST_Pos (1)
#define | SC_ALTCTL_RXRST_Msk (0x1ul << SC_ALTCTL_RXRST_Pos)
#define | SC_ALTCTL_DACTEN_Pos (2)
#define | SC_ALTCTL_DACTEN_Msk (0x1ul << SC_ALTCTL_DACTEN_Pos)
#define | SC_ALTCTL_ACTEN_Pos (3)
#define | SC_ALTCTL_ACTEN_Msk (0x1ul << SC_ALTCTL_ACTEN_Pos)
#define | SC_ALTCTL_WARSTEN_Pos (4)
#define | SC_ALTCTL_WARSTEN_Msk (0x1ul << SC_ALTCTL_WARSTEN_Pos)
#define | SC_ALTCTL_CNTEN0_Pos (5)
#define | SC_ALTCTL_CNTEN0_Msk (0x1ul << SC_ALTCTL_CNTEN0_Pos)
#define | SC_ALTCTL_CNTEN1_Pos (6)
#define | SC_ALTCTL_CNTEN1_Msk (0x1ul << SC_ALTCTL_CNTEN1_Pos)
#define | SC_ALTCTL_CNTEN2_Pos (7)
#define | SC_ALTCTL_CNTEN2_Msk (0x1ul << SC_ALTCTL_CNTEN2_Pos)
#define | SC_ALTCTL_INITSEL_Pos (8)
#define | SC_ALTCTL_INITSEL_Msk (0x3ul << SC_ALTCTL_INITSEL_Pos)
#define | SC_ALTCTL_ADACEN_Pos (11)
#define | SC_ALTCTL_ADACEN_Msk (0x1ul << SC_ALTCTL_ADACEN_Pos)
#define | SC_ALTCTL_RXBGTEN_Pos (12)
#define | SC_ALTCTL_RXBGTEN_Msk (0x1ul << SC_ALTCTL_RXBGTEN_Pos)
#define | SC_ALTCTL_ACTSTS0_Pos (13)
#define | SC_ALTCTL_ACTSTS0_Msk (0x1ul << SC_ALTCTL_ACTSTS0_Pos)
#define | SC_ALTCTL_ACTSTS1_Pos (14)
#define | SC_ALTCTL_ACTSTS1_Msk (0x1ul << SC_ALTCTL_ACTSTS1_Pos)
#define | SC_ALTCTL_ACTSTS2_Pos (15)
#define | SC_ALTCTL_ACTSTS2_Msk (0x1ul << SC_ALTCTL_ACTSTS2_Pos)
#define | SC_ALTCTL_SYNC_Pos (31)
#define | SC_ALTCTL_SYNC_Msk (0x1ul << SC_ALTCTL_SYNC_Pos)
#define | SC_EGT_EGT_Pos (0)
#define | SC_EGT_EGT_Msk (0xfful << SC_EGT_EGT_Pos)
#define | SC_RXTOUT_RFTM_Pos (0)
#define | SC_RXTOUT_RFTM_Msk (0x1fful << SC_RXTOUT_RFTM_Pos)
#define | SC_ETUCTL_ETURDIV_Pos (0)
#define | SC_ETUCTL_ETURDIV_Msk (0xffful << SC_ETUCTL_ETURDIV_Pos)
#define | SC_INTEN_RDAIEN_Pos (0)
#define | SC_INTEN_RDAIEN_Msk (0x1ul << SC_INTEN_RDAIEN_Pos)
#define | SC_INTEN_TBEIEN_Pos (1)
#define | SC_INTEN_TBEIEN_Msk (0x1ul << SC_INTEN_TBEIEN_Pos)
#define | SC_INTEN_TERRIEN_Pos (2)
#define | SC_INTEN_TERRIEN_Msk (0x1ul << SC_INTEN_TERRIEN_Pos)
#define | SC_INTEN_TMR0IEN_Pos (3)
#define | SC_INTEN_TMR0IEN_Msk (0x1ul << SC_INTEN_TMR0IEN_Pos)
#define | SC_INTEN_TMR1IEN_Pos (4)
#define | SC_INTEN_TMR1IEN_Msk (0x1ul << SC_INTEN_TMR1IEN_Pos)
#define | SC_INTEN_TMR2IEN_Pos (5)
#define | SC_INTEN_TMR2IEN_Msk (0x1ul << SC_INTEN_TMR2IEN_Pos)
#define | SC_INTEN_BGTIEN_Pos (6)
#define | SC_INTEN_BGTIEN_Msk (0x1ul << SC_INTEN_BGTIEN_Pos)
#define | SC_INTEN_CDIEN_Pos (7)
#define | SC_INTEN_CDIEN_Msk (0x1ul << SC_INTEN_CDIEN_Pos)
#define | SC_INTEN_INITIEN_Pos (8)
#define | SC_INTEN_INITIEN_Msk (0x1ul << SC_INTEN_INITIEN_Pos)
#define | SC_INTEN_RXTOIEN_Pos (9)
#define | SC_INTEN_RXTOIEN_Msk (0x1ul << SC_INTEN_RXTOIEN_Pos)
#define | SC_INTEN_ACERRIEN_Pos (10)
#define | SC_INTEN_ACERRIEN_Msk (0x1ul << SC_INTEN_ACERRIEN_Pos)
#define | SC_INTSTS_RDAIF_Pos (0)
#define | SC_INTSTS_RDAIF_Msk (0x1ul << SC_INTSTS_RDAIF_Pos)
#define | SC_INTSTS_TBEIF_Pos (1)
#define | SC_INTSTS_TBEIF_Msk (0x1ul << SC_INTSTS_TBEIF_Pos)
#define | SC_INTSTS_TERRIF_Pos (2)
#define | SC_INTSTS_TERRIF_Msk (0x1ul << SC_INTSTS_TERRIF_Pos)
#define | SC_INTSTS_TMR0IF_Pos (3)
#define | SC_INTSTS_TMR0IF_Msk (0x1ul << SC_INTSTS_TMR0IF_Pos)
#define | SC_INTSTS_TMR1IF_Pos (4)
#define | SC_INTSTS_TMR1IF_Msk (0x1ul << SC_INTSTS_TMR1IF_Pos)
#define | SC_INTSTS_TMR2IF_Pos (5)
#define | SC_INTSTS_TMR2IF_Msk (0x1ul << SC_INTSTS_TMR2IF_Pos)
#define | SC_INTSTS_BGTIF_Pos (6)
#define | SC_INTSTS_BGTIF_Msk (0x1ul << SC_INTSTS_BGTIF_Pos)
#define | SC_INTSTS_CDIF_Pos (7)
#define | SC_INTSTS_CDIF_Msk (0x1ul << SC_INTSTS_CDIF_Pos)
#define | SC_INTSTS_INITIF_Pos (8)
#define | SC_INTSTS_INITIF_Msk (0x1ul << SC_INTSTS_INITIF_Pos)
#define | SC_INTSTS_RXTOIF_Pos (9)
#define | SC_INTSTS_RXTOIF_Msk (0x1ul << SC_INTSTS_RXTOIF_Pos)
#define | SC_INTSTS_ACERRIF_Pos (10)
#define | SC_INTSTS_ACERRIF_Msk (0x1ul << SC_INTSTS_ACERRIF_Pos)
#define | SC_STATUS_RXOV_Pos (0)
#define | SC_STATUS_RXOV_Msk (0x1ul << SC_STATUS_RXOV_Pos)
#define | SC_STATUS_RXEMPTY_Pos (1)
#define | SC_STATUS_RXEMPTY_Msk (0x1ul << SC_STATUS_RXEMPTY_Pos)
#define | SC_STATUS_RXFULL_Pos (2)
#define | SC_STATUS_RXFULL_Msk (0x1ul << SC_STATUS_RXFULL_Pos)
#define | SC_STATUS_PEF_Pos (4)
#define | SC_STATUS_PEF_Msk (0x1ul << SC_STATUS_PEF_Pos)
#define | SC_STATUS_FEF_Pos (5)
#define | SC_STATUS_FEF_Msk (0x1ul << SC_STATUS_FEF_Pos)
#define | SC_STATUS_BEF_Pos (6)
#define | SC_STATUS_BEF_Msk (0x1ul << SC_STATUS_BEF_Pos)
#define | SC_STATUS_TXOV_Pos (8)
#define | SC_STATUS_TXOV_Msk (0x1ul << SC_STATUS_TXOV_Pos)
#define | SC_STATUS_TXEMPTY_Pos (9)
#define | SC_STATUS_TXEMPTY_Msk (0x1ul << SC_STATUS_TXEMPTY_Pos)
#define | SC_STATUS_TXFULL_Pos (10)
#define | SC_STATUS_TXFULL_Msk (0x1ul << SC_STATUS_TXFULL_Pos)
#define | SC_STATUS_CREMOVE_Pos (11)
#define | SC_STATUS_CREMOVE_Msk (0x1ul << SC_STATUS_CREMOVE_Pos)
#define | SC_STATUS_CINSERT_Pos (12)
#define | SC_STATUS_CINSERT_Msk (0x1ul << SC_STATUS_CINSERT_Pos)
#define | SC_STATUS_CDPINSTS_Pos (13)
#define | SC_STATUS_CDPINSTS_Msk (0x1ul << SC_STATUS_CDPINSTS_Pos)
#define | SC_STATUS_RXPOINT_Pos (16)
#define | SC_STATUS_RXPOINT_Msk (0x7ul << SC_STATUS_RXPOINT_Pos)
#define | SC_STATUS_RXRERR_Pos (21)
#define | SC_STATUS_RXRERR_Msk (0x1ul << SC_STATUS_RXRERR_Pos)
#define | SC_STATUS_RXOVERR_Pos (22)
#define | SC_STATUS_RXOVERR_Msk (0x1ul << SC_STATUS_RXOVERR_Pos)
#define | SC_STATUS_RXACT_Pos (23)
#define | SC_STATUS_RXACT_Msk (0x1ul << SC_STATUS_RXACT_Pos)
#define | SC_STATUS_TXPOINT_Pos (24)
#define | SC_STATUS_TXPOINT_Msk (0x7ul << SC_STATUS_TXPOINT_Pos)
#define | SC_STATUS_TXRERR_Pos (29)
#define | SC_STATUS_TXRERR_Msk (0x1ul << SC_STATUS_TXRERR_Pos)
#define | SC_STATUS_TXOVERR_Pos (30)
#define | SC_STATUS_TXOVERR_Msk (0x1ul << SC_STATUS_TXOVERR_Pos)
#define | SC_STATUS_TXACT_Pos (31)
#define | SC_STATUS_TXACT_Msk (0x1ul << SC_STATUS_TXACT_Pos)
#define | SC_PINCTL_PWREN_Pos (0)
#define | SC_PINCTL_PWREN_Msk (0x1ul << SC_PINCTL_PWREN_Pos)
#define | SC_PINCTL_RSTEN_Pos (1)
#define | SC_PINCTL_RSTEN_Msk (0x1ul << SC_PINCTL_RSTEN_Pos)
#define | SC_PINCTL_CLKKEEP_Pos (6)
#define | SC_PINCTL_CLKKEEP_Msk (0x1ul << SC_PINCTL_CLKKEEP_Pos)
#define | SC_PINCTL_SCDATA_Pos (9)
#define | SC_PINCTL_SCDATA_Msk (0x1ul << SC_PINCTL_SCDATA_Pos)
#define | SC_PINCTL_PWRINV_Pos (11)
#define | SC_PINCTL_PWRINV_Msk (0x1ul << SC_PINCTL_PWRINV_Pos)
#define | SC_PINCTL_DATASTS_Pos (16)
#define | SC_PINCTL_DATASTS_Msk (0x1ul << SC_PINCTL_DATASTS_Pos)
#define | SC_PINCTL_PWRSTS_Pos (17)
#define | SC_PINCTL_PWRSTS_Msk (0x1ul << SC_PINCTL_PWRSTS_Pos)
#define | SC_PINCTL_RSTSTS_Pos (18)
#define | SC_PINCTL_RSTSTS_Msk (0x1ul << SC_PINCTL_RSTSTS_Pos)
#define | SC_PINCTL_SYNC_Pos (30)
#define | SC_PINCTL_SYNC_Msk (0x1ul << SC_PINCTL_SYNC_Pos)
#define | SC_TMRCTL0_CNT_Pos (0)
#define | SC_TMRCTL0_CNT_Msk (0xfffffful << SC_TMRCTL0_CNT_Pos)
#define | SC_TMRCTL0_OPMODE_Pos (24)
#define | SC_TMRCTL0_OPMODE_Msk (0xful << SC_TMRCTL0_OPMODE_Pos)
#define | SC_TMRCTL0_SYNC_Pos (31)
#define | SC_TMRCTL0_SYNC_Msk (0x1ul << SC_TMRCTL0_SYNC_Pos)
#define | SC_TMRCTL1_CNT_Pos (0)
#define | SC_TMRCTL1_CNT_Msk (0xfful << SC_TMRCTL1_CNT_Pos)
#define | SC_TMRCTL1_OPMODE_Pos (24)
#define | SC_TMRCTL1_OPMODE_Msk (0xful << SC_TMRCTL1_OPMODE_Pos)
#define | SC_TMRCTL1_SYNC_Pos (31)
#define | SC_TMRCTL1_SYNC_Msk (0x1ul << SC_TMRCTL1_SYNC_Pos)
#define | SC_TMRCTL2_CNT_Pos (0)
#define | SC_TMRCTL2_CNT_Msk (0xfful << SC_TMRCTL2_CNT_Pos)
#define | SC_TMRCTL2_OPMODE_Pos (24)
#define | SC_TMRCTL2_OPMODE_Msk (0xful << SC_TMRCTL2_OPMODE_Pos)
#define | SC_TMRCTL2_SYNC_Pos (31)
#define | SC_TMRCTL2_SYNC_Msk (0x1ul << SC_TMRCTL2_SYNC_Pos)
#define | SC_UARTCTL_UARTEN_Pos (0)
#define | SC_UARTCTL_UARTEN_Msk (0x1ul << SC_UARTCTL_UARTEN_Pos)
#define | SC_UARTCTL_WLS_Pos (4)
#define | SC_UARTCTL_WLS_Msk (0x3ul << SC_UARTCTL_WLS_Pos)
#define | SC_UARTCTL_PBOFF_Pos (6)
#define | SC_UARTCTL_PBOFF_Msk (0x1ul << SC_UARTCTL_PBOFF_Pos)
#define | SC_UARTCTL_OPE_Pos (7)
#define | SC_UARTCTL_OPE_Msk (0x1ul << SC_UARTCTL_OPE_Pos)
#define | SC_ACTCTL_T1EXT_Pos (0)
#define | SC_ACTCTL_T1EXT_Msk (0x1ful << SC_ACTCTL_T1EXT_Pos)

## Detailed Description

SC register definition header file.

Version
  V1.00 SPDX-License-Identifier: Apache-2.0

Copyright
  (C) 2017-2020 Nuvoton Technology Corp. All rights reserved.

Definition in file sc_reg.h.