| M480 BSP V3.05.001 The Board Support Package for M480 Series

epwm_reg.h
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1 /**************************************************************************/
9 #ifndef __EPWM_REG_H__
10 #define __EPWM_REG_H__
11
12 #if defined ( __CC_ARM )
13 #pragma anon_unions
14 #endif
15
26 typedef struct
27 {
67 __IO uint32_t RCAPDAT;
68 __IO uint32_t FCAPDAT;
69 } ECAPDAT_T;
70
71 typedef struct
72 {
73
74
4717 __IO uint32_t CTL0;
4718 __IO uint32_t CTL1;
4719 __IO uint32_t SYNC;
4720 __IO uint32_t SWSYNC;
4721 __IO uint32_t CLKSRC;
4722 __IO uint32_t CLKPSC[3];
4723 __IO uint32_t CNTEN;
4724 __IO uint32_t CNTCLR;
4725 __IO uint32_t LOAD;
4726 __I uint32_t RESERVE0[1];
4729 __IO uint32_t PERIOD[6];
4730 __I uint32_t RESERVE1[2];
4733 __IO uint32_t CMPDAT[6];
4734 __I uint32_t RESERVE2[2];
4737 __IO uint32_t DTCTL[3];
4738 __I uint32_t RESERVE3[1];
4741 __IO uint32_t PHS[3];
4742 __I uint32_t RESERVE4[1];
4745 __I uint32_t CNT[6];
4746 __I uint32_t RESERVE5[2];
4749 __IO uint32_t WGCTL0;
4750 __IO uint32_t WGCTL1;
4751 __IO uint32_t MSKEN;
4752 __IO uint32_t MSK;
4753 __IO uint32_t BNF;
4754 __IO uint32_t FAILBRK;
4755 __IO uint32_t BRKCTL[3];
4756 __IO uint32_t POLCTL;
4757 __IO uint32_t POEN;
4758 __O uint32_t SWBRK;
4759 __IO uint32_t INTEN0;
4760 __IO uint32_t INTEN1;
4761 __IO uint32_t INTSTS0;
4762 __IO uint32_t INTSTS1;
4763 __I uint32_t RESERVE6[1];
4766 __IO uint32_t DACTRGEN;
4767 __IO uint32_t EADCTS0;
4768 __IO uint32_t EADCTS1;
4769 __IO uint32_t FTCMPDAT[3];
4770 __I uint32_t RESERVE7[1];
4773 __IO uint32_t SSCTL;
4774 __O uint32_t SSTRG;
4775 __IO uint32_t LEBCTL;
4776 __IO uint32_t LEBCNT;
4777 __IO uint32_t STATUS;
4778 __I uint32_t RESERVE8[3];
4781 __IO uint32_t IFA[6];
4782 __I uint32_t RESERVE9[2];
4785 __IO uint32_t AINTSTS;
4786 __IO uint32_t AINTEN;
4787 __IO uint32_t APDMACTL;
4788 __I uint32_t RESERVE10[1];
4791 __IO uint32_t FDEN;
4792 __IO uint32_t FDCTL[6];
4793 __IO uint32_t FDIEN;
4794 __IO uint32_t FDSTS;
4795 __IO uint32_t EADCPSCCTL;
4796 __IO uint32_t EADCPSC0;
4797 __IO uint32_t EADCPSC1;
4798 __IO uint32_t EADCPSCNT0;
4799 __IO uint32_t EADCPSCNT1;
4800 __I uint32_t RESERVE11[26];
4803 __IO uint32_t CAPINEN;
4804 __IO uint32_t CAPCTL;
4805 __I uint32_t CAPSTS;
4806 ECAPDAT_T CAPDAT[6];
4807 __IO uint32_t PDMACTL;
4808 __I uint32_t PDMACAP[3];
4809 __I uint32_t RESERVE12[1];
4812 __IO uint32_t CAPIEN;
4813 __IO uint32_t CAPIF;
4814 __I uint32_t RESERVE13[43];
4817 __I uint32_t PBUF[6];
4818 __I uint32_t CMPBUF[6];
4819 __I uint32_t CPSCBUF[3];
4820 __I uint32_t FTCBUF[3];
4821 __IO uint32_t FTCI;
4823 } EPWM_T;
4824
4830 #define EPWM_CTL0_CTRLD0_Pos (0)
4831 #define EPWM_CTL0_CTRLD0_Msk (0x1ul << EPWM_CTL0_CTRLD0_Pos)
4833 #define EPWM_CTL0_CTRLD1_Pos (1)
4834 #define EPWM_CTL0_CTRLD1_Msk (0x1ul << EPWM_CTL0_CTRLD1_Pos)
4836 #define EPWM_CTL0_CTRLD2_Pos (2)
4837 #define EPWM_CTL0_CTRLD2_Msk (0x1ul << EPWM_CTL0_CTRLD2_Pos)
4839 #define EPWM_CTL0_CTRLD3_Pos (3)
4840 #define EPWM_CTL0_CTRLD3_Msk (0x1ul << EPWM_CTL0_CTRLD3_Pos)
4842 #define EPWM_CTL0_CTRLD4_Pos (4)
4843 #define EPWM_CTL0_CTRLD4_Msk (0x1ul << EPWM_CTL0_CTRLD4_Pos)
4845 #define EPWM_CTL0_CTRLD5_Pos (5)
4846 #define EPWM_CTL0_CTRLD5_Msk (0x1ul << EPWM_CTL0_CTRLD5_Pos)
4848 #define EPWM_CTL0_WINLDEN0_Pos (8)
4849 #define EPWM_CTL0_WINLDEN0_Msk (0x1ul << EPWM_CTL0_WINLDEN0_Pos)
4851 #define EPWM_CTL0_WINLDEN1_Pos (9)
4852 #define EPWM_CTL0_WINLDEN1_Msk (0x1ul << EPWM_CTL0_WINLDEN1_Pos)
4854 #define EPWM_CTL0_WINLDEN2_Pos (10)
4855 #define EPWM_CTL0_WINLDEN2_Msk (0x1ul << EPWM_CTL0_WINLDEN2_Pos)
4857 #define EPWM_CTL0_WINLDEN3_Pos (11)
4858 #define EPWM_CTL0_WINLDEN3_Msk (0x1ul << EPWM_CTL0_WINLDEN3_Pos)
4860 #define EPWM_CTL0_WINLDEN4_Pos (12)
4861 #define EPWM_CTL0_WINLDEN4_Msk (0x1ul << EPWM_CTL0_WINLDEN4_Pos)
4863 #define EPWM_CTL0_WINLDEN5_Pos (13)
4864 #define EPWM_CTL0_WINLDEN5_Msk (0x1ul << EPWM_CTL0_WINLDEN5_Pos)
4866 #define EPWM_CTL0_IMMLDEN0_Pos (16)
4867 #define EPWM_CTL0_IMMLDEN0_Msk (0x1ul << EPWM_CTL0_IMMLDEN0_Pos)
4869 #define EPWM_CTL0_IMMLDEN1_Pos (17)
4870 #define EPWM_CTL0_IMMLDEN1_Msk (0x1ul << EPWM_CTL0_IMMLDEN1_Pos)
4872 #define EPWM_CTL0_IMMLDEN2_Pos (18)
4873 #define EPWM_CTL0_IMMLDEN2_Msk (0x1ul << EPWM_CTL0_IMMLDEN2_Pos)
4875 #define EPWM_CTL0_IMMLDEN3_Pos (19)
4876 #define EPWM_CTL0_IMMLDEN3_Msk (0x1ul << EPWM_CTL0_IMMLDEN3_Pos)
4878 #define EPWM_CTL0_IMMLDEN4_Pos (20)
4879 #define EPWM_CTL0_IMMLDEN4_Msk (0x1ul << EPWM_CTL0_IMMLDEN4_Pos)
4881 #define EPWM_CTL0_IMMLDEN5_Pos (21)
4882 #define EPWM_CTL0_IMMLDEN5_Msk (0x1ul << EPWM_CTL0_IMMLDEN5_Pos)
4884 #define EPWM_CTL0_GROUPEN_Pos (24)
4885 #define EPWM_CTL0_GROUPEN_Msk (0x1ul << EPWM_CTL0_GROUPEN_Pos)
4887 #define EPWM_CTL0_DBGHALT_Pos (30)
4888 #define EPWM_CTL0_DBGHALT_Msk (0x1ul << EPWM_CTL0_DBGHALT_Pos)
4890 #define EPWM_CTL0_DBGTRIOFF_Pos (31)
4891 #define EPWM_CTL0_DBGTRIOFF_Msk (0x1ul << EPWM_CTL0_DBGTRIOFF_Pos)
4893 #define EPWM_CTL1_CNTTYPE0_Pos (0)
4894 #define EPWM_CTL1_CNTTYPE0_Msk (0x3ul << EPWM_CTL1_CNTTYPE0_Pos)
4896 #define EPWM_CTL1_CNTTYPE1_Pos (2)
4897 #define EPWM_CTL1_CNTTYPE1_Msk (0x3ul << EPWM_CTL1_CNTTYPE1_Pos)
4899 #define EPWM_CTL1_CNTTYPE2_Pos (4)
4900 #define EPWM_CTL1_CNTTYPE2_Msk (0x3ul << EPWM_CTL1_CNTTYPE2_Pos)
4902 #define EPWM_CTL1_CNTTYPE3_Pos (6)
4903 #define EPWM_CTL1_CNTTYPE3_Msk (0x3ul << EPWM_CTL1_CNTTYPE3_Pos)
4905 #define EPWM_CTL1_CNTTYPE4_Pos (8)
4906 #define EPWM_CTL1_CNTTYPE4_Msk (0x3ul << EPWM_CTL1_CNTTYPE4_Pos)
4908 #define EPWM_CTL1_CNTTYPE5_Pos (10)
4909 #define EPWM_CTL1_CNTTYPE5_Msk (0x3ul << EPWM_CTL1_CNTTYPE5_Pos)
4911 #define EPWM_CTL1_CNTMODE0_Pos (16)
4912 #define EPWM_CTL1_CNTMODE0_Msk (0x1ul << EPWM_CTL1_CNTMODE0_Pos)
4914 #define EPWM_CTL1_CNTMODE1_Pos (17)
4915 #define EPWM_CTL1_CNTMODE1_Msk (0x1ul << EPWM_CTL1_CNTMODE1_Pos)
4917 #define EPWM_CTL1_CNTMODE2_Pos (18)
4918 #define EPWM_CTL1_CNTMODE2_Msk (0x1ul << EPWM_CTL1_CNTMODE2_Pos)
4920 #define EPWM_CTL1_CNTMODE3_Pos (19)
4921 #define EPWM_CTL1_CNTMODE3_Msk (0x1ul << EPWM_CTL1_CNTMODE3_Pos)
4923 #define EPWM_CTL1_CNTMODE4_Pos (20)
4924 #define EPWM_CTL1_CNTMODE4_Msk (0x1ul << EPWM_CTL1_CNTMODE4_Pos)
4926 #define EPWM_CTL1_CNTMODE5_Pos (21)
4927 #define EPWM_CTL1_CNTMODE5_Msk (0x1ul << EPWM_CTL1_CNTMODE5_Pos)
4929 #define EPWM_CTL1_OUTMODE0_Pos (24)
4930 #define EPWM_CTL1_OUTMODE0_Msk (0x1ul << EPWM_CTL1_OUTMODE0_Pos)
4932 #define EPWM_CTL1_OUTMODE2_Pos (25)
4933 #define EPWM_CTL1_OUTMODE2_Msk (0x1ul << EPWM_CTL1_OUTMODE2_Pos)
4935 #define EPWM_CTL1_OUTMODE4_Pos (26)
4936 #define EPWM_CTL1_OUTMODE4_Msk (0x1ul << EPWM_CTL1_OUTMODE4_Pos)
4938 #define EPWM_SYNC_PHSEN0_Pos (0)
4939 #define EPWM_SYNC_PHSEN0_Msk (0x1ul << EPWM_SYNC_PHSEN0_Pos)
4941 #define EPWM_SYNC_PHSEN2_Pos (1)
4942 #define EPWM_SYNC_PHSEN2_Msk (0x1ul << EPWM_SYNC_PHSEN2_Pos)
4944 #define EPWM_SYNC_PHSEN4_Pos (2)
4945 #define EPWM_SYNC_PHSEN4_Msk (0x1ul << EPWM_SYNC_PHSEN4_Pos)
4947 #define EPWM_SYNC_SINSRC0_Pos (8)
4948 #define EPWM_SYNC_SINSRC0_Msk (0x3ul << EPWM_SYNC_SINSRC0_Pos)
4950 #define EPWM_SYNC_SINSRC2_Pos (10)
4951 #define EPWM_SYNC_SINSRC2_Msk (0x3ul << EPWM_SYNC_SINSRC2_Pos)
4953 #define EPWM_SYNC_SINSRC4_Pos (12)
4954 #define EPWM_SYNC_SINSRC4_Msk (0x3ul << EPWM_SYNC_SINSRC4_Pos)
4956 #define EPWM_SYNC_SNFLTEN_Pos (16)
4957 #define EPWM_SYNC_SNFLTEN_Msk (0x1ul << EPWM_SYNC_SNFLTEN_Pos)
4959 #define EPWM_SYNC_SFLTCSEL_Pos (17)
4960 #define EPWM_SYNC_SFLTCSEL_Msk (0x7ul << EPWM_SYNC_SFLTCSEL_Pos)
4962 #define EPWM_SYNC_SFLTCNT_Pos (20)
4963 #define EPWM_SYNC_SFLTCNT_Msk (0x7ul << EPWM_SYNC_SFLTCNT_Pos)
4965 #define EPWM_SYNC_SINPINV_Pos (23)
4966 #define EPWM_SYNC_SINPINV_Msk (0x1ul << EPWM_SYNC_SINPINV_Pos)
4968 #define EPWM_SYNC_PHSDIR0_Pos (24)
4969 #define EPWM_SYNC_PHSDIR0_Msk (0x1ul << EPWM_SYNC_PHSDIR0_Pos)
4971 #define EPWM_SYNC_PHSDIR2_Pos (25)
4972 #define EPWM_SYNC_PHSDIR2_Msk (0x1ul << EPWM_SYNC_PHSDIR2_Pos)
4974 #define EPWM_SYNC_PHSDIR4_Pos (26)
4975 #define EPWM_SYNC_PHSDIR4_Msk (0x1ul << EPWM_SYNC_PHSDIR4_Pos)
4977 #define EPWM_SWSYNC_SWSYNC0_Pos (0)
4978 #define EPWM_SWSYNC_SWSYNC0_Msk (0x1ul << EPWM_SWSYNC_SWSYNC0_Pos)
4980 #define EPWM_SWSYNC_SWSYNC2_Pos (1)
4981 #define EPWM_SWSYNC_SWSYNC2_Msk (0x1ul << EPWM_SWSYNC_SWSYNC2_Pos)
4983 #define EPWM_SWSYNC_SWSYNC4_Pos (2)
4984 #define EPWM_SWSYNC_SWSYNC4_Msk (0x1ul << EPWM_SWSYNC_SWSYNC4_Pos)
4986 #define EPWM_CLKSRC_ECLKSRC0_Pos (0)
4987 #define EPWM_CLKSRC_ECLKSRC0_Msk (0x7ul << EPWM_CLKSRC_ECLKSRC0_Pos)
4989 #define EPWM_CLKSRC_ECLKSRC2_Pos (8)
4990 #define EPWM_CLKSRC_ECLKSRC2_Msk (0x7ul << EPWM_CLKSRC_ECLKSRC2_Pos)
4992 #define EPWM_CLKSRC_ECLKSRC4_Pos (16)
4993 #define EPWM_CLKSRC_ECLKSRC4_Msk (0x7ul << EPWM_CLKSRC_ECLKSRC4_Pos)
4995 #define EPWM_CLKPSC0_1_CLKPSC_Pos (0)
4996 #define EPWM_CLKPSC0_1_CLKPSC_Msk (0xffful << EPWM_CLKPSC0_1_CLKPSC_Pos)
4998 #define EPWM_CLKPSC2_3_CLKPSC_Pos (0)
4999 #define EPWM_CLKPSC2_3_CLKPSC_Msk (0xffful << EPWM_CLKPSC2_3_CLKPSC_Pos)
5001 #define EPWM_CLKPSC4_5_CLKPSC_Pos (0)
5002 #define EPWM_CLKPSC4_5_CLKPSC_Msk (0xffful << EPWM_CLKPSC4_5_CLKPSC_Pos)
5004 #define EPWM_CNTEN_CNTEN0_Pos (0)
5005 #define EPWM_CNTEN_CNTEN0_Msk (0x1ul << EPWM_CNTEN_CNTEN0_Pos)
5007 #define EPWM_CNTEN_CNTEN1_Pos (1)
5008 #define EPWM_CNTEN_CNTEN1_Msk (0x1ul << EPWM_CNTEN_CNTEN1_Pos)
5010 #define EPWM_CNTEN_CNTEN2_Pos (2)
5011 #define EPWM_CNTEN_CNTEN2_Msk (0x1ul << EPWM_CNTEN_CNTEN2_Pos)
5013 #define EPWM_CNTEN_CNTEN3_Pos (3)
5014 #define EPWM_CNTEN_CNTEN3_Msk (0x1ul << EPWM_CNTEN_CNTEN3_Pos)
5016 #define EPWM_CNTEN_CNTEN4_Pos (4)
5017 #define EPWM_CNTEN_CNTEN4_Msk (0x1ul << EPWM_CNTEN_CNTEN4_Pos)
5019 #define EPWM_CNTEN_CNTEN5_Pos (5)
5020 #define EPWM_CNTEN_CNTEN5_Msk (0x1ul << EPWM_CNTEN_CNTEN5_Pos)
5022 #define EPWM_CNTCLR_CNTCLR0_Pos (0)
5023 #define EPWM_CNTCLR_CNTCLR0_Msk (0x1ul << EPWM_CNTCLR_CNTCLR0_Pos)
5025 #define EPWM_CNTCLR_CNTCLR1_Pos (1)
5026 #define EPWM_CNTCLR_CNTCLR1_Msk (0x1ul << EPWM_CNTCLR_CNTCLR1_Pos)
5028 #define EPWM_CNTCLR_CNTCLR2_Pos (2)
5029 #define EPWM_CNTCLR_CNTCLR2_Msk (0x1ul << EPWM_CNTCLR_CNTCLR2_Pos)
5031 #define EPWM_CNTCLR_CNTCLR3_Pos (3)
5032 #define EPWM_CNTCLR_CNTCLR3_Msk (0x1ul << EPWM_CNTCLR_CNTCLR3_Pos)
5034 #define EPWM_CNTCLR_CNTCLR4_Pos (4)
5035 #define EPWM_CNTCLR_CNTCLR4_Msk (0x1ul << EPWM_CNTCLR_CNTCLR4_Pos)
5037 #define EPWM_CNTCLR_CNTCLR5_Pos (5)
5038 #define EPWM_CNTCLR_CNTCLR5_Msk (0x1ul << EPWM_CNTCLR_CNTCLR5_Pos)
5040 #define EPWM_LOAD_LOAD0_Pos (0)
5041 #define EPWM_LOAD_LOAD0_Msk (0x1ul << EPWM_LOAD_LOAD0_Pos)
5043 #define EPWM_LOAD_LOAD1_Pos (1)
5044 #define EPWM_LOAD_LOAD1_Msk (0x1ul << EPWM_LOAD_LOAD1_Pos)
5046 #define EPWM_LOAD_LOAD2_Pos (2)
5047 #define EPWM_LOAD_LOAD2_Msk (0x1ul << EPWM_LOAD_LOAD2_Pos)
5049 #define EPWM_LOAD_LOAD3_Pos (3)
5050 #define EPWM_LOAD_LOAD3_Msk (0x1ul << EPWM_LOAD_LOAD3_Pos)
5052 #define EPWM_LOAD_LOAD4_Pos (4)
5053 #define EPWM_LOAD_LOAD4_Msk (0x1ul << EPWM_LOAD_LOAD4_Pos)
5055 #define EPWM_LOAD_LOAD5_Pos (5)
5056 #define EPWM_LOAD_LOAD5_Msk (0x1ul << EPWM_LOAD_LOAD5_Pos)
5058 #define EPWM_PERIOD0_PERIOD_Pos (0)
5059 #define EPWM_PERIOD0_PERIOD_Msk (0xfffful << EPWM_PERIOD0_PERIOD_Pos)
5061 #define EPWM_PERIOD1_PERIOD_Pos (0)
5062 #define EPWM_PERIOD1_PERIOD_Msk (0xfffful << EPWM_PERIOD1_PERIOD_Pos)
5064 #define EPWM_PERIOD2_PERIOD_Pos (0)
5065 #define EPWM_PERIOD2_PERIOD_Msk (0xfffful << EPWM_PERIOD2_PERIOD_Pos)
5067 #define EPWM_PERIOD3_PERIOD_Pos (0)
5068 #define EPWM_PERIOD3_PERIOD_Msk (0xfffful << EPWM_PERIOD3_PERIOD_Pos)
5070 #define EPWM_PERIOD4_PERIOD_Pos (0)
5071 #define EPWM_PERIOD4_PERIOD_Msk (0xfffful << EPWM_PERIOD4_PERIOD_Pos)
5073 #define EPWM_PERIOD5_PERIOD_Pos (0)
5074 #define EPWM_PERIOD5_PERIOD_Msk (0xfffful << EPWM_PERIOD5_PERIOD_Pos)
5076 #define EPWM_CMPDAT0_CMP_Pos (0)
5077 #define EPWM_CMPDAT0_CMP_Msk (0xfffful << EPWM_CMPDAT0_CMP_Pos)
5079 #define EPWM_CMPDAT1_CMP_Pos (0)
5080 #define EPWM_CMPDAT1_CMP_Msk (0xfffful << EPWM_CMPDAT1_CMP_Pos)
5082 #define EPWM_CMPDAT2_CMP_Pos (0)
5083 #define EPWM_CMPDAT2_CMP_Msk (0xfffful << EPWM_CMPDAT2_CMP_Pos)
5085 #define EPWM_CMPDAT3_CMP_Pos (0)
5086 #define EPWM_CMPDAT3_CMP_Msk (0xfffful << EPWM_CMPDAT3_CMP_Pos)
5088 #define EPWM_CMPDAT4_CMP_Pos (0)
5089 #define EPWM_CMPDAT4_CMP_Msk (0xfffful << EPWM_CMPDAT4_CMP_Pos)
5091 #define EPWM_CMPDAT5_CMP_Pos (0)
5092 #define EPWM_CMPDAT5_CMP_Msk (0xfffful << EPWM_CMPDAT5_CMP_Pos)
5094 #define EPWM_DTCTL0_1_DTCNT_Pos (0)
5095 #define EPWM_DTCTL0_1_DTCNT_Msk (0xffful << EPWM_DTCTL0_1_DTCNT_Pos)
5097 #define EPWM_DTCTL0_1_DTEN_Pos (16)
5098 #define EPWM_DTCTL0_1_DTEN_Msk (0x1ul << EPWM_DTCTL0_1_DTEN_Pos)
5100 #define EPWM_DTCTL0_1_DTCKSEL_Pos (24)
5101 #define EPWM_DTCTL0_1_DTCKSEL_Msk (0x1ul << EPWM_DTCTL0_1_DTCKSEL_Pos)
5103 #define EPWM_DTCTL2_3_DTCNT_Pos (0)
5104 #define EPWM_DTCTL2_3_DTCNT_Msk (0xffful << EPWM_DTCTL2_3_DTCNT_Pos)
5106 #define EPWM_DTCTL2_3_DTEN_Pos (16)
5107 #define EPWM_DTCTL2_3_DTEN_Msk (0x1ul << EPWM_DTCTL2_3_DTEN_Pos)
5109 #define EPWM_DTCTL2_3_DTCKSEL_Pos (24)
5110 #define EPWM_DTCTL2_3_DTCKSEL_Msk (0x1ul << EPWM_DTCTL2_3_DTCKSEL_Pos)
5112 #define EPWM_DTCTL4_5_DTCNT_Pos (0)
5113 #define EPWM_DTCTL4_5_DTCNT_Msk (0xffful << EPWM_DTCTL4_5_DTCNT_Pos)
5115 #define EPWM_DTCTL4_5_DTEN_Pos (16)
5116 #define EPWM_DTCTL4_5_DTEN_Msk (0x1ul << EPWM_DTCTL4_5_DTEN_Pos)
5118 #define EPWM_DTCTL4_5_DTCKSEL_Pos (24)
5119 #define EPWM_DTCTL4_5_DTCKSEL_Msk (0x1ul << EPWM_DTCTL4_5_DTCKSEL_Pos)
5121 #define EPWM_PHS0_1_PHS_Pos (0)
5122 #define EPWM_PHS0_1_PHS_Msk (0xfffful << EPWM_PHS0_1_PHS_Pos)
5124 #define EPWM_PHS2_3_PHS_Pos (0)
5125 #define EPWM_PHS2_3_PHS_Msk (0xfffful << EPWM_PHS2_3_PHS_Pos)
5127 #define EPWM_PHS4_5_PHS_Pos (0)
5128 #define EPWM_PHS4_5_PHS_Msk (0xfffful << EPWM_PHS4_5_PHS_Pos)
5130 #define EPWM_CNT0_CNT_Pos (0)
5131 #define EPWM_CNT0_CNT_Msk (0xfffful << EPWM_CNT0_CNT_Pos)
5133 #define EPWM_CNT0_DIRF_Pos (16)
5134 #define EPWM_CNT0_DIRF_Msk (0x1ul << EPWM_CNT0_DIRF_Pos)
5136 #define EPWM_CNT1_CNT_Pos (0)
5137 #define EPWM_CNT1_CNT_Msk (0xfffful << EPWM_CNT1_CNT_Pos)
5139 #define EPWM_CNT1_DIRF_Pos (16)
5140 #define EPWM_CNT1_DIRF_Msk (0x1ul << EPWM_CNT1_DIRF_Pos)
5142 #define EPWM_CNT2_CNT_Pos (0)
5143 #define EPWM_CNT2_CNT_Msk (0xfffful << EPWM_CNT2_CNT_Pos)
5145 #define EPWM_CNT2_DIRF_Pos (16)
5146 #define EPWM_CNT2_DIRF_Msk (0x1ul << EPWM_CNT2_DIRF_Pos)
5148 #define EPWM_CNT3_CNT_Pos (0)
5149 #define EPWM_CNT3_CNT_Msk (0xfffful << EPWM_CNT3_CNT_Pos)
5151 #define EPWM_CNT3_DIRF_Pos (16)
5152 #define EPWM_CNT3_DIRF_Msk (0x1ul << EPWM_CNT3_DIRF_Pos)
5154 #define EPWM_CNT4_CNT_Pos (0)
5155 #define EPWM_CNT4_CNT_Msk (0xfffful << EPWM_CNT4_CNT_Pos)
5157 #define EPWM_CNT4_DIRF_Pos (16)
5158 #define EPWM_CNT4_DIRF_Msk (0x1ul << EPWM_CNT4_DIRF_Pos)
5160 #define EPWM_CNT5_CNT_Pos (0)
5161 #define EPWM_CNT5_CNT_Msk (0xfffful << EPWM_CNT5_CNT_Pos)
5163 #define EPWM_CNT5_DIRF_Pos (16)
5164 #define EPWM_CNT5_DIRF_Msk (0x1ul << EPWM_CNT5_DIRF_Pos)
5166 #define EPWM_WGCTL0_ZPCTL0_Pos (0)
5167 #define EPWM_WGCTL0_ZPCTL0_Msk (0x3ul << EPWM_WGCTL0_ZPCTL0_Pos)
5169 #define EPWM_WGCTL0_ZPCTL1_Pos (2)
5170 #define EPWM_WGCTL0_ZPCTL1_Msk (0x3ul << EPWM_WGCTL0_ZPCTL1_Pos)
5172 #define EPWM_WGCTL0_ZPCTL2_Pos (4)
5173 #define EPWM_WGCTL0_ZPCTL2_Msk (0x3ul << EPWM_WGCTL0_ZPCTL2_Pos)
5175 #define EPWM_WGCTL0_ZPCTL3_Pos (6)
5176 #define EPWM_WGCTL0_ZPCTL3_Msk (0x3ul << EPWM_WGCTL0_ZPCTL3_Pos)
5178 #define EPWM_WGCTL0_ZPCTL4_Pos (8)
5179 #define EPWM_WGCTL0_ZPCTL4_Msk (0x3ul << EPWM_WGCTL0_ZPCTL4_Pos)
5181 #define EPWM_WGCTL0_ZPCTL5_Pos (10)
5182 #define EPWM_WGCTL0_ZPCTL5_Msk (0x3ul << EPWM_WGCTL0_ZPCTL5_Pos)
5184 #define EPWM_WGCTL0_PRDPCTL0_Pos (16)
5185 #define EPWM_WGCTL0_PRDPCTL0_Msk (0x3ul << EPWM_WGCTL0_PRDPCTL0_Pos)
5187 #define EPWM_WGCTL0_PRDPCTL1_Pos (18)
5188 #define EPWM_WGCTL0_PRDPCTL1_Msk (0x3ul << EPWM_WGCTL0_PRDPCTL1_Pos)
5190 #define EPWM_WGCTL0_PRDPCTL2_Pos (20)
5191 #define EPWM_WGCTL0_PRDPCTL2_Msk (0x3ul << EPWM_WGCTL0_PRDPCTL2_Pos)
5193 #define EPWM_WGCTL0_PRDPCTL3_Pos (22)
5194 #define EPWM_WGCTL0_PRDPCTL3_Msk (0x3ul << EPWM_WGCTL0_PRDPCTL3_Pos)
5196 #define EPWM_WGCTL0_PRDPCTL4_Pos (24)
5197 #define EPWM_WGCTL0_PRDPCTL4_Msk (0x3ul << EPWM_WGCTL0_PRDPCTL4_Pos)
5199 #define EPWM_WGCTL0_PRDPCTL5_Pos (26)
5200 #define EPWM_WGCTL0_PRDPCTL5_Msk (0x3ul << EPWM_WGCTL0_PRDPCTL5_Pos)
5202 #define EPWM_WGCTL1_CMPUCTL0_Pos (0)
5203 #define EPWM_WGCTL1_CMPUCTL0_Msk (0x3ul << EPWM_WGCTL1_CMPUCTL0_Pos)
5205 #define EPWM_WGCTL1_CMPUCTL1_Pos (2)
5206 #define EPWM_WGCTL1_CMPUCTL1_Msk (0x3ul << EPWM_WGCTL1_CMPUCTL1_Pos)
5208 #define EPWM_WGCTL1_CMPUCTL2_Pos (4)
5209 #define EPWM_WGCTL1_CMPUCTL2_Msk (0x3ul << EPWM_WGCTL1_CMPUCTL2_Pos)
5211 #define EPWM_WGCTL1_CMPUCTL3_Pos (6)
5212 #define EPWM_WGCTL1_CMPUCTL3_Msk (0x3ul << EPWM_WGCTL1_CMPUCTL3_Pos)
5214 #define EPWM_WGCTL1_CMPUCTL4_Pos (8)
5215 #define EPWM_WGCTL1_CMPUCTL4_Msk (0x3ul << EPWM_WGCTL1_CMPUCTL4_Pos)
5217 #define EPWM_WGCTL1_CMPUCTL5_Pos (10)
5218 #define EPWM_WGCTL1_CMPUCTL5_Msk (0x3ul << EPWM_WGCTL1_CMPUCTL5_Pos)
5220 #define EPWM_WGCTL1_CMPDCTL0_Pos (16)
5221 #define EPWM_WGCTL1_CMPDCTL0_Msk (0x3ul << EPWM_WGCTL1_CMPDCTL0_Pos)
5223 #define EPWM_WGCTL1_CMPDCTL1_Pos (18)
5224 #define EPWM_WGCTL1_CMPDCTL1_Msk (0x3ul << EPWM_WGCTL1_CMPDCTL1_Pos)
5226 #define EPWM_WGCTL1_CMPDCTL2_Pos (20)
5227 #define EPWM_WGCTL1_CMPDCTL2_Msk (0x3ul << EPWM_WGCTL1_CMPDCTL2_Pos)
5229 #define EPWM_WGCTL1_CMPDCTL3_Pos (22)
5230 #define EPWM_WGCTL1_CMPDCTL3_Msk (0x3ul << EPWM_WGCTL1_CMPDCTL3_Pos)
5232 #define EPWM_WGCTL1_CMPDCTL4_Pos (24)
5233 #define EPWM_WGCTL1_CMPDCTL4_Msk (0x3ul << EPWM_WGCTL1_CMPDCTL4_Pos)
5235 #define EPWM_WGCTL1_CMPDCTL5_Pos (26)
5236 #define EPWM_WGCTL1_CMPDCTL5_Msk (0x3ul << EPWM_WGCTL1_CMPDCTL5_Pos)
5238 #define EPWM_MSKEN_MSKEN0_Pos (0)
5239 #define EPWM_MSKEN_MSKEN0_Msk (0x1ul << EPWM_MSKEN_MSKEN0_Pos)
5241 #define EPWM_MSKEN_MSKEN1_Pos (1)
5242 #define EPWM_MSKEN_MSKEN1_Msk (0x1ul << EPWM_MSKEN_MSKEN1_Pos)
5244 #define EPWM_MSKEN_MSKEN2_Pos (2)
5245 #define EPWM_MSKEN_MSKEN2_Msk (0x1ul << EPWM_MSKEN_MSKEN2_Pos)
5247 #define EPWM_MSKEN_MSKEN3_Pos (3)
5248 #define EPWM_MSKEN_MSKEN3_Msk (0x1ul << EPWM_MSKEN_MSKEN3_Pos)
5250 #define EPWM_MSKEN_MSKEN4_Pos (4)
5251 #define EPWM_MSKEN_MSKEN4_Msk (0x1ul << EPWM_MSKEN_MSKEN4_Pos)
5253 #define EPWM_MSKEN_MSKEN5_Pos (5)
5254 #define EPWM_MSKEN_MSKEN5_Msk (0x1ul << EPWM_MSKEN_MSKEN5_Pos)
5256 #define EPWM_MSK_MSKDAT0_Pos (0)
5257 #define EPWM_MSK_MSKDAT0_Msk (0x1ul << EPWM_MSK_MSKDAT0_Pos)
5259 #define EPWM_MSK_MSKDAT1_Pos (1)
5260 #define EPWM_MSK_MSKDAT1_Msk (0x1ul << EPWM_MSK_MSKDAT1_Pos)
5262 #define EPWM_MSK_MSKDAT2_Pos (2)
5263 #define EPWM_MSK_MSKDAT2_Msk (0x1ul << EPWM_MSK_MSKDAT2_Pos)
5265 #define EPWM_MSK_MSKDAT3_Pos (3)
5266 #define EPWM_MSK_MSKDAT3_Msk (0x1ul << EPWM_MSK_MSKDAT3_Pos)
5268 #define EPWM_MSK_MSKDAT4_Pos (4)
5269 #define EPWM_MSK_MSKDAT4_Msk (0x1ul << EPWM_MSK_MSKDAT4_Pos)
5271 #define EPWM_MSK_MSKDAT5_Pos (5)
5272 #define EPWM_MSK_MSKDAT5_Msk (0x1ul << EPWM_MSK_MSKDAT5_Pos)
5274 #define EPWM_BNF_BRK0NFEN_Pos (0)
5275 #define EPWM_BNF_BRK0NFEN_Msk (0x1ul << EPWM_BNF_BRK0NFEN_Pos)
5277 #define EPWM_BNF_BRK0NFSEL_Pos (1)
5278 #define EPWM_BNF_BRK0NFSEL_Msk (0x7ul << EPWM_BNF_BRK0NFSEL_Pos)
5280 #define EPWM_BNF_BRK0FCNT_Pos (4)
5281 #define EPWM_BNF_BRK0FCNT_Msk (0x7ul << EPWM_BNF_BRK0FCNT_Pos)
5283 #define EPWM_BNF_BRK0PINV_Pos (7)
5284 #define EPWM_BNF_BRK0PINV_Msk (0x1ul << EPWM_BNF_BRK0PINV_Pos)
5286 #define EPWM_BNF_BRK1NFEN_Pos (8)
5287 #define EPWM_BNF_BRK1NFEN_Msk (0x1ul << EPWM_BNF_BRK1NFEN_Pos)
5289 #define EPWM_BNF_BRK1NFSEL_Pos (9)
5290 #define EPWM_BNF_BRK1NFSEL_Msk (0x7ul << EPWM_BNF_BRK1NFSEL_Pos)
5292 #define EPWM_BNF_BRK1FCNT_Pos (12)
5293 #define EPWM_BNF_BRK1FCNT_Msk (0x7ul << EPWM_BNF_BRK1FCNT_Pos)
5295 #define EPWM_BNF_BRK1PINV_Pos (15)
5296 #define EPWM_BNF_BRK1PINV_Msk (0x1ul << EPWM_BNF_BRK1PINV_Pos)
5298 #define EPWM_BNF_BK0SRC_Pos (16)
5299 #define EPWM_BNF_BK0SRC_Msk (0x1ul << EPWM_BNF_BK0SRC_Pos)
5301 #define EPWM_BNF_BK1SRC_Pos (24)
5302 #define EPWM_BNF_BK1SRC_Msk (0x1ul << EPWM_BNF_BK1SRC_Pos)
5304 #define EPWM_FAILBRK_CSSBRKEN_Pos (0)
5305 #define EPWM_FAILBRK_CSSBRKEN_Msk (0x1ul << EPWM_FAILBRK_CSSBRKEN_Pos)
5307 #define EPWM_FAILBRK_BODBRKEN_Pos (1)
5308 #define EPWM_FAILBRK_BODBRKEN_Msk (0x1ul << EPWM_FAILBRK_BODBRKEN_Pos)
5310 #define EPWM_FAILBRK_RAMBRKEN_Pos (2)
5311 #define EPWM_FAILBRK_RAMBRKEN_Msk (0x1ul << EPWM_FAILBRK_RAMBRKEN_Pos)
5313 #define EPWM_FAILBRK_CORBRKEN_Pos (3)
5314 #define EPWM_FAILBRK_CORBRKEN_Msk (0x1ul << EPWM_FAILBRK_CORBRKEN_Pos)
5316 #define EPWM_BRKCTL0_1_CPO0EBEN_Pos (0)
5317 #define EPWM_BRKCTL0_1_CPO0EBEN_Msk (0x1ul << EPWM_BRKCTL0_1_CPO0EBEN_Pos)
5319 #define EPWM_BRKCTL0_1_CPO1EBEN_Pos (1)
5320 #define EPWM_BRKCTL0_1_CPO1EBEN_Msk (0x1ul << EPWM_BRKCTL0_1_CPO1EBEN_Pos)
5322 #define EPWM_BRKCTL0_1_BRKP0EEN_Pos (4)
5323 #define EPWM_BRKCTL0_1_BRKP0EEN_Msk (0x1ul << EPWM_BRKCTL0_1_BRKP0EEN_Pos)
5325 #define EPWM_BRKCTL0_1_BRKP1EEN_Pos (5)
5326 #define EPWM_BRKCTL0_1_BRKP1EEN_Msk (0x1ul << EPWM_BRKCTL0_1_BRKP1EEN_Pos)
5328 #define EPWM_BRKCTL0_1_SYSEBEN_Pos (7)
5329 #define EPWM_BRKCTL0_1_SYSEBEN_Msk (0x1ul << EPWM_BRKCTL0_1_SYSEBEN_Pos)
5331 #define EPWM_BRKCTL0_1_CPO0LBEN_Pos (8)
5332 #define EPWM_BRKCTL0_1_CPO0LBEN_Msk (0x1ul << EPWM_BRKCTL0_1_CPO0LBEN_Pos)
5334 #define EPWM_BRKCTL0_1_CPO1LBEN_Pos (9)
5335 #define EPWM_BRKCTL0_1_CPO1LBEN_Msk (0x1ul << EPWM_BRKCTL0_1_CPO1LBEN_Pos)
5337 #define EPWM_BRKCTL0_1_BRKP0LEN_Pos (12)
5338 #define EPWM_BRKCTL0_1_BRKP0LEN_Msk (0x1ul << EPWM_BRKCTL0_1_BRKP0LEN_Pos)
5340 #define EPWM_BRKCTL0_1_BRKP1LEN_Pos (13)
5341 #define EPWM_BRKCTL0_1_BRKP1LEN_Msk (0x1ul << EPWM_BRKCTL0_1_BRKP1LEN_Pos)
5343 #define EPWM_BRKCTL0_1_SYSLBEN_Pos (15)
5344 #define EPWM_BRKCTL0_1_SYSLBEN_Msk (0x1ul << EPWM_BRKCTL0_1_SYSLBEN_Pos)
5346 #define EPWM_BRKCTL0_1_BRKAEVEN_Pos (16)
5347 #define EPWM_BRKCTL0_1_BRKAEVEN_Msk (0x3ul << EPWM_BRKCTL0_1_BRKAEVEN_Pos)
5349 #define EPWM_BRKCTL0_1_BRKAODD_Pos (18)
5350 #define EPWM_BRKCTL0_1_BRKAODD_Msk (0x3ul << EPWM_BRKCTL0_1_BRKAODD_Pos)
5352 #define EPWM_BRKCTL0_1_EADCEBEN_Pos (20)
5353 #define EPWM_BRKCTL0_1_EADCEBEN_Msk (0x1ul << EPWM_BRKCTL0_1_EADCEBEN_Pos)
5355 #define EPWM_BRKCTL0_1_EADCLBEN_Pos (28)
5356 #define EPWM_BRKCTL0_1_EADCLBEN_Msk (0x1ul << EPWM_BRKCTL0_1_EADCLBEN_Pos)
5358 #define EPWM_BRKCTL2_3_CPO0EBEN_Pos (0)
5359 #define EPWM_BRKCTL2_3_CPO0EBEN_Msk (0x1ul << EPWM_BRKCTL2_3_CPO0EBEN_Pos)
5361 #define EPWM_BRKCTL2_3_CPO1EBEN_Pos (1)
5362 #define EPWM_BRKCTL2_3_CPO1EBEN_Msk (0x1ul << EPWM_BRKCTL2_3_CPO1EBEN_Pos)
5364 #define EPWM_BRKCTL2_3_BRKP0EEN_Pos (4)
5365 #define EPWM_BRKCTL2_3_BRKP0EEN_Msk (0x1ul << EPWM_BRKCTL2_3_BRKP0EEN_Pos)
5367 #define EPWM_BRKCTL2_3_BRKP1EEN_Pos (5)
5368 #define EPWM_BRKCTL2_3_BRKP1EEN_Msk (0x1ul << EPWM_BRKCTL2_3_BRKP1EEN_Pos)
5370 #define EPWM_BRKCTL2_3_SYSEBEN_Pos (7)
5371 #define EPWM_BRKCTL2_3_SYSEBEN_Msk (0x1ul << EPWM_BRKCTL2_3_SYSEBEN_Pos)
5373 #define EPWM_BRKCTL2_3_CPO0LBEN_Pos (8)
5374 #define EPWM_BRKCTL2_3_CPO0LBEN_Msk (0x1ul << EPWM_BRKCTL2_3_CPO0LBEN_Pos)
5376 #define EPWM_BRKCTL2_3_CPO1LBEN_Pos (9)
5377 #define EPWM_BRKCTL2_3_CPO1LBEN_Msk (0x1ul << EPWM_BRKCTL2_3_CPO1LBEN_Pos)
5379 #define EPWM_BRKCTL2_3_BRKP0LEN_Pos (12)
5380 #define EPWM_BRKCTL2_3_BRKP0LEN_Msk (0x1ul << EPWM_BRKCTL2_3_BRKP0LEN_Pos)
5382 #define EPWM_BRKCTL2_3_BRKP1LEN_Pos (13)
5383 #define EPWM_BRKCTL2_3_BRKP1LEN_Msk (0x1ul << EPWM_BRKCTL2_3_BRKP1LEN_Pos)
5385 #define EPWM_BRKCTL2_3_SYSLBEN_Pos (15)
5386 #define EPWM_BRKCTL2_3_SYSLBEN_Msk (0x1ul << EPWM_BRKCTL2_3_SYSLBEN_Pos)
5388 #define EPWM_BRKCTL2_3_BRKAEVEN_Pos (16)
5389 #define EPWM_BRKCTL2_3_BRKAEVEN_Msk (0x3ul << EPWM_BRKCTL2_3_BRKAEVEN_Pos)
5391 #define EPWM_BRKCTL2_3_BRKAODD_Pos (18)
5392 #define EPWM_BRKCTL2_3_BRKAODD_Msk (0x3ul << EPWM_BRKCTL2_3_BRKAODD_Pos)
5394 #define EPWM_BRKCTL2_3_EADCEBEN_Pos (20)
5395 #define EPWM_BRKCTL2_3_EADCEBEN_Msk (0x1ul << EPWM_BRKCTL2_3_EADCEBEN_Pos)
5397 #define EPWM_BRKCTL2_3_EADCLBEN_Pos (28)
5398 #define EPWM_BRKCTL2_3_EADCLBEN_Msk (0x1ul << EPWM_BRKCTL2_3_EADCLBEN_Pos)
5400 #define EPWM_BRKCTL4_5_CPO0EBEN_Pos (0)
5401 #define EPWM_BRKCTL4_5_CPO0EBEN_Msk (0x1ul << EPWM_BRKCTL4_5_CPO0EBEN_Pos)
5403 #define EPWM_BRKCTL4_5_CPO1EBEN_Pos (1)
5404 #define EPWM_BRKCTL4_5_CPO1EBEN_Msk (0x1ul << EPWM_BRKCTL4_5_CPO1EBEN_Pos)
5406 #define EPWM_BRKCTL4_5_BRKP0EEN_Pos (4)
5407 #define EPWM_BRKCTL4_5_BRKP0EEN_Msk (0x1ul << EPWM_BRKCTL4_5_BRKP0EEN_Pos)
5409 #define EPWM_BRKCTL4_5_BRKP1EEN_Pos (5)
5410 #define EPWM_BRKCTL4_5_BRKP1EEN_Msk (0x1ul << EPWM_BRKCTL4_5_BRKP1EEN_Pos)
5412 #define EPWM_BRKCTL4_5_SYSEBEN_Pos (7)
5413 #define EPWM_BRKCTL4_5_SYSEBEN_Msk (0x1ul << EPWM_BRKCTL4_5_SYSEBEN_Pos)
5415 #define EPWM_BRKCTL4_5_CPO0LBEN_Pos (8)
5416 #define EPWM_BRKCTL4_5_CPO0LBEN_Msk (0x1ul << EPWM_BRKCTL4_5_CPO0LBEN_Pos)
5418 #define EPWM_BRKCTL4_5_CPO1LBEN_Pos (9)
5419 #define EPWM_BRKCTL4_5_CPO1LBEN_Msk (0x1ul << EPWM_BRKCTL4_5_CPO1LBEN_Pos)
5421 #define EPWM_BRKCTL4_5_BRKP0LEN_Pos (12)
5422 #define EPWM_BRKCTL4_5_BRKP0LEN_Msk (0x1ul << EPWM_BRKCTL4_5_BRKP0LEN_Pos)
5424 #define EPWM_BRKCTL4_5_BRKP1LEN_Pos (13)
5425 #define EPWM_BRKCTL4_5_BRKP1LEN_Msk (0x1ul << EPWM_BRKCTL4_5_BRKP1LEN_Pos)
5427 #define EPWM_BRKCTL4_5_SYSLBEN_Pos (15)
5428 #define EPWM_BRKCTL4_5_SYSLBEN_Msk (0x1ul << EPWM_BRKCTL4_5_SYSLBEN_Pos)
5430 #define EPWM_BRKCTL4_5_BRKAEVEN_Pos (16)
5431 #define EPWM_BRKCTL4_5_BRKAEVEN_Msk (0x3ul << EPWM_BRKCTL4_5_BRKAEVEN_Pos)
5433 #define EPWM_BRKCTL4_5_BRKAODD_Pos (18)
5434 #define EPWM_BRKCTL4_5_BRKAODD_Msk (0x3ul << EPWM_BRKCTL4_5_BRKAODD_Pos)
5436 #define EPWM_BRKCTL4_5_EADCEBEN_Pos (20)
5437 #define EPWM_BRKCTL4_5_EADCEBEN_Msk (0x1ul << EPWM_BRKCTL4_5_EADCEBEN_Pos)
5439 #define EPWM_BRKCTL4_5_EADCLBEN_Pos (28)
5440 #define EPWM_BRKCTL4_5_EADCLBEN_Msk (0x1ul << EPWM_BRKCTL4_5_EADCLBEN_Pos)
5442 #define EPWM_POLCTL_PINV0_Pos (0)
5443 #define EPWM_POLCTL_PINV0_Msk (0x1ul << EPWM_POLCTL_PINV0_Pos)
5445 #define EPWM_POLCTL_PINV1_Pos (1)
5446 #define EPWM_POLCTL_PINV1_Msk (0x1ul << EPWM_POLCTL_PINV1_Pos)
5448 #define EPWM_POLCTL_PINV2_Pos (2)
5449 #define EPWM_POLCTL_PINV2_Msk (0x1ul << EPWM_POLCTL_PINV2_Pos)
5451 #define EPWM_POLCTL_PINV3_Pos (3)
5452 #define EPWM_POLCTL_PINV3_Msk (0x1ul << EPWM_POLCTL_PINV3_Pos)
5454 #define EPWM_POLCTL_PINV4_Pos (4)
5455 #define EPWM_POLCTL_PINV4_Msk (0x1ul << EPWM_POLCTL_PINV4_Pos)
5457 #define EPWM_POLCTL_PINV5_Pos (5)
5458 #define EPWM_POLCTL_PINV5_Msk (0x1ul << EPWM_POLCTL_PINV5_Pos)
5460 #define EPWM_POEN_POEN0_Pos (0)
5461 #define EPWM_POEN_POEN0_Msk (0x1ul << EPWM_POEN_POEN0_Pos)
5463 #define EPWM_POEN_POEN1_Pos (1)
5464 #define EPWM_POEN_POEN1_Msk (0x1ul << EPWM_POEN_POEN1_Pos)
5466 #define EPWM_POEN_POEN2_Pos (2)
5467 #define EPWM_POEN_POEN2_Msk (0x1ul << EPWM_POEN_POEN2_Pos)
5469 #define EPWM_POEN_POEN3_Pos (3)
5470 #define EPWM_POEN_POEN3_Msk (0x1ul << EPWM_POEN_POEN3_Pos)
5472 #define EPWM_POEN_POEN4_Pos (4)
5473 #define EPWM_POEN_POEN4_Msk (0x1ul << EPWM_POEN_POEN4_Pos)
5475 #define EPWM_POEN_POEN5_Pos (5)
5476 #define EPWM_POEN_POEN5_Msk (0x1ul << EPWM_POEN_POEN5_Pos)
5478 #define EPWM_SWBRK_BRKETRG0_Pos (0)
5479 #define EPWM_SWBRK_BRKETRG0_Msk (0x1ul << EPWM_SWBRK_BRKETRG0_Pos)
5481 #define EPWM_SWBRK_BRKETRG2_Pos (1)
5482 #define EPWM_SWBRK_BRKETRG2_Msk (0x1ul << EPWM_SWBRK_BRKETRG2_Pos)
5484 #define EPWM_SWBRK_BRKETRG4_Pos (2)
5485 #define EPWM_SWBRK_BRKETRG4_Msk (0x1ul << EPWM_SWBRK_BRKETRG4_Pos)
5487 #define EPWM_SWBRK_BRKLTRG0_Pos (8)
5488 #define EPWM_SWBRK_BRKLTRG0_Msk (0x1ul << EPWM_SWBRK_BRKLTRG0_Pos)
5490 #define EPWM_SWBRK_BRKLTRG2_Pos (9)
5491 #define EPWM_SWBRK_BRKLTRG2_Msk (0x1ul << EPWM_SWBRK_BRKLTRG2_Pos)
5493 #define EPWM_SWBRK_BRKLTRG4_Pos (10)
5494 #define EPWM_SWBRK_BRKLTRG4_Msk (0x1ul << EPWM_SWBRK_BRKLTRG4_Pos)
5496 #define EPWM_INTEN0_ZIEN0_Pos (0)
5497 #define EPWM_INTEN0_ZIEN0_Msk (0x1ul << EPWM_INTEN0_ZIEN0_Pos)
5499 #define EPWM_INTEN0_ZIEN1_Pos (1)
5500 #define EPWM_INTEN0_ZIEN1_Msk (0x1ul << EPWM_INTEN0_ZIEN1_Pos)
5502 #define EPWM_INTEN0_ZIEN2_Pos (2)
5503 #define EPWM_INTEN0_ZIEN2_Msk (0x1ul << EPWM_INTEN0_ZIEN2_Pos)
5505 #define EPWM_INTEN0_ZIEN3_Pos (3)
5506 #define EPWM_INTEN0_ZIEN3_Msk (0x1ul << EPWM_INTEN0_ZIEN3_Pos)
5508 #define EPWM_INTEN0_ZIEN4_Pos (4)
5509 #define EPWM_INTEN0_ZIEN4_Msk (0x1ul << EPWM_INTEN0_ZIEN4_Pos)
5511 #define EPWM_INTEN0_ZIEN5_Pos (5)
5512 #define EPWM_INTEN0_ZIEN5_Msk (0x1ul << EPWM_INTEN0_ZIEN5_Pos)
5514 #define EPWM_INTEN0_PIEN0_Pos (8)
5515 #define EPWM_INTEN0_PIEN0_Msk (0x1ul << EPWM_INTEN0_PIEN0_Pos)
5517 #define EPWM_INTEN0_PIEN1_Pos (9)
5518 #define EPWM_INTEN0_PIEN1_Msk (0x1ul << EPWM_INTEN0_PIEN1_Pos)
5520 #define EPWM_INTEN0_PIEN2_Pos (10)
5521 #define EPWM_INTEN0_PIEN2_Msk (0x1ul << EPWM_INTEN0_PIEN2_Pos)
5523 #define EPWM_INTEN0_PIEN3_Pos (11)
5524 #define EPWM_INTEN0_PIEN3_Msk (0x1ul << EPWM_INTEN0_PIEN3_Pos)
5526 #define EPWM_INTEN0_PIEN4_Pos (12)
5527 #define EPWM_INTEN0_PIEN4_Msk (0x1ul << EPWM_INTEN0_PIEN4_Pos)
5529 #define EPWM_INTEN0_PIEN5_Pos (13)
5530 #define EPWM_INTEN0_PIEN5_Msk (0x1ul << EPWM_INTEN0_PIEN5_Pos)
5532 #define EPWM_INTEN0_CMPUIEN0_Pos (16)
5533 #define EPWM_INTEN0_CMPUIEN0_Msk (0x1ul << EPWM_INTEN0_CMPUIEN0_Pos)
5535 #define EPWM_INTEN0_CMPUIEN1_Pos (17)
5536 #define EPWM_INTEN0_CMPUIEN1_Msk (0x1ul << EPWM_INTEN0_CMPUIEN1_Pos)
5538 #define EPWM_INTEN0_CMPUIEN2_Pos (18)
5539 #define EPWM_INTEN0_CMPUIEN2_Msk (0x1ul << EPWM_INTEN0_CMPUIEN2_Pos)
5541 #define EPWM_INTEN0_CMPUIEN3_Pos (19)
5542 #define EPWM_INTEN0_CMPUIEN3_Msk (0x1ul << EPWM_INTEN0_CMPUIEN3_Pos)
5544 #define EPWM_INTEN0_CMPUIEN4_Pos (20)
5545 #define EPWM_INTEN0_CMPUIEN4_Msk (0x1ul << EPWM_INTEN0_CMPUIEN4_Pos)
5547 #define EPWM_INTEN0_CMPUIEN5_Pos (21)
5548 #define EPWM_INTEN0_CMPUIEN5_Msk (0x1ul << EPWM_INTEN0_CMPUIEN5_Pos)
5550 #define EPWM_INTEN0_CMPDIEN0_Pos (24)
5551 #define EPWM_INTEN0_CMPDIEN0_Msk (0x1ul << EPWM_INTEN0_CMPDIEN0_Pos)
5553 #define EPWM_INTEN0_CMPDIEN1_Pos (25)
5554 #define EPWM_INTEN0_CMPDIEN1_Msk (0x1ul << EPWM_INTEN0_CMPDIEN1_Pos)
5556 #define EPWM_INTEN0_CMPDIEN2_Pos (26)
5557 #define EPWM_INTEN0_CMPDIEN2_Msk (0x1ul << EPWM_INTEN0_CMPDIEN2_Pos)
5559 #define EPWM_INTEN0_CMPDIEN3_Pos (27)
5560 #define EPWM_INTEN0_CMPDIEN3_Msk (0x1ul << EPWM_INTEN0_CMPDIEN3_Pos)
5562 #define EPWM_INTEN0_CMPDIEN4_Pos (28)
5563 #define EPWM_INTEN0_CMPDIEN4_Msk (0x1ul << EPWM_INTEN0_CMPDIEN4_Pos)
5565 #define EPWM_INTEN0_CMPDIEN5_Pos (29)
5566 #define EPWM_INTEN0_CMPDIEN5_Msk (0x1ul << EPWM_INTEN0_CMPDIEN5_Pos)
5568 #define EPWM_INTEN1_BRKEIEN0_1_Pos (0)
5569 #define EPWM_INTEN1_BRKEIEN0_1_Msk (0x1ul << EPWM_INTEN1_BRKEIEN0_1_Pos)
5571 #define EPWM_INTEN1_BRKEIEN2_3_Pos (1)
5572 #define EPWM_INTEN1_BRKEIEN2_3_Msk (0x1ul << EPWM_INTEN1_BRKEIEN2_3_Pos)
5574 #define EPWM_INTEN1_BRKEIEN4_5_Pos (2)
5575 #define EPWM_INTEN1_BRKEIEN4_5_Msk (0x1ul << EPWM_INTEN1_BRKEIEN4_5_Pos)
5577 #define EPWM_INTEN1_BRKLIEN0_1_Pos (8)
5578 #define EPWM_INTEN1_BRKLIEN0_1_Msk (0x1ul << EPWM_INTEN1_BRKLIEN0_1_Pos)
5580 #define EPWM_INTEN1_BRKLIEN2_3_Pos (9)
5581 #define EPWM_INTEN1_BRKLIEN2_3_Msk (0x1ul << EPWM_INTEN1_BRKLIEN2_3_Pos)
5583 #define EPWM_INTEN1_BRKLIEN4_5_Pos (10)
5584 #define EPWM_INTEN1_BRKLIEN4_5_Msk (0x1ul << EPWM_INTEN1_BRKLIEN4_5_Pos)
5586 #define EPWM_INTSTS0_ZIF0_Pos (0)
5587 #define EPWM_INTSTS0_ZIF0_Msk (0x1ul << EPWM_INTSTS0_ZIF0_Pos)
5589 #define EPWM_INTSTS0_ZIF1_Pos (1)
5590 #define EPWM_INTSTS0_ZIF1_Msk (0x1ul << EPWM_INTSTS0_ZIF1_Pos)
5592 #define EPWM_INTSTS0_ZIF2_Pos (2)
5593 #define EPWM_INTSTS0_ZIF2_Msk (0x1ul << EPWM_INTSTS0_ZIF2_Pos)
5595 #define EPWM_INTSTS0_ZIF3_Pos (3)
5596 #define EPWM_INTSTS0_ZIF3_Msk (0x1ul << EPWM_INTSTS0_ZIF3_Pos)
5598 #define EPWM_INTSTS0_ZIF4_Pos (4)
5599 #define EPWM_INTSTS0_ZIF4_Msk (0x1ul << EPWM_INTSTS0_ZIF4_Pos)
5601 #define EPWM_INTSTS0_ZIF5_Pos (5)
5602 #define EPWM_INTSTS0_ZIF5_Msk (0x1ul << EPWM_INTSTS0_ZIF5_Pos)
5604 #define EPWM_INTSTS0_PIF0_Pos (8)
5605 #define EPWM_INTSTS0_PIF0_Msk (0x1ul << EPWM_INTSTS0_PIF0_Pos)
5607 #define EPWM_INTSTS0_PIF1_Pos (9)
5608 #define EPWM_INTSTS0_PIF1_Msk (0x1ul << EPWM_INTSTS0_PIF1_Pos)
5610 #define EPWM_INTSTS0_PIF2_Pos (10)
5611 #define EPWM_INTSTS0_PIF2_Msk (0x1ul << EPWM_INTSTS0_PIF2_Pos)
5613 #define EPWM_INTSTS0_PIF3_Pos (11)
5614 #define EPWM_INTSTS0_PIF3_Msk (0x1ul << EPWM_INTSTS0_PIF3_Pos)
5616 #define EPWM_INTSTS0_PIF4_Pos (12)
5617 #define EPWM_INTSTS0_PIF4_Msk (0x1ul << EPWM_INTSTS0_PIF4_Pos)
5619 #define EPWM_INTSTS0_PIF5_Pos (13)
5620 #define EPWM_INTSTS0_PIF5_Msk (0x1ul << EPWM_INTSTS0_PIF5_Pos)
5622 #define EPWM_INTSTS0_CMPUIF0_Pos (16)
5623 #define EPWM_INTSTS0_CMPUIF0_Msk (0x1ul << EPWM_INTSTS0_CMPUIF0_Pos)
5625 #define EPWM_INTSTS0_CMPUIF1_Pos (17)
5626 #define EPWM_INTSTS0_CMPUIF1_Msk (0x1ul << EPWM_INTSTS0_CMPUIF1_Pos)
5628 #define EPWM_INTSTS0_CMPUIF2_Pos (18)
5629 #define EPWM_INTSTS0_CMPUIF2_Msk (0x1ul << EPWM_INTSTS0_CMPUIF2_Pos)
5631 #define EPWM_INTSTS0_CMPUIF3_Pos (19)
5632 #define EPWM_INTSTS0_CMPUIF3_Msk (0x1ul << EPWM_INTSTS0_CMPUIF3_Pos)
5634 #define EPWM_INTSTS0_CMPUIF4_Pos (20)
5635 #define EPWM_INTSTS0_CMPUIF4_Msk (0x1ul << EPWM_INTSTS0_CMPUIF4_Pos)
5637 #define EPWM_INTSTS0_CMPUIF5_Pos (21)
5638 #define EPWM_INTSTS0_CMPUIF5_Msk (0x1ul << EPWM_INTSTS0_CMPUIF5_Pos)
5640 #define EPWM_INTSTS0_CMPDIF0_Pos (24)
5641 #define EPWM_INTSTS0_CMPDIF0_Msk (0x1ul << EPWM_INTSTS0_CMPDIF0_Pos)
5643 #define EPWM_INTSTS0_CMPDIF1_Pos (25)
5644 #define EPWM_INTSTS0_CMPDIF1_Msk (0x1ul << EPWM_INTSTS0_CMPDIF1_Pos)
5646 #define EPWM_INTSTS0_CMPDIF2_Pos (26)
5647 #define EPWM_INTSTS0_CMPDIF2_Msk (0x1ul << EPWM_INTSTS0_CMPDIF2_Pos)
5649 #define EPWM_INTSTS0_CMPDIF3_Pos (27)
5650 #define EPWM_INTSTS0_CMPDIF3_Msk (0x1ul << EPWM_INTSTS0_CMPDIF3_Pos)
5652 #define EPWM_INTSTS0_CMPDIF4_Pos (28)
5653 #define EPWM_INTSTS0_CMPDIF4_Msk (0x1ul << EPWM_INTSTS0_CMPDIF4_Pos)
5655 #define EPWM_INTSTS0_CMPDIF5_Pos (29)
5656 #define EPWM_INTSTS0_CMPDIF5_Msk (0x1ul << EPWM_INTSTS0_CMPDIF5_Pos)
5658 #define EPWM_INTSTS1_BRKEIF0_Pos (0)
5659 #define EPWM_INTSTS1_BRKEIF0_Msk (0x1ul << EPWM_INTSTS1_BRKEIF0_Pos)
5661 #define EPWM_INTSTS1_BRKEIF1_Pos (1)
5662 #define EPWM_INTSTS1_BRKEIF1_Msk (0x1ul << EPWM_INTSTS1_BRKEIF1_Pos)
5664 #define EPWM_INTSTS1_BRKEIF2_Pos (2)
5665 #define EPWM_INTSTS1_BRKEIF2_Msk (0x1ul << EPWM_INTSTS1_BRKEIF2_Pos)
5667 #define EPWM_INTSTS1_BRKEIF3_Pos (3)
5668 #define EPWM_INTSTS1_BRKEIF3_Msk (0x1ul << EPWM_INTSTS1_BRKEIF3_Pos)
5670 #define EPWM_INTSTS1_BRKEIF4_Pos (4)
5671 #define EPWM_INTSTS1_BRKEIF4_Msk (0x1ul << EPWM_INTSTS1_BRKEIF4_Pos)
5673 #define EPWM_INTSTS1_BRKEIF5_Pos (5)
5674 #define EPWM_INTSTS1_BRKEIF5_Msk (0x1ul << EPWM_INTSTS1_BRKEIF5_Pos)
5676 #define EPWM_INTSTS1_BRKLIF0_Pos (8)
5677 #define EPWM_INTSTS1_BRKLIF0_Msk (0x1ul << EPWM_INTSTS1_BRKLIF0_Pos)
5679 #define EPWM_INTSTS1_BRKLIF1_Pos (9)
5680 #define EPWM_INTSTS1_BRKLIF1_Msk (0x1ul << EPWM_INTSTS1_BRKLIF1_Pos)
5682 #define EPWM_INTSTS1_BRKLIF2_Pos (10)
5683 #define EPWM_INTSTS1_BRKLIF2_Msk (0x1ul << EPWM_INTSTS1_BRKLIF2_Pos)
5685 #define EPWM_INTSTS1_BRKLIF3_Pos (11)
5686 #define EPWM_INTSTS1_BRKLIF3_Msk (0x1ul << EPWM_INTSTS1_BRKLIF3_Pos)
5688 #define EPWM_INTSTS1_BRKLIF4_Pos (12)
5689 #define EPWM_INTSTS1_BRKLIF4_Msk (0x1ul << EPWM_INTSTS1_BRKLIF4_Pos)
5691 #define EPWM_INTSTS1_BRKLIF5_Pos (13)
5692 #define EPWM_INTSTS1_BRKLIF5_Msk (0x1ul << EPWM_INTSTS1_BRKLIF5_Pos)
5694 #define EPWM_INTSTS1_BRKESTS0_Pos (16)
5695 #define EPWM_INTSTS1_BRKESTS0_Msk (0x1ul << EPWM_INTSTS1_BRKESTS0_Pos)
5697 #define EPWM_INTSTS1_BRKESTS1_Pos (17)
5698 #define EPWM_INTSTS1_BRKESTS1_Msk (0x1ul << EPWM_INTSTS1_BRKESTS1_Pos)
5700 #define EPWM_INTSTS1_BRKESTS2_Pos (18)
5701 #define EPWM_INTSTS1_BRKESTS2_Msk (0x1ul << EPWM_INTSTS1_BRKESTS2_Pos)
5703 #define EPWM_INTSTS1_BRKESTS3_Pos (19)
5704 #define EPWM_INTSTS1_BRKESTS3_Msk (0x1ul << EPWM_INTSTS1_BRKESTS3_Pos)
5706 #define EPWM_INTSTS1_BRKESTS4_Pos (20)
5707 #define EPWM_INTSTS1_BRKESTS4_Msk (0x1ul << EPWM_INTSTS1_BRKESTS4_Pos)
5709 #define EPWM_INTSTS1_BRKESTS5_Pos (21)
5710 #define EPWM_INTSTS1_BRKESTS5_Msk (0x1ul << EPWM_INTSTS1_BRKESTS5_Pos)
5712 #define EPWM_INTSTS1_BRKLSTS0_Pos (24)
5713 #define EPWM_INTSTS1_BRKLSTS0_Msk (0x1ul << EPWM_INTSTS1_BRKLSTS0_Pos)
5715 #define EPWM_INTSTS1_BRKLSTS1_Pos (25)
5716 #define EPWM_INTSTS1_BRKLSTS1_Msk (0x1ul << EPWM_INTSTS1_BRKLSTS1_Pos)
5718 #define EPWM_INTSTS1_BRKLSTS2_Pos (26)
5719 #define EPWM_INTSTS1_BRKLSTS2_Msk (0x1ul << EPWM_INTSTS1_BRKLSTS2_Pos)
5721 #define EPWM_INTSTS1_BRKLSTS3_Pos (27)
5722 #define EPWM_INTSTS1_BRKLSTS3_Msk (0x1ul << EPWM_INTSTS1_BRKLSTS3_Pos)
5724 #define EPWM_INTSTS1_BRKLSTS4_Pos (28)
5725 #define EPWM_INTSTS1_BRKLSTS4_Msk (0x1ul << EPWM_INTSTS1_BRKLSTS4_Pos)
5727 #define EPWM_INTSTS1_BRKLSTS5_Pos (29)
5728 #define EPWM_INTSTS1_BRKLSTS5_Msk (0x1ul << EPWM_INTSTS1_BRKLSTS5_Pos)
5730 #define EPWM_DACTRGEN_ZTE0_Pos (0)
5731 #define EPWM_DACTRGEN_ZTE0_Msk (0x1ul << EPWM_DACTRGEN_ZTE0_Pos)
5733 #define EPWM_DACTRGEN_ZTE1_Pos (1)
5734 #define EPWM_DACTRGEN_ZTE1_Msk (0x1ul << EPWM_DACTRGEN_ZTE1_Pos)
5736 #define EPWM_DACTRGEN_ZTE2_Pos (2)
5737 #define EPWM_DACTRGEN_ZTE2_Msk (0x1ul << EPWM_DACTRGEN_ZTE2_Pos)
5739 #define EPWM_DACTRGEN_ZTE3_Pos (3)
5740 #define EPWM_DACTRGEN_ZTE3_Msk (0x1ul << EPWM_DACTRGEN_ZTE3_Pos)
5742 #define EPWM_DACTRGEN_ZTE4_Pos (4)
5743 #define EPWM_DACTRGEN_ZTE4_Msk (0x1ul << EPWM_DACTRGEN_ZTE4_Pos)
5745 #define EPWM_DACTRGEN_ZTE5_Pos (5)
5746 #define EPWM_DACTRGEN_ZTE5_Msk (0x1ul << EPWM_DACTRGEN_ZTE5_Pos)
5748 #define EPWM_DACTRGEN_PTE0_Pos (8)
5749 #define EPWM_DACTRGEN_PTE0_Msk (0x1ul << EPWM_DACTRGEN_PTE0_Pos)
5751 #define EPWM_DACTRGEN_PTE1_Pos (9)
5752 #define EPWM_DACTRGEN_PTE1_Msk (0x1ul << EPWM_DACTRGEN_PTE1_Pos)
5754 #define EPWM_DACTRGEN_PTE2_Pos (10)
5755 #define EPWM_DACTRGEN_PTE2_Msk (0x1ul << EPWM_DACTRGEN_PTE2_Pos)
5757 #define EPWM_DACTRGEN_PTE3_Pos (11)
5758 #define EPWM_DACTRGEN_PTE3_Msk (0x1ul << EPWM_DACTRGEN_PTE3_Pos)
5760 #define EPWM_DACTRGEN_PTE4_Pos (12)
5761 #define EPWM_DACTRGEN_PTE4_Msk (0x1ul << EPWM_DACTRGEN_PTE4_Pos)
5763 #define EPWM_DACTRGEN_PTE5_Pos (13)
5764 #define EPWM_DACTRGEN_PTE5_Msk (0x1ul << EPWM_DACTRGEN_PTE5_Pos)
5766 #define EPWM_DACTRGEN_CUTRGE0_Pos (16)
5767 #define EPWM_DACTRGEN_CUTRGE0_Msk (0x1ul << EPWM_DACTRGEN_CUTRGE0_Pos)
5769 #define EPWM_DACTRGEN_CUTRGE1_Pos (17)
5770 #define EPWM_DACTRGEN_CUTRGE1_Msk (0x1ul << EPWM_DACTRGEN_CUTRGE1_Pos)
5772 #define EPWM_DACTRGEN_CUTRGE2_Pos (18)
5773 #define EPWM_DACTRGEN_CUTRGE2_Msk (0x1ul << EPWM_DACTRGEN_CUTRGE2_Pos)
5775 #define EPWM_DACTRGEN_CUTRGE3_Pos (19)
5776 #define EPWM_DACTRGEN_CUTRGE3_Msk (0x1ul << EPWM_DACTRGEN_CUTRGE3_Pos)
5778 #define EPWM_DACTRGEN_CUTRGE4_Pos (20)
5779 #define EPWM_DACTRGEN_CUTRGE4_Msk (0x1ul << EPWM_DACTRGEN_CUTRGE4_Pos)
5781 #define EPWM_DACTRGEN_CUTRGE5_Pos (21)
5782 #define EPWM_DACTRGEN_CUTRGE5_Msk (0x1ul << EPWM_DACTRGEN_CUTRGE5_Pos)
5784 #define EPWM_DACTRGEN_CDTRGE0_Pos (24)
5785 #define EPWM_DACTRGEN_CDTRGE0_Msk (0x1ul << EPWM_DACTRGEN_CDTRGE0_Pos)
5787 #define EPWM_DACTRGEN_CDTRGE1_Pos (25)
5788 #define EPWM_DACTRGEN_CDTRGE1_Msk (0x1ul << EPWM_DACTRGEN_CDTRGE1_Pos)
5790 #define EPWM_DACTRGEN_CDTRGE2_Pos (26)
5791 #define EPWM_DACTRGEN_CDTRGE2_Msk (0x1ul << EPWM_DACTRGEN_CDTRGE2_Pos)
5793 #define EPWM_DACTRGEN_CDTRGE3_Pos (27)
5794 #define EPWM_DACTRGEN_CDTRGE3_Msk (0x1ul << EPWM_DACTRGEN_CDTRGE3_Pos)
5796 #define EPWM_DACTRGEN_CDTRGE4_Pos (28)
5797 #define EPWM_DACTRGEN_CDTRGE4_Msk (0x1ul << EPWM_DACTRGEN_CDTRGE4_Pos)
5799 #define EPWM_DACTRGEN_CDTRGE5_Pos (29)
5800 #define EPWM_DACTRGEN_CDTRGE5_Msk (0x1ul << EPWM_DACTRGEN_CDTRGE5_Pos)
5802 #define EPWM_EADCTS0_TRGSEL0_Pos (0)
5803 #define EPWM_EADCTS0_TRGSEL0_Msk (0xful << EPWM_EADCTS0_TRGSEL0_Pos)
5805 #define EPWM_EADCTS0_TRGEN0_Pos (7)
5806 #define EPWM_EADCTS0_TRGEN0_Msk (0x1ul << EPWM_EADCTS0_TRGEN0_Pos)
5808 #define EPWM_EADCTS0_TRGSEL1_Pos (8)
5809 #define EPWM_EADCTS0_TRGSEL1_Msk (0xful << EPWM_EADCTS0_TRGSEL1_Pos)
5811 #define EPWM_EADCTS0_TRGEN1_Pos (15)
5812 #define EPWM_EADCTS0_TRGEN1_Msk (0x1ul << EPWM_EADCTS0_TRGEN1_Pos)
5814 #define EPWM_EADCTS0_TRGSEL2_Pos (16)
5815 #define EPWM_EADCTS0_TRGSEL2_Msk (0xful << EPWM_EADCTS0_TRGSEL2_Pos)
5817 #define EPWM_EADCTS0_TRGEN2_Pos (23)
5818 #define EPWM_EADCTS0_TRGEN2_Msk (0x1ul << EPWM_EADCTS0_TRGEN2_Pos)
5820 #define EPWM_EADCTS0_TRGSEL3_Pos (24)
5821 #define EPWM_EADCTS0_TRGSEL3_Msk (0xful << EPWM_EADCTS0_TRGSEL3_Pos)
5823 #define EPWM_EADCTS0_TRGEN3_Pos (31)
5824 #define EPWM_EADCTS0_TRGEN3_Msk (0x1ul << EPWM_EADCTS0_TRGEN3_Pos)
5826 #define EPWM_EADCTS1_TRGSEL4_Pos (0)
5827 #define EPWM_EADCTS1_TRGSEL4_Msk (0xful << EPWM_EADCTS1_TRGSEL4_Pos)
5829 #define EPWM_EADCTS1_TRGEN4_Pos (7)
5830 #define EPWM_EADCTS1_TRGEN4_Msk (0x1ul << EPWM_EADCTS1_TRGEN4_Pos)
5832 #define EPWM_EADCTS1_TRGSEL5_Pos (8)
5833 #define EPWM_EADCTS1_TRGSEL5_Msk (0xful << EPWM_EADCTS1_TRGSEL5_Pos)
5835 #define EPWM_EADCTS1_TRGEN5_Pos (15)
5836 #define EPWM_EADCTS1_TRGEN5_Msk (0x1ul << EPWM_EADCTS1_TRGEN5_Pos)
5838 #define EPWM_FTCMPDAT0_1_FTCMP_Pos (0)
5839 #define EPWM_FTCMPDAT0_1_FTCMP_Msk (0xfffful << EPWM_FTCMPDAT0_1_FTCMP_Pos)
5841 #define EPWM_FTCMPDAT2_3_FTCMP_Pos (0)
5842 #define EPWM_FTCMPDAT2_3_FTCMP_Msk (0xfffful << EPWM_FTCMPDAT2_3_FTCMP_Pos)
5844 #define EPWM_FTCMPDAT4_5_FTCMP_Pos (0)
5845 #define EPWM_FTCMPDAT4_5_FTCMP_Msk (0xfffful << EPWM_FTCMPDAT4_5_FTCMP_Pos)
5847 #define EPWM_SSCTL_SSEN0_Pos (0)
5848 #define EPWM_SSCTL_SSEN0_Msk (0x1ul << EPWM_SSCTL_SSEN0_Pos)
5850 #define EPWM_SSCTL_SSEN1_Pos (1)
5851 #define EPWM_SSCTL_SSEN1_Msk (0x1ul << EPWM_SSCTL_SSEN1_Pos)
5853 #define EPWM_SSCTL_SSEN2_Pos (2)
5854 #define EPWM_SSCTL_SSEN2_Msk (0x1ul << EPWM_SSCTL_SSEN2_Pos)
5856 #define EPWM_SSCTL_SSEN3_Pos (3)
5857 #define EPWM_SSCTL_SSEN3_Msk (0x1ul << EPWM_SSCTL_SSEN3_Pos)
5859 #define EPWM_SSCTL_SSEN4_Pos (4)
5860 #define EPWM_SSCTL_SSEN4_Msk (0x1ul << EPWM_SSCTL_SSEN4_Pos)
5862 #define EPWM_SSCTL_SSEN5_Pos (5)
5863 #define EPWM_SSCTL_SSEN5_Msk (0x1ul << EPWM_SSCTL_SSEN5_Pos)
5865 #define EPWM_SSCTL_SSRC_Pos (8)
5866 #define EPWM_SSCTL_SSRC_Msk (0x3ul << EPWM_SSCTL_SSRC_Pos)
5868 #define EPWM_SSTRG_CNTSEN_Pos (0)
5869 #define EPWM_SSTRG_CNTSEN_Msk (0x1ul << EPWM_SSTRG_CNTSEN_Pos)
5871 #define EPWM_LEBCTL_LEBEN_Pos (0)
5872 #define EPWM_LEBCTL_LEBEN_Msk (0x1ul << EPWM_LEBCTL_LEBEN_Pos)
5874 #define EPWM_LEBCTL_SRCEN0_Pos (8)
5875 #define EPWM_LEBCTL_SRCEN0_Msk (0x1ul << EPWM_LEBCTL_SRCEN0_Pos)
5877 #define EPWM_LEBCTL_SRCEN2_Pos (9)
5878 #define EPWM_LEBCTL_SRCEN2_Msk (0x1ul << EPWM_LEBCTL_SRCEN2_Pos)
5880 #define EPWM_LEBCTL_SRCEN4_Pos (10)
5881 #define EPWM_LEBCTL_SRCEN4_Msk (0x1ul << EPWM_LEBCTL_SRCEN4_Pos)
5883 #define EPWM_LEBCTL_TRGTYPE_Pos (16)
5884 #define EPWM_LEBCTL_TRGTYPE_Msk (0x3ul << EPWM_LEBCTL_TRGTYPE_Pos)
5886 #define EPWM_LEBCNT_LEBCNT_Pos (0)
5887 #define EPWM_LEBCNT_LEBCNT_Msk (0x1fful << EPWM_LEBCNT_LEBCNT_Pos)
5889 #define EPWM_STATUS_CNTMAXF0_Pos (0)
5890 #define EPWM_STATUS_CNTMAXF0_Msk (0x1ul << EPWM_STATUS_CNTMAXF0_Pos)
5892 #define EPWM_STATUS_CNTMAXF1_Pos (1)
5893 #define EPWM_STATUS_CNTMAXF1_Msk (0x1ul << EPWM_STATUS_CNTMAXF1_Pos)
5895 #define EPWM_STATUS_CNTMAXF2_Pos (2)
5896 #define EPWM_STATUS_CNTMAXF2_Msk (0x1ul << EPWM_STATUS_CNTMAXF2_Pos)
5898 #define EPWM_STATUS_CNTMAXF3_Pos (3)
5899 #define EPWM_STATUS_CNTMAXF3_Msk (0x1ul << EPWM_STATUS_CNTMAXF3_Pos)
5901 #define EPWM_STATUS_CNTMAXF4_Pos (4)
5902 #define EPWM_STATUS_CNTMAXF4_Msk (0x1ul << EPWM_STATUS_CNTMAXF4_Pos)
5904 #define EPWM_STATUS_CNTMAXF5_Pos (5)
5905 #define EPWM_STATUS_CNTMAXF5_Msk (0x1ul << EPWM_STATUS_CNTMAXF5_Pos)
5907 #define EPWM_STATUS_SYNCINF0_Pos (8)
5908 #define EPWM_STATUS_SYNCINF0_Msk (0x1ul << EPWM_STATUS_SYNCINF0_Pos)
5910 #define EPWM_STATUS_SYNCINF2_Pos (9)
5911 #define EPWM_STATUS_SYNCINF2_Msk (0x1ul << EPWM_STATUS_SYNCINF2_Pos)
5913 #define EPWM_STATUS_SYNCINF4_Pos (10)
5914 #define EPWM_STATUS_SYNCINF4_Msk (0x1ul << EPWM_STATUS_SYNCINF4_Pos)
5916 #define EPWM_STATUS_EADCTRGF0_Pos (16)
5917 #define EPWM_STATUS_EADCTRGF0_Msk (0x1ul << EPWM_STATUS_EADCTRGF0_Pos)
5919 #define EPWM_STATUS_EADCTRGF1_Pos (17)
5920 #define EPWM_STATUS_EADCTRGF1_Msk (0x1ul << EPWM_STATUS_EADCTRGF1_Pos)
5922 #define EPWM_STATUS_EADCTRGF2_Pos (18)
5923 #define EPWM_STATUS_EADCTRGF2_Msk (0x1ul << EPWM_STATUS_EADCTRGF2_Pos)
5925 #define EPWM_STATUS_EADCTRGF3_Pos (19)
5926 #define EPWM_STATUS_EADCTRGF3_Msk (0x1ul << EPWM_STATUS_EADCTRGF3_Pos)
5928 #define EPWM_STATUS_EADCTRGF4_Pos (20)
5929 #define EPWM_STATUS_EADCTRGF4_Msk (0x1ul << EPWM_STATUS_EADCTRGF4_Pos)
5931 #define EPWM_STATUS_EADCTRGF5_Pos (21)
5932 #define EPWM_STATUS_EADCTRGF5_Msk (0x1ul << EPWM_STATUS_EADCTRGF5_Pos)
5934 #define EPWM_STATUS_DACTRGF_Pos (24)
5935 #define EPWM_STATUS_DACTRGF_Msk (0x1ul << EPWM_STATUS_DACTRGF_Pos)
5937 #define EPWM_IFA0_IFACNT_Pos (0)
5938 #define EPWM_IFA0_IFACNT_Msk (0xfffful << EPWM_IFA0_IFACNT_Pos)
5940 #define EPWM_IFA0_STPMOD_Pos (24)
5941 #define EPWM_IFA0_STPMOD_Msk (0x1ul << EPWM_IFA0_STPMOD_Pos)
5943 #define EPWM_IFA0_IFASEL_Pos (28)
5944 #define EPWM_IFA0_IFASEL_Msk (0x3ul << EPWM_IFA0_IFASEL_Pos)
5946 #define EPWM_IFA0_IFAEN_Pos (31)
5947 #define EPWM_IFA0_IFAEN_Msk (0x1ul << EPWM_IFA0_IFAEN_Pos)
5949 #define EPWM_IFA1_IFACNT_Pos (0)
5950 #define EPWM_IFA1_IFACNT_Msk (0xfffful << EPWM_IFA1_IFACNT_Pos)
5952 #define EPWM_IFA1_STPMOD_Pos (24)
5953 #define EPWM_IFA1_STPMOD_Msk (0x1ul << EPWM_IFA1_STPMOD_Pos)
5955 #define EPWM_IFA1_IFASEL_Pos (28)
5956 #define EPWM_IFA1_IFASEL_Msk (0x3ul << EPWM_IFA1_IFASEL_Pos)
5958 #define EPWM_IFA1_IFAEN_Pos (31)
5959 #define EPWM_IFA1_IFAEN_Msk (0x1ul << EPWM_IFA1_IFAEN_Pos)
5961 #define EPWM_IFA2_IFACNT_Pos (0)
5962 #define EPWM_IFA2_IFACNT_Msk (0xfffful << EPWM_IFA2_IFACNT_Pos)
5964 #define EPWM_IFA2_STPMOD_Pos (24)
5965 #define EPWM_IFA2_STPMOD_Msk (0x1ul << EPWM_IFA2_STPMOD_Pos)
5967 #define EPWM_IFA2_IFASEL_Pos (28)
5968 #define EPWM_IFA2_IFASEL_Msk (0x3ul << EPWM_IFA2_IFASEL_Pos)
5970 #define EPWM_IFA2_IFAEN_Pos (31)
5971 #define EPWM_IFA2_IFAEN_Msk (0x1ul << EPWM_IFA2_IFAEN_Pos)
5973 #define EPWM_IFA3_IFACNT_Pos (0)
5974 #define EPWM_IFA3_IFACNT_Msk (0xfffful << EPWM_IFA3_IFACNT_Pos)
5976 #define EPWM_IFA3_STPMOD_Pos (24)
5977 #define EPWM_IFA3_STPMOD_Msk (0x1ul << EPWM_IFA3_STPMOD_Pos)
5979 #define EPWM_IFA3_IFASEL_Pos (28)
5980 #define EPWM_IFA3_IFASEL_Msk (0x3ul << EPWM_IFA3_IFASEL_Pos)
5982 #define EPWM_IFA3_IFAEN_Pos (31)
5983 #define EPWM_IFA3_IFAEN_Msk (0x1ul << EPWM_IFA3_IFAEN_Pos)
5985 #define EPWM_IFA4_IFACNT_Pos (0)
5986 #define EPWM_IFA4_IFACNT_Msk (0xfffful << EPWM_IFA4_IFACNT_Pos)
5988 #define EPWM_IFA4_STPMOD_Pos (24)
5989 #define EPWM_IFA4_STPMOD_Msk (0x1ul << EPWM_IFA4_STPMOD_Pos)
5991 #define EPWM_IFA4_IFASEL_Pos (28)
5992 #define EPWM_IFA4_IFASEL_Msk (0x3ul << EPWM_IFA4_IFASEL_Pos)
5994 #define EPWM_IFA4_IFAEN_Pos (31)
5995 #define EPWM_IFA4_IFAEN_Msk (0x1ul << EPWM_IFA4_IFAEN_Pos)
5997 #define EPWM_IFA5_IFACNT_Pos (0)
5998 #define EPWM_IFA5_IFACNT_Msk (0xfffful << EPWM_IFA5_IFACNT_Pos)
6000 #define EPWM_IFA5_STPMOD_Pos (24)
6001 #define EPWM_IFA5_STPMOD_Msk (0x1ul << EPWM_IFA5_STPMOD_Pos)
6003 #define EPWM_IFA5_IFASEL_Pos (28)
6004 #define EPWM_IFA5_IFASEL_Msk (0x3ul << EPWM_IFA5_IFASEL_Pos)
6006 #define EPWM_IFA5_IFAEN_Pos (31)
6007 #define EPWM_IFA5_IFAEN_Msk (0x1ul << EPWM_IFA5_IFAEN_Pos)
6009 #define EPWM_AINTSTS_IFAIF0_Pos (0)
6010 #define EPWM_AINTSTS_IFAIF0_Msk (0x1ul << EPWM_AINTSTS_IFAIF0_Pos)
6012 #define EPWM_AINTSTS_IFAIF1_Pos (1)
6013 #define EPWM_AINTSTS_IFAIF1_Msk (0x1ul << EPWM_AINTSTS_IFAIF1_Pos)
6015 #define EPWM_AINTSTS_IFAIF2_Pos (2)
6016 #define EPWM_AINTSTS_IFAIF2_Msk (0x1ul << EPWM_AINTSTS_IFAIF2_Pos)
6018 #define EPWM_AINTSTS_IFAIF3_Pos (3)
6019 #define EPWM_AINTSTS_IFAIF3_Msk (0x1ul << EPWM_AINTSTS_IFAIF3_Pos)
6021 #define EPWM_AINTSTS_IFAIF4_Pos (4)
6022 #define EPWM_AINTSTS_IFAIF4_Msk (0x1ul << EPWM_AINTSTS_IFAIF4_Pos)
6024 #define EPWM_AINTSTS_IFAIF5_Pos (5)
6025 #define EPWM_AINTSTS_IFAIF5_Msk (0x1ul << EPWM_AINTSTS_IFAIF5_Pos)
6027 #define EPWM_AINTEN_IFAIEN0_Pos (0)
6028 #define EPWM_AINTEN_IFAIEN0_Msk (0x1ul << EPWM_AINTEN_IFAIEN0_Pos)
6030 #define EPWM_AINTEN_IFAIEN1_Pos (1)
6031 #define EPWM_AINTEN_IFAIEN1_Msk (0x1ul << EPWM_AINTEN_IFAIEN1_Pos)
6033 #define EPWM_AINTEN_IFAIEN2_Pos (2)
6034 #define EPWM_AINTEN_IFAIEN2_Msk (0x1ul << EPWM_AINTEN_IFAIEN2_Pos)
6036 #define EPWM_AINTEN_IFAIEN3_Pos (3)
6037 #define EPWM_AINTEN_IFAIEN3_Msk (0x1ul << EPWM_AINTEN_IFAIEN3_Pos)
6039 #define EPWM_AINTEN_IFAIEN4_Pos (4)
6040 #define EPWM_AINTEN_IFAIEN4_Msk (0x1ul << EPWM_AINTEN_IFAIEN4_Pos)
6042 #define EPWM_AINTEN_IFAIEN5_Pos (5)
6043 #define EPWM_AINTEN_IFAIEN5_Msk (0x1ul << EPWM_AINTEN_IFAIEN5_Pos)
6045 #define EPWM_APDMACTL_APDMAEN0_Pos (0)
6046 #define EPWM_APDMACTL_APDMAEN0_Msk (0x1ul << EPWM_APDMACTL_APDMAEN0_Pos)
6048 #define EPWM_APDMACTL_APDMAEN1_Pos (1)
6049 #define EPWM_APDMACTL_APDMAEN1_Msk (0x1ul << EPWM_APDMACTL_APDMAEN1_Pos)
6051 #define EPWM_APDMACTL_APDMAEN2_Pos (2)
6052 #define EPWM_APDMACTL_APDMAEN2_Msk (0x1ul << EPWM_APDMACTL_APDMAEN2_Pos)
6054 #define EPWM_APDMACTL_APDMAEN3_Pos (3)
6055 #define EPWM_APDMACTL_APDMAEN3_Msk (0x1ul << EPWM_APDMACTL_APDMAEN3_Pos)
6057 #define EPWM_APDMACTL_APDMAEN4_Pos (4)
6058 #define EPWM_APDMACTL_APDMAEN4_Msk (0x1ul << EPWM_APDMACTL_APDMAEN4_Pos)
6060 #define EPWM_APDMACTL_APDMAEN5_Pos (5)
6061 #define EPWM_APDMACTL_APDMAEN5_Msk (0x1ul << EPWM_APDMACTL_APDMAEN5_Pos)
6063 #define EPWM_FDEN_FDEN0_Pos (0)
6064 #define EPWM_FDEN_FDEN0_Msk (0x1ul << EPWM_FDEN_FDEN0_Pos)
6066 #define EPWM_FDEN_FDEN1_Pos (1)
6067 #define EPWM_FDEN_FDEN1_Msk (0x1ul << EPWM_FDEN_FDEN1_Pos)
6069 #define EPWM_FDEN_FDEN2_Pos (2)
6070 #define EPWM_FDEN_FDEN2_Msk (0x1ul << EPWM_FDEN_FDEN2_Pos)
6072 #define EPWM_FDEN_FDEN3_Pos (3)
6073 #define EPWM_FDEN_FDEN3_Msk (0x1ul << EPWM_FDEN_FDEN3_Pos)
6075 #define EPWM_FDEN_FDEN4_Pos (4)
6076 #define EPWM_FDEN_FDEN4_Msk (0x1ul << EPWM_FDEN_FDEN4_Pos)
6078 #define EPWM_FDEN_FDEN5_Pos (5)
6079 #define EPWM_FDEN_FDEN5_Msk (0x1ul << EPWM_FDEN_FDEN5_Pos)
6081 #define EPWM_FDEN_FDODIS0_Pos (8)
6082 #define EPWM_FDEN_FDODIS0_Msk (0x1ul << EPWM_FDEN_FDODIS0_Pos)
6084 #define EPWM_FDEN_FDODIS1_Pos (9)
6085 #define EPWM_FDEN_FDODIS1_Msk (0x1ul << EPWM_FDEN_FDODIS1_Pos)
6087 #define EPWM_FDEN_FDODIS2_Pos (10)
6088 #define EPWM_FDEN_FDODIS2_Msk (0x1ul << EPWM_FDEN_FDODIS2_Pos)
6090 #define EPWM_FDEN_FDODIS3_Pos (11)
6091 #define EPWM_FDEN_FDODIS3_Msk (0x1ul << EPWM_FDEN_FDODIS3_Pos)
6093 #define EPWM_FDEN_FDODIS4_Pos (12)
6094 #define EPWM_FDEN_FDODIS4_Msk (0x1ul << EPWM_FDEN_FDODIS4_Pos)
6096 #define EPWM_FDEN_FDODIS5_Pos (13)
6097 #define EPWM_FDEN_FDODIS5_Msk (0x1ul << EPWM_FDEN_FDODIS5_Pos)
6099 #define EPWM_FDEN_FDCKS0_Pos (16)
6100 #define EPWM_FDEN_FDCKS0_Msk (0x1ul << EPWM_FDEN_FDCKS0_Pos)
6102 #define EPWM_FDEN_FDCKS1_Pos (17)
6103 #define EPWM_FDEN_FDCKS1_Msk (0x1ul << EPWM_FDEN_FDCKS1_Pos)
6105 #define EPWM_FDEN_FDCKS2_Pos (18)
6106 #define EPWM_FDEN_FDCKS2_Msk (0x1ul << EPWM_FDEN_FDCKS2_Pos)
6108 #define EPWM_FDEN_FDCKS3_Pos (19)
6109 #define EPWM_FDEN_FDCKS3_Msk (0x1ul << EPWM_FDEN_FDCKS3_Pos)
6111 #define EPWM_FDEN_FDCKS4_Pos (20)
6112 #define EPWM_FDEN_FDCKS4_Msk (0x1ul << EPWM_FDEN_FDCKS4_Pos)
6114 #define EPWM_FDEN_FDCKS5_Pos (21)
6115 #define EPWM_FDEN_FDCKS5_Msk (0x1ul << EPWM_FDEN_FDCKS5_Pos)
6117 #define EPWM_FDCTL0_TRMSKCNT_Pos (0)
6118 #define EPWM_FDCTL0_TRMSKCNT_Msk (0x7ful << EPWM_FDCTL0_TRMSKCNT_Pos)
6120 #define EPWM_FDCTL0_FDMSKEN_Pos (15)
6121 #define EPWM_FDCTL0_FDMSKEN_Msk (0x1ul << EPWM_FDCTL0_FDMSKEN_Pos)
6123 #define EPWM_FDCTL0_DGSMPCYC_Pos (16)
6124 #define EPWM_FDCTL0_DGSMPCYC_Msk (0x7ul << EPWM_FDCTL0_DGSMPCYC_Pos)
6126 #define EPWM_FDCTL0_FDCKSEL_Pos (28)
6127 #define EPWM_FDCTL0_FDCKSEL_Msk (0x3ul << EPWM_FDCTL0_FDCKSEL_Pos)
6129 #define EPWM_FDCTL0_FDDGEN_Pos (31)
6130 #define EPWM_FDCTL0_FDDGEN_Msk (0x1ul << EPWM_FDCTL0_FDDGEN_Pos)
6132 #define EPWM_FDCTL1_TRMSKCNT_Pos (0)
6133 #define EPWM_FDCTL1_TRMSKCNT_Msk (0x7ful << EPWM_FDCTL1_TRMSKCNT_Pos)
6135 #define EPWM_FDCTL1_FDMSKEN_Pos (15)
6136 #define EPWM_FDCTL1_FDMSKEN_Msk (0x1ul << EPWM_FDCTL1_FDMSKEN_Pos)
6138 #define EPWM_FDCTL1_DGSMPCYC_Pos (16)
6139 #define EPWM_FDCTL1_DGSMPCYC_Msk (0x7ul << EPWM_FDCTL1_DGSMPCYC_Pos)
6141 #define EPWM_FDCTL1_FDCKSEL_Pos (28)
6142 #define EPWM_FDCTL1_FDCKSEL_Msk (0x3ul << EPWM_FDCTL1_FDCKSEL_Pos)
6144 #define EPWM_FDCTL1_FDDGEN_Pos (31)
6145 #define EPWM_FDCTL1_FDDGEN_Msk (0x1ul << EPWM_FDCTL1_FDDGEN_Pos)
6147 #define EPWM_FDCTL2_TRMSKCNT_Pos (0)
6148 #define EPWM_FDCTL2_TRMSKCNT_Msk (0x7ful << EPWM_FDCTL2_TRMSKCNT_Pos)
6150 #define EPWM_FDCTL2_FDMSKEN_Pos (15)
6151 #define EPWM_FDCTL2_FDMSKEN_Msk (0x1ul << EPWM_FDCTL2_FDMSKEN_Pos)
6153 #define EPWM_FDCTL2_DGSMPCYC_Pos (16)
6154 #define EPWM_FDCTL2_DGSMPCYC_Msk (0x7ul << EPWM_FDCTL2_DGSMPCYC_Pos)
6156 #define EPWM_FDCTL2_FDCKSEL_Pos (28)
6157 #define EPWM_FDCTL2_FDCKSEL_Msk (0x3ul << EPWM_FDCTL2_FDCKSEL_Pos)
6159 #define EPWM_FDCTL2_FDDGEN_Pos (31)
6160 #define EPWM_FDCTL2_FDDGEN_Msk (0x1ul << EPWM_FDCTL2_FDDGEN_Pos)
6162 #define EPWM_FDCTL3_TRMSKCNT_Pos (0)
6163 #define EPWM_FDCTL3_TRMSKCNT_Msk (0x7ful << EPWM_FDCTL3_TRMSKCNT_Pos)
6165 #define EPWM_FDCTL3_FDMSKEN_Pos (15)
6166 #define EPWM_FDCTL3_FDMSKEN_Msk (0x1ul << EPWM_FDCTL3_FDMSKEN_Pos)
6168 #define EPWM_FDCTL3_DGSMPCYC_Pos (16)
6169 #define EPWM_FDCTL3_DGSMPCYC_Msk (0x7ul << EPWM_FDCTL3_DGSMPCYC_Pos)
6171 #define EPWM_FDCTL3_FDCKSEL_Pos (28)
6172 #define EPWM_FDCTL3_FDCKSEL_Msk (0x3ul << EPWM_FDCTL3_FDCKSEL_Pos)
6174 #define EPWM_FDCTL3_FDDGEN_Pos (31)
6175 #define EPWM_FDCTL3_FDDGEN_Msk (0x1ul << EPWM_FDCTL3_FDDGEN_Pos)
6177 #define EPWM_FDCTL4_TRMSKCNT_Pos (0)
6178 #define EPWM_FDCTL4_TRMSKCNT_Msk (0x7ful << EPWM_FDCTL4_TRMSKCNT_Pos)
6180 #define EPWM_FDCTL4_FDMSKEN_Pos (15)
6181 #define EPWM_FDCTL4_FDMSKEN_Msk (0x1ul << EPWM_FDCTL4_FDMSKEN_Pos)
6183 #define EPWM_FDCTL4_DGSMPCYC_Pos (16)
6184 #define EPWM_FDCTL4_DGSMPCYC_Msk (0x7ul << EPWM_FDCTL4_DGSMPCYC_Pos)
6186 #define EPWM_FDCTL4_FDCKSEL_Pos (28)
6187 #define EPWM_FDCTL4_FDCKSEL_Msk (0x3ul << EPWM_FDCTL4_FDCKSEL_Pos)
6189 #define EPWM_FDCTL4_FDDGEN_Pos (31)
6190 #define EPWM_FDCTL4_FDDGEN_Msk (0x1ul << EPWM_FDCTL4_FDDGEN_Pos)
6192 #define EPWM_FDCTL5_TRMSKCNT_Pos (0)
6193 #define EPWM_FDCTL5_TRMSKCNT_Msk (0x7ful << EPWM_FDCTL5_TRMSKCNT_Pos)
6195 #define EPWM_FDCTL5_FDMSKEN_Pos (15)
6196 #define EPWM_FDCTL5_FDMSKEN_Msk (0x1ul << EPWM_FDCTL5_FDMSKEN_Pos)
6198 #define EPWM_FDCTL5_DGSMPCYC_Pos (16)
6199 #define EPWM_FDCTL5_DGSMPCYC_Msk (0x7ul << EPWM_FDCTL5_DGSMPCYC_Pos)
6201 #define EPWM_FDCTL5_FDCKSEL_Pos (28)
6202 #define EPWM_FDCTL5_FDCKSEL_Msk (0x3ul << EPWM_FDCTL5_FDCKSEL_Pos)
6204 #define EPWM_FDCTL5_FDDGEN_Pos (31)
6205 #define EPWM_FDCTL5_FDDGEN_Msk (0x1ul << EPWM_FDCTL5_FDDGEN_Pos)
6207 #define EPWM_FDIEN_FDIEN0_Pos (0)
6208 #define EPWM_FDIEN_FDIEN0_Msk (0x1ul << EPWM_FDIEN_FDIEN0_Pos)
6210 #define EPWM_FDIEN_FDIEN1_Pos (1)
6211 #define EPWM_FDIEN_FDIEN1_Msk (0x1ul << EPWM_FDIEN_FDIEN1_Pos)
6213 #define EPWM_FDIEN_FDIEN2_Pos (2)
6214 #define EPWM_FDIEN_FDIEN2_Msk (0x1ul << EPWM_FDIEN_FDIEN2_Pos)
6216 #define EPWM_FDIEN_FDIEN3_Pos (3)
6217 #define EPWM_FDIEN_FDIEN3_Msk (0x1ul << EPWM_FDIEN_FDIEN3_Pos)
6219 #define EPWM_FDIEN_FDIEN4_Pos (4)
6220 #define EPWM_FDIEN_FDIEN4_Msk (0x1ul << EPWM_FDIEN_FDIEN4_Pos)
6222 #define EPWM_FDIEN_FDIEN5_Pos (5)
6223 #define EPWM_FDIEN_FDIEN5_Msk (0x1ul << EPWM_FDIEN_FDIEN5_Pos)
6225 #define EPWM_FDSTS_FDIF0_Pos (0)
6226 #define EPWM_FDSTS_FDIF0_Msk (0x1ul << EPWM_FDSTS_FDIF0_Pos)
6228 #define EPWM_FDSTS_FDIF1_Pos (1)
6229 #define EPWM_FDSTS_FDIF1_Msk (0x1ul << EPWM_FDSTS_FDIF1_Pos)
6231 #define EPWM_FDSTS_FDIF2_Pos (2)
6232 #define EPWM_FDSTS_FDIF2_Msk (0x1ul << EPWM_FDSTS_FDIF2_Pos)
6234 #define EPWM_FDSTS_FDIF3_Pos (3)
6235 #define EPWM_FDSTS_FDIF3_Msk (0x1ul << EPWM_FDSTS_FDIF3_Pos)
6237 #define EPWM_FDSTS_FDIF4_Pos (4)
6238 #define EPWM_FDSTS_FDIF4_Msk (0x1ul << EPWM_FDSTS_FDIF4_Pos)
6240 #define EPWM_FDSTS_FDIF5_Pos (5)
6241 #define EPWM_FDSTS_FDIF5_Msk (0x1ul << EPWM_FDSTS_FDIF5_Pos)
6243 #define EPWM_EADCPSCCTL_PSCEN0_Pos (0)
6244 #define EPWM_EADCPSCCTL_PSCEN0_Msk (0x1ul << EPWM_EADCPSCCTL_PSCEN0_Pos)
6246 #define EPWM_EADCPSCCTL_PSCEN1_Pos (1)
6247 #define EPWM_EADCPSCCTL_PSCEN1_Msk (0x1ul << EPWM_EADCPSCCTL_PSCEN1_Pos)
6249 #define EPWM_EADCPSCCTL_PSCEN2_Pos (2)
6250 #define EPWM_EADCPSCCTL_PSCEN2_Msk (0x1ul << EPWM_EADCPSCCTL_PSCEN2_Pos)
6252 #define EPWM_EADCPSCCTL_PSCEN3_Pos (3)
6253 #define EPWM_EADCPSCCTL_PSCEN3_Msk (0x1ul << EPWM_EADCPSCCTL_PSCEN3_Pos)
6255 #define EPWM_EADCPSCCTL_PSCEN4_Pos (4)
6256 #define EPWM_EADCPSCCTL_PSCEN4_Msk (0x1ul << EPWM_EADCPSCCTL_PSCEN4_Pos)
6258 #define EPWM_EADCPSCCTL_PSCEN5_Pos (5)
6259 #define EPWM_EADCPSCCTL_PSCEN5_Msk (0x1ul << EPWM_EADCPSCCTL_PSCEN5_Pos)
6261 #define EPWM_EADCPSC0_EADCPSC0_Pos (0)
6262 #define EPWM_EADCPSC0_EADCPSC0_Msk (0xful << EPWM_EADCPSC0_EADCPSC0_Pos)
6264 #define EPWM_EADCPSC0_EADCPSC1_Pos (8)
6265 #define EPWM_EADCPSC0_EADCPSC1_Msk (0xful << EPWM_EADCPSC0_EADCPSC1_Pos)
6267 #define EPWM_EADCPSC0_EADCPSC2_Pos (16)
6268 #define EPWM_EADCPSC0_EADCPSC2_Msk (0xful << EPWM_EADCPSC0_EADCPSC2_Pos)
6270 #define EPWM_EADCPSC0_EADCPSC3_Pos (24)
6271 #define EPWM_EADCPSC0_EADCPSC3_Msk (0xful << EPWM_EADCPSC0_EADCPSC3_Pos)
6273 #define EPWM_EADCPSC1_EADCPSC4_Pos (0)
6274 #define EPWM_EADCPSC1_EADCPSC4_Msk (0xful << EPWM_EADCPSC1_EADCPSC4_Pos)
6276 #define EPWM_EADCPSC1_EADCPSC5_Pos (8)
6277 #define EPWM_EADCPSC1_EADCPSC5_Msk (0xful << EPWM_EADCPSC1_EADCPSC5_Pos)
6279 #define EPWM_EADCPSCNT0_PSCNT0_Pos (0)
6280 #define EPWM_EADCPSCNT0_PSCNT0_Msk (0xful << EPWM_EADCPSCNT0_PSCNT0_Pos)
6282 #define EPWM_EADCPSCNT0_PSCNT1_Pos (8)
6283 #define EPWM_EADCPSCNT0_PSCNT1_Msk (0xful << EPWM_EADCPSCNT0_PSCNT1_Pos)
6285 #define EPWM_EADCPSCNT0_PSCNT2_Pos (16)
6286 #define EPWM_EADCPSCNT0_PSCNT2_Msk (0xful << EPWM_EADCPSCNT0_PSCNT2_Pos)
6288 #define EPWM_EADCPSCNT0_PSCNT3_Pos (24)
6289 #define EPWM_EADCPSCNT0_PSCNT3_Msk (0xful << EPWM_EADCPSCNT0_PSCNT3_Pos)
6291 #define EPWM_EADCPSCNT1_PSCNT4_Pos (0)
6292 #define EPWM_EADCPSCNT1_PSCNT4_Msk (0xful << EPWM_EADCPSCNT1_PSCNT4_Pos)
6294 #define EPWM_EADCPSCNT1_PSCNT5_Pos (8)
6295 #define EPWM_EADCPSCNT1_PSCNT5_Msk (0xful << EPWM_EADCPSCNT1_PSCNT5_Pos)
6297 #define EPWM_CAPINEN_CAPINEN0_Pos (0)
6298 #define EPWM_CAPINEN_CAPINEN0_Msk (0x1ul << EPWM_CAPINEN_CAPINEN0_Pos)
6300 #define EPWM_CAPINEN_CAPINEN1_Pos (1)
6301 #define EPWM_CAPINEN_CAPINEN1_Msk (0x1ul << EPWM_CAPINEN_CAPINEN1_Pos)
6303 #define EPWM_CAPINEN_CAPINEN2_Pos (2)
6304 #define EPWM_CAPINEN_CAPINEN2_Msk (0x1ul << EPWM_CAPINEN_CAPINEN2_Pos)
6306 #define EPWM_CAPINEN_CAPINEN3_Pos (3)
6307 #define EPWM_CAPINEN_CAPINEN3_Msk (0x1ul << EPWM_CAPINEN_CAPINEN3_Pos)
6309 #define EPWM_CAPINEN_CAPINEN4_Pos (4)
6310 #define EPWM_CAPINEN_CAPINEN4_Msk (0x1ul << EPWM_CAPINEN_CAPINEN4_Pos)
6312 #define EPWM_CAPINEN_CAPINEN5_Pos (5)
6313 #define EPWM_CAPINEN_CAPINEN5_Msk (0x1ul << EPWM_CAPINEN_CAPINEN5_Pos)
6315 #define EPWM_CAPCTL_CAPEN0_Pos (0)
6316 #define EPWM_CAPCTL_CAPEN0_Msk (0x1ul << EPWM_CAPCTL_CAPEN0_Pos)
6318 #define EPWM_CAPCTL_CAPEN1_Pos (1)
6319 #define EPWM_CAPCTL_CAPEN1_Msk (0x1ul << EPWM_CAPCTL_CAPEN1_Pos)
6321 #define EPWM_CAPCTL_CAPEN2_Pos (2)
6322 #define EPWM_CAPCTL_CAPEN2_Msk (0x1ul << EPWM_CAPCTL_CAPEN2_Pos)
6324 #define EPWM_CAPCTL_CAPEN3_Pos (3)
6325 #define EPWM_CAPCTL_CAPEN3_Msk (0x1ul << EPWM_CAPCTL_CAPEN3_Pos)
6327 #define EPWM_CAPCTL_CAPEN4_Pos (4)
6328 #define EPWM_CAPCTL_CAPEN4_Msk (0x1ul << EPWM_CAPCTL_CAPEN4_Pos)
6330 #define EPWM_CAPCTL_CAPEN5_Pos (5)
6331 #define EPWM_CAPCTL_CAPEN5_Msk (0x1ul << EPWM_CAPCTL_CAPEN5_Pos)
6333 #define EPWM_CAPCTL_CAPINV0_Pos (8)
6334 #define EPWM_CAPCTL_CAPINV0_Msk (0x1ul << EPWM_CAPCTL_CAPINV0_Pos)
6336 #define EPWM_CAPCTL_CAPINV1_Pos (9)
6337 #define EPWM_CAPCTL_CAPINV1_Msk (0x1ul << EPWM_CAPCTL_CAPINV1_Pos)
6339 #define EPWM_CAPCTL_CAPINV2_Pos (10)
6340 #define EPWM_CAPCTL_CAPINV2_Msk (0x1ul << EPWM_CAPCTL_CAPINV2_Pos)
6342 #define EPWM_CAPCTL_CAPINV3_Pos (11)
6343 #define EPWM_CAPCTL_CAPINV3_Msk (0x1ul << EPWM_CAPCTL_CAPINV3_Pos)
6345 #define EPWM_CAPCTL_CAPINV4_Pos (12)
6346 #define EPWM_CAPCTL_CAPINV4_Msk (0x1ul << EPWM_CAPCTL_CAPINV4_Pos)
6348 #define EPWM_CAPCTL_CAPINV5_Pos (13)
6349 #define EPWM_CAPCTL_CAPINV5_Msk (0x1ul << EPWM_CAPCTL_CAPINV5_Pos)
6351 #define EPWM_CAPCTL_RCRLDEN0_Pos (16)
6352 #define EPWM_CAPCTL_RCRLDEN0_Msk (0x1ul << EPWM_CAPCTL_RCRLDEN0_Pos)
6354 #define EPWM_CAPCTL_RCRLDEN1_Pos (17)
6355 #define EPWM_CAPCTL_RCRLDEN1_Msk (0x1ul << EPWM_CAPCTL_RCRLDEN1_Pos)
6357 #define EPWM_CAPCTL_RCRLDEN2_Pos (18)
6358 #define EPWM_CAPCTL_RCRLDEN2_Msk (0x1ul << EPWM_CAPCTL_RCRLDEN2_Pos)
6360 #define EPWM_CAPCTL_RCRLDEN3_Pos (19)
6361 #define EPWM_CAPCTL_RCRLDEN3_Msk (0x1ul << EPWM_CAPCTL_RCRLDEN3_Pos)
6363 #define EPWM_CAPCTL_RCRLDEN4_Pos (20)
6364 #define EPWM_CAPCTL_RCRLDEN4_Msk (0x1ul << EPWM_CAPCTL_RCRLDEN4_Pos)
6366 #define EPWM_CAPCTL_RCRLDEN5_Pos (21)
6367 #define EPWM_CAPCTL_RCRLDEN5_Msk (0x1ul << EPWM_CAPCTL_RCRLDEN5_Pos)
6369 #define EPWM_CAPCTL_FCRLDEN0_Pos (24)
6370 #define EPWM_CAPCTL_FCRLDEN0_Msk (0x1ul << EPWM_CAPCTL_FCRLDEN0_Pos)
6372 #define EPWM_CAPCTL_FCRLDEN1_Pos (25)
6373 #define EPWM_CAPCTL_FCRLDEN1_Msk (0x1ul << EPWM_CAPCTL_FCRLDEN1_Pos)
6375 #define EPWM_CAPCTL_FCRLDEN2_Pos (26)
6376 #define EPWM_CAPCTL_FCRLDEN2_Msk (0x1ul << EPWM_CAPCTL_FCRLDEN2_Pos)
6378 #define EPWM_CAPCTL_FCRLDEN3_Pos (27)
6379 #define EPWM_CAPCTL_FCRLDEN3_Msk (0x1ul << EPWM_CAPCTL_FCRLDEN3_Pos)
6381 #define EPWM_CAPCTL_FCRLDEN4_Pos (28)
6382 #define EPWM_CAPCTL_FCRLDEN4_Msk (0x1ul << EPWM_CAPCTL_FCRLDEN4_Pos)
6384 #define EPWM_CAPCTL_FCRLDEN5_Pos (29)
6385 #define EPWM_CAPCTL_FCRLDEN5_Msk (0x1ul << EPWM_CAPCTL_FCRLDEN5_Pos)
6387 #define EPWM_CAPSTS_CRLIFOV0_Pos (0)
6388 #define EPWM_CAPSTS_CRLIFOV0_Msk (0x1ul << EPWM_CAPSTS_CRLIFOV0_Pos)
6390 #define EPWM_CAPSTS_CRLIFOV1_Pos (1)
6391 #define EPWM_CAPSTS_CRLIFOV1_Msk (0x1ul << EPWM_CAPSTS_CRLIFOV1_Pos)
6393 #define EPWM_CAPSTS_CRLIFOV2_Pos (2)
6394 #define EPWM_CAPSTS_CRLIFOV2_Msk (0x1ul << EPWM_CAPSTS_CRLIFOV2_Pos)
6396 #define EPWM_CAPSTS_CRLIFOV3_Pos (3)
6397 #define EPWM_CAPSTS_CRLIFOV3_Msk (0x1ul << EPWM_CAPSTS_CRLIFOV3_Pos)
6399 #define EPWM_CAPSTS_CRLIFOV4_Pos (4)
6400 #define EPWM_CAPSTS_CRLIFOV4_Msk (0x1ul << EPWM_CAPSTS_CRLIFOV4_Pos)
6402 #define EPWM_CAPSTS_CRLIFOV5_Pos (5)
6403 #define EPWM_CAPSTS_CRLIFOV5_Msk (0x1ul << EPWM_CAPSTS_CRLIFOV5_Pos)
6405 #define EPWM_CAPSTS_CFLIFOV0_Pos (8)
6406 #define EPWM_CAPSTS_CFLIFOV0_Msk (0x1ul << EPWM_CAPSTS_CFLIFOV0_Pos)
6408 #define EPWM_CAPSTS_CFLIFOV1_Pos (9)
6409 #define EPWM_CAPSTS_CFLIFOV1_Msk (0x1ul << EPWM_CAPSTS_CFLIFOV1_Pos)
6411 #define EPWM_CAPSTS_CFLIFOV2_Pos (10)
6412 #define EPWM_CAPSTS_CFLIFOV2_Msk (0x1ul << EPWM_CAPSTS_CFLIFOV2_Pos)
6414 #define EPWM_CAPSTS_CFLIFOV3_Pos (11)
6415 #define EPWM_CAPSTS_CFLIFOV3_Msk (0x1ul << EPWM_CAPSTS_CFLIFOV3_Pos)
6417 #define EPWM_CAPSTS_CFLIFOV4_Pos (12)
6418 #define EPWM_CAPSTS_CFLIFOV4_Msk (0x1ul << EPWM_CAPSTS_CFLIFOV4_Pos)
6420 #define EPWM_CAPSTS_CFLIFOV5_Pos (13)
6421 #define EPWM_CAPSTS_CFLIFOV5_Msk (0x1ul << EPWM_CAPSTS_CFLIFOV5_Pos)
6423 #define EPWM_RCAPDAT0_RCAPDAT_Pos (0)
6424 #define EPWM_RCAPDAT0_RCAPDAT_Msk (0xfffful << EPWM_RCAPDAT0_RCAPDAT_Pos)
6426 #define EPWM_FCAPDAT0_FCAPDAT_Pos (0)
6427 #define EPWM_FCAPDAT0_FCAPDAT_Msk (0xfffful << EPWM_FCAPDAT0_FCAPDAT_Pos)
6429 #define EPWM_RCAPDAT1_RCAPDAT_Pos (0)
6430 #define EPWM_RCAPDAT1_RCAPDAT_Msk (0xfffful << EPWM_RCAPDAT1_RCAPDAT_Pos)
6432 #define EPWM_FCAPDAT1_FCAPDAT_Pos (0)
6433 #define EPWM_FCAPDAT1_FCAPDAT_Msk (0xfffful << EPWM_FCAPDAT1_FCAPDAT_Pos)
6435 #define EPWM_RCAPDAT2_RCAPDAT_Pos (0)
6436 #define EPWM_RCAPDAT2_RCAPDAT_Msk (0xfffful << EPWM_RCAPDAT2_RCAPDAT_Pos)
6438 #define EPWM_FCAPDAT2_FCAPDAT_Pos (0)
6439 #define EPWM_FCAPDAT2_FCAPDAT_Msk (0xfffful << EPWM_FCAPDAT2_FCAPDAT_Pos)
6441 #define EPWM_RCAPDAT3_RCAPDAT_Pos (0)
6442 #define EPWM_RCAPDAT3_RCAPDAT_Msk (0xfffful << EPWM_RCAPDAT3_RCAPDAT_Pos)
6444 #define EPWM_FCAPDAT3_FCAPDAT_Pos (0)
6445 #define EPWM_FCAPDAT3_FCAPDAT_Msk (0xfffful << EPWM_FCAPDAT3_FCAPDAT_Pos)
6447 #define EPWM_RCAPDAT4_RCAPDAT_Pos (0)
6448 #define EPWM_RCAPDAT4_RCAPDAT_Msk (0xfffful << EPWM_RCAPDAT4_RCAPDAT_Pos)
6450 #define EPWM_FCAPDAT4_FCAPDAT_Pos (0)
6451 #define EPWM_FCAPDAT4_FCAPDAT_Msk (0xfffful << EPWM_FCAPDAT4_FCAPDAT_Pos)
6453 #define EPWM_RCAPDAT5_RCAPDAT_Pos (0)
6454 #define EPWM_RCAPDAT5_RCAPDAT_Msk (0xfffful << EPWM_RCAPDAT5_RCAPDAT_Pos)
6456 #define EPWM_FCAPDAT5_FCAPDAT_Pos (0)
6457 #define EPWM_FCAPDAT5_FCAPDAT_Msk (0xfffful << EPWM_FCAPDAT5_FCAPDAT_Pos)
6459 #define EPWM_PDMACTL_CHEN0_1_Pos (0)
6460 #define EPWM_PDMACTL_CHEN0_1_Msk (0x1ul << EPWM_PDMACTL_CHEN0_1_Pos)
6462 #define EPWM_PDMACTL_CAPMOD0_1_Pos (1)
6463 #define EPWM_PDMACTL_CAPMOD0_1_Msk (0x3ul << EPWM_PDMACTL_CAPMOD0_1_Pos)
6465 #define EPWM_PDMACTL_CAPORD0_1_Pos (3)
6466 #define EPWM_PDMACTL_CAPORD0_1_Msk (0x1ul << EPWM_PDMACTL_CAPORD0_1_Pos)
6468 #define EPWM_PDMACTL_CHSEL0_1_Pos (4)
6469 #define EPWM_PDMACTL_CHSEL0_1_Msk (0x1ul << EPWM_PDMACTL_CHSEL0_1_Pos)
6471 #define EPWM_PDMACTL_CHEN2_3_Pos (8)
6472 #define EPWM_PDMACTL_CHEN2_3_Msk (0x1ul << EPWM_PDMACTL_CHEN2_3_Pos)
6474 #define EPWM_PDMACTL_CAPMOD2_3_Pos (9)
6475 #define EPWM_PDMACTL_CAPMOD2_3_Msk (0x3ul << EPWM_PDMACTL_CAPMOD2_3_Pos)
6477 #define EPWM_PDMACTL_CAPORD2_3_Pos (11)
6478 #define EPWM_PDMACTL_CAPORD2_3_Msk (0x1ul << EPWM_PDMACTL_CAPORD2_3_Pos)
6480 #define EPWM_PDMACTL_CHSEL2_3_Pos (12)
6481 #define EPWM_PDMACTL_CHSEL2_3_Msk (0x1ul << EPWM_PDMACTL_CHSEL2_3_Pos)
6483 #define EPWM_PDMACTL_CHEN4_5_Pos (16)
6484 #define EPWM_PDMACTL_CHEN4_5_Msk (0x1ul << EPWM_PDMACTL_CHEN4_5_Pos)
6486 #define EPWM_PDMACTL_CAPMOD4_5_Pos (17)
6487 #define EPWM_PDMACTL_CAPMOD4_5_Msk (0x3ul << EPWM_PDMACTL_CAPMOD4_5_Pos)
6489 #define EPWM_PDMACTL_CAPORD4_5_Pos (19)
6490 #define EPWM_PDMACTL_CAPORD4_5_Msk (0x1ul << EPWM_PDMACTL_CAPORD4_5_Pos)
6492 #define EPWM_PDMACTL_CHSEL4_5_Pos (20)
6493 #define EPWM_PDMACTL_CHSEL4_5_Msk (0x1ul << EPWM_PDMACTL_CHSEL4_5_Pos)
6495 #define EPWM_PDMACAP0_1_CAPBUF_Pos (0)
6496 #define EPWM_PDMACAP0_1_CAPBUF_Msk (0xfffful << EPWM_PDMACAP0_1_CAPBUF_Pos)
6498 #define EPWM_PDMACAP2_3_CAPBUF_Pos (0)
6499 #define EPWM_PDMACAP2_3_CAPBUF_Msk (0xfffful << EPWM_PDMACAP2_3_CAPBUF_Pos)
6501 #define EPWM_PDMACAP4_5_CAPBUF_Pos (0)
6502 #define EPWM_PDMACAP4_5_CAPBUF_Msk (0xfffful << EPWM_PDMACAP4_5_CAPBUF_Pos)
6504 #define EPWM_CAPIEN_CAPRIEN0_Pos (0)
6505 #define EPWM_CAPIEN_CAPRIEN0_Msk (0x1ul << EPWM_CAPIEN_CAPRIEN0_Pos)
6507 #define EPWM_CAPIEN_CAPRIEN1_Pos (1)
6508 #define EPWM_CAPIEN_CAPRIEN1_Msk (0x1ul << EPWM_CAPIEN_CAPRIEN1_Pos)
6510 #define EPWM_CAPIEN_CAPRIEN2_Pos (2)
6511 #define EPWM_CAPIEN_CAPRIEN2_Msk (0x1ul << EPWM_CAPIEN_CAPRIEN2_Pos)
6513 #define EPWM_CAPIEN_CAPRIEN3_Pos (3)
6514 #define EPWM_CAPIEN_CAPRIEN3_Msk (0x1ul << EPWM_CAPIEN_CAPRIEN3_Pos)
6516 #define EPWM_CAPIEN_CAPRIEN4_Pos (4)
6517 #define EPWM_CAPIEN_CAPRIEN4_Msk (0x1ul << EPWM_CAPIEN_CAPRIEN4_Pos)
6519 #define EPWM_CAPIEN_CAPRIEN5_Pos (5)
6520 #define EPWM_CAPIEN_CAPRIEN5_Msk (0x1ul << EPWM_CAPIEN_CAPRIEN5_Pos)
6522 #define EPWM_CAPIEN_CAPFIEN0_Pos (8)
6523 #define EPWM_CAPIEN_CAPFIEN0_Msk (0x1ul << EPWM_CAPIEN_CAPFIEN0_Pos)
6525 #define EPWM_CAPIEN_CAPFIEN1_Pos (9)
6526 #define EPWM_CAPIEN_CAPFIEN1_Msk (0x1ul << EPWM_CAPIEN_CAPFIEN1_Pos)
6528 #define EPWM_CAPIEN_CAPFIEN2_Pos (10)
6529 #define EPWM_CAPIEN_CAPFIEN2_Msk (0x1ul << EPWM_CAPIEN_CAPFIEN2_Pos)
6531 #define EPWM_CAPIEN_CAPFIEN3_Pos (11)
6532 #define EPWM_CAPIEN_CAPFIEN3_Msk (0x1ul << EPWM_CAPIEN_CAPFIEN3_Pos)
6534 #define EPWM_CAPIEN_CAPFIEN4_Pos (12)
6535 #define EPWM_CAPIEN_CAPFIEN4_Msk (0x1ul << EPWM_CAPIEN_CAPFIEN4_Pos)
6537 #define EPWM_CAPIEN_CAPFIEN5_Pos (13)
6538 #define EPWM_CAPIEN_CAPFIEN5_Msk (0x1ul << EPWM_CAPIEN_CAPFIEN5_Pos)
6540 #define EPWM_CAPIF_CRLIF0_Pos (0)
6541 #define EPWM_CAPIF_CRLIF0_Msk (0x1ul << EPWM_CAPIF_CRLIF0_Pos)
6543 #define EPWM_CAPIF_CRLIF1_Pos (1)
6544 #define EPWM_CAPIF_CRLIF1_Msk (0x1ul << EPWM_CAPIF_CRLIF1_Pos)
6546 #define EPWM_CAPIF_CRLIF2_Pos (2)
6547 #define EPWM_CAPIF_CRLIF2_Msk (0x1ul << EPWM_CAPIF_CRLIF2_Pos)
6549 #define EPWM_CAPIF_CRLIF3_Pos (3)
6550 #define EPWM_CAPIF_CRLIF3_Msk (0x1ul << EPWM_CAPIF_CRLIF3_Pos)
6552 #define EPWM_CAPIF_CRLIF4_Pos (4)
6553 #define EPWM_CAPIF_CRLIF4_Msk (0x1ul << EPWM_CAPIF_CRLIF4_Pos)
6555 #define EPWM_CAPIF_CRLIF5_Pos (5)
6556 #define EPWM_CAPIF_CRLIF5_Msk (0x1ul << EPWM_CAPIF_CRLIF5_Pos)
6558 #define EPWM_CAPIF_CFLIF0_Pos (8)
6559 #define EPWM_CAPIF_CFLIF0_Msk (0x1ul << EPWM_CAPIF_CFLIF0_Pos)
6561 #define EPWM_CAPIF_CFLIF1_Pos (9)
6562 #define EPWM_CAPIF_CFLIF1_Msk (0x1ul << EPWM_CAPIF_CFLIF1_Pos)
6564 #define EPWM_CAPIF_CFLIF2_Pos (10)
6565 #define EPWM_CAPIF_CFLIF2_Msk (0x1ul << EPWM_CAPIF_CFLIF2_Pos)
6567 #define EPWM_CAPIF_CFLIF3_Pos (11)
6568 #define EPWM_CAPIF_CFLIF3_Msk (0x1ul << EPWM_CAPIF_CFLIF3_Pos)
6570 #define EPWM_CAPIF_CFLIF4_Pos (12)
6571 #define EPWM_CAPIF_CFLIF4_Msk (0x1ul << EPWM_CAPIF_CFLIF4_Pos)
6573 #define EPWM_CAPIF_CFLIF5_Pos (13)
6574 #define EPWM_CAPIF_CFLIF5_Msk (0x1ul << EPWM_CAPIF_CFLIF5_Pos)
6576 #define EPWM_PBUF0_PBUF_Pos (0)
6577 #define EPWM_PBUF0_PBUF_Msk (0xfffful << EPWM_PBUF0_PBUF_Pos)
6579 #define EPWM_PBUF1_PBUF_Pos (0)
6580 #define EPWM_PBUF1_PBUF_Msk (0xfffful << EPWM_PBUF1_PBUF_Pos)
6582 #define EPWM_PBUF2_PBUF_Pos (0)
6583 #define EPWM_PBUF2_PBUF_Msk (0xfffful << EPWM_PBUF2_PBUF_Pos)
6585 #define EPWM_PBUF3_PBUF_Pos (0)
6586 #define EPWM_PBUF3_PBUF_Msk (0xfffful << EPWM_PBUF3_PBUF_Pos)
6588 #define EPWM_PBUF4_PBUF_Pos (0)
6589 #define EPWM_PBUF4_PBUF_Msk (0xfffful << EPWM_PBUF4_PBUF_Pos)
6591 #define EPWM_PBUF5_PBUF_Pos (0)
6592 #define EPWM_PBUF5_PBUF_Msk (0xfffful << EPWM_PBUF5_PBUF_Pos)
6594 #define EPWM_CMPBUF0_CMPBUF_Pos (0)
6595 #define EPWM_CMPBUF0_CMPBUF_Msk (0xfffful << EPWM_CMPBUF0_CMPBUF_Pos)
6597 #define EPWM_CMPBUF1_CMPBUF_Pos (0)
6598 #define EPWM_CMPBUF1_CMPBUF_Msk (0xfffful << EPWM_CMPBUF1_CMPBUF_Pos)
6600 #define EPWM_CMPBUF2_CMPBUF_Pos (0)
6601 #define EPWM_CMPBUF2_CMPBUF_Msk (0xfffful << EPWM_CMPBUF2_CMPBUF_Pos)
6603 #define EPWM_CMPBUF3_CMPBUF_Pos (0)
6604 #define EPWM_CMPBUF3_CMPBUF_Msk (0xfffful << EPWM_CMPBUF3_CMPBUF_Pos)
6606 #define EPWM_CMPBUF4_CMPBUF_Pos (0)
6607 #define EPWM_CMPBUF4_CMPBUF_Msk (0xfffful << EPWM_CMPBUF4_CMPBUF_Pos)
6609 #define EPWM_CMPBUF5_CMPBUF_Pos (0)
6610 #define EPWM_CMPBUF5_CMPBUF_Msk (0xfffful << EPWM_CMPBUF5_CMPBUF_Pos)
6612 #define EPWM_CPSCBUF0_1_CPSCBUF_Pos (0)
6613 #define EPWM_CPSCBUF0_1_CPSCBUF_Msk (0xffful << EPWM_CPSCBUF0_1_CPSCBUF_Pos)
6615 #define EPWM_CPSCBUF2_3_CPSCBUF_Pos (0)
6616 #define EPWM_CPSCBUF2_3_CPSCBUF_Msk (0xffful << EPWM_CPSCBUF2_3_CPSCBUF_Pos)
6618 #define EPWM_CPSCBUF4_5_CPSCBUF_Pos (0)
6619 #define EPWM_CPSCBUF4_5_CPSCBUF_Msk (0xffful << EPWM_CPSCBUF4_5_CPSCBUF_Pos)
6621 #define EPWM_FTCBUF0_1_FTCMPBUF_Pos (0)
6622 #define EPWM_FTCBUF0_1_FTCMPBUF_Msk (0xfffful << EPWM_FTCBUF0_1_FTCMPBUF_Pos)
6624 #define EPWM_FTCBUF2_3_FTCMPBUF_Pos (0)
6625 #define EPWM_FTCBUF2_3_FTCMPBUF_Msk (0xfffful << EPWM_FTCBUF2_3_FTCMPBUF_Pos)
6627 #define EPWM_FTCBUF4_5_FTCMPBUF_Pos (0)
6628 #define EPWM_FTCBUF4_5_FTCMPBUF_Msk (0xfffful << EPWM_FTCBUF4_5_FTCMPBUF_Pos)
6630 #define EPWM_FTCI_FTCMU0_Pos (0)
6631 #define EPWM_FTCI_FTCMU0_Msk (0x1ul << EPWM_FTCI_FTCMU0_Pos)
6633 #define EPWM_FTCI_FTCMU2_Pos (1)
6634 #define EPWM_FTCI_FTCMU2_Msk (0x1ul << EPWM_FTCI_FTCMU2_Pos)
6636 #define EPWM_FTCI_FTCMU4_Pos (2)
6637 #define EPWM_FTCI_FTCMU4_Msk (0x1ul << EPWM_FTCI_FTCMU4_Pos)
6639 #define EPWM_FTCI_FTCMD0_Pos (8)
6640 #define EPWM_FTCI_FTCMD0_Msk (0x1ul << EPWM_FTCI_FTCMD0_Pos)
6642 #define EPWM_FTCI_FTCMD2_Pos (9)
6643 #define EPWM_FTCI_FTCMD2_Msk (0x1ul << EPWM_FTCI_FTCMD2_Pos)
6645 #define EPWM_FTCI_FTCMD4_Pos (10)
6646 #define EPWM_FTCI_FTCMD4_Msk (0x1ul << EPWM_FTCI_FTCMD4_Pos) /* EPWM_CONST */
6649 /* end of EPWM register group */ /* end of REGISTER group */
6651
6652 #if defined ( __CC_ARM )
6653 #pragma no_anon_unions
6654 #endif
6655
6656 #endif /* __EPWM_REG_H__ */
EPWM_T::APDMACTL
__IO uint32_t APDMACTL
Definition: epwm_reg.h:4787
EPWM_T
Definition: epwm_reg.h:71
EPWM_T::STATUS
__IO uint32_t STATUS
Definition: epwm_reg.h:4777
EPWM_T::EADCPSCNT0
__IO uint32_t EADCPSCNT0
Definition: epwm_reg.h:4798
EPWM_T::CLKSRC
__IO uint32_t CLKSRC
Definition: epwm_reg.h:4721
EPWM_T::INTSTS0
__IO uint32_t INTSTS0
Definition: epwm_reg.h:4761
EPWM_T::LEBCNT
__IO uint32_t LEBCNT
Definition: epwm_reg.h:4776
EPWM_T::CAPIEN
__IO uint32_t CAPIEN
Definition: epwm_reg.h:4812
EPWM_T::INTSTS1
__IO uint32_t INTSTS1
Definition: epwm_reg.h:4762
EPWM_T::SWBRK
__O uint32_t SWBRK
Definition: epwm_reg.h:4758
EPWM_T::EADCTS1
__IO uint32_t EADCTS1
Definition: epwm_reg.h:4768
EPWM_T::CAPINEN
__IO uint32_t CAPINEN
Definition: epwm_reg.h:4803
EPWM_T::CNTCLR
__IO uint32_t CNTCLR
Definition: epwm_reg.h:4724
EPWM_T::SSCTL
__IO uint32_t SSCTL
Definition: epwm_reg.h:4773
EPWM_T::WGCTL0
__IO uint32_t WGCTL0
Definition: epwm_reg.h:4749
EPWM_T::SSTRG
__O uint32_t SSTRG
Definition: epwm_reg.h:4774
EPWM_T::FDIEN
__IO uint32_t FDIEN
Definition: epwm_reg.h:4793
EPWM_T::SYNC
__IO uint32_t SYNC
Definition: epwm_reg.h:4719
EPWM_T::MSKEN
__IO uint32_t MSKEN
Definition: epwm_reg.h:4751
ECAPDAT_T
Definition: epwm_reg.h:26
EPWM_T::EADCPSCCTL
__IO uint32_t EADCPSCCTL
Definition: epwm_reg.h:4795
EPWM_T::PDMACTL
__IO uint32_t PDMACTL
Definition: epwm_reg.h:4807
EPWM_T::FDSTS
__IO uint32_t FDSTS
Definition: epwm_reg.h:4794
EPWM_T::EADCTS0
__IO uint32_t EADCTS0
Definition: epwm_reg.h:4767
EPWM_T::POLCTL
__IO uint32_t POLCTL
Definition: epwm_reg.h:4756
EPWM_T::CNTEN
__IO uint32_t CNTEN
Definition: epwm_reg.h:4723
EPWM_T::DACTRGEN
__IO uint32_t DACTRGEN
Definition: epwm_reg.h:4766
EPWM_T::WGCTL1
__IO uint32_t WGCTL1
Definition: epwm_reg.h:4750
EPWM_T::LEBCTL
__IO uint32_t LEBCTL
Definition: epwm_reg.h:4775
EPWM_T::CAPCTL
__IO uint32_t CAPCTL
Definition: epwm_reg.h:4804
EPWM_T::AINTSTS
__IO uint32_t AINTSTS
Definition: epwm_reg.h:4785
EPWM_T::CAPSTS
__I uint32_t CAPSTS
Definition: epwm_reg.h:4805
EPWM_T::EADCPSC1
__IO uint32_t EADCPSC1
Definition: epwm_reg.h:4797
EPWM_T::INTEN1
__IO uint32_t INTEN1
Definition: epwm_reg.h:4760
EPWM_T::CTL0
__IO uint32_t CTL0
Definition: epwm_reg.h:4717
ECAPDAT_T::FCAPDAT
__IO uint32_t FCAPDAT
Definition: epwm_reg.h:68
EPWM_T::BNF
__IO uint32_t BNF
Definition: epwm_reg.h:4753
EPWM_T::SWSYNC
__IO uint32_t SWSYNC
Definition: epwm_reg.h:4720
ECAPDAT_T::RCAPDAT
__IO uint32_t RCAPDAT
Definition: epwm_reg.h:67
EPWM_T::FAILBRK
__IO uint32_t FAILBRK
Definition: epwm_reg.h:4754
EPWM_T::CTL1
__IO uint32_t CTL1
Definition: epwm_reg.h:4718
EPWM_T::MSK
__IO uint32_t MSK
Definition: epwm_reg.h:4752
EPWM_T::EADCPSC0
__IO uint32_t EADCPSC0
Definition: epwm_reg.h:4796
EPWM_T::LOAD
__IO uint32_t LOAD
Definition: epwm_reg.h:4725
EPWM_T::INTEN0
__IO uint32_t INTEN0
Definition: epwm_reg.h:4759
EPWM_T::AINTEN
__IO uint32_t AINTEN
Definition: epwm_reg.h:4786
EPWM_T::EADCPSCNT1
__IO uint32_t EADCPSCNT1
Definition: epwm_reg.h:4799
EPWM_T::CAPIF
__IO uint32_t CAPIF
Definition: epwm_reg.h:4813
EPWM_T::FTCI
__IO uint32_t FTCI
Definition: epwm_reg.h:4821
EPWM_T::FDEN
__IO uint32_t FDEN
Definition: epwm_reg.h:4791
EPWM_T::POEN
__IO uint32_t POEN
Definition: epwm_reg.h:4757