| M480 BSP V3.05.001 The Board Support Package for M480 Series

ebi.h
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1 /**************************************************************************/
9 #ifndef __EBI_H__
10 #define __EBI_H__
11
12 #ifdef __cplusplus
13 extern "C"
14 {
15 #endif
16
17
29 /*---------------------------------------------------------------------------------------------------------*/
30 /* Miscellaneous Constant Definitions */
31 /*---------------------------------------------------------------------------------------------------------*/
32 #define EBI_BANK0_BASE_ADDR 0x60000000UL
33 #define EBI_BANK1_BASE_ADDR 0x60100000UL
34 #define EBI_BANK2_BASE_ADDR 0x60200000UL
35 #define EBI_MAX_SIZE 0x00100000UL
37 /*---------------------------------------------------------------------------------------------------------*/
38 /* Constants for EBI bank number */
39 /*---------------------------------------------------------------------------------------------------------*/
40 #define EBI_BANK0 0UL
41 #define EBI_BANK1 1UL
42 #define EBI_BANK2 2UL
44 /*---------------------------------------------------------------------------------------------------------*/
45 /* Constants for EBI data bus width */
46 /*---------------------------------------------------------------------------------------------------------*/
47 #define EBI_BUSWIDTH_8BIT 8UL
48 #define EBI_BUSWIDTH_16BIT 16UL
50 /*---------------------------------------------------------------------------------------------------------*/
51 /* Constants for EBI CS Active Level */
52 /*---------------------------------------------------------------------------------------------------------*/
53 #define EBI_CS_ACTIVE_LOW 0UL
54 #define EBI_CS_ACTIVE_HIGH 1UL
56 /*---------------------------------------------------------------------------------------------------------*/
57 /* Constants for EBI MCLK divider and Timing */
58 /*---------------------------------------------------------------------------------------------------------*/
59 #define EBI_MCLKDIV_1 0x0UL
60 #define EBI_MCLKDIV_2 0x1UL
61 #define EBI_MCLKDIV_4 0x2UL
62 #define EBI_MCLKDIV_8 0x3UL
63 #define EBI_MCLKDIV_16 0x4UL
64 #define EBI_MCLKDIV_32 0x5UL
65 #define EBI_MCLKDIV_64 0x6UL
66 #define EBI_MCLKDIV_128 0x7UL
68 #define EBI_TIMING_FASTEST 0x0UL
69 #define EBI_TIMING_VERYFAST 0x1UL
70 #define EBI_TIMING_FAST 0x2UL
71 #define EBI_TIMING_NORMAL 0x3UL
72 #define EBI_TIMING_SLOW 0x4UL
73 #define EBI_TIMING_VERYSLOW 0x5UL
74 #define EBI_TIMING_SLOWEST 0x6UL
76 #define EBI_OPMODE_NORMAL 0x0UL
77 #define EBI_OPMODE_CACCESS (EBI_CTL_CACCESS_Msk)
78 #define EBI_OPMODE_ADSEPARATE (EBI_CTL_ADSEPEN_Msk)
80 /* end of group EBI_EXPORTED_CONSTANTS */
81
82
97 #define EBI0_READ_DATA8(u32Addr) (*((volatile unsigned char *)(EBI_BANK0_BASE_ADDR+(u32Addr))))
98
110 #define EBI0_WRITE_DATA8(u32Addr, u32Data) (*((volatile unsigned char *)(EBI_BANK0_BASE_ADDR+(u32Addr))) = (u32Data))
111
122 #define EBI0_READ_DATA16(u32Addr) (*((volatile unsigned short *)(EBI_BANK0_BASE_ADDR+(u32Addr))))
123
135 #define EBI0_WRITE_DATA16(u32Addr, u32Data) (*((volatile unsigned short *)(EBI_BANK0_BASE_ADDR+(u32Addr))) = (u32Data))
136
147 #define EBI0_READ_DATA32(u32Addr) (*((volatile unsigned int *)(EBI_BANK0_BASE_ADDR+(u32Addr))))
148
160 #define EBI0_WRITE_DATA32(u32Addr, u32Data) (*((volatile unsigned int *)(EBI_BANK0_BASE_ADDR+(u32Addr))) = (u32Data))
161
172 #define EBI1_READ_DATA8(u32Addr) (*((volatile unsigned char *)(EBI_BANK1_BASE_ADDR+(u32Addr))))
173
185 #define EBI1_WRITE_DATA8(u32Addr, u32Data) (*((volatile unsigned char *)(EBI_BANK1_BASE_ADDR+(u32Addr))) = (u32Data))
186
197 #define EBI1_READ_DATA16(u32Addr) (*((volatile unsigned short *)(EBI_BANK1_BASE_ADDR+(u32Addr))))
198
210 #define EBI1_WRITE_DATA16(u32Addr, u32Data) (*((volatile unsigned short *)(EBI_BANK1_BASE_ADDR+(u32Addr))) = (u32Data))
211
222 #define EBI1_READ_DATA32(u32Addr) (*((volatile unsigned int *)(EBI_BANK1_BASE_ADDR+(u32Addr))))
223
235 #define EBI1_WRITE_DATA32(u32Addr, u32Data) (*((volatile unsigned int *)(EBI_BANK1_BASE_ADDR+(u32Addr))) = (u32Data))
236
247 #define EBI2_READ_DATA8(u32Addr) (*((volatile unsigned char *)(EBI_BANK2_BASE_ADDR+(u32Addr))))
248
260 #define EBI2_WRITE_DATA8(u32Addr, u32Data) (*((volatile unsigned char *)(EBI_BANK2_BASE_ADDR+(u32Addr))) = (u32Data))
261
272 #define EBI2_READ_DATA16(u32Addr) (*((volatile unsigned short *)(EBI_BANK2_BASE_ADDR+(u32Addr))))
273
285 #define EBI2_WRITE_DATA16(u32Addr, u32Data) (*((volatile unsigned short *)(EBI_BANK2_BASE_ADDR+(u32Addr))) = (u32Data))
286
297 #define EBI2_READ_DATA32(u32Addr) (*((volatile unsigned int *)(EBI_BANK2_BASE_ADDR+(u32Addr))))
298
310 #define EBI2_WRITE_DATA32(u32Addr, u32Data) (*((volatile unsigned int *)(EBI_BANK2_BASE_ADDR+(u32Addr))) = (u32Data))
311
322 #define EBI_ENABLE_WRITE_BUFFER() (EBI->CTL0 |= EBI_CTL_WBUFEN_Msk);
323
334 #define EBI_DISABLE_WRITE_BUFFER() (EBI->CTL0 &= ~EBI_CTL_WBUFEN_Msk);
335
336 void EBI_Open(uint32_t u32Bank, uint32_t u32DataWidth, uint32_t u32TimingClass, uint32_t u32BusMode, uint32_t u32CSActiveLevel);
337 void EBI_Close(uint32_t u32Bank);
338 void EBI_SetBusTiming(uint32_t u32Bank, uint32_t u32TimingConfig, uint32_t u32MclkDiv);
339 /* end of group EBI_EXPORTED_FUNCTIONS */
341 /* end of group EBI_Driver */
343 /* end of group Standard_Driver */
345
346 #ifdef __cplusplus
347 }
348 #endif
349
350 #endif
351
352 /*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/
EBI_Close
void EBI_Close(uint32_t u32Bank)
Disable EBI on specify Bank.
Definition: ebi.c:148
EBI_SetBusTiming
void EBI_SetBusTiming(uint32_t u32Bank, uint32_t u32TimingConfig, uint32_t u32MclkDiv)
Set EBI Bus Timing for specify Bank.
Definition: ebi.c:178
EBI_Open
void EBI_Open(uint32_t u32Bank, uint32_t u32DataWidth, uint32_t u32TimingClass, uint32_t u32BusMode, uint32_t u32CSActiveLevel)
Initialize EBI for specify Bank.
Definition: ebi.c:56