| M480 BSP V3.05.001 The Board Support Package for M480 Series

ebi.c
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1 /**************************************************************************/
9 #include "NuMicro.h"
10
56 void EBI_Open(uint32_t u32Bank, uint32_t u32DataWidth, uint32_t u32TimingClass, uint32_t u32BusMode, uint32_t u32CSActiveLevel)
57 {
58 uint32_t u32Index0 = (uint32_t)&EBI->CTL0 + (uint32_t)u32Bank * 0x10U;
59 uint32_t u32Index1 = (uint32_t)&EBI->TCTL0 + (uint32_t)u32Bank * 0x10U;
60 volatile uint32_t *pu32EBICTL = (uint32_t *)( u32Index0 );
61 volatile uint32_t *pu32EBITCTL = (uint32_t *)( u32Index1 );
62
63 if(u32DataWidth == EBI_BUSWIDTH_8BIT)
64 {
65 *pu32EBICTL &= ~EBI_CTL_DW16_Msk;
66 }
67 else
68 {
69 *pu32EBICTL |= EBI_CTL_DW16_Msk;
70 }
71
72 *pu32EBICTL |= u32BusMode;
73
74 switch(u32TimingClass)
75 {
76 case EBI_TIMING_FASTEST:
77 *pu32EBICTL = (*pu32EBICTL & ~(EBI_CTL_MCLKDIV_Msk | EBI_CTL_TALE_Msk)) |
78 (EBI_MCLKDIV_1 << EBI_CTL_MCLKDIV_Pos) |
79 (u32CSActiveLevel << EBI_CTL_CSPOLINV_Pos) | EBI_CTL_EN_Msk;
80 *pu32EBITCTL = 0x0U;
81 break;
82
83 case EBI_TIMING_VERYFAST:
84 *pu32EBICTL = (*pu32EBICTL & ~(EBI_CTL_MCLKDIV_Msk | EBI_CTL_TALE_Msk)) |
85 (EBI_MCLKDIV_1 << EBI_CTL_MCLKDIV_Pos) |
86 (u32CSActiveLevel << EBI_CTL_CSPOLINV_Pos) | EBI_CTL_EN_Msk |
87 (0x3U << EBI_CTL_TALE_Pos) ;
88 *pu32EBITCTL = 0x03003318U;
89 break;
90
91 case EBI_TIMING_FAST:
92 *pu32EBICTL = (*pu32EBICTL & ~(EBI_CTL_MCLKDIV_Msk | EBI_CTL_TALE_Msk)) |
93 (EBI_MCLKDIV_2 << EBI_CTL_MCLKDIV_Pos) |
94 (u32CSActiveLevel << EBI_CTL_CSPOLINV_Pos) | EBI_CTL_EN_Msk;
95 *pu32EBITCTL = 0x0U;
96 break;
97
98 case EBI_TIMING_NORMAL:
99 *pu32EBICTL = (*pu32EBICTL & ~(EBI_CTL_MCLKDIV_Msk | EBI_CTL_TALE_Msk)) |
100 (EBI_MCLKDIV_2 << EBI_CTL_MCLKDIV_Pos) |
101 (u32CSActiveLevel << EBI_CTL_CSPOLINV_Pos) | EBI_CTL_EN_Msk |
102 (0x3U << EBI_CTL_TALE_Pos) ;
103 *pu32EBITCTL = 0x03003318U;
104 break;
105
106 case EBI_TIMING_SLOW:
107 *pu32EBICTL = (*pu32EBICTL & ~(EBI_CTL_MCLKDIV_Msk | EBI_CTL_TALE_Msk)) |
108 (EBI_MCLKDIV_2 << EBI_CTL_MCLKDIV_Pos) |
109 (u32CSActiveLevel << EBI_CTL_CSPOLINV_Pos) | EBI_CTL_EN_Msk |
110 (0x7U << EBI_CTL_TALE_Pos) ;
111 *pu32EBITCTL = 0x07007738U;
112 break;
113
114 case EBI_TIMING_VERYSLOW:
115 *pu32EBICTL = (*pu32EBICTL & ~(EBI_CTL_MCLKDIV_Msk | EBI_CTL_TALE_Msk)) |
116 (EBI_MCLKDIV_4 << EBI_CTL_MCLKDIV_Pos) |
117 (u32CSActiveLevel << EBI_CTL_CSPOLINV_Pos) | EBI_CTL_EN_Msk |
118 (0x7U << EBI_CTL_TALE_Pos) ;
119 *pu32EBITCTL = 0x07007738U;
120 break;
121
122 case EBI_TIMING_SLOWEST:
123 *pu32EBICTL = (*pu32EBICTL & ~(EBI_CTL_MCLKDIV_Msk | EBI_CTL_TALE_Msk)) |
124 (EBI_MCLKDIV_8 << EBI_CTL_MCLKDIV_Pos) |
125 (u32CSActiveLevel << EBI_CTL_CSPOLINV_Pos) | EBI_CTL_EN_Msk |
126 (0x7U << EBI_CTL_TALE_Pos) ;
127 *pu32EBITCTL = 0x07007738U;
128 break;
129
130 default:
131 *pu32EBICTL &= ~EBI_CTL_EN_Msk;
132 break;
133 }
134 }
135
148 void EBI_Close(uint32_t u32Bank)
149 {
150 uint32_t u32Index = (uint32_t)&EBI->CTL0 + u32Bank * 0x10U;
151 volatile uint32_t *pu32EBICTL = (uint32_t *)( u32Index );
152
153 *pu32EBICTL &= ~EBI_CTL_EN_Msk;
154 }
155
178 void EBI_SetBusTiming(uint32_t u32Bank, uint32_t u32TimingConfig, uint32_t u32MclkDiv)
179 {
180 uint32_t u32Index0 = (uint32_t)&EBI->CTL0 + (uint32_t)u32Bank * 0x10U;
181 uint32_t u32Index1 = (uint32_t)&EBI->TCTL0 + (uint32_t)u32Bank * 0x10U;
182 volatile uint32_t *pu32EBICTL = (uint32_t *)( u32Index0 );
183 volatile uint32_t *pu32EBITCTL = (uint32_t *)( u32Index1 );
184
185 *pu32EBICTL = (*pu32EBICTL & ~EBI_CTL_MCLKDIV_Msk) | (u32MclkDiv << EBI_CTL_MCLKDIV_Pos);
186 *pu32EBITCTL = u32TimingConfig;
187 }
188 /* end of group EBI_EXPORTED_FUNCTIONS */
190 /* end of group EBI_Driver */
192 /* end of group Standard_Driver */
194
195 /*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/
EBI_TIMING_NORMAL
#define EBI_TIMING_NORMAL
Definition: ebi.h:71
EBI_Close
void EBI_Close(uint32_t u32Bank)
Disable EBI on specify Bank.
Definition: ebi.c:148
EBI_BUSWIDTH_8BIT
#define EBI_BUSWIDTH_8BIT
Definition: ebi.h:47
EBI_CTL_CSPOLINV_Pos
#define EBI_CTL_CSPOLINV_Pos
Definition: ebi_reg.h:521
EBI_CTL_TALE_Msk
#define EBI_CTL_TALE_Msk
Definition: ebi_reg.h:534
EBI_TIMING_VERYSLOW
#define EBI_TIMING_VERYSLOW
Definition: ebi.h:73
EBI_MCLKDIV_4
#define EBI_MCLKDIV_4
Definition: ebi.h:61
NuMicro.h
NuMicro peripheral access layer header file.
EBI_TIMING_SLOW
#define EBI_TIMING_SLOW
Definition: ebi.h:72
EBI_CTL_MCLKDIV_Pos
#define EBI_CTL_MCLKDIV_Pos
Definition: ebi_reg.h:530
EBI_MCLKDIV_1
#define EBI_MCLKDIV_1
Definition: ebi.h:59
EBI_TIMING_VERYFAST
#define EBI_TIMING_VERYFAST
Definition: ebi.h:69
EBI_CTL_TALE_Pos
#define EBI_CTL_TALE_Pos
Definition: ebi_reg.h:533
EBI_TIMING_SLOWEST
#define EBI_TIMING_SLOWEST
Definition: ebi.h:74
EBI_SetBusTiming
void EBI_SetBusTiming(uint32_t u32Bank, uint32_t u32TimingConfig, uint32_t u32MclkDiv)
Set EBI Bus Timing for specify Bank.
Definition: ebi.c:178
EBI
#define EBI
Definition: M480.h:394
EBI_MCLKDIV_8
#define EBI_MCLKDIV_8
Definition: ebi.h:62
EBI_TIMING_FAST
#define EBI_TIMING_FAST
Definition: ebi.h:70
EBI_MCLKDIV_2
#define EBI_MCLKDIV_2
Definition: ebi.h:60
EBI_CTL_MCLKDIV_Msk
#define EBI_CTL_MCLKDIV_Msk
Definition: ebi_reg.h:531
EBI_TIMING_FASTEST
#define EBI_TIMING_FASTEST
Definition: ebi.h:68
EBI_Open
void EBI_Open(uint32_t u32Bank, uint32_t u32DataWidth, uint32_t u32TimingClass, uint32_t u32BusMode, uint32_t u32CSActiveLevel)
Initialize EBI for specify Bank.
Definition: ebi.c:56
EBI_CTL_DW16_Msk
#define EBI_CTL_DW16_Msk
Definition: ebi_reg.h:519
EBI_CTL_EN_Msk
#define EBI_CTL_EN_Msk
Definition: ebi_reg.h:516