| M480 BSP V3.05.001 The Board Support Package for M480 Series

Data Structures
can_reg.h File Reference

CAN register definition header file. More...

Go to the source code of this file.

## Data Structures
struct | CAN_IF_T
struct | CAN_T

## Macros
#define | CAN_CON_INIT_Pos (0)
#define | CAN_CON_INIT_Msk (0x1ul << CAN_CON_INIT_Pos)
#define | CAN_CON_IE_Pos (1)
#define | CAN_CON_IE_Msk (0x1ul << CAN_CON_IE_Pos)
#define | CAN_CON_SIE_Pos (2)
#define | CAN_CON_SIE_Msk (0x1ul << CAN_CON_SIE_Pos)
#define | CAN_CON_EIE_Pos (3)
#define | CAN_CON_EIE_Msk (0x1ul << CAN_CON_EIE_Pos)
#define | CAN_CON_DAR_Pos (5)
#define | CAN_CON_DAR_Msk (0x1ul << CAN_CON_DAR_Pos)
#define | CAN_CON_CCE_Pos (6)
#define | CAN_CON_CCE_Msk (0x1ul << CAN_CON_CCE_Pos)
#define | CAN_CON_TEST_Pos (7)
#define | CAN_CON_TEST_Msk (0x1ul << CAN_CON_TEST_Pos)
#define | CAN_STATUS_LEC_Pos (0)
#define | CAN_STATUS_LEC_Msk (0x7ul << CAN_STATUS_LEC_Pos)
#define | CAN_STATUS_TXOK_Pos (3)
#define | CAN_STATUS_TXOK_Msk (0x1ul << CAN_STATUS_TXOK_Pos)
#define | CAN_STATUS_RXOK_Pos (4)
#define | CAN_STATUS_RXOK_Msk (0x1ul << CAN_STATUS_RXOK_Pos)
#define | CAN_STATUS_EPASS_Pos (5)
#define | CAN_STATUS_EPASS_Msk (0x1ul << CAN_STATUS_EPASS_Pos)
#define | CAN_STATUS_EWARN_Pos (6)
#define | CAN_STATUS_EWARN_Msk (0x1ul << CAN_STATUS_EWARN_Pos)
#define | CAN_STATUS_BOFF_Pos (7)
#define | CAN_STATUS_BOFF_Msk (0x1ul << CAN_STATUS_BOFF_Pos)
#define | CAN_ERR_TEC_Pos (0)
#define | CAN_ERR_TEC_Msk (0xfful << CAN_ERR_TEC_Pos)
#define | CAN_ERR_REC_Pos (8)
#define | CAN_ERR_REC_Msk (0x7ful << CAN_ERR_REC_Pos)
#define | CAN_ERR_RP_Pos (15)
#define | CAN_ERR_RP_Msk (0x1ul << CAN_ERR_RP_Pos)
#define | CAN_BTIME_BRP_Pos (0)
#define | CAN_BTIME_BRP_Msk (0x3ful << CAN_BTIME_BRP_Pos)
#define | CAN_BTIME_SJW_Pos (6)
#define | CAN_BTIME_SJW_Msk (0x3ul << CAN_BTIME_SJW_Pos)
#define | CAN_BTIME_TSEG1_Pos (8)
#define | CAN_BTIME_TSEG1_Msk (0xful << CAN_BTIME_TSEG1_Pos)
#define | CAN_BTIME_TSEG2_Pos (12)
#define | CAN_BTIME_TSEG2_Msk (0x7ul << CAN_BTIME_TSEG2_Pos)
#define | CAN_IIDR_IntId_Pos (0)
#define | CAN_IIDR_IntId_Msk (0xfffful << CAN_IIDR_IntId_Pos)
#define | CAN_TEST_BASIC_Pos (2)
#define | CAN_TEST_BASIC_Msk (0x1ul << CAN_TEST_BASIC_Pos)
#define | CAN_TEST_SILENT_Pos (3)
#define | CAN_TEST_SILENT_Msk (0x1ul << CAN_TEST_SILENT_Pos)
#define | CAN_TEST_LBACK_Pos (4)
#define | CAN_TEST_LBACK_Msk (0x1ul << CAN_TEST_LBACK_Pos)
#define | CAN_TEST_Tx_Pos (5)
#define | CAN_TEST_Tx_Msk (0x3ul << CAN_TEST_Tx_Pos)
#define | CAN_TEST_Rx_Pos (7)
#define | CAN_TEST_Rx_Msk (0x1ul << CAN_TEST_Rx_Pos)
#define | CAN_BRPE_BRPE_Pos (0)
#define | CAN_BRPE_BRPE_Msk (0xful << CAN_BRPE_BRPE_Pos)
#define | CAN_IF_CREQ_MSGNUM_Pos (0)
#define | CAN_IF_CREQ_MSGNUM_Msk (0x3ful << CAN_IF_CREQ_MSGNUM_Pos)
#define | CAN_IF_CREQ_BUSY_Pos (15)
#define | CAN_IF_CREQ_BUSY_Msk (0x1ul << CAN_IF_CREQ_BUSY_Pos)
#define | CAN_IF_CMASK_DATAB_Pos (0)
#define | CAN_IF_CMASK_DATAB_Msk (0x1ul << CAN_IF_CMASK_DATAB_Pos)
#define | CAN_IF_CMASK_DATAA_Pos (1)
#define | CAN_IF_CMASK_DATAA_Msk (0x1ul << CAN_IF_CMASK_DATAA_Pos)
#define | CAN_IF_CMASK_TXRQSTNEWDAT_Pos (2)
#define | CAN_IF_CMASK_TXRQSTNEWDAT_Msk (0x1ul << CAN_IF_CMASK_TXRQSTNEWDAT_Pos)
#define | CAN_IF_CMASK_CLRINTPND_Pos (3)
#define | CAN_IF_CMASK_CLRINTPND_Msk (0x1ul << CAN_IF_CMASK_CLRINTPND_Pos)
#define | CAN_IF_CMASK_CONTROL_Pos (4)
#define | CAN_IF_CMASK_CONTROL_Msk (0x1ul << CAN_IF_CMASK_CONTROL_Pos)
#define | CAN_IF_CMASK_ARB_Pos (5)
#define | CAN_IF_CMASK_ARB_Msk (0x1ul << CAN_IF_CMASK_ARB_Pos)
#define | CAN_IF_CMASK_MASK_Pos (6)
#define | CAN_IF_CMASK_MASK_Msk (0x1ul << CAN_IF_CMASK_MASK_Pos)
#define | CAN_IF_CMASK_WRRD_Pos (7)
#define | CAN_IF_CMASK_WRRD_Msk (0x1ul << CAN_IF_CMASK_WRRD_Pos)
#define | CAN_IF_MASK1_Msk_Pos (0)
#define | CAN_IF_MASK1_Msk_Msk (0xfffful << CAN_IF_MASK1_Msk_Pos)
#define | CAN_IF_MASK2_Msk_Pos (0)
#define | CAN_IF_MASK2_Msk_Msk (0x1ffful << CAN_IF_MASK2_Msk_Pos)
#define | CAN_IF_MASK2_MDIR_Pos (14)
#define | CAN_IF_MASK2_MDIR_Msk (0x1ul << CAN_IF_MASK2_MDIR_Pos)
#define | CAN_IF_MASK2_MXTD_Pos (15)
#define | CAN_IF_MASK2_MXTD_Msk (0x1ul << CAN_IF_MASK2_MXTD_Pos)
#define | CAN_IF_ARB1_ID_Pos (0)
#define | CAN_IF_ARB1_ID_Msk (0xfffful << CAN_IF_ARB1_ID_Pos)
#define | CAN_IF_ARB2_ID_Pos (0)
#define | CAN_IF_ARB2_ID_Msk (0x1ffful << CAN_IF_ARB2_ID_Pos)
#define | CAN_IF_ARB2_DIR_Pos (13)
#define | CAN_IF_ARB2_DIR_Msk (0x1ul << CAN_IF_ARB2_DIR_Pos)
#define | CAN_IF_ARB2_XTD_Pos (14)
#define | CAN_IF_ARB2_XTD_Msk (0x1ul << CAN_IF_ARB2_XTD_Pos)
#define | CAN_IF_ARB2_MSGVAL_Pos (15)
#define | CAN_IF_ARB2_MSGVAL_Msk (0x1ul << CAN_IF_ARB2_MSGVAL_Pos)
#define | CAN_IF_MCON_DLC_Pos (0)
#define | CAN_IF_MCON_DLC_Msk (0xful << CAN_IF_MCON_DLC_Pos)
#define | CAN_IF_MCON_EOB_Pos (7)
#define | CAN_IF_MCON_EOB_Msk (0x1ul << CAN_IF_MCON_EOB_Pos)
#define | CAN_IF_MCON_TxRqst_Pos (8)
#define | CAN_IF_MCON_TxRqst_Msk (0x1ul << CAN_IF_MCON_TxRqst_Pos)
#define | CAN_IF_MCON_RmtEn_Pos (9)
#define | CAN_IF_MCON_RmtEn_Msk (0x1ul << CAN_IF_MCON_RmtEn_Pos)
#define | CAN_IF_MCON_RXIE_Pos (10)
#define | CAN_IF_MCON_RXIE_Msk (0x1ul << CAN_IF_MCON_RXIE_Pos)
#define | CAN_IF_MCON_TXIE_Pos (11)
#define | CAN_IF_MCON_TXIE_Msk (0x1ul << CAN_IF_MCON_TXIE_Pos)
#define | CAN_IF_MCON_UMASK_Pos (12)
#define | CAN_IF_MCON_UMASK_Msk (0x1ul << CAN_IF_MCON_UMASK_Pos)
#define | CAN_IF_MCON_IntPnd_Pos (13)
#define | CAN_IF_MCON_IntPnd_Msk (0x1ul << CAN_IF_MCON_IntPnd_Pos)
#define | CAN_IF_MCON_MsgLst_Pos (14)
#define | CAN_IF_MCON_MsgLst_Msk (0x1ul << CAN_IF_MCON_MsgLst_Pos)
#define | CAN_IF_MCON_NEWDAT_Pos (15)
#define | CAN_IF_MCON_NEWDAT_Msk (0x1ul << CAN_IF_MCON_NEWDAT_Pos)
#define | CAN_IF_DAT_A1_DATA0_Pos (0)
#define | CAN_IF_DAT_A1_DATA0_Msk (0xfful << CAN_IF_DAT_A1_DATA0_Pos)
#define | CAN_IF_DAT_A1_DATA1_Pos (8)
#define | CAN_IF_DAT_A1_DATA1_Msk (0xfful << CAN_IF_DAT_A1_DATA1_Pos)
#define | CAN_IF_DAT_A2_DATA2_Pos (0)
#define | CAN_IF_DAT_A2_DATA2_Msk (0xfful << CAN_IF_DAT_A2_DATA2_Pos)
#define | CAN_IF_DAT_A2_DATA3_Pos (8)
#define | CAN_IF_DAT_A2_DATA3_Msk (0xfful << CAN_IF_DAT_A2_DATA3_Pos)
#define | CAN_IF_DAT_B1_DATA4_Pos (0)
#define | CAN_IF_DAT_B1_DATA4_Msk (0xfful << CAN_IF_DAT_B1_DATA4_Pos)
#define | CAN_IF_DAT_B1_DATA5_Pos (8)
#define | CAN_IF_DAT_B1_DATA5_Msk (0xfful << CAN_IF_DAT_B1_DATA5_Pos)
#define | CAN_IF_DAT_B2_DATA6_Pos (0)
#define | CAN_IF_DAT_B2_DATA6_Msk (0xfful << CAN_IF_DAT_B2_DATA6_Pos)
#define | CAN_IF_DAT_B2_DATA7_Pos (8)
#define | CAN_IF_DAT_B2_DATA7_Msk (0xfful << CAN_IF_DAT_B2_DATA7_Pos)
#define | CAN_TXREQ1_TXRQST16_1_Pos (0)
#define | CAN_TXREQ1_TXRQST16_1_Msk (0xfffful << CAN_TXREQ1_TXRQST16_1_Pos)
#define | CAN_TXREQ2_TXRQST32_17_Pos (0)
#define | CAN_TXREQ2_TXRQST32_17_Msk (0xfffful << CAN_TXREQ2_TXRQST32_17_Pos)
#define | CAN_NDAT1_NewData16_1_Pos (0)
#define | CAN_NDAT1_NewData16_1_Msk (0xfffful << CAN_NDAT1_NewData16_1_Pos)
#define | CAN_NDAT2_NewData32_17_Pos (0)
#define | CAN_NDAT2_NewData32_17_Msk (0xfffful << CAN_NDAT2_NewData32_17_Pos)
#define | CAN_IPND1_IntPnd16_1_Pos (0)
#define | CAN_IPND1_IntPnd16_1_Msk (0xfffful << CAN_IPND1_IntPnd16_1_Pos)
#define | CAN_IPND2_IntPnd32_17_Pos (0)
#define | CAN_IPND2_IntPnd32_17_Msk (0xfffful << CAN_IPND2_IntPnd32_17_Pos)
#define | CAN_MVLD1_MsgVal16_1_Pos (0)
#define | CAN_MVLD1_MsgVal16_1_Msk (0xfffful << CAN_MVLD1_MsgVal16_1_Pos)
#define | CAN_MVLD2_MsgVal32_17_Pos (0)
#define | CAN_MVLD2_MsgVal32_17_Msk (0xfffful << CAN_MVLD2_MsgVal32_17_Pos)
#define | CAN_WU_EN_WAKUP_EN_Pos (0)
#define | CAN_WU_EN_WAKUP_EN_Msk (0x1ul << CAN_WU_EN_WAKUP_EN_Pos)
#define | CAN_WU_STATUS_WAKUP_STS_Pos (0)
#define | CAN_WU_STATUS_WAKUP_STS_Msk (0x1ul << CAN_WU_STATUS_WAKUP_STS_Pos)

## Detailed Description

CAN register definition header file.

Version
  V1.00 SPDX-License-Identifier: Apache-2.0

Copyright
  (C) 2017-2020 Nuvoton Technology Corp. All rights reserved.

Definition in file can_reg.h.