| M480 BSP V3.05.001 The Board Support Package for M480 Series

Data Structures
eadc_reg.h File Reference

EADC register definition header file. More...

Go to the source code of this file.

## Data Structures
struct | EADC_T

## Macros
#define | EADC_DAT_RESULT_Pos (0)
#define | EADC_DAT_RESULT_Msk (0xfffful << EADC_DAT_RESULT_Pos)
#define | EADC_DAT_OV_Pos (16)
#define | EADC_DAT_OV_Msk (0x1ul << EADC_DAT_OV_Pos)
#define | EADC_DAT_VALID_Pos (17)
#define | EADC_DAT_VALID_Msk (0x1ul << EADC_DAT_VALID_Pos)
#define | EADC_DAT0_RESULT_Pos (0)
#define | EADC_DAT0_RESULT_Msk (0xfffful << EADC_DAT0_RESULT_Pos)
#define | EADC_DAT0_OV_Pos (16)
#define | EADC_DAT0_OV_Msk (0x1ul << EADC_DAT0_OV_Pos)
#define | EADC_DAT0_VALID_Pos (17)
#define | EADC_DAT0_VALID_Msk (0x1ul << EADC_DAT0_VALID_Pos)
#define | EADC_DAT1_RESULT_Pos (0)
#define | EADC_DAT1_RESULT_Msk (0xfffful << EADC_DAT1_RESULT_Pos)
#define | EADC_DAT1_OV_Pos (16)
#define | EADC_DAT1_OV_Msk (0x1ul << EADC_DAT1_OV_Pos)
#define | EADC_DAT1_VALID_Pos (17)
#define | EADC_DAT1_VALID_Msk (0x1ul << EADC_DAT1_VALID_Pos)
#define | EADC_DAT2_RESULT_Pos (0)
#define | EADC_DAT2_RESULT_Msk (0xfffful << EADC_DAT2_RESULT_Pos)
#define | EADC_DAT2_OV_Pos (16)
#define | EADC_DAT2_OV_Msk (0x1ul << EADC_DAT2_OV_Pos)
#define | EADC_DAT2_VALID_Pos (17)
#define | EADC_DAT2_VALID_Msk (0x1ul << EADC_DAT2_VALID_Pos)
#define | EADC_DAT3_RESULT_Pos (0)
#define | EADC_DAT3_RESULT_Msk (0xfffful << EADC_DAT3_RESULT_Pos)
#define | EADC_DAT3_OV_Pos (16)
#define | EADC_DAT3_OV_Msk (0x1ul << EADC_DAT3_OV_Pos)
#define | EADC_DAT3_VALID_Pos (17)
#define | EADC_DAT3_VALID_Msk (0x1ul << EADC_DAT3_VALID_Pos)
#define | EADC_DAT4_RESULT_Pos (0)
#define | EADC_DAT4_RESULT_Msk (0xfffful << EADC_DAT4_RESULT_Pos)
#define | EADC_DAT4_OV_Pos (16)
#define | EADC_DAT4_OV_Msk (0x1ul << EADC_DAT4_OV_Pos)
#define | EADC_DAT4_VALID_Pos (17)
#define | EADC_DAT4_VALID_Msk (0x1ul << EADC_DAT4_VALID_Pos)
#define | EADC_DAT5_RESULT_Pos (0)
#define | EADC_DAT5_RESULT_Msk (0xfffful << EADC_DAT5_RESULT_Pos)
#define | EADC_DAT5_OV_Pos (16)
#define | EADC_DAT5_OV_Msk (0x1ul << EADC_DAT5_OV_Pos)
#define | EADC_DAT5_VALID_Pos (17)
#define | EADC_DAT5_VALID_Msk (0x1ul << EADC_DAT5_VALID_Pos)
#define | EADC_DAT6_RESULT_Pos (0)
#define | EADC_DAT6_RESULT_Msk (0xfffful << EADC_DAT6_RESULT_Pos)
#define | EADC_DAT6_OV_Pos (16)
#define | EADC_DAT6_OV_Msk (0x1ul << EADC_DAT6_OV_Pos)
#define | EADC_DAT6_VALID_Pos (17)
#define | EADC_DAT6_VALID_Msk (0x1ul << EADC_DAT6_VALID_Pos)
#define | EADC_DAT7_RESULT_Pos (0)
#define | EADC_DAT7_RESULT_Msk (0xfffful << EADC_DAT7_RESULT_Pos)
#define | EADC_DAT7_OV_Pos (16)
#define | EADC_DAT7_OV_Msk (0x1ul << EADC_DAT7_OV_Pos)
#define | EADC_DAT7_VALID_Pos (17)
#define | EADC_DAT7_VALID_Msk (0x1ul << EADC_DAT7_VALID_Pos)
#define | EADC_DAT8_RESULT_Pos (0)
#define | EADC_DAT8_RESULT_Msk (0xfffful << EADC_DAT8_RESULT_Pos)
#define | EADC_DAT8_OV_Pos (16)
#define | EADC_DAT8_OV_Msk (0x1ul << EADC_DAT8_OV_Pos)
#define | EADC_DAT8_VALID_Pos (17)
#define | EADC_DAT8_VALID_Msk (0x1ul << EADC_DAT8_VALID_Pos)
#define | EADC_DAT9_RESULT_Pos (0)
#define | EADC_DAT9_RESULT_Msk (0xfffful << EADC_DAT9_RESULT_Pos)
#define | EADC_DAT9_OV_Pos (16)
#define | EADC_DAT9_OV_Msk (0x1ul << EADC_DAT9_OV_Pos)
#define | EADC_DAT9_VALID_Pos (17)
#define | EADC_DAT9_VALID_Msk (0x1ul << EADC_DAT9_VALID_Pos)
#define | EADC_DAT10_RESULT_Pos (0)
#define | EADC_DAT10_RESULT_Msk (0xfffful << EADC_DAT10_RESULT_Pos)
#define | EADC_DAT10_OV_Pos (16)
#define | EADC_DAT10_OV_Msk (0x1ul << EADC_DAT10_OV_Pos)
#define | EADC_DAT10_VALID_Pos (17)
#define | EADC_DAT10_VALID_Msk (0x1ul << EADC_DAT10_VALID_Pos)
#define | EADC_DAT11_RESULT_Pos (0)
#define | EADC_DAT11_RESULT_Msk (0xfffful << EADC_DAT11_RESULT_Pos)
#define | EADC_DAT11_OV_Pos (16)
#define | EADC_DAT11_OV_Msk (0x1ul << EADC_DAT11_OV_Pos)
#define | EADC_DAT11_VALID_Pos (17)
#define | EADC_DAT11_VALID_Msk (0x1ul << EADC_DAT11_VALID_Pos)
#define | EADC_DAT12_RESULT_Pos (0)
#define | EADC_DAT12_RESULT_Msk (0xfffful << EADC_DAT12_RESULT_Pos)
#define | EADC_DAT12_OV_Pos (16)
#define | EADC_DAT12_OV_Msk (0x1ul << EADC_DAT12_OV_Pos)
#define | EADC_DAT12_VALID_Pos (17)
#define | EADC_DAT12_VALID_Msk (0x1ul << EADC_DAT12_VALID_Pos)
#define | EADC_DAT13_RESULT_Pos (0)
#define | EADC_DAT13_RESULT_Msk (0xfffful << EADC_DAT13_RESULT_Pos)
#define | EADC_DAT13_OV_Pos (16)
#define | EADC_DAT13_OV_Msk (0x1ul << EADC_DAT13_OV_Pos)
#define | EADC_DAT13_VALID_Pos (17)
#define | EADC_DAT13_VALID_Msk (0x1ul << EADC_DAT13_VALID_Pos)
#define | EADC_DAT14_RESULT_Pos (0)
#define | EADC_DAT14_RESULT_Msk (0xfffful << EADC_DAT14_RESULT_Pos)
#define | EADC_DAT14_OV_Pos (16)
#define | EADC_DAT14_OV_Msk (0x1ul << EADC_DAT14_OV_Pos)
#define | EADC_DAT14_VALID_Pos (17)
#define | EADC_DAT14_VALID_Msk (0x1ul << EADC_DAT14_VALID_Pos)
#define | EADC_DAT15_RESULT_Pos (0)
#define | EADC_DAT15_RESULT_Msk (0xfffful << EADC_DAT15_RESULT_Pos)
#define | EADC_DAT15_OV_Pos (16)
#define | EADC_DAT15_OV_Msk (0x1ul << EADC_DAT15_OV_Pos)
#define | EADC_DAT15_VALID_Pos (17)
#define | EADC_DAT15_VALID_Msk (0x1ul << EADC_DAT15_VALID_Pos)
#define | EADC_DAT16_RESULT_Pos (0)
#define | EADC_DAT16_RESULT_Msk (0xfffful << EADC_DAT16_RESULT_Pos)
#define | EADC_DAT16_OV_Pos (16)
#define | EADC_DAT16_OV_Msk (0x1ul << EADC_DAT16_OV_Pos)
#define | EADC_DAT16_VALID_Pos (17)
#define | EADC_DAT16_VALID_Msk (0x1ul << EADC_DAT16_VALID_Pos)
#define | EADC_DAT17_RESULT_Pos (0)
#define | EADC_DAT17_RESULT_Msk (0xfffful << EADC_DAT17_RESULT_Pos)
#define | EADC_DAT17_OV_Pos (16)
#define | EADC_DAT17_OV_Msk (0x1ul << EADC_DAT17_OV_Pos)
#define | EADC_DAT17_VALID_Pos (17)
#define | EADC_DAT17_VALID_Msk (0x1ul << EADC_DAT17_VALID_Pos)
#define | EADC_DAT18_RESULT_Pos (0)
#define | EADC_DAT18_RESULT_Msk (0xfffful << EADC_DAT18_RESULT_Pos)
#define | EADC_DAT18_OV_Pos (16)
#define | EADC_DAT18_OV_Msk (0x1ul << EADC_DAT18_OV_Pos)
#define | EADC_DAT18_VALID_Pos (17)
#define | EADC_DAT18_VALID_Msk (0x1ul << EADC_DAT18_VALID_Pos)
#define | EADC_CURDAT_CURDAT_Pos (0)
#define | EADC_CURDAT_CURDAT_Msk (0x3fffful << EADC_CURDAT_CURDAT_Pos)
#define | EADC_CTL_ADCEN_Pos (0)
#define | EADC_CTL_ADCEN_Msk (0x1ul << EADC_CTL_ADCEN_Pos)
#define | EADC_CTL_ADCRST_Pos (1)
#define | EADC_CTL_ADCRST_Msk (0x1ul << EADC_CTL_ADCRST_Pos)
#define | EADC_CTL_ADCIEN0_Pos (2)
#define | EADC_CTL_ADCIEN0_Msk (0x1ul << EADC_CTL_ADCIEN0_Pos)
#define | EADC_CTL_ADCIEN1_Pos (3)
#define | EADC_CTL_ADCIEN1_Msk (0x1ul << EADC_CTL_ADCIEN1_Pos)
#define | EADC_CTL_ADCIEN2_Pos (4)
#define | EADC_CTL_ADCIEN2_Msk (0x1ul << EADC_CTL_ADCIEN2_Pos)
#define | EADC_CTL_ADCIEN3_Pos (5)
#define | EADC_CTL_ADCIEN3_Msk (0x1ul << EADC_CTL_ADCIEN3_Pos)
#define | EADC_CTL_RESSEL_Pos (6)
#define | EADC_CTL_RESSEL_Msk (0x3ul << EADC_CTL_RESSEL_Pos)
#define | EADC_CTL_DIFFEN_Pos (8)
#define | EADC_CTL_DIFFEN_Msk (0x1ul << EADC_CTL_DIFFEN_Pos)
#define | EADC_CTL_DMOF_Pos (9)
#define | EADC_CTL_DMOF_Msk (0x1ul << EADC_CTL_DMOF_Pos)
#define | EADC_CTL_PDMAEN_Pos (11)
#define | EADC_CTL_PDMAEN_Msk (0x1ul << EADC_CTL_PDMAEN_Pos)
#define | EADC_SWTRG_SWTRG_Pos (0)
#define | EADC_SWTRG_SWTRG_Msk (0x7fffful << EADC_SWTRG_SWTRG_Pos)
#define | EADC_PENDSTS_STPF_Pos (0)
#define | EADC_PENDSTS_STPF_Msk (0x7fffful << EADC_PENDSTS_STPF_Pos)
#define | EADC_OVSTS_SPOVF_Pos (0)
#define | EADC_OVSTS_SPOVF_Msk (0x7fffful << EADC_OVSTS_SPOVF_Pos)
#define | EADC_SCTL_CHSEL_Pos (0)
#define | EADC_SCTL_CHSEL_Msk (0xful << EADC_SCTL_CHSEL_Pos)
#define | EADC_SCTL_EXTREN_Pos (4)
#define | EADC_SCTL_EXTREN_Msk (0x1ul << EADC_SCTL_EXTREN_Pos)
#define | EADC_SCTL_EXTFEN_Pos (5)
#define | EADC_SCTL_EXTFEN_Msk (0x1ul << EADC_SCTL_EXTFEN_Pos)
#define | EADC_SCTL_TRGDLYDIV_Pos (6)
#define | EADC_SCTL_TRGDLYDIV_Msk (0x3ul << EADC_SCTL_TRGDLYDIV_Pos)
#define | EADC_SCTL_TRGDLYCNT_Pos (8)
#define | EADC_SCTL_TRGDLYCNT_Msk (0xfful << EADC_SCTL_TRGDLYCNT_Pos)
#define | EADC_SCTL_TRGSEL_Pos (16)
#define | EADC_SCTL_TRGSEL_Msk (0x1ful << EADC_SCTL_TRGSEL_Pos)
#define | EADC_SCTL_INTPOS_Pos (22)
#define | EADC_SCTL_INTPOS_Msk (0x1ul << EADC_SCTL_INTPOS_Pos)
#define | EADC_SCTL_DBMEN_Pos (23)
#define | EADC_SCTL_DBMEN_Msk (0x1ul << EADC_SCTL_DBMEN_Pos)
#define | EADC_SCTL_EXTSMPT_Pos (24)
#define | EADC_SCTL_EXTSMPT_Msk (0xfful << EADC_SCTL_EXTSMPT_Pos)
#define | EADC_SCTL0_CHSEL_Pos (0)
#define | EADC_SCTL0_CHSEL_Msk (0xful << EADC_SCTL0_CHSEL_Pos)
#define | EADC_SCTL0_EXTREN_Pos (4)
#define | EADC_SCTL0_EXTREN_Msk (0x1ul << EADC_SCTL0_EXTREN_Pos)
#define | EADC_SCTL0_EXTFEN_Pos (5)
#define | EADC_SCTL0_EXTFEN_Msk (0x1ul << EADC_SCTL0_EXTFEN_Pos)
#define | EADC_SCTL0_TRGDLYDIV_Pos (6)
#define | EADC_SCTL0_TRGDLYDIV_Msk (0x3ul << EADC_SCTL0_TRGDLYDIV_Pos)
#define | EADC_SCTL0_TRGDLYCNT_Pos (8)
#define | EADC_SCTL0_TRGDLYCNT_Msk (0xfful << EADC_SCTL0_TRGDLYCNT_Pos)
#define | EADC_SCTL0_TRGSEL_Pos (16)
#define | EADC_SCTL0_TRGSEL_Msk (0x1ful << EADC_SCTL0_TRGSEL_Pos)
#define | EADC_SCTL0_INTPOS_Pos (22)
#define | EADC_SCTL0_INTPOS_Msk (0x1ul << EADC_SCTL0_INTPOS_Pos)
#define | EADC_SCTL0_DBMEN_Pos (23)
#define | EADC_SCTL0_DBMEN_Msk (0x1ul << EADC_SCTL0_DBMEN_Pos)
#define | EADC_SCTL0_EXTSMPT_Pos (24)
#define | EADC_SCTL0_EXTSMPT_Msk (0xfful << EADC_SCTL0_EXTSMPT_Pos)
#define | EADC_SCTL1_CHSEL_Pos (0)
#define | EADC_SCTL1_CHSEL_Msk (0xful << EADC_SCTL1_CHSEL_Pos)
#define | EADC_SCTL1_EXTREN_Pos (4)
#define | EADC_SCTL1_EXTREN_Msk (0x1ul << EADC_SCTL1_EXTREN_Pos)
#define | EADC_SCTL1_EXTFEN_Pos (5)
#define | EADC_SCTL1_EXTFEN_Msk (0x1ul << EADC_SCTL1_EXTFEN_Pos)
#define | EADC_SCTL1_TRGDLYDIV_Pos (6)
#define | EADC_SCTL1_TRGDLYDIV_Msk (0x3ul << EADC_SCTL1_TRGDLYDIV_Pos)
#define | EADC_SCTL1_TRGDLYCNT_Pos (8)
#define | EADC_SCTL1_TRGDLYCNT_Msk (0xfful << EADC_SCTL1_TRGDLYCNT_Pos)
#define | EADC_SCTL1_TRGSEL_Pos (16)
#define | EADC_SCTL1_TRGSEL_Msk (0x1ful << EADC_SCTL1_TRGSEL_Pos)
#define | EADC_SCTL1_INTPOS_Pos (22)
#define | EADC_SCTL1_INTPOS_Msk (0x1ul << EADC_SCTL1_INTPOS_Pos)
#define | EADC_SCTL1_DBMEN_Pos (23)
#define | EADC_SCTL1_DBMEN_Msk (0x1ul << EADC_SCTL1_DBMEN_Pos)
#define | EADC_SCTL1_EXTSMPT_Pos (24)
#define | EADC_SCTL1_EXTSMPT_Msk (0xfful << EADC_SCTL1_EXTSMPT_Pos)
#define | EADC_SCTL2_CHSEL_Pos (0)
#define | EADC_SCTL2_CHSEL_Msk (0xful << EADC_SCTL2_CHSEL_Pos)
#define | EADC_SCTL2_EXTREN_Pos (4)
#define | EADC_SCTL2_EXTREN_Msk (0x1ul << EADC_SCTL2_EXTREN_Pos)
#define | EADC_SCTL2_EXTFEN_Pos (5)
#define | EADC_SCTL2_EXTFEN_Msk (0x1ul << EADC_SCTL2_EXTFEN_Pos)
#define | EADC_SCTL2_TRGDLYDIV_Pos (6)
#define | EADC_SCTL2_TRGDLYDIV_Msk (0x3ul << EADC_SCTL2_TRGDLYDIV_Pos)
#define | EADC_SCTL2_TRGDLYCNT_Pos (8)
#define | EADC_SCTL2_TRGDLYCNT_Msk (0xfful << EADC_SCTL2_TRGDLYCNT_Pos)
#define | EADC_SCTL2_TRGSEL_Pos (16)
#define | EADC_SCTL2_TRGSEL_Msk (0x1ful << EADC_SCTL2_TRGSEL_Pos)
#define | EADC_SCTL2_INTPOS_Pos (22)
#define | EADC_SCTL2_INTPOS_Msk (0x1ul << EADC_SCTL2_INTPOS_Pos)
#define | EADC_SCTL2_DBMEN_Pos (23)
#define | EADC_SCTL2_DBMEN_Msk (0x1ul << EADC_SCTL2_DBMEN_Pos)
#define | EADC_SCTL2_EXTSMPT_Pos (24)
#define | EADC_SCTL2_EXTSMPT_Msk (0xfful << EADC_SCTL2_EXTSMPT_Pos)
#define | EADC_SCTL3_CHSEL_Pos (0)
#define | EADC_SCTL3_CHSEL_Msk (0xful << EADC_SCTL3_CHSEL_Pos)
#define | EADC_SCTL3_EXTREN_Pos (4)
#define | EADC_SCTL3_EXTREN_Msk (0x1ul << EADC_SCTL3_EXTREN_Pos)
#define | EADC_SCTL3_EXTFEN_Pos (5)
#define | EADC_SCTL3_EXTFEN_Msk (0x1ul << EADC_SCTL3_EXTFEN_Pos)
#define | EADC_SCTL3_TRGDLYDIV_Pos (6)
#define | EADC_SCTL3_TRGDLYDIV_Msk (0x3ul << EADC_SCTL3_TRGDLYDIV_Pos)
#define | EADC_SCTL3_TRGDLYCNT_Pos (8)
#define | EADC_SCTL3_TRGDLYCNT_Msk (0xfful << EADC_SCTL3_TRGDLYCNT_Pos)
#define | EADC_SCTL3_TRGSEL_Pos (16)
#define | EADC_SCTL3_TRGSEL_Msk (0x1ful << EADC_SCTL3_TRGSEL_Pos)
#define | EADC_SCTL3_INTPOS_Pos (22)
#define | EADC_SCTL3_INTPOS_Msk (0x1ul << EADC_SCTL3_INTPOS_Pos)
#define | EADC_SCTL3_DBMEN_Pos (23)
#define | EADC_SCTL3_DBMEN_Msk (0x1ul << EADC_SCTL3_DBMEN_Pos)
#define | EADC_SCTL3_EXTSMPT_Pos (24)
#define | EADC_SCTL3_EXTSMPT_Msk (0xfful << EADC_SCTL3_EXTSMPT_Pos)
#define | EADC_SCTL4_CHSEL_Pos (0)
#define | EADC_SCTL4_CHSEL_Msk (0xful << EADC_SCTL4_CHSEL_Pos)
#define | EADC_SCTL4_EXTREN_Pos (4)
#define | EADC_SCTL4_EXTREN_Msk (0x1ul << EADC_SCTL4_EXTREN_Pos)
#define | EADC_SCTL4_EXTFEN_Pos (5)
#define | EADC_SCTL4_EXTFEN_Msk (0x1ul << EADC_SCTL4_EXTFEN_Pos)
#define | EADC_SCTL4_TRGDLYDIV_Pos (6)
#define | EADC_SCTL4_TRGDLYDIV_Msk (0x3ul << EADC_SCTL4_TRGDLYDIV_Pos)
#define | EADC_SCTL4_TRGDLYCNT_Pos (8)
#define | EADC_SCTL4_TRGDLYCNT_Msk (0xfful << EADC_SCTL4_TRGDLYCNT_Pos)
#define | EADC_SCTL4_TRGSEL_Pos (16)
#define | EADC_SCTL4_TRGSEL_Msk (0x1ful << EADC_SCTL4_TRGSEL_Pos)
#define | EADC_SCTL4_INTPOS_Pos (22)
#define | EADC_SCTL4_INTPOS_Msk (0x1ul << EADC_SCTL4_INTPOS_Pos)
#define | EADC_SCTL4_EXTSMPT_Pos (24)
#define | EADC_SCTL4_EXTSMPT_Msk (0xfful << EADC_SCTL4_EXTSMPT_Pos)
#define | EADC_SCTL5_CHSEL_Pos (0)
#define | EADC_SCTL5_CHSEL_Msk (0xful << EADC_SCTL5_CHSEL_Pos)
#define | EADC_SCTL5_EXTREN_Pos (4)
#define | EADC_SCTL5_EXTREN_Msk (0x1ul << EADC_SCTL5_EXTREN_Pos)
#define | EADC_SCTL5_EXTFEN_Pos (5)
#define | EADC_SCTL5_EXTFEN_Msk (0x1ul << EADC_SCTL5_EXTFEN_Pos)
#define | EADC_SCTL5_TRGDLYDIV_Pos (6)
#define | EADC_SCTL5_TRGDLYDIV_Msk (0x3ul << EADC_SCTL5_TRGDLYDIV_Pos)
#define | EADC_SCTL5_TRGDLYCNT_Pos (8)
#define | EADC_SCTL5_TRGDLYCNT_Msk (0xfful << EADC_SCTL5_TRGDLYCNT_Pos)
#define | EADC_SCTL5_TRGSEL_Pos (16)
#define | EADC_SCTL5_TRGSEL_Msk (0x1ful << EADC_SCTL5_TRGSEL_Pos)
#define | EADC_SCTL5_INTPOS_Pos (22)
#define | EADC_SCTL5_INTPOS_Msk (0x1ul << EADC_SCTL5_INTPOS_Pos)
#define | EADC_SCTL5_EXTSMPT_Pos (24)
#define | EADC_SCTL5_EXTSMPT_Msk (0xfful << EADC_SCTL5_EXTSMPT_Pos)
#define | EADC_SCTL6_CHSEL_Pos (0)
#define | EADC_SCTL6_CHSEL_Msk (0xful << EADC_SCTL6_CHSEL_Pos)
#define | EADC_SCTL6_EXTREN_Pos (4)
#define | EADC_SCTL6_EXTREN_Msk (0x1ul << EADC_SCTL6_EXTREN_Pos)
#define | EADC_SCTL6_EXTFEN_Pos (5)
#define | EADC_SCTL6_EXTFEN_Msk (0x1ul << EADC_SCTL6_EXTFEN_Pos)
#define | EADC_SCTL6_TRGDLYDIV_Pos (6)
#define | EADC_SCTL6_TRGDLYDIV_Msk (0x3ul << EADC_SCTL6_TRGDLYDIV_Pos)
#define | EADC_SCTL6_TRGDLYCNT_Pos (8)
#define | EADC_SCTL6_TRGDLYCNT_Msk (0xfful << EADC_SCTL6_TRGDLYCNT_Pos)
#define | EADC_SCTL6_TRGSEL_Pos (16)
#define | EADC_SCTL6_TRGSEL_Msk (0x1ful << EADC_SCTL6_TRGSEL_Pos)
#define | EADC_SCTL6_INTPOS_Pos (22)
#define | EADC_SCTL6_INTPOS_Msk (0x1ul << EADC_SCTL6_INTPOS_Pos)
#define | EADC_SCTL6_EXTSMPT_Pos (24)
#define | EADC_SCTL6_EXTSMPT_Msk (0xfful << EADC_SCTL6_EXTSMPT_Pos)
#define | EADC_SCTL7_CHSEL_Pos (0)
#define | EADC_SCTL7_CHSEL_Msk (0xful << EADC_SCTL7_CHSEL_Pos)
#define | EADC_SCTL7_EXTREN_Pos (4)
#define | EADC_SCTL7_EXTREN_Msk (0x1ul << EADC_SCTL7_EXTREN_Pos)
#define | EADC_SCTL7_EXTFEN_Pos (5)
#define | EADC_SCTL7_EXTFEN_Msk (0x1ul << EADC_SCTL7_EXTFEN_Pos)
#define | EADC_SCTL7_TRGDLYDIV_Pos (6)
#define | EADC_SCTL7_TRGDLYDIV_Msk (0x3ul << EADC_SCTL7_TRGDLYDIV_Pos)
#define | EADC_SCTL7_TRGDLYCNT_Pos (8)
#define | EADC_SCTL7_TRGDLYCNT_Msk (0xfful << EADC_SCTL7_TRGDLYCNT_Pos)
#define | EADC_SCTL7_TRGSEL_Pos (16)
#define | EADC_SCTL7_TRGSEL_Msk (0x1ful << EADC_SCTL7_TRGSEL_Pos)
#define | EADC_SCTL7_INTPOS_Pos (22)
#define | EADC_SCTL7_INTPOS_Msk (0x1ul << EADC_SCTL7_INTPOS_Pos)
#define | EADC_SCTL7_EXTSMPT_Pos (24)
#define | EADC_SCTL7_EXTSMPT_Msk (0xfful << EADC_SCTL7_EXTSMPT_Pos)
#define | EADC_SCTL8_CHSEL_Pos (0)
#define | EADC_SCTL8_CHSEL_Msk (0xful << EADC_SCTL8_CHSEL_Pos)
#define | EADC_SCTL8_EXTREN_Pos (4)
#define | EADC_SCTL8_EXTREN_Msk (0x1ul << EADC_SCTL8_EXTREN_Pos)
#define | EADC_SCTL8_EXTFEN_Pos (5)
#define | EADC_SCTL8_EXTFEN_Msk (0x1ul << EADC_SCTL8_EXTFEN_Pos)
#define | EADC_SCTL8_TRGDLYDIV_Pos (6)
#define | EADC_SCTL8_TRGDLYDIV_Msk (0x3ul << EADC_SCTL8_TRGDLYDIV_Pos)
#define | EADC_SCTL8_TRGDLYCNT_Pos (8)
#define | EADC_SCTL8_TRGDLYCNT_Msk (0xfful << EADC_SCTL8_TRGDLYCNT_Pos)
#define | EADC_SCTL8_TRGSEL_Pos (16)
#define | EADC_SCTL8_TRGSEL_Msk (0x1ful << EADC_SCTL8_TRGSEL_Pos)
#define | EADC_SCTL8_INTPOS_Pos (22)
#define | EADC_SCTL8_INTPOS_Msk (0x1ul << EADC_SCTL8_INTPOS_Pos)
#define | EADC_SCTL8_EXTSMPT_Pos (24)
#define | EADC_SCTL8_EXTSMPT_Msk (0xfful << EADC_SCTL8_EXTSMPT_Pos)
#define | EADC_SCTL9_CHSEL_Pos (0)
#define | EADC_SCTL9_CHSEL_Msk (0xful << EADC_SCTL9_CHSEL_Pos)
#define | EADC_SCTL9_EXTREN_Pos (4)
#define | EADC_SCTL9_EXTREN_Msk (0x1ul << EADC_SCTL9_EXTREN_Pos)
#define | EADC_SCTL9_EXTFEN_Pos (5)
#define | EADC_SCTL9_EXTFEN_Msk (0x1ul << EADC_SCTL9_EXTFEN_Pos)
#define | EADC_SCTL9_TRGDLYDIV_Pos (6)
#define | EADC_SCTL9_TRGDLYDIV_Msk (0x3ul << EADC_SCTL9_TRGDLYDIV_Pos)
#define | EADC_SCTL9_TRGDLYCNT_Pos (8)
#define | EADC_SCTL9_TRGDLYCNT_Msk (0xfful << EADC_SCTL9_TRGDLYCNT_Pos)
#define | EADC_SCTL9_TRGSEL_Pos (16)
#define | EADC_SCTL9_TRGSEL_Msk (0x1ful << EADC_SCTL9_TRGSEL_Pos)
#define | EADC_SCTL9_INTPOS_Pos (22)
#define | EADC_SCTL9_INTPOS_Msk (0x1ul << EADC_SCTL9_INTPOS_Pos)
#define | EADC_SCTL9_EXTSMPT_Pos (24)
#define | EADC_SCTL9_EXTSMPT_Msk (0xfful << EADC_SCTL9_EXTSMPT_Pos)
#define | EADC_SCTL10_CHSEL_Pos (0)
#define | EADC_SCTL10_CHSEL_Msk (0xful << EADC_SCTL10_CHSEL_Pos)
#define | EADC_SCTL10_EXTREN_Pos (4)
#define | EADC_SCTL10_EXTREN_Msk (0x1ul << EADC_SCTL10_EXTREN_Pos)
#define | EADC_SCTL10_EXTFEN_Pos (5)
#define | EADC_SCTL10_EXTFEN_Msk (0x1ul << EADC_SCTL10_EXTFEN_Pos)
#define | EADC_SCTL10_TRGDLYDIV_Pos (6)
#define | EADC_SCTL10_TRGDLYDIV_Msk (0x3ul << EADC_SCTL10_TRGDLYDIV_Pos)
#define | EADC_SCTL10_TRGDLYCNT_Pos (8)
#define | EADC_SCTL10_TRGDLYCNT_Msk (0xfful << EADC_SCTL10_TRGDLYCNT_Pos)
#define | EADC_SCTL10_TRGSEL_Pos (16)
#define | EADC_SCTL10_TRGSEL_Msk (0x1ful << EADC_SCTL10_TRGSEL_Pos)
#define | EADC_SCTL10_INTPOS_Pos (22)
#define | EADC_SCTL10_INTPOS_Msk (0x1ul << EADC_SCTL10_INTPOS_Pos)
#define | EADC_SCTL10_EXTSMPT_Pos (24)
#define | EADC_SCTL10_EXTSMPT_Msk (0xfful << EADC_SCTL10_EXTSMPT_Pos)
#define | EADC_SCTL11_CHSEL_Pos (0)
#define | EADC_SCTL11_CHSEL_Msk (0xful << EADC_SCTL11_CHSEL_Pos)
#define | EADC_SCTL11_EXTREN_Pos (4)
#define | EADC_SCTL11_EXTREN_Msk (0x1ul << EADC_SCTL11_EXTREN_Pos)
#define | EADC_SCTL11_EXTFEN_Pos (5)
#define | EADC_SCTL11_EXTFEN_Msk (0x1ul << EADC_SCTL11_EXTFEN_Pos)
#define | EADC_SCTL11_TRGDLYDIV_Pos (6)
#define | EADC_SCTL11_TRGDLYDIV_Msk (0x3ul << EADC_SCTL11_TRGDLYDIV_Pos)
#define | EADC_SCTL11_TRGDLYCNT_Pos (8)
#define | EADC_SCTL11_TRGDLYCNT_Msk (0xfful << EADC_SCTL11_TRGDLYCNT_Pos)
#define | EADC_SCTL11_TRGSEL_Pos (16)
#define | EADC_SCTL11_TRGSEL_Msk (0x1ful << EADC_SCTL11_TRGSEL_Pos)
#define | EADC_SCTL11_INTPOS_Pos (22)
#define | EADC_SCTL11_INTPOS_Msk (0x1ul << EADC_SCTL11_INTPOS_Pos)
#define | EADC_SCTL11_EXTSMPT_Pos (24)
#define | EADC_SCTL11_EXTSMPT_Msk (0xfful << EADC_SCTL11_EXTSMPT_Pos)
#define | EADC_SCTL12_CHSEL_Pos (0)
#define | EADC_SCTL12_CHSEL_Msk (0xful << EADC_SCTL12_CHSEL_Pos)
#define | EADC_SCTL12_EXTREN_Pos (4)
#define | EADC_SCTL12_EXTREN_Msk (0x1ul << EADC_SCTL12_EXTREN_Pos)
#define | EADC_SCTL12_EXTFEN_Pos (5)
#define | EADC_SCTL12_EXTFEN_Msk (0x1ul << EADC_SCTL12_EXTFEN_Pos)
#define | EADC_SCTL12_TRGDLYDIV_Pos (6)
#define | EADC_SCTL12_TRGDLYDIV_Msk (0x3ul << EADC_SCTL12_TRGDLYDIV_Pos)
#define | EADC_SCTL12_TRGDLYCNT_Pos (8)
#define | EADC_SCTL12_TRGDLYCNT_Msk (0xfful << EADC_SCTL12_TRGDLYCNT_Pos)
#define | EADC_SCTL12_TRGSEL_Pos (16)
#define | EADC_SCTL12_TRGSEL_Msk (0x1ful << EADC_SCTL12_TRGSEL_Pos)
#define | EADC_SCTL12_INTPOS_Pos (22)
#define | EADC_SCTL12_INTPOS_Msk (0x1ul << EADC_SCTL12_INTPOS_Pos)
#define | EADC_SCTL12_EXTSMPT_Pos (24)
#define | EADC_SCTL12_EXTSMPT_Msk (0xfful << EADC_SCTL12_EXTSMPT_Pos)
#define | EADC_SCTL13_CHSEL_Pos (0)
#define | EADC_SCTL13_CHSEL_Msk (0xful << EADC_SCTL13_CHSEL_Pos)
#define | EADC_SCTL13_EXTREN_Pos (4)
#define | EADC_SCTL13_EXTREN_Msk (0x1ul << EADC_SCTL13_EXTREN_Pos)
#define | EADC_SCTL13_EXTFEN_Pos (5)
#define | EADC_SCTL13_EXTFEN_Msk (0x1ul << EADC_SCTL13_EXTFEN_Pos)
#define | EADC_SCTL13_TRGDLYDIV_Pos (6)
#define | EADC_SCTL13_TRGDLYDIV_Msk (0x3ul << EADC_SCTL13_TRGDLYDIV_Pos)
#define | EADC_SCTL13_TRGDLYCNT_Pos (8)
#define | EADC_SCTL13_TRGDLYCNT_Msk (0xfful << EADC_SCTL13_TRGDLYCNT_Pos)
#define | EADC_SCTL13_TRGSEL_Pos (16)
#define | EADC_SCTL13_TRGSEL_Msk (0x1ful << EADC_SCTL13_TRGSEL_Pos)
#define | EADC_SCTL13_INTPOS_Pos (22)
#define | EADC_SCTL13_INTPOS_Msk (0x1ul << EADC_SCTL13_INTPOS_Pos)
#define | EADC_SCTL13_EXTSMPT_Pos (24)
#define | EADC_SCTL13_EXTSMPT_Msk (0xfful << EADC_SCTL13_EXTSMPT_Pos)
#define | EADC_SCTL14_CHSEL_Pos (0)
#define | EADC_SCTL14_CHSEL_Msk (0xful << EADC_SCTL14_CHSEL_Pos)
#define | EADC_SCTL14_EXTREN_Pos (4)
#define | EADC_SCTL14_EXTREN_Msk (0x1ul << EADC_SCTL14_EXTREN_Pos)
#define | EADC_SCTL14_EXTFEN_Pos (5)
#define | EADC_SCTL14_EXTFEN_Msk (0x1ul << EADC_SCTL14_EXTFEN_Pos)
#define | EADC_SCTL14_TRGDLYDIV_Pos (6)
#define | EADC_SCTL14_TRGDLYDIV_Msk (0x3ul << EADC_SCTL14_TRGDLYDIV_Pos)
#define | EADC_SCTL14_TRGDLYCNT_Pos (8)
#define | EADC_SCTL14_TRGDLYCNT_Msk (0xfful << EADC_SCTL14_TRGDLYCNT_Pos)
#define | EADC_SCTL14_TRGSEL_Pos (16)
#define | EADC_SCTL14_TRGSEL_Msk (0x1ful << EADC_SCTL14_TRGSEL_Pos)
#define | EADC_SCTL14_INTPOS_Pos (22)
#define | EADC_SCTL14_INTPOS_Msk (0x1ul << EADC_SCTL14_INTPOS_Pos)
#define | EADC_SCTL14_EXTSMPT_Pos (24)
#define | EADC_SCTL14_EXTSMPT_Msk (0xfful << EADC_SCTL14_EXTSMPT_Pos)
#define | EADC_SCTL15_CHSEL_Pos (0)
#define | EADC_SCTL15_CHSEL_Msk (0xful << EADC_SCTL15_CHSEL_Pos)
#define | EADC_SCTL15_EXTREN_Pos (4)
#define | EADC_SCTL15_EXTREN_Msk (0x1ul << EADC_SCTL15_EXTREN_Pos)
#define | EADC_SCTL15_EXTFEN_Pos (5)
#define | EADC_SCTL15_EXTFEN_Msk (0x1ul << EADC_SCTL15_EXTFEN_Pos)
#define | EADC_SCTL15_TRGDLYDIV_Pos (6)
#define | EADC_SCTL15_TRGDLYDIV_Msk (0x3ul << EADC_SCTL15_TRGDLYDIV_Pos)
#define | EADC_SCTL15_TRGDLYCNT_Pos (8)
#define | EADC_SCTL15_TRGDLYCNT_Msk (0xfful << EADC_SCTL15_TRGDLYCNT_Pos)
#define | EADC_SCTL15_TRGSEL_Pos (16)
#define | EADC_SCTL15_TRGSEL_Msk (0x1ful << EADC_SCTL15_TRGSEL_Pos)
#define | EADC_SCTL15_INTPOS_Pos (22)
#define | EADC_SCTL15_INTPOS_Msk (0x1ul << EADC_SCTL15_INTPOS_Pos)
#define | EADC_SCTL15_EXTSMPT_Pos (24)
#define | EADC_SCTL15_EXTSMPT_Msk (0xfful << EADC_SCTL15_EXTSMPT_Pos)
#define | EADC_SCTL16_EXTSMPT_Pos (24)
#define | EADC_SCTL16_EXTSMPT_Msk (0xfful << EADC_SCTL16_EXTSMPT_Pos)
#define | EADC_SCTL17_EXTSMPT_Pos (24)
#define | EADC_SCTL17_EXTSMPT_Msk (0xfful << EADC_SCTL17_EXTSMPT_Pos)
#define | EADC_SCTL18_EXTSMPT_Pos (24)
#define | EADC_SCTL18_EXTSMPT_Msk (0xfful << EADC_SCTL18_EXTSMPT_Pos)
#define | EADC_INTSRC0_SPLIE0_Pos (0)
#define | EADC_INTSRC0_SPLIE0_Msk (0x1ul << EADC_INTSRC0_SPLIE0_Pos)
#define | EADC_INTSRC0_SPLIE1_Pos (1)
#define | EADC_INTSRC0_SPLIE1_Msk (0x1ul << EADC_INTSRC0_SPLIE1_Pos)
#define | EADC_INTSRC0_SPLIE2_Pos (2)
#define | EADC_INTSRC0_SPLIE2_Msk (0x1ul << EADC_INTSRC0_SPLIE2_Pos)
#define | EADC_INTSRC0_SPLIE3_Pos (3)
#define | EADC_INTSRC0_SPLIE3_Msk (0x1ul << EADC_INTSRC0_SPLIE3_Pos)
#define | EADC_INTSRC0_SPLIE4_Pos (4)
#define | EADC_INTSRC0_SPLIE4_Msk (0x1ul << EADC_INTSRC0_SPLIE4_Pos)
#define | EADC_INTSRC0_SPLIE5_Pos (5)
#define | EADC_INTSRC0_SPLIE5_Msk (0x1ul << EADC_INTSRC0_SPLIE5_Pos)
#define | EADC_INTSRC0_SPLIE6_Pos (6)
#define | EADC_INTSRC0_SPLIE6_Msk (0x1ul << EADC_INTSRC0_SPLIE6_Pos)
#define | EADC_INTSRC0_SPLIE7_Pos (7)
#define | EADC_INTSRC0_SPLIE7_Msk (0x1ul << EADC_INTSRC0_SPLIE7_Pos)
#define | EADC_INTSRC0_SPLIE8_Pos (8)
#define | EADC_INTSRC0_SPLIE8_Msk (0x1ul << EADC_INTSRC0_SPLIE8_Pos)
#define | EADC_INTSRC0_SPLIE9_Pos (9)
#define | EADC_INTSRC0_SPLIE9_Msk (0x1ul << EADC_INTSRC0_SPLIE9_Pos)
#define | EADC_INTSRC0_SPLIE10_Pos (10)
#define | EADC_INTSRC0_SPLIE10_Msk (0x1ul << EADC_INTSRC0_SPLIE10_Pos)
#define | EADC_INTSRC0_SPLIE11_Pos (11)
#define | EADC_INTSRC0_SPLIE11_Msk (0x1ul << EADC_INTSRC0_SPLIE11_Pos)
#define | EADC_INTSRC0_SPLIE12_Pos (12)
#define | EADC_INTSRC0_SPLIE12_Msk (0x1ul << EADC_INTSRC0_SPLIE12_Pos)
#define | EADC_INTSRC0_SPLIE13_Pos (13)
#define | EADC_INTSRC0_SPLIE13_Msk (0x1ul << EADC_INTSRC0_SPLIE13_Pos)
#define | EADC_INTSRC0_SPLIE14_Pos (14)
#define | EADC_INTSRC0_SPLIE14_Msk (0x1ul << EADC_INTSRC0_SPLIE14_Pos)
#define | EADC_INTSRC0_SPLIE15_Pos (15)
#define | EADC_INTSRC0_SPLIE15_Msk (0x1ul << EADC_INTSRC0_SPLIE15_Pos)
#define | EADC_INTSRC0_SPLIE16_Pos (16)
#define | EADC_INTSRC0_SPLIE16_Msk (0x1ul << EADC_INTSRC0_SPLIE16_Pos)
#define | EADC_INTSRC0_SPLIE17_Pos (17)
#define | EADC_INTSRC0_SPLIE17_Msk (0x1ul << EADC_INTSRC0_SPLIE17_Pos)
#define | EADC_INTSRC0_SPLIE18_Pos (18)
#define | EADC_INTSRC0_SPLIE18_Msk (0x1ul << EADC_INTSRC0_SPLIE18_Pos)
#define | EADC_INTSRC1_SPLIE0_Pos (0)
#define | EADC_INTSRC1_SPLIE0_Msk (0x1ul << EADC_INTSRC1_SPLIE0_Pos)
#define | EADC_INTSRC1_SPLIE1_Pos (1)
#define | EADC_INTSRC1_SPLIE1_Msk (0x1ul << EADC_INTSRC1_SPLIE1_Pos)
#define | EADC_INTSRC1_SPLIE2_Pos (2)
#define | EADC_INTSRC1_SPLIE2_Msk (0x1ul << EADC_INTSRC1_SPLIE2_Pos)
#define | EADC_INTSRC1_SPLIE3_Pos (3)
#define | EADC_INTSRC1_SPLIE3_Msk (0x1ul << EADC_INTSRC1_SPLIE3_Pos)
#define | EADC_INTSRC1_SPLIE4_Pos (4)
#define | EADC_INTSRC1_SPLIE4_Msk (0x1ul << EADC_INTSRC1_SPLIE4_Pos)
#define | EADC_INTSRC1_SPLIE5_Pos (5)
#define | EADC_INTSRC1_SPLIE5_Msk (0x1ul << EADC_INTSRC1_SPLIE5_Pos)
#define | EADC_INTSRC1_SPLIE6_Pos (6)
#define | EADC_INTSRC1_SPLIE6_Msk (0x1ul << EADC_INTSRC1_SPLIE6_Pos)
#define | EADC_INTSRC1_SPLIE7_Pos (7)
#define | EADC_INTSRC1_SPLIE7_Msk (0x1ul << EADC_INTSRC1_SPLIE7_Pos)
#define | EADC_INTSRC1_SPLIE8_Pos (8)
#define | EADC_INTSRC1_SPLIE8_Msk (0x1ul << EADC_INTSRC1_SPLIE8_Pos)
#define | EADC_INTSRC1_SPLIE9_Pos (9)
#define | EADC_INTSRC1_SPLIE9_Msk (0x1ul << EADC_INTSRC1_SPLIE9_Pos)
#define | EADC_INTSRC1_SPLIE10_Pos (10)
#define | EADC_INTSRC1_SPLIE10_Msk (0x1ul << EADC_INTSRC1_SPLIE10_Pos)
#define | EADC_INTSRC1_SPLIE11_Pos (11)
#define | EADC_INTSRC1_SPLIE11_Msk (0x1ul << EADC_INTSRC1_SPLIE11_Pos)
#define | EADC_INTSRC1_SPLIE12_Pos (12)
#define | EADC_INTSRC1_SPLIE12_Msk (0x1ul << EADC_INTSRC1_SPLIE12_Pos)
#define | EADC_INTSRC1_SPLIE13_Pos (13)
#define | EADC_INTSRC1_SPLIE13_Msk (0x1ul << EADC_INTSRC1_SPLIE13_Pos)
#define | EADC_INTSRC1_SPLIE14_Pos (14)
#define | EADC_INTSRC1_SPLIE14_Msk (0x1ul << EADC_INTSRC1_SPLIE14_Pos)
#define | EADC_INTSRC1_SPLIE15_Pos (15)
#define | EADC_INTSRC1_SPLIE15_Msk (0x1ul << EADC_INTSRC1_SPLIE15_Pos)
#define | EADC_INTSRC1_SPLIE16_Pos (16)
#define | EADC_INTSRC1_SPLIE16_Msk (0x1ul << EADC_INTSRC1_SPLIE16_Pos)
#define | EADC_INTSRC1_SPLIE17_Pos (17)
#define | EADC_INTSRC1_SPLIE17_Msk (0x1ul << EADC_INTSRC1_SPLIE17_Pos)
#define | EADC_INTSRC1_SPLIE18_Pos (18)
#define | EADC_INTSRC1_SPLIE18_Msk (0x1ul << EADC_INTSRC1_SPLIE18_Pos)
#define | EADC_INTSRC2_SPLIE0_Pos (0)
#define | EADC_INTSRC2_SPLIE0_Msk (0x1ul << EADC_INTSRC2_SPLIE0_Pos)
#define | EADC_INTSRC2_SPLIE1_Pos (1)
#define | EADC_INTSRC2_SPLIE1_Msk (0x1ul << EADC_INTSRC2_SPLIE1_Pos)
#define | EADC_INTSRC2_SPLIE2_Pos (2)
#define | EADC_INTSRC2_SPLIE2_Msk (0x1ul << EADC_INTSRC2_SPLIE2_Pos)
#define | EADC_INTSRC2_SPLIE3_Pos (3)
#define | EADC_INTSRC2_SPLIE3_Msk (0x1ul << EADC_INTSRC2_SPLIE3_Pos)
#define | EADC_INTSRC2_SPLIE4_Pos (4)
#define | EADC_INTSRC2_SPLIE4_Msk (0x1ul << EADC_INTSRC2_SPLIE4_Pos)
#define | EADC_INTSRC2_SPLIE5_Pos (5)
#define | EADC_INTSRC2_SPLIE5_Msk (0x1ul << EADC_INTSRC2_SPLIE5_Pos)
#define | EADC_INTSRC2_SPLIE6_Pos (6)
#define | EADC_INTSRC2_SPLIE6_Msk (0x1ul << EADC_INTSRC2_SPLIE6_Pos)
#define | EADC_INTSRC2_SPLIE7_Pos (7)
#define | EADC_INTSRC2_SPLIE7_Msk (0x1ul << EADC_INTSRC2_SPLIE7_Pos)
#define | EADC_INTSRC2_SPLIE8_Pos (8)
#define | EADC_INTSRC2_SPLIE8_Msk (0x1ul << EADC_INTSRC2_SPLIE8_Pos)
#define | EADC_INTSRC2_SPLIE9_Pos (9)
#define | EADC_INTSRC2_SPLIE9_Msk (0x1ul << EADC_INTSRC2_SPLIE9_Pos)
#define | EADC_INTSRC2_SPLIE10_Pos (10)
#define | EADC_INTSRC2_SPLIE10_Msk (0x1ul << EADC_INTSRC2_SPLIE10_Pos)
#define | EADC_INTSRC2_SPLIE11_Pos (11)
#define | EADC_INTSRC2_SPLIE11_Msk (0x1ul << EADC_INTSRC2_SPLIE11_Pos)
#define | EADC_INTSRC2_SPLIE12_Pos (12)
#define | EADC_INTSRC2_SPLIE12_Msk (0x1ul << EADC_INTSRC2_SPLIE12_Pos)
#define | EADC_INTSRC2_SPLIE13_Pos (13)
#define | EADC_INTSRC2_SPLIE13_Msk (0x1ul << EADC_INTSRC2_SPLIE13_Pos)
#define | EADC_INTSRC2_SPLIE14_Pos (14)
#define | EADC_INTSRC2_SPLIE14_Msk (0x1ul << EADC_INTSRC2_SPLIE14_Pos)
#define | EADC_INTSRC2_SPLIE15_Pos (15)
#define | EADC_INTSRC2_SPLIE15_Msk (0x1ul << EADC_INTSRC2_SPLIE15_Pos)
#define | EADC_INTSRC2_SPLIE16_Pos (16)
#define | EADC_INTSRC2_SPLIE16_Msk (0x1ul << EADC_INTSRC2_SPLIE16_Pos)
#define | EADC_INTSRC2_SPLIE17_Pos (17)
#define | EADC_INTSRC2_SPLIE17_Msk (0x1ul << EADC_INTSRC2_SPLIE17_Pos)
#define | EADC_INTSRC2_SPLIE18_Pos (18)
#define | EADC_INTSRC2_SPLIE18_Msk (0x1ul << EADC_INTSRC2_SPLIE18_Pos)
#define | EADC_INTSRC3_SPLIE0_Pos (0)
#define | EADC_INTSRC3_SPLIE0_Msk (0x1ul << EADC_INTSRC3_SPLIE0_Pos)
#define | EADC_INTSRC3_SPLIE1_Pos (1)
#define | EADC_INTSRC3_SPLIE1_Msk (0x1ul << EADC_INTSRC3_SPLIE1_Pos)
#define | EADC_INTSRC3_SPLIE2_Pos (2)
#define | EADC_INTSRC3_SPLIE2_Msk (0x1ul << EADC_INTSRC3_SPLIE2_Pos)
#define | EADC_INTSRC3_SPLIE3_Pos (3)
#define | EADC_INTSRC3_SPLIE3_Msk (0x1ul << EADC_INTSRC3_SPLIE3_Pos)
#define | EADC_INTSRC3_SPLIE4_Pos (4)
#define | EADC_INTSRC3_SPLIE4_Msk (0x1ul << EADC_INTSRC3_SPLIE4_Pos)
#define | EADC_INTSRC3_SPLIE5_Pos (5)
#define | EADC_INTSRC3_SPLIE5_Msk (0x1ul << EADC_INTSRC3_SPLIE5_Pos)
#define | EADC_INTSRC3_SPLIE6_Pos (6)
#define | EADC_INTSRC3_SPLIE6_Msk (0x1ul << EADC_INTSRC3_SPLIE6_Pos)
#define | EADC_INTSRC3_SPLIE7_Pos (7)
#define | EADC_INTSRC3_SPLIE7_Msk (0x1ul << EADC_INTSRC3_SPLIE7_Pos)
#define | EADC_INTSRC3_SPLIE8_Pos (8)
#define | EADC_INTSRC3_SPLIE8_Msk (0x1ul << EADC_INTSRC3_SPLIE8_Pos)
#define | EADC_INTSRC3_SPLIE9_Pos (9)
#define | EADC_INTSRC3_SPLIE9_Msk (0x1ul << EADC_INTSRC3_SPLIE9_Pos)
#define | EADC_INTSRC3_SPLIE10_Pos (10)
#define | EADC_INTSRC3_SPLIE10_Msk (0x1ul << EADC_INTSRC3_SPLIE10_Pos)
#define | EADC_INTSRC3_SPLIE11_Pos (11)
#define | EADC_INTSRC3_SPLIE11_Msk (0x1ul << EADC_INTSRC3_SPLIE11_Pos)
#define | EADC_INTSRC3_SPLIE12_Pos (12)
#define | EADC_INTSRC3_SPLIE12_Msk (0x1ul << EADC_INTSRC3_SPLIE12_Pos)
#define | EADC_INTSRC3_SPLIE13_Pos (13)
#define | EADC_INTSRC3_SPLIE13_Msk (0x1ul << EADC_INTSRC3_SPLIE13_Pos)
#define | EADC_INTSRC3_SPLIE14_Pos (14)
#define | EADC_INTSRC3_SPLIE14_Msk (0x1ul << EADC_INTSRC3_SPLIE14_Pos)
#define | EADC_INTSRC3_SPLIE15_Pos (15)
#define | EADC_INTSRC3_SPLIE15_Msk (0x1ul << EADC_INTSRC3_SPLIE15_Pos)
#define | EADC_INTSRC3_SPLIE16_Pos (16)
#define | EADC_INTSRC3_SPLIE16_Msk (0x1ul << EADC_INTSRC3_SPLIE16_Pos)
#define | EADC_INTSRC3_SPLIE17_Pos (17)
#define | EADC_INTSRC3_SPLIE17_Msk (0x1ul << EADC_INTSRC3_SPLIE17_Pos)
#define | EADC_INTSRC3_SPLIE18_Pos (18)
#define | EADC_INTSRC3_SPLIE18_Msk (0x1ul << EADC_INTSRC3_SPLIE18_Pos)
#define | EADC_CMP_ADCMPEN_Pos (0)
#define | EADC_CMP_ADCMPEN_Msk (0x1ul << EADC_CMP_ADCMPEN_Pos)
#define | EADC_CMP_ADCMPIE_Pos (1)
#define | EADC_CMP_ADCMPIE_Msk (0x1ul << EADC_CMP_ADCMPIE_Pos)
#define | EADC_CMP_CMPCOND_Pos (2)
#define | EADC_CMP_CMPCOND_Msk (0x1ul << EADC_CMP_CMPCOND_Pos)
#define | EADC_CMP_CMPSPL_Pos (3)
#define | EADC_CMP_CMPSPL_Msk (0x1ful << EADC_CMP_CMPSPL_Pos)
#define | EADC_CMP_CMPMCNT_Pos (8)
#define | EADC_CMP_CMPMCNT_Msk (0xful << EADC_CMP_CMPMCNT_Pos)
#define | EADC_CMP_CMPWEN_Pos (15)
#define | EADC_CMP_CMPWEN_Msk (0x1ul << EADC_CMP_CMPWEN_Pos)
#define | EADC_CMP_CMPDAT_Pos (16)
#define | EADC_CMP_CMPDAT_Msk (0xffful << EADC_CMP_CMPDAT_Pos)
#define | EADC_CMP0_ADCMPEN_Pos (0)
#define | EADC_CMP0_ADCMPEN_Msk (0x1ul << EADC_CMP0_ADCMPEN_Pos)
#define | EADC_CMP0_ADCMPIE_Pos (1)
#define | EADC_CMP0_ADCMPIE_Msk (0x1ul << EADC_CMP0_ADCMPIE_Pos)
#define | EADC_CMP0_CMPCOND_Pos (2)
#define | EADC_CMP0_CMPCOND_Msk (0x1ul << EADC_CMP0_CMPCOND_Pos)
#define | EADC_CMP0_CMPSPL_Pos (3)
#define | EADC_CMP0_CMPSPL_Msk (0x1ful << EADC_CMP0_CMPSPL_Pos)
#define | EADC_CMP0_CMPMCNT_Pos (8)
#define | EADC_CMP0_CMPMCNT_Msk (0xful << EADC_CMP0_CMPMCNT_Pos)
#define | EADC_CMP0_CMPWEN_Pos (15)
#define | EADC_CMP0_CMPWEN_Msk (0x1ul << EADC_CMP0_CMPWEN_Pos)
#define | EADC_CMP0_CMPDAT_Pos (16)
#define | EADC_CMP0_CMPDAT_Msk (0xffful << EADC_CMP0_CMPDAT_Pos)
#define | EADC_CMP1_ADCMPEN_Pos (0)
#define | EADC_CMP1_ADCMPEN_Msk (0x1ul << EADC_CMP1_ADCMPEN_Pos)
#define | EADC_CMP1_ADCMPIE_Pos (1)
#define | EADC_CMP1_ADCMPIE_Msk (0x1ul << EADC_CMP1_ADCMPIE_Pos)
#define | EADC_CMP1_CMPCOND_Pos (2)
#define | EADC_CMP1_CMPCOND_Msk (0x1ul << EADC_CMP1_CMPCOND_Pos)
#define | EADC_CMP1_CMPSPL_Pos (3)
#define | EADC_CMP1_CMPSPL_Msk (0x1ful << EADC_CMP1_CMPSPL_Pos)
#define | EADC_CMP1_CMPMCNT_Pos (8)
#define | EADC_CMP1_CMPMCNT_Msk (0xful << EADC_CMP1_CMPMCNT_Pos)
#define | EADC_CMP1_CMPWEN_Pos (15)
#define | EADC_CMP1_CMPWEN_Msk (0x1ul << EADC_CMP1_CMPWEN_Pos)
#define | EADC_CMP1_CMPDAT_Pos (16)
#define | EADC_CMP1_CMPDAT_Msk (0xffful << EADC_CMP1_CMPDAT_Pos)
#define | EADC_CMP2_ADCMPEN_Pos (0)
#define | EADC_CMP2_ADCMPEN_Msk (0x1ul << EADC_CMP2_ADCMPEN_Pos)
#define | EADC_CMP2_ADCMPIE_Pos (1)
#define | EADC_CMP2_ADCMPIE_Msk (0x1ul << EADC_CMP2_ADCMPIE_Pos)
#define | EADC_CMP2_CMPCOND_Pos (2)
#define | EADC_CMP2_CMPCOND_Msk (0x1ul << EADC_CMP2_CMPCOND_Pos)
#define | EADC_CMP2_CMPSPL_Pos (3)
#define | EADC_CMP2_CMPSPL_Msk (0x1ful << EADC_CMP2_CMPSPL_Pos)
#define | EADC_CMP2_CMPMCNT_Pos (8)
#define | EADC_CMP2_CMPMCNT_Msk (0xful << EADC_CMP2_CMPMCNT_Pos)
#define | EADC_CMP2_CMPWEN_Pos (15)
#define | EADC_CMP2_CMPWEN_Msk (0x1ul << EADC_CMP2_CMPWEN_Pos)
#define | EADC_CMP2_CMPDAT_Pos (16)
#define | EADC_CMP2_CMPDAT_Msk (0xffful << EADC_CMP2_CMPDAT_Pos)
#define | EADC_CMP3_ADCMPEN_Pos (0)
#define | EADC_CMP3_ADCMPEN_Msk (0x1ul << EADC_CMP3_ADCMPEN_Pos)
#define | EADC_CMP3_ADCMPIE_Pos (1)
#define | EADC_CMP3_ADCMPIE_Msk (0x1ul << EADC_CMP3_ADCMPIE_Pos)
#define | EADC_CMP3_CMPCOND_Pos (2)
#define | EADC_CMP3_CMPCOND_Msk (0x1ul << EADC_CMP3_CMPCOND_Pos)
#define | EADC_CMP3_CMPSPL_Pos (3)
#define | EADC_CMP3_CMPSPL_Msk (0x1ful << EADC_CMP3_CMPSPL_Pos)
#define | EADC_CMP3_CMPMCNT_Pos (8)
#define | EADC_CMP3_CMPMCNT_Msk (0xful << EADC_CMP3_CMPMCNT_Pos)
#define | EADC_CMP3_CMPWEN_Pos (15)
#define | EADC_CMP3_CMPWEN_Msk (0x1ul << EADC_CMP3_CMPWEN_Pos)
#define | EADC_CMP3_CMPDAT_Pos (16)
#define | EADC_CMP3_CMPDAT_Msk (0xffful << EADC_CMP3_CMPDAT_Pos)
#define | EADC_STATUS0_VALID_Pos (0)
#define | EADC_STATUS0_VALID_Msk (0xfffful << EADC_STATUS0_VALID_Pos)
#define | EADC_STATUS0_OV_Pos (16)
#define | EADC_STATUS0_OV_Msk (0xfffful << EADC_STATUS0_OV_Pos)
#define | EADC_STATUS1_VALID_Pos (0)
#define | EADC_STATUS1_VALID_Msk (0x7ul << EADC_STATUS1_VALID_Pos)
#define | EADC_STATUS1_OV_Pos (16)
#define | EADC_STATUS1_OV_Msk (0x7ul << EADC_STATUS1_OV_Pos)
#define | EADC_STATUS2_ADIF0_Pos (0)
#define | EADC_STATUS2_ADIF0_Msk (0x1ul << EADC_STATUS2_ADIF0_Pos)
#define | EADC_STATUS2_ADIF1_Pos (1)
#define | EADC_STATUS2_ADIF1_Msk (0x1ul << EADC_STATUS2_ADIF1_Pos)
#define | EADC_STATUS2_ADIF2_Pos (2)
#define | EADC_STATUS2_ADIF2_Msk (0x1ul << EADC_STATUS2_ADIF2_Pos)
#define | EADC_STATUS2_ADIF3_Pos (3)
#define | EADC_STATUS2_ADIF3_Msk (0x1ul << EADC_STATUS2_ADIF3_Pos)
#define | EADC_STATUS2_ADCMPF0_Pos (4)
#define | EADC_STATUS2_ADCMPF0_Msk (0x1ul << EADC_STATUS2_ADCMPF0_Pos)
#define | EADC_STATUS2_ADCMPF1_Pos (5)
#define | EADC_STATUS2_ADCMPF1_Msk (0x1ul << EADC_STATUS2_ADCMPF1_Pos)
#define | EADC_STATUS2_ADCMPF2_Pos (6)
#define | EADC_STATUS2_ADCMPF2_Msk (0x1ul << EADC_STATUS2_ADCMPF2_Pos)
#define | EADC_STATUS2_ADCMPF3_Pos (7)
#define | EADC_STATUS2_ADCMPF3_Msk (0x1ul << EADC_STATUS2_ADCMPF3_Pos)
#define | EADC_STATUS2_ADOVIF0_Pos (8)
#define | EADC_STATUS2_ADOVIF0_Msk (0x1ul << EADC_STATUS2_ADOVIF0_Pos)
#define | EADC_STATUS2_ADOVIF1_Pos (9)
#define | EADC_STATUS2_ADOVIF1_Msk (0x1ul << EADC_STATUS2_ADOVIF1_Pos)
#define | EADC_STATUS2_ADOVIF2_Pos (10)
#define | EADC_STATUS2_ADOVIF2_Msk (0x1ul << EADC_STATUS2_ADOVIF2_Pos)
#define | EADC_STATUS2_ADOVIF3_Pos (11)
#define | EADC_STATUS2_ADOVIF3_Msk (0x1ul << EADC_STATUS2_ADOVIF3_Pos)
#define | EADC_STATUS2_ADCMPO0_Pos (12)
#define | EADC_STATUS2_ADCMPO0_Msk (0x1ul << EADC_STATUS2_ADCMPO0_Pos)
#define | EADC_STATUS2_ADCMPO1_Pos (13)
#define | EADC_STATUS2_ADCMPO1_Msk (0x1ul << EADC_STATUS2_ADCMPO1_Pos)
#define | EADC_STATUS2_ADCMPO2_Pos (14)
#define | EADC_STATUS2_ADCMPO2_Msk (0x1ul << EADC_STATUS2_ADCMPO2_Pos)
#define | EADC_STATUS2_ADCMPO3_Pos (15)
#define | EADC_STATUS2_ADCMPO3_Msk (0x1ul << EADC_STATUS2_ADCMPO3_Pos)
#define | EADC_STATUS2_CHANNEL_Pos (16)
#define | EADC_STATUS2_CHANNEL_Msk (0x1ful << EADC_STATUS2_CHANNEL_Pos)
#define | EADC_STATUS2_BUSY_Pos (23)
#define | EADC_STATUS2_BUSY_Msk (0x1ul << EADC_STATUS2_BUSY_Pos)
#define | EADC_STATUS2_ADOVIF_Pos (24)
#define | EADC_STATUS2_ADOVIF_Msk (0x1ul << EADC_STATUS2_ADOVIF_Pos)
#define | EADC_STATUS2_STOVF_Pos (25)
#define | EADC_STATUS2_STOVF_Msk (0x1ul << EADC_STATUS2_STOVF_Pos)
#define | EADC_STATUS2_AVALID_Pos (26)
#define | EADC_STATUS2_AVALID_Msk (0x1ul << EADC_STATUS2_AVALID_Pos)
#define | EADC_STATUS2_AOV_Pos (27)
#define | EADC_STATUS2_AOV_Msk (0x1ul << EADC_STATUS2_AOV_Pos)
#define | EADC_STATUS3_CURSPL_Pos (0)
#define | EADC_STATUS3_CURSPL_Msk (0x1ful << EADC_STATUS3_CURSPL_Pos)
#define | EADC_DDAT0_RESULT_Pos (0)
#define | EADC_DDAT0_RESULT_Msk (0xfffful << EADC_DDAT0_RESULT_Pos)
#define | EADC_DDAT0_OV_Pos (16)
#define | EADC_DDAT0_OV_Msk (0x1ul << EADC_DDAT0_OV_Pos)
#define | EADC_DDAT0_VALID_Pos (17)
#define | EADC_DDAT0_VALID_Msk (0x1ul << EADC_DDAT0_VALID_Pos)
#define | EADC_DDAT1_RESULT_Pos (0)
#define | EADC_DDAT1_RESULT_Msk (0xfffful << EADC_DDAT1_RESULT_Pos)
#define | EADC_DDAT1_OV_Pos (16)
#define | EADC_DDAT1_OV_Msk (0x1ul << EADC_DDAT1_OV_Pos)
#define | EADC_DDAT1_VALID_Pos (17)
#define | EADC_DDAT1_VALID_Msk (0x1ul << EADC_DDAT1_VALID_Pos)
#define | EADC_DDAT2_RESULT_Pos (0)
#define | EADC_DDAT2_RESULT_Msk (0xfffful << EADC_DDAT2_RESULT_Pos)
#define | EADC_DDAT2_OV_Pos (16)
#define | EADC_DDAT2_OV_Msk (0x1ul << EADC_DDAT2_OV_Pos)
#define | EADC_DDAT2_VALID_Pos (17)
#define | EADC_DDAT2_VALID_Msk (0x1ul << EADC_DDAT2_VALID_Pos)
#define | EADC_DDAT3_RESULT_Pos (0)
#define | EADC_DDAT3_RESULT_Msk (0xfffful << EADC_DDAT3_RESULT_Pos)
#define | EADC_DDAT3_OV_Pos (16)
#define | EADC_DDAT3_OV_Msk (0x1ul << EADC_DDAT3_OV_Pos)
#define | EADC_DDAT3_VALID_Pos (17)
#define | EADC_DDAT3_VALID_Msk (0x1ul << EADC_DDAT3_VALID_Pos)
#define | EADC_PWRM_PWUPRDY_Pos (0)
#define | EADC_PWRM_PWUPRDY_Msk (0x1ul << EADC_PWRM_PWUPRDY_Pos)
#define | EADC_PWRM_PWUCALEN_Pos (1)
#define | EADC_PWRM_PWUCALEN_Msk (0x1ul << EADC_PWRM_PWUCALEN_Pos)
#define | EADC_PWRM_PWDMOD_Pos (2)
#define | EADC_PWRM_PWDMOD_Msk (0x3ul << EADC_PWRM_PWDMOD_Pos)
#define | EADC_PWRM_LDOSUT_Pos (8)
#define | EADC_PWRM_LDOSUT_Msk (0xffful << EADC_PWRM_LDOSUT_Pos)
#define | EADC_CALCTL_CALSTART_Pos (1)
#define | EADC_CALCTL_CALSTART_Msk (0x1ul << EADC_CALCTL_CALSTART_Pos)
#define | EADC_CALCTL_CALDONE_Pos (2)
#define | EADC_CALCTL_CALDONE_Msk (0x1ul << EADC_CALCTL_CALDONE_Pos)
#define | EADC_CALCTL_CALSEL_Pos (3)
#define | EADC_CALCTL_CALSEL_Msk (0x1ul << EADC_CALCTL_CALSEL_Pos)
#define | EADC_CALDWRD_CALWORD_Pos (0)
#define | EADC_CALDWRD_CALWORD_Msk (0x7ful << EADC_CALDWRD_CALWORD_Pos)

## Detailed Description

EADC register definition header file.

Version
  V1.00 SPDX-License-Identifier: Apache-2.0

Copyright
  (C) 2017-2020 Nuvoton Technology Corp. All rights reserved.

Definition in file eadc_reg.h.