| M480 BSP V3.05.001 The Board Support Package for M480 Series

Data Fields
HSUSBD_EP_T Struct Reference
Control Register

`#include <hsusbd_reg.h>`

## Data Fields
union {
__IO uint32_t EPDAT
__IO uint8_t EPDAT_BYTE
}; |
__IO uint32_t | EPINTSTS
__IO uint32_t | EPINTEN
__I uint32_t | EPDATCNT
__IO uint32_t | EPRSPCTL
__IO uint32_t | EPMPS
__IO uint32_t | EPTXCNT
__IO uint32_t | EPCFG
__IO uint32_t | EPBUFST
__IO uint32_t | EPBUFEND

## Detailed Description

    @addtogroup HSUSBD USB 2.0 Device Controller(HSUSBD)
    Memory Mapped Structure for HSUSBD Controller

Definition at line 26 of file hsusbd_reg.h.

## Field Documentation

## ◆ @1

union { ... }

[0x0000] Endpoint n Data Register

## ◆ EPBUFEND

HSUSBD_EP_T::EPBUFEND

[0x0024] Endpoint n RAM End Address Register

EPBUFEND

Offset: 0x24 Endpoint n RAM End Address Register

Bits | Field | Descriptions
[11:0] | EADDR | Endpoint End Address This is the end-address of the RAM space allocated for the endpoint A~L.

Definition at line 620 of file hsusbd_reg.h.

## ◆ EPBUFST

HSUSBD_EP_T::EPBUFST

[0x0020] Endpoint n RAM Start Address Register

EPBUFST

Offset: 0x20 Endpoint n RAM Start Address Register

Bits | Field | Descriptions
[11:0] | SADDR | Endpoint Start Address This is the start-address of the RAM space allocated for the endpoint A~L.

Definition at line 619 of file hsusbd_reg.h.

## ◆ EPCFG

HSUSBD_EP_T::EPCFG

[0x001c] Endpoint n Configuration Register

EPCFG

Offset: 0x1C Endpoint n Configuration Register

Bits | Field | Descriptions
[0] | EPEN | Endpoint Valid When set, this bit enables this endpoint This bit has no effect on Endpoint 0, which is always enabled. 0 = The endpoint Disabled. 1 = The endpoint Enabled.
[2:1] | EPTYPE | Endpoint Type This field selects the type of this endpoint. Endpoint 0 is forced to a Control type. 00 = Reserved. 01 = Bulk. 10 = Interrupt. 11 = Isochronous.
[3] | EPDIR | Endpoint Direction 0 = out-endpoint (Host OUT to Device). 1 = in-endpoint (Host IN to Device). Note: A maximum of one OUT and IN endpoint is allowed for each endpoint number.
[7:4] | EPNUM | Endpoint Number This field selects the number of the endpoint. Valid numbers 1 to 15. Note: Do not support two endpoints have same endpoint number.

Definition at line 618 of file hsusbd_reg.h.

## ◆ EPDAT

HSUSBD_EP_T::EPDAT

EPDAT

Offset: 0x00 Endpoint n Data Register

Bits | Field | Descriptions
[31:0] | EPDAT | Endpoint A~L Data Register Endpoint A~L data buffer for the buffer transaction (read or write). Note: Only word access is supported.

Definition at line 607 of file hsusbd_reg.h.

## ◆ EPDAT_BYTE

HSUSBD_EP_T::EPDAT_BYTE

EPDAT_BYTE

Offset: 0x00 Endpoint n Data Register

Bits | Field | Descriptions
[7:0] | EPDAT | Endpoint A~L Data Register Endpoint A~L data buffer for the buffer transaction (read or write). Note: Only byte access is supported.

Definition at line 608 of file hsusbd_reg.h.

## ◆ EPDATCNT

HSUSBD_EP_T::EPDATCNT

[0x000c] Endpoint n Data Available Count Register

EPDATCNT

Offset: 0x0C Endpoint n Data Available Count Register

Bits | Field | Descriptions
[15:0] | DATCNT | Data Count For an IN endpoint (EPDIR(USBD_EPxCFG[3] is high.), this register returns the number of valid bytes in the IN endpoint packet buffer. For an OUT endpoint (EPDIR(USBD_EPxCFG[3] is low.), this register returns the number of received valid bytes in the Host OUT transfer.
[30:16] | DMALOOP | DMA Loop This register is the remaining DMA loop to complete. Each loop means 32-byte transfer.

Definition at line 614 of file hsusbd_reg.h.

## ◆ EPINTEN

HSUSBD_EP_T::EPINTEN

[0x0008] Endpoint n Interrupt Enable Register

EPINTEN

Offset: 0x08 Endpoint n Interrupt Enable Register

Bits | Field | Descriptions
[0] | BUFFULLIEN | Buffer Full Interrupt When set, this bit enables a local interrupt to be set when a buffer full condition is detected on the bus. 0 = Buffer full interrupt Disabled. 1 = Buffer full interrupt Enabled.
[1] | BUFEMPTYIEN | Buffer Empty Interrupt When set, this bit enables a local interrupt to be set when a buffer empty condition is detected on the bus. 0 = Buffer empty interrupt Disabled. 1 = Buffer empty interrupt Enabled.
[2] | SHORTTXIEN | Short Packet Transferred Interrupt Enable Bit When set, this bit enables a local interrupt to be set when a short data packet has been transferred to/from the host. 0 = Short data packet interrupt Disabled. 1 = Short data packet interrupt Enabled.
[3] | TXPKIEN | Data Packet Transmitted Interrupt Enable Bit When set, this bit enables a local interrupt to be set when a data packet has been received from the host. 0 = Data packet has been received from the host interrupt Disabled. 1 = Data packet has been received from the host interrupt Enabled.
[4] | RXPKIEN | Data Packet Received Interrupt Enable Bit When set, this bit enables a local interrupt to be set when a data packet has been transmitted to the host. 0 = Data packet has been transmitted to the host interrupt Disabled. 1 = Data packet has been transmitted to the host interrupt Enabled.
[5] | OUTTKIEN | Data OUT Token Interrupt Enable Bit When set, this bit enables a local interrupt to be set when a Data OUT token has been received from the host. 0 = Data OUT token interrupt Disabled. 1 = Data OUT token interrupt Enabled.
[6] | INTKIEN | Data IN Token Interrupt Enable Bit When set, this bit enables a local interrupt to be set when a Data IN token has been received from the host. 0 = Data IN token interrupt Disabled. 1 = Data IN token interrupt Enabled.
[7] | PINGIEN | PING Token Interrupt Enable Bit When set, this bit enables a local interrupt to be set when a PING token has been received from the host. 0 = PING token interrupt Disabled. 1 = PING token interrupt Enabled.
[8] | NAKIEN | USB NAK Sent Interrupt Enable Bit When set, this bit enables a local interrupt to be set when a NAK token is sent to the host. 0 = NAK token interrupt Disabled. 1 = NAK token interrupt Enabled.
[9] | STALLIEN | USB STALL Sent Interrupt Enable Bit When set, this bit enables a local interrupt to be set when a stall token is sent to the host. 0 = STALL token interrupt Disabled. 1 = STALL token interrupt Enabled.
[10] | NYETIEN | NYET Interrupt Enable Bit When set, this bit enables a local interrupt to be set whenever NYET condition occurs on the bus for this endpoint. 0 = NYET condition interrupt Disabled. 1 = NYET condition interrupt Enabled.
[11] | ERRIEN | ERR Interrupt Enable Bit When set, this bit enables a local interrupt to be set whenever ERR condition occurs on the bus for this endpoint. 0 = Error event interrupt Disabled. 1 = Error event interrupt Enabled.
[12] | SHORTRXIEN | Bulk Out Short Packet Interrupt Enable Bit When set, this bit enables a local interrupt to be set whenever bulk out short packet occurs on the bus for this endpoint. 0 = Bulk out interrupt Disabled. 1 = Bulk out interrupt Enabled.

Definition at line 613 of file hsusbd_reg.h.

## ◆ EPINTSTS

HSUSBD_EP_T::EPINTSTS

[0x0004] Endpoint n Interrupt Status Register

EPINTSTS

Offset: 0x04 Endpoint n Interrupt Status Register

Bits | Field | Descriptions
[0] | BUFFULLIF | Buffer Full For an IN endpoint, the currently selected buffer is full, or no buffer is available to the local side for writing (no space to write) For an OUT endpoint, there is a buffer available on the local side, and there are FIFO full of bytes available to be read (entire packet is available for reading). 0 = The endpoint packet buffer is not full. 1 = The endpoint packet buffer is full. Note: This bit is read-only.
[1] | BUFEMPTYIF | Buffer Empty For an IN endpoint, a buffer is available to the local side for writing up to FIFO full of bytes. 0 = The endpoint buffer is not empty. 1 = The endpoint buffer is empty. For an OUT endpoint: 0 = The currently selected buffer has not a count of 0. 1 = The currently selected buffer has a count of 0, or no buffer is available on the local side (nothing to read). Note: This bit is read-only.
[2] | SHORTTXIF | Short Packet Transferred Interrupt 0 = The length of the last packet was not less than the Maximum Packet Size (EPMPS). 1 = The length of the last packet was less than the Maximum Packet Size (EPMPS). Note: Write 1 to clear this bit to 0.
[3] | TXPKIF | Data Packet Transmitted Interrupt 0 = Not a data packet is transmitted from the endpoint to the host. 1 = A data packet is transmitted from the endpoint to the host. Note: Write 1 to clear this bit to 0.
[4] | RXPKIF | Data Packet Received Interrupt 0 = No data packet is received from the host by the endpoint. 1 = A data packet is received from the host by the endpoint. Note: Write 1 to clear this bit to 0.
[5] | OUTTKIF | Data OUT Token Interrupt 0 = A Data OUT token has not been received from the host. 1 = A Data OUT token has been received from the host This bit also set by PING token (in high-speed only). Note: Write 1 to clear this bit to 0.
[6] | INTKIF | Data IN Token Interrupt 0 = Not Data IN token has been received from the host. 1 = A Data IN token has been received from the host. Note: Write 1 to clear this bit to 0.
[7] | PINGIF | PING Token Interrupt 0 = A Data PING token has not been received from the host. 1 = A Data PING token has been received from the host. Note: Write 1 to clear this bit to 0.
[8] | NAKIF | USB NAK Sent 0 = The last USB IN packet could be provided, and was acknowledged with an ACK. 1 = The last USB IN packet could not be provided, and was acknowledged with a NAK. Note: Write 1 to clear this bit to 0.
[9] | STALLIF | USB STALL Sent 0 = The last USB packet could be accepted or provided because the endpoint was stalled, and was acknowledged with a STALL. 1 = The last USB packet could not be accepted or provided because the endpoint was stalled, and was acknowledged with a STALL. Note: Write 1 to clear this bit to 0.
[10] | NYETIF | NYET Sent 0 = The space available in the RAM is sufficient to accommodate the next on coming data packet. 1 = The space available in the RAM is not sufficient to accommodate the next on coming data packet. Note: Write 1 to clear this bit to 0.
[11] | ERRIF | ERR Sent 0 = No any error in the transaction. 1 = There occurs any error in the transaction. Note: Write 1 to clear this bit to 0.
[12] | SHORTRXIF | Bulk Out Short Packet Received 0 = No bulk out short packet is received. 1 = Received bulk out short packet (including zero length packet). Note: Write 1 to clear this bit to 0.

Definition at line 612 of file hsusbd_reg.h.

## ◆ EPMPS

HSUSBD_EP_T::EPMPS

[0x0014] Endpoint n Maximum Packet Size Register

EPMPS

Offset: 0x14 Endpoint n Maximum Packet Size Register

Bits | Field | Descriptions
[10:0] | EPMPS | Endpoint Maximum Packet Size This field determines the Maximum Packet Size of the Endpoint.

Definition at line 616 of file hsusbd_reg.h.

## ◆ EPRSPCTL

HSUSBD_EP_T::EPRSPCTL

[0x0010] Endpoint n Response Control Register

EPRSPCTL

Offset: 0x10 Endpoint n Response Control Register

Bits | Field | Descriptions
[0] | FLUSH | Buffer Flush Writing 1 to this bit causes the packet buffer to be flushed and the corresponding EP_AVAIL register to be cleared This bit is self-clearing This bit should always be written after an configuration event. 0 = The packet buffer is not flushed. 1 = The packet buffer is flushed by user.
[2:1] | MODE | Mode Control The two bits decide the operation mode of the in-endpoint. 00: Auto-Validate Mode 01: Manual-Validate Mode 10: Fly Mode 11: Reserved These bits are not valid for an out-endpoint The auto validate mode will be activated when the reserved mode is selected
[3] | TOGGLE | Endpoint Toggle This bit is used to clear the endpoint data toggle bit Reading this bit returns the current state of the endpoint data toggle bit. The local CPU may use this bit to initialize the end-point's toggle in case of reception of a Set Interface request or a Clear Feature (ep_halt) request from the host Only when toggle bit is "1", this bit can be written into the inversed write data bit[3]. 0 = Not clear the endpoint data toggle bit. 1 = Clear the endpoint data toggle bit.
[4] | HALT | Endpoint Halt This bit is used to send a STALL handshake as response to the token from the host When an Endpoint Set Feature (ep_halt) is detected by the local CPU, it must write a '1' to this bit. 0 = Not send a STALL handshake as response to the token from the host. 1 = Send a STALL handshake as response to the token from the host.
[5] | ZEROLEN | Zero Length This bit is used to send a zero-length packet response to an IN-token When this bit is set, a zero packet is sent to the host on reception of an IN-token This bit gets cleared once the zero length data packet is sent. 0 = A zero packet is not sent to the host on reception of an IN-token. 1 = A zero packet is sent to the host on reception of an IN-token.
[6] | SHORTTXEN | Short Packet Transfer Enable This bit is applicable only in case of Auto-Validate Method This bit is set to validate any remaining data in the buffer which is not equal to the MPS of the endpoint, and happens to be the last transfer This bit gets cleared once the data packet is sent. 0 = Not validate any remaining data in the buffer which is not equal to the MPS of the endpoint. 1 = Validate any remaining data in the buffer which is not equal to the MPS of the endpoint.
[7] | DISBUF | Buffer Disable Bit This bit is used to receive unknown size OUT short packet The received packet size is reference USBD_EPxDATCNT register. 0 = Buffer Not Disabled when Bulk-OUT short packet is received. 1 = Buffer Disabled when Bulk-OUT short packet is received.

Definition at line 615 of file hsusbd_reg.h.

## ◆ EPTXCNT

HSUSBD_EP_T::EPTXCNT

[0x0018] Endpoint n Transfer Count Register

EPTXCNT

Offset: 0x18 Endpoint n Transfer Count Register

Bits | Field | Descriptions
[10:0] | TXCNT | Endpoint Transfer Count For IN endpoints, this field determines the total number of bytes to be sent to the host in case of manual validation method. For OUT endpoints, this field has no effect.

Definition at line 617 of file hsusbd_reg.h.

The documentation for this struct was generated from the following file:

- Device/Nuvoton/M480/Include/hsusbd_reg.h