36 #define ACMP_VNEG_PIN (0xFFUL) 37 #define ACMP_VNEG_BANDGAP (0x00UL) 38 #define ACMP_VNEG_4_OVER_24_VDD (0x80UL) 39 #define ACMP_VNEG_5_OVER_24_VDD (0x81UL) 40 #define ACMP_VNEG_6_OVER_24_VDD (0x82UL) 41 #define ACMP_VNEG_7_OVER_24_VDD (0x83UL) 42 #define ACMP_VNEG_8_OVER_24_VDD (0x84UL) 43 #define ACMP_VNEG_9_OVER_24_VDD (0x85UL) 44 #define ACMP_VNEG_10_OVER_24_VDD (0x86UL) 45 #define ACMP_VNEG_11_OVER_24_VDD (0x87UL) 46 #define ACMP_VNEG_12_OVER_24_VDD (0x88UL) 47 #define ACMP_VNEG_13_OVER_24_VDD (0x89UL) 48 #define ACMP_VNEG_14_OVER_24_VDD (0x8AUL) 49 #define ACMP_VNEG_15_OVER_24_VDD (0x8BUL) 50 #define ACMP_VNEG_16_OVER_24_VDD (0x8CUL) 51 #define ACMP_VNEG_17_OVER_24_VDD (0x8DUL) 52 #define ACMP_VNEG_18_OVER_24_VDD (0x8EUL) 53 #define ACMP_VNEG_19_OVER_24_VDD (0x8FUL) 54 #define ACMP_HYSTERESIS_ENABLE (1UL << ACMP_CMPCR_HYSEN_Pos) 55 #define ACMP_HYSTERESIS_DISABLE (0UL) 56 #define ACMP_CH0_POSPIN_P15 (0UL) 57 #define ACMP_CH0_POSPIN_P10 (1UL << ACMP_CMPCR_CPPSEL_Pos) 58 #define ACMP_CH0_POSPIN_P12 (2UL << ACMP_CMPCR_CPPSEL_Pos) 59 #define ACMP_CH0_POSPIN_P13 (3UL << ACMP_CMPCR_CPPSEL_Pos) 60 #define ACMP_CH1_POSPIN_P31 (0UL) 61 #define ACMP_CH1_POSPIN_P32 (1UL << ACMP_CMPCR_CPPSEL_Pos) 62 #define ACMP_CH1_POSPIN_P34 (2UL << ACMP_CMPCR_CPPSEL_Pos) 63 #define ACMP_CH1_POSPIN_P35 (3UL << ACMP_CMPCR_CPPSEL_Pos) 101 #define ACMP_SET_NEG_SRC(acmp, u32ChNum, u32Src) do{\ 102 if(u32Src == ACMP_VNEG_PIN)\ 103 ACMP->CMPCR[u32ChNum] &= ~ACMP_CMPCR_NEGSEL_Msk;\ 105 ACMP->CMPCR[u32ChNum] |= ACMP_CMPCR_NEGSEL_Msk;\ 106 ACMP->CMPRVCR = u32Src;\ 117 #define ACMP_ENABLE_HYSTERESIS(acmp, u32ChNum) (ACMP->CMPCR[u32ChNum] |= ACMP_CMPCR_HYSEN_Msk) 126 #define ACMP_DISABLE_HYSTERESIS(acmp, u32ChNum) (ACMP->CMPCR[u32ChNum] &= ~ACMP_CMPCR_HYSEN_Msk) 135 #define ACMP_ENABLE_INT(acmp, u32ChNum) (ACMP->CMPCR[u32ChNum] |= ACMP_CMPCR_ACMPIE_Msk) 144 #define ACMP_DISABLE_INT(acmp, u32ChNum) (ACMP->CMPCR[u32ChNum] &= ~ACMP_CMPCR_ACMPIE_Msk) 154 #define ACMP_ENABLE(acmp, u32ChNum) (ACMP->CMPCR[u32ChNum] |= ACMP_CMPCR_ACMPEN_Msk) 163 #define ACMP_DISABLE(acmp, u32ChNum) (ACMP->CMPCR[u32ChNum] &= ~ACMP_CMPCR_ACMPEN_Msk) 172 #define ACMP_GET_OUTPUT(acmp, u32ChNum) (ACMP->CMPSR & (ACMP_CMPSR_ACMPCO0_Msk<<(u32ChNum))?1:0) 181 #define ACMP_GET_INT_FLAG(acmp, u32ChNum) (ACMP->CMPSR & (ACMP_CMPSR_ACMPF0_Msk<<(u32ChNum))?1:0) 190 #define ACMP_CLR_INT_FLAG(acmp, u32ChNum) (ACMP->CMPSR = (ACMP_CMPSR_ACMPF0_Msk<<(u32ChNum))) 204 #define ACMP_SELECT_P(acmp, u32ChNum, u32Pin) (ACMP->CMPCR[u32ChNum] = (ACMP->CMPCR[u32ChNum] & ~ACMP_CMPCR_CPPSEL_Msk) | u32Pin) 228 #define ACMP_CRV_SEL(acmp, u32Level) (ACMP->CMPRVCR = (ACMP->CMPRVCR & ~ACMP_CMPRVCR_CRVS_Msk) | (u32Level & ~ACMP_CMPRVCR_OUT_SEL_Msk)) 235 #define ACMP_ENABLE_CRV(acmp) (ACMP->CMPRVCR |= ACMP_CMPRVCR_OUT_SEL_Msk) 242 #define ACMP_DISABLE_CRV(acmp) (ACMP->CMPRVCR &= ~ACMP_CMPRVCR_OUT_SEL_Msk) 251 #define ACMP_ENABLE_FALLING_EDGE_TRIGGER(acmp, u32ChNum) (ACMP->CMPCR[u32ChNum] |= ACMP_CMPCR_FALLING_Msk) 260 #define ACMP_DISABLE_FALLING_EDGE_TRIGGER(acmp, u32ChNum) (ACMP->CMPCR[u32ChNum] &= ~ACMP_CMPCR_FALLING_Msk) 269 #define ACMP_ENABLE_RISING_EDGE_TRIGGER(acmp, u32ChNum) (ACMP->CMPCR[u32ChNum] |= ACMP_CMPCR_RISING_Msk) 277 #define ACMP_DISABLE_RISING_EDGE_TRIGGER(acmp, u32ChNum) (ACMP->CMPCR[u32ChNum] &= ~ACMP_CMPCR_RISING_Msk) 279 void ACMP_Open(
ACMP_T *acmp, uint32_t u32ChNum, uint32_t u32NegSrc, uint32_t u32HysteresisEn);
void ACMP_Open(ACMP_T *acmp, uint32_t u32ChNum, uint32_t u32NegSrc, uint32_t u32HysteresisEn)
Configure the specified ACMP module.
void ACMP_Close(ACMP_T *acmp, uint32_t u32ChNum)
This function close comparator.